coregrind/m_gdbserver/server.h: define memcpy and memset to VG_ variants
[valgrind.git] / none / tests / ppc64 / test_isa_3_1_R1_RT.c
blob241d6cf41f5b5f693299f7dd1ddd27b1b9f9835a
1 /*
2 * Valgrind testcase for PowerPC ISA 3.1
4 * Copyright (C) 2019-2020 Will Schmidt <will_schmidt@vnet.ibm.com>
6 * 64bit build:
7 * gcc -Winline -Wall -g -O -mregnames -maltivec -m64
8 */
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of the
14 * License, or (at your option) any later version.
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
26 #include <stdio.h>
27 #ifdef HAS_ISA_3_1
28 #include <stdint.h>
29 #include <assert.h>
30 #include <stdlib.h>
31 #include <string.h>
32 #include <unistd.h>
33 #include <altivec.h>
34 #include <malloc.h>
36 #include <string.h>
37 #include <signal.h>
38 #include <setjmp.h>
40 /* Condition Register fields.
41 These are used to capture the condition register values immediately after
42 the instruction under test is executed. This is done to help prevent other
43 test overhead (switch statements, result compares, etc) from disturbing
44 the test case results. */
45 unsigned long current_cr;
46 unsigned long current_fpscr;
48 struct test_list_t current_test;
50 #include "isa_3_1_helpers.h"
52 static void test_plxvp_off0_R1 (void) {
53 PAD_ORI
54 __asm__ __volatile__ ("plxvp 20, +0(0),1" );
55 PAD_ORI
57 static void test_plxvp_off8_R1 (void) {
58 PAD_ORI
59 __asm__ __volatile__ ("plxvp 20, +8(0),1" );
60 PAD_ORI
62 static void test_plxvp_off16_R1 (void) {
63 PAD_ORI
64 __asm__ __volatile__ ("plxvp 20, +16(0),1" );
65 PAD_ORI
67 static void test_plxvp_off24_R1 (void) {
68 PAD_ORI
69 __asm__ __volatile__ ("plxvp 20, +24(0),1" );
70 PAD_ORI
72 static void test_plxvp_off32_R1 (void) {
73 PAD_ORI
74 __asm__ __volatile__ ("plxvp 20, +32(0),1" );
75 PAD_ORI
77 static void test_plbz_off0_R1 (void) {
78 PAD_ORI
79 __asm__ __volatile__ ("plbz %0, +0(0), 1" : "=r" (rt) );
80 PAD_ORI
82 static void test_plbz_off8_R1 (void) {
83 PAD_ORI
84 __asm__ __volatile__ ("plbz %0, +8(0), 1" : "=r" (rt) );
85 PAD_ORI
87 static void test_plbz_off16_R1 (void) {
88 PAD_ORI
89 __asm__ __volatile__ ("plbz %0, +16(0), 1" : "=r" (rt) );
90 PAD_ORI
92 static void test_plbz_off32_R1 (void) {
93 PAD_ORI
94 __asm__ __volatile__ ("plbz %0, +32(0), 1" : "=r" (rt) );
95 PAD_ORI
97 static void test_plbz_off64_R1 (void) {
98 PAD_ORI
99 __asm__ __volatile__ ("plbz %0, +64(0), 1" : "=r" (rt) );
100 PAD_ORI
101 PAD_ORI
103 static void test_plhz_off0_R1 (void) {
104 PAD_ORI
105 __asm__ __volatile__ ("plhz %0, +0(0), 1" : "=r" (rt) );
106 PAD_ORI
108 static void test_plhz_off8_R1 (void) {
109 PAD_ORI
110 __asm__ __volatile__ ("plhz %0, +8(0), 1" : "=r" (rt) );
111 PAD_ORI
113 static void test_plhz_off16_R1 (void) {
114 PAD_ORI
115 __asm__ __volatile__ ("plhz %0, +16(0), 1" : "=r" (rt) );
116 PAD_ORI
118 static void test_plhz_off32_R1 (void) {
119 PAD_ORI
120 __asm__ __volatile__ ("plhz %0, +32(0), 1" : "=r" (rt) );
121 PAD_ORI
123 static void test_plhz_off64_R1 (void) {
124 PAD_ORI
125 __asm__ __volatile__ ("plhz %0, +64(0), 1" : "=r" (rt) );
126 PAD_ORI
127 PAD_ORI
129 static void test_plha_off0_R1 (void) {
130 PAD_ORI
131 __asm__ __volatile__ ("plha %0, +0(0), 1" : "=r" (rt) );
132 PAD_ORI
134 static void test_plha_off8_R1 (void) {
135 PAD_ORI
136 __asm__ __volatile__ ("plha %0, +8(0), 1" : "=r" (rt) );
137 PAD_ORI
139 static void test_plha_off16_R1 (void) {
140 PAD_ORI
141 __asm__ __volatile__ ("plha %0, +16(0), 1" : "=r" (rt) );
142 PAD_ORI
144 static void test_plha_off32_R1 (void) {
145 PAD_ORI
146 __asm__ __volatile__ ("plha %0, +32(0), 1" : "=r" (rt) );
147 PAD_ORI
149 static void test_plha_off64_R1 (void) {
150 PAD_ORI
151 __asm__ __volatile__ ("plha %0, +64(0), 1" : "=r" (rt) );
152 PAD_ORI
153 PAD_ORI
155 static void test_plwz_off0_R1 (void) {
156 __asm__ __volatile__ ("plwz %0, +0(0), 1" : "=r" (rt) );
158 static void test_plwz_off8_R1 (void) {
159 __asm__ __volatile__ ("plwz %0, +8(0), 1" : "=r" (rt) );
161 static void test_plwz_off16_R1 (void) {
162 __asm__ __volatile__ ("plwz %0, +16(0), 1" : "=r" (rt) );
164 static void test_plwz_off32_R1 (void) {
165 PAD_ORI
166 __asm__ __volatile__ ("plwz %0, +32(0), 1" : "=r" (rt) );
167 PAD_ORI
169 static void test_plwz_off64_R1 (void) {
170 PAD_ORI
171 __asm__ __volatile__ ("plwz %0, +64(0), 1" : "=r" (rt) );
172 PAD_ORI
173 PAD_ORI
175 static void test_plwa_off0_R1 (void) {
176 __asm__ __volatile__ ("plwa %0, +0(0), 1" : "=r" (rt) );
178 static void test_plwa_off8_R1 (void) {
179 __asm__ __volatile__ ("plwa %0, +8(0), 1" : "=r" (rt) );
181 static void test_plwa_off16_R1 (void) {
182 __asm__ __volatile__ ("plwa %0, +16(0), 1" : "=r" (rt) );
184 static void test_plwa_off32_R1 (void) {
185 PAD_ORI
186 __asm__ __volatile__ ("plwa %0, +32(0), 1" : "=r" (rt) );
187 PAD_ORI
189 static void test_plwa_off64_R1 (void) {
190 PAD_ORI
191 __asm__ __volatile__ ("plwa %0, +64(0), 1" : "=r" (rt) );
192 PAD_ORI
193 PAD_ORI
195 static void test_pld_off0_R1 (void) {
196 PAD_ORI
197 __asm__ __volatile__ ("pld %0, +0(0), 1" : "=r" (rt) );
198 PAD_ORI
200 static void test_pld_off8_R1 (void) {
201 PAD_ORI
202 __asm__ __volatile__ ("pld %0, +8(0), 1" : "=r" (rt) );
203 PAD_ORI
205 static void test_pld_off16_R1 (void) {
206 PAD_ORI
207 __asm__ __volatile__ ("pld %0, +16(0), 1" : "=r" (rt) );
208 PAD_ORI
210 static void test_pld_off32_R1 (void) {
211 PAD_ORI
212 __asm__ __volatile__ ("pld %0, +32(0), 1" : "=r" (rt) );
213 PAD_ORI
215 static void test_pld_off64_R1 (void) {
216 PAD_ORI
217 __asm__ __volatile__ ("pld %0, +64(0), 1" : "=r" (rt) );
218 PAD_ORI
219 PAD_ORI
221 static void test_pstb_off0_R1 (void) {
222 __asm__ __volatile__ ("pstb %0, -0x1f400+0(0), 1" :: "r" (rs) );
224 static void test_pstb_off8_R1 (void) {
225 __asm__ __volatile__ ("pstb %0, -0x1f400+8(0), 1" :: "r" (rs) );
227 static void test_pstb_off16_R1 (void) {
228 __asm__ __volatile__ ("pstb %0, -0x1f400+16(0), 1" :: "r" (rs) );
230 static void test_pstb_off32_R1 (void) {
231 __asm__ __volatile__ ("pstb %0, -0x1f400+32(0), 1" :: "r" (rs) );
233 static void test_psth_off0_R1 (void) {
234 __asm__ __volatile__ ("psth %0, -0x1f400+0(0), 1" :: "r" (rs) );
236 static void test_psth_off8_R1 (void) {
237 __asm__ __volatile__ ("psth %0, -0x1f400+8(0), 1" :: "r" (rs) );
239 static void test_psth_off16_R1 (void) {
240 __asm__ __volatile__ ("psth %0, -0x1f400+16(0), 1" :: "r" (rs) );
242 static void test_psth_off32_R1 (void) {
243 __asm__ __volatile__ ("psth %0, -0x1f400+32(0), 1" :: "r" (rs) );
245 static void test_pstw_off0_R1 (void) {
246 __asm__ __volatile__ ("pstw %0, -0x1f400+0(0), 1" :: "r" (rs) );
248 static void test_pstw_off8_R1 (void) {
249 __asm__ __volatile__ ("pstw %0, -0x1f400+8(0), 1" :: "r" (rs) );
251 static void test_pstw_off16_R1 (void) {
252 __asm__ __volatile__ ("pstw %0, -0x1f400+16(0), 1" :: "r" (rs) );
254 static void test_pstw_off32_R1 (void) {
255 __asm__ __volatile__ ("pstw %0, -0x1f400+32(0), 1" :: "r" (rs) );
257 static void test_pstd_off0_R1 (void) {
258 __asm__ __volatile__ ("pstd %0, -0x1f400+0(0), 1" :: "r" (rs) );
260 static void test_pstd_off8_R1 (void) {
261 __asm__ __volatile__ ("pstd %0, -0x1f400+8(0), 1" :: "r" (rs) );
263 static void test_pstd_off16_R1 (void) {
264 __asm__ __volatile__ ("pstd %0, -0x1f400+16(0), 1" :: "r" (rs) );
266 static void test_pstd_off32_R1 (void) {
267 __asm__ __volatile__ ("pstd %0, -0x1f400+32(0), 1" :: "r" (rs) );
269 /* For the paddi tests; although we can get close to a read/write target
270 due to forcing where the .text and .bss sections are placed, there is
271 still enough codegen variability that having a raw value in the exp
272 file will not be determinative for these instructions.
273 Thus, compromise and just ensure that the generated value is an
274 address that lands within the reloc buffer, and use quasi magic
275 eyecatcher values in the return to indicate success. */
276 static void test_paddi_0_R1 (void) {
277 __asm__ __volatile__ ("paddi %0, 0, 0+0, 1" : "=r" (rt) );
278 rt = rt - TEXT_BSS_DELTA;
279 if (rt > pcrelative_buff_addr(0) &&
280 rt < pcrelative_buff_addr(RELOC_BUFFER_SIZE))
281 rt = 0xffff0000;
283 static void test_paddi_12_R1 (void) {
284 __asm__ __volatile__ ("paddi %0, 0, 0+12, 1" : "=r" (rt) );
285 rt = rt - TEXT_BSS_DELTA;
286 if (rt > pcrelative_buff_addr(0) &&
287 rt < pcrelative_buff_addr(RELOC_BUFFER_SIZE))
288 rt = 0xffff0012;
290 static void test_paddi_48_R1 (void) {
291 __asm__ __volatile__ ("paddi %0, 0, 0+48, 1" : "=r" (rt) );
292 rt = rt - TEXT_BSS_DELTA;
293 if (rt > pcrelative_buff_addr(0) &&
294 rt < pcrelative_buff_addr(RELOC_BUFFER_SIZE))
295 rt = 0xffff0048;
297 static void test_paddi_98_R1 (void) {
298 __asm__ __volatile__ ("paddi %0, 0, 0+98, 1" : "=r" (rt) );
299 rt = rt - TEXT_BSS_DELTA;
300 if (rt > pcrelative_buff_addr(0) &&
301 rt < pcrelative_buff_addr(RELOC_BUFFER_SIZE))
302 rt = 0xffff0098;
304 static void test_plq_off0_R1 (void) {
305 PAD_ORI
306 __asm__ __volatile__ ("plq %0, +0(0), 1" : "=r" (rt) );
307 PAD_ORI
309 static void test_plq_off8_R1 (void) {
310 PAD_ORI
311 __asm__ __volatile__ ("plq %0, +8(0), 1" : "=r" (rt) );
312 PAD_ORI
314 static void test_plq_off16_R1 (void) {
315 PAD_ORI
316 __asm__ __volatile__ ("plq %0, +16(0), 1" : "=r" (rt) );
317 PAD_ORI
319 static void test_plq_off32_R1 (void) {
320 PAD_ORI
321 __asm__ __volatile__ ("plq %0, +32(0), 1" : "=r" (rt) );
322 PAD_ORI
324 static void test_plq_off48_R1 (void) {
325 PAD_ORI
326 __asm__ __volatile__ ("plq %0, +48(0), 1" : "=r" (rt) );
327 PAD_ORI
329 static void test_plq_off64_R1 (void) {
330 PAD_ORI
331 __asm__ __volatile__ ("plq %0, +64(0), 1" : "=r" (rt) );
332 PAD_ORI
333 PAD_ORI
335 static void test_pstq_off0_R1 (void) {
336 __asm__ __volatile__ ("pstq 24, -0x1f400+0(0), 1" );
338 static void test_pstq_off8_R1 (void) {
339 __asm__ __volatile__ ("pstq 24, -0x1f400+8(0), 1" );
341 static void test_pstq_off16_R1 (void) {
342 __asm__ __volatile__ ("pstq 24, -0x1f400+16(0), 1" );
344 static void test_pstq_off32_R1 (void) {
345 __asm__ __volatile__ ("pstq 24, -0x1f400+32(0), 1" );
347 static void test_pstq_off64_R1 (void) {
348 __asm__ __volatile__ ("pstq 24, -0x1f400+64(0), 1" );
351 static test_list_t testgroup_generic[] = {
352 { &test_paddi_0_R1, "paddi 0_R1", "RT,RA,SI,R"}, /* bcwp */
353 { &test_paddi_12_R1, "paddi 12_R1", "RT,RA,SI,R"}, /* bcwp */
354 { &test_paddi_48_R1, "paddi 48_R1", "RT,RA,SI,R"}, /* bcwp */
355 { &test_paddi_98_R1, "paddi 98_R1", "RT,RA,SI,R"}, /* bcwp */
356 { &test_plbz_off0_R1, "plbz off0_R1", "RT,D(RA),R"}, /* bcwp */
357 { &test_plbz_off8_R1, "plbz off8_R1", "RT,D(RA),R"}, /* bcwp */
358 { &test_plbz_off16_R1, "plbz off16_R1", "RT,D(RA),R"}, /* bcwp */
359 { &test_plbz_off32_R1, "plbz off32_R1", "RT,D(RA),R"}, /* bcwp */
360 { &test_plbz_off64_R1, "plbz off64_R1", "RT,D(RA),R"}, /* bcwp */
361 { &test_pld_off0_R1, "pld off0_R1", "RT,D(RA),R"}, /* bcwp */
362 { &test_pld_off8_R1, "pld off8_R1", "RT,D(RA),R"}, /* bcwp */
363 { &test_pld_off16_R1, "pld off16_R1", "RT,D(RA),R"}, /* bcwp */
364 { &test_pld_off32_R1, "pld off32_R1", "RT,D(RA),R"}, /* bcwp */
365 { &test_pld_off64_R1, "pld off64_R1", "RT,D(RA),R"}, /* bcwp */
366 { &test_plha_off0_R1, "plha off0_R1", "RT,D(RA),R"}, /* bcwp */
367 { &test_plha_off8_R1, "plha off8_R1", "RT,D(RA),R"}, /* bcwp */
368 { &test_plha_off16_R1, "plha off16_R1", "RT,D(RA),R"}, /* bcwp */
369 { &test_plha_off32_R1, "plha off32_R1", "RT,D(RA),R"}, /* bcwp */
370 { &test_plha_off64_R1, "plha off64_R1", "RT,D(RA),R"}, /* bcwp */
371 { &test_plhz_off0_R1, "plhz off0_R1", "RT,D(RA),R"}, /* bcwp */
372 { &test_plhz_off8_R1, "plhz off8_R1", "RT,D(RA),R"}, /* bcwp */
373 { &test_plhz_off16_R1, "plhz off16_R1", "RT,D(RA),R"}, /* bcwp */
374 { &test_plhz_off32_R1, "plhz off32_R1", "RT,D(RA),R"}, /* bcwp */
375 { &test_plhz_off64_R1, "plhz off64_R1", "RT,D(RA),R"}, /* bcwp */
376 { &test_plq_off0_R1, "plq off0_R1", "RTp,D(RA),R"}, /* bcwp */
377 { &test_plq_off8_R1, "plq off8_R1", "RTp,D(RA),R"}, /* bcwp */
378 { &test_plq_off16_R1, "plq off16_R1", "RTp,D(RA),R"}, /* bcwp */
379 { &test_plq_off32_R1, "plq off32_R1", "RTp,D(RA),R"}, /* bcwp */
380 { &test_plq_off48_R1, "plq off48_R1", "RTp,D(RA),R"}, /* bcwp */
381 { &test_plq_off64_R1, "plq off64_R1", "RTp,D(RA),R"}, /* bcwp */
382 { &test_plwa_off0_R1, "plwa off0_R1", "RT,D(RA),R"}, /* bcwp */
383 { &test_plwa_off8_R1, "plwa off8_R1", "RT,D(RA),R"}, /* bcwp */
384 { &test_plwa_off16_R1, "plwa off16_R1", "RT,D(RA),R"}, /* bcwp */
385 { &test_plwa_off32_R1, "plwa off32_R1", "RT,D(RA),R"}, /* bcwp */
386 { &test_plwa_off64_R1, "plwa off64_R1", "RT,D(RA),R"}, /* bcwp */
387 { &test_plwz_off0_R1, "plwz off0_R1", "RT,D(RA),R"}, /* bcwp */
388 { &test_plwz_off8_R1, "plwz off8_R1", "RT,D(RA),R"}, /* bcwp */
389 { &test_plwz_off16_R1, "plwz off16_R1", "RT,D(RA),R"}, /* bcwp */
390 { &test_plwz_off32_R1, "plwz off32_R1", "RT,D(RA),R"}, /* bcwp */
391 { &test_plwz_off64_R1, "plwz off64_R1", "RT,D(RA),R"}, /* bcwp */
392 { &test_plxvp_off0_R1, "plxvp off0_R1", "XTp,D(RA),R"}, /* bcwp */
393 { &test_plxvp_off8_R1, "plxvp off8_R1", "XTp,D(RA),R"}, /* bcwp */
394 { &test_plxvp_off16_R1, "plxvp off16_R1", "XTp,D(RA),R"}, /* bcwp */
395 { &test_plxvp_off24_R1, "plxvp off24_R1", "XTp,D(RA),R"}, /* bcwp */
396 { &test_plxvp_off32_R1, "plxvp off32_R1", "XTp,D(RA),R"}, /* bcwp */
397 { &test_pstb_off0_R1, "pstb off0_R1", "RS,D(RA),R"}, /* bcwp */
398 { &test_pstb_off8_R1, "pstb off8_R1", "RS,D(RA),R"}, /* bcwp */
399 { &test_pstb_off16_R1, "pstb off16_R1", "RS,D(RA),R"}, /* bcwp */
400 { &test_pstb_off32_R1, "pstb off32_R1", "RS,D(RA),R"}, /* bcwp */
401 { &test_pstd_off0_R1, "pstd off0_R1", "RS,D(RA),R"}, /* bcwp */
402 { &test_pstd_off8_R1, "pstd off8_R1", "RS,D(RA),R"}, /* bcwp */
403 { &test_pstd_off16_R1, "pstd off16_R1", "RS,D(RA),R"}, /* bcwp */
404 { &test_pstd_off32_R1, "pstd off32_R1", "RS,D(RA),R"}, /* bcwp */
405 { &test_psth_off0_R1, "psth off0_R1", "RS,D(RA),R"}, /* bcwp */
406 { &test_psth_off8_R1, "psth off8_R1", "RS,D(RA),R"}, /* bcwp */
407 { &test_psth_off16_R1, "psth off16_R1", "RS,D(RA),R"}, /* bcwp */
408 { &test_psth_off32_R1, "psth off32_R1", "RS,D(RA),R"}, /* bcwp */
409 { &test_pstq_off0_R1, "pstq off0_R1", "RSp,D(RA),R"}, /* bcwp */
410 { &test_pstq_off8_R1, "pstq off8_R1", "RSp,D(RA),R"}, /* bcwp */
411 { &test_pstq_off16_R1, "pstq off16_R1", "RSp,D(RA),R"}, /* bcwp */
412 { &test_pstq_off32_R1, "pstq off32_R1", "RSp,D(RA),R"}, /* bcwp */
413 { &test_pstq_off64_R1, "pstq off64_R1", "RSp,D(RA),R"}, /* bcwp */
414 { &test_pstw_off0_R1, "pstw off0_R1", "RS,D(RA),R"}, /* bcwp */
415 { &test_pstw_off8_R1, "pstw off8_R1", "RS,D(RA),R"}, /* bcwp */
416 { &test_pstw_off16_R1, "pstw off16_R1", "RS,D(RA),R"}, /* bcwp */
417 { &test_pstw_off32_R1, "pstw off32_R1", "RS,D(RA),R"}, /* bcwp */
418 { NULL, NULL },
421 /* Allow skipping of tests. */
422 unsigned long test_count=0xffff;
423 unsigned long skip_count=0;
424 unsigned long setup_only=0;
426 /* Set up a setjmp/longjmp to gently handle our SIGILLs and SIGSEGVs. */
427 static jmp_buf mybuf;
429 /* This (testfunction_generic) is meant to handle all of the instruction
430 variations. The helpers set up the register and iterator values
431 as is appropriate for the instruction being tested. */
432 static void testfunction_generic (const char* instruction_name,
433 test_func_t test_function,
434 unsigned int ignore_flags,
435 char * cur_form) {
437 identify_form_components (instruction_name , cur_form);
438 debug_show_form (instruction_name, cur_form);
439 set_up_iterators ();
440 debug_show_iter_ranges ();
441 initialize_buffer (0);
442 init_pcrelative_write_target ();
443 debug_dump_buffer ();
445 for (vrai = a_start; vrai < a_iters ; vrai+=a_inc) {
446 for (vrbi = b_start; vrbi < b_iters ; vrbi+=b_inc) {
447 for (vrci = c_start; vrci < c_iters ; vrci+=c_inc) {
448 for (vrmi = m_start; (vrmi < m_iters) ; vrmi+=m_inc) {
449 CHECK_OVERRIDES
450 debug_show_current_iteration ();
451 // Be sure to initialize the target registers first.
452 initialize_target_registers ();
453 initialize_source_registers ();
454 printf ("%s", instruction_name);
455 print_register_header ();
456 printf( " =>"); fflush (stdout);
457 if (!setup_only) {
458 if (enable_setjmp) {
459 if ( setjmp ( mybuf ) ) {
460 printf("signal tripped. (FIXME)\n");
461 continue;
464 (*test_function) ();
466 print_register_footer ();
467 print_result_buffer ();
468 print_pcrelative_write_target ();
469 printf ("\n");
476 void mykillhandler ( int x ) { longjmp (mybuf, 1); }
477 void mysegvhandler ( int x ) { longjmp (mybuf, 1); }
479 static void do_tests ( void )
481 int groupcount;
482 char * cur_form;
483 test_group_t group_function = &testfunction_generic;
484 test_list_t *tests = testgroup_generic;
486 struct sigaction kill_action, segv_action;
487 struct sigaction old_kill_action, old_segv_action;
488 if (enable_setjmp) {
489 kill_action.sa_handler = mykillhandler;
490 segv_action.sa_handler = mysegvhandler;
491 sigemptyset ( &kill_action.sa_mask );
492 sigemptyset ( &segv_action.sa_mask );
493 kill_action.sa_flags = SA_NODEFER;
494 segv_action.sa_flags = SA_NODEFER;
495 sigaction ( SIGILL, &kill_action, &old_kill_action);
496 sigaction ( SIGSEGV, &segv_action, &old_segv_action);
499 for (groupcount = 0; tests[groupcount].name != NULL; groupcount++) {
500 cur_form = strdup(tests[groupcount].form);
501 current_test = tests[groupcount];
502 identify_instruction_by_func_name (current_test.name);
503 if (groupcount < skip_count) continue;
504 if (verbose) printf("Test #%d ,", groupcount);
505 if (verbose > 1) printf(" instruction %s (v=%d)", current_test.name, verbose);
506 (*group_function) (current_test.name, current_test.func, 0, cur_form );
507 printf ("\n");
508 if (groupcount >= (skip_count+test_count)) break;
510 if (debug_show_labels) printf("\n");
511 printf ("All done. Tested %d different instruction groups\n", groupcount);
514 static void usage (void)
516 fprintf(stderr,
517 "Usage: test_isa_XXX [OPTIONS]\n"
518 "\t-h: display this help and exit\n"
519 "\t-v: increase verbosity\n"
520 "\t-a <foo> : limit number of a-iterations to <foo>\n"
521 "\t-b <foo> : limit number of b-iterations to <foo>\n"
522 "\t-c <foo> : limit number of c-iterations to <foo>\n"
523 "\t-n <foo> : limit to this number of tests.\n"
524 "\t-r <foo>: run only test # <foo> \n"
525 "\t\n"
526 "\t-j :enable setjmp to recover from illegal insns. \n"
527 "\t-m :(dev only?) lock VRM value to zero.\n"
528 "\t-z :(dev only?) lock MC value to zero.\n"
529 "\t-p :(dev only?) disable prefix instructions\n"
530 "\t-s <foo>: skip <foo> tests \n"
531 "\t-c <foo>: stop after running <foo> # of tests \n"
532 "\t-f : Do the test setup but do not actually execute the test instruction. \n"
536 int main (int argc, char **argv)
538 int c;
539 while ((c = getopt(argc, argv, "dhjvmpfzs:a:b:c:n:r:")) != -1) {
540 switch (c) {
541 case 'h':
542 usage();
543 return 0;
545 case 'v':
546 verbose++;
547 break;
549 /* Options related to limiting the test iterations. */
550 case 'a':
551 a_limit=atoi (optarg);
552 printf ("limiting a-iters to %ld.\n", a_limit);
553 break;
554 case 'b':
555 b_limit=atoi (optarg);
556 printf ("limiting b-iters to %ld.\n", b_limit);
557 break;
558 case 'c':
559 c_limit=atoi (optarg);
560 printf ("limiting c-iters to %ld.\n", c_limit);
561 break;
562 case 'n': // run this number of tests.
563 test_count=atoi (optarg);
564 printf ("limiting to %ld tests\n", test_count);
565 break;
566 case 'r': // run just test #<foo>.
567 skip_count=atoi (optarg);
568 test_count=0;
569 if (verbose) printf("Running test number %ld\n", skip_count);
570 break;
571 case 's': // skip this number of tests.
572 skip_count=atoi (optarg);
573 printf ("skipping %ld tests\n", skip_count);
574 break;
576 /* debug options. */
577 case 'd':
578 dump_tables=1;
579 printf("DEBUG:dump_tables.\n");
580 break;
581 case 'f':
582 setup_only=1;
583 printf("DEBUG:setup_only.\n");
584 break;
585 case 'j':
586 enable_setjmp=1;
587 printf ("DEBUG:setjmp enabled.\n");
588 break;
589 case 'm':
590 vrm_override=1;
591 printf ("DEBUG:vrm override enabled.\n");
592 break;
593 case 'p':
594 prefix_override=1;
595 printf ("DEBUG:prefix override enabled.\n");
596 break;
597 case 'z':
598 mc_override=1;
599 printf ("DEBUG:MC override enabled.\n");
600 break;
601 default:
602 usage();
603 fprintf(stderr, "Unknown argument: '%c'\n", c);
607 generic_prologue ();
608 build_vsx_table ();
609 build_args_table ();
610 build_float_vsx_tables ();
612 if (dump_tables) {
613 dump_float_vsx_tables ();
614 dump_vsxargs ();
617 do_tests ();
619 return 0;
622 #else // HAS_ISA_3_1
623 int main (int argc, char **argv)
625 printf("NO ISA 3.1 SUPPORT\n");
626 return 0;
628 #endif