3 /* Dummy variable. Needed to work around GCC code generation bugs */
6 #define ADD_REG_MEM(insn, s1, s2, CARRY) \
8 unsigned long tmp = s1; \
10 asm volatile( "lghi 0," #CARRY "\n" \
15 : "+d" (tmp), "=d" (cc) \
16 : "d" (tmp), "Q" (s2) \
18 printf(#insn " " #CARRY " + %16.16lX + %16.16lX = %16.16lX (cc=%d)\n", s1, s2, tmp, cc); \
21 #define ADD_REG_REG(insn, s1, s2, CARRY) \
23 unsigned long tmp = s1; \
25 asm volatile( "lghi 0," #CARRY "\n" \
30 : "+d" (tmp), "=d" (cc) \
31 : "d" (tmp), "d" (s2) \
33 printf(#insn " " #CARRY " + %16.16lX + %16.16lX = %16.16lX (cc=%d)\n", s1, s2, tmp, cc); \
36 #define ADD_REG_IMM(insn, s1, s2, CARRY) \
38 unsigned long tmp = s1; \
40 asm volatile( "lghi 0," #CARRY "\n" \
45 : "+d" (tmp), "=d" (cc) \
48 printf(#insn " " #CARRY " + %16.16lX + %16.16lX = %16.16lX (cc=%d)\n", s1, (unsigned long) s2, tmp, cc); \
51 #define ADD_MEM_IMM(insn, s1, s2, CARRY) \
53 unsigned long tmp = s1, v2; \
54 register unsigned long *addr asm("5") = &tmp; \
56 asm volatile( "lghi 0," #CARRY "\n" \
61 : "+Q" (tmp), "=d" (cc) \
62 : "Q" (tmp), "d" (addr) \
64 v2 = (((signed long)((unsigned long)0x##s2 << 56)) >> 56); \
65 printf(#insn " " #CARRY " + %16.16lX + %16.16lX = %16.16lX (cc=%d)\n", s1, v2, tmp, cc); \
69 #define memsweep(i, s2, carryset) \
71 ADD_REG_MEM(i, 0ul, s2, carryset); \
72 ADD_REG_MEM(i, 1ul, s2, carryset); \
73 ADD_REG_MEM(i, 0xfffful, s2, carryset); \
74 ADD_REG_MEM(i, 0x7ffful, s2, carryset); \
75 ADD_REG_MEM(i, 0x8000ul, s2, carryset); \
76 ADD_REG_MEM(i, 0xfffffffful, s2, carryset); \
77 ADD_REG_MEM(i, 0x80000000ul, s2, carryset); \
78 ADD_REG_MEM(i, 0x7ffffffful, s2, carryset); \
79 ADD_REG_MEM(i, 0xfffffffffffffffful, s2, carryset); \
80 ADD_REG_MEM(i, 0x8000000000000000ul, s2, carryset); \
81 ADD_REG_MEM(i, 0x7ffffffffffffffful, s2, carryset); \
84 #define regsweep(i, s2, carryset) \
86 ADD_REG_REG(i, 0ul, s2, carryset); \
87 ADD_REG_REG(i, 1ul, s2, carryset); \
88 ADD_REG_REG(i, 0xfffful, s2, carryset); \
89 ADD_REG_REG(i, 0x7ffful, s2, carryset); \
90 ADD_REG_REG(i, 0x8000ul, s2, carryset); \
91 ADD_REG_REG(i, 0xfffffffful, s2, carryset); \
92 ADD_REG_REG(i, 0x80000000ul, s2, carryset); \
93 ADD_REG_REG(i, 0x7ffffffful, s2, carryset); \
94 ADD_REG_REG(i, 0xfffffffffffffffful, s2, carryset); \
95 ADD_REG_REG(i, 0x8000000000000000ul, s2, carryset); \
96 ADD_REG_REG(i, 0x7ffffffffffffffful, s2, carryset); \
99 #define immsweep(i, s2, carryset) \
101 ADD_REG_IMM(i, 0ul, s2, carryset); \
102 ADD_REG_IMM(i, 1ul, s2, carryset); \
103 ADD_REG_IMM(i, 0xfffful, s2, carryset); \
104 ADD_REG_IMM(i, 0x7ffful, s2, carryset); \
105 ADD_REG_IMM(i, 0x8000ul, s2, carryset); \
106 ADD_REG_IMM(i, 0xfffffffful, s2, carryset); \
107 ADD_REG_IMM(i, 0x80000000ul, s2, carryset); \
108 ADD_REG_IMM(i, 0x7ffffffful, s2, carryset); \
109 ADD_REG_IMM(i, 0xfffffffffffffffful, s2, carryset); \
110 ADD_REG_IMM(i, 0x8000000000000000ul, s2, carryset); \
111 ADD_REG_IMM(i, 0x7ffffffffffffffful, s2, carryset); \
114 #define memimmsweep(i, s2, carryset) \
116 ADD_MEM_IMM(i, 0ul, s2, carryset); \
117 ADD_MEM_IMM(i, 1ul, s2, carryset); \
118 ADD_MEM_IMM(i, 0xfffful, s2, carryset); \
119 ADD_MEM_IMM(i, 0x7ffful, s2, carryset); \
120 ADD_MEM_IMM(i, 0x8000ul, s2, carryset); \
121 ADD_MEM_IMM(i, 0xfffffffful, s2, carryset); \
122 ADD_MEM_IMM(i, 0x80000000ul, s2, carryset); \
123 ADD_MEM_IMM(i, 0x7ffffffful, s2, carryset); \
124 ADD_MEM_IMM(i, 0xfffffffffffffffful, s2, carryset); \
125 ADD_MEM_IMM(i, 0x8000000000000000ul, s2, carryset); \
126 ADD_MEM_IMM(i, 0x7ffffffffffffffful, s2, carryset); \
129 #define ahysweep(i, s2, carryset) \
131 ADD_REG_MEM(i, 0ul, s2, carryset); \
132 ADD_REG_MEM(i, 1ul, s2, carryset); \
133 ADD_REG_MEM(i, 0xfffful, s2, carryset); \
134 ADD_REG_MEM(i, 0x7ffful, s2, carryset); \
135 ADD_REG_MEM(i, 0x8000ul, s2, carryset); \
136 ADD_REG_MEM(i, 0xfffffffful, s2, carryset); \
137 ADD_REG_MEM(i, 0x80000000ul, s2, carryset); \
138 ADD_REG_MEM(i, 0x7ffffffful, s2, carryset); \
139 ADD_REG_MEM(i, 0xfffffffffffffffful, s2, carryset); \
140 ADD_REG_MEM(i, 0x8000000000000000ul, s2, carryset); \
141 ADD_REG_MEM(i, 0x7ffffffffffffffful, s2, carryset); \
144 #define ADD_REG_LDISP(insn, s1, s2, CARRY) \
146 register unsigned long tmp asm("2") = s1; \
147 register unsigned long *addr asm("5") = &s2; \
149 asm volatile( "lghi 0," #CARRY "\n" \
154 : "+d" (tmp), "=d" (cc) \
155 : "d" (tmp), "Q" (s2), "d"(addr) \
157 v = tmp; /* work around GCC code gen bug */ \
158 printf(#insn " " #CARRY " + %16.16lX + %16.16lX = %16.16lX (cc=%d)\n", s1, s2, v, cc); \
161 #define ldispsweep(i, s2, carryset) \
163 ADD_REG_LDISP(i, 0ul, s2, carryset); \
164 ADD_REG_LDISP(i, 1ul, s2, carryset); \
165 ADD_REG_LDISP(i, 0xfffful, s2, carryset); \
166 ADD_REG_LDISP(i, 0x7ffful, s2, carryset); \
167 ADD_REG_LDISP(i, 0x8000ul, s2, carryset); \
168 ADD_REG_LDISP(i, 0xfffffffful, s2, carryset); \
169 ADD_REG_LDISP(i, 0x80000000ul, s2, carryset); \
170 ADD_REG_LDISP(i, 0x7ffffffful, s2, carryset); \
171 ADD_REG_LDISP(i, 0xfffffffffffffffful, s2, carryset); \
172 ADD_REG_LDISP(i, 0x8000000000000000ul, s2, carryset); \
173 ADD_REG_LDISP(i, 0x7ffffffffffffffful, s2, carryset); \
176 #define ADD_REG_XIMM(insn, s1, us2,s2, CARRY) \
178 register unsigned long tmp asm("2") = s1; \
180 asm volatile( "lghi 0," #CARRY "\n" \
185 : "+d" (tmp), "=d" (cc) \
188 v = tmp; /* work around GCC code gen bug */ \
189 printf(#insn " " #CARRY " + %16.16lX + %16.16lX = %16.16lX (cc=%d)\n", s1, (unsigned long) 0x##us2##s2, v, cc); \
192 #define ximmsweep(i, us2, s2, carryset) \
194 ADD_REG_XIMM(i, 0ul, us2, s2, carryset); \
195 ADD_REG_XIMM(i, 1ul, us2, s2, carryset); \
196 ADD_REG_XIMM(i, 0xfffful, us2, s2, carryset); \
197 ADD_REG_XIMM(i, 0x7ffful, us2, s2, carryset); \
198 ADD_REG_XIMM(i, 0x8000ul, us2, s2, carryset); \
199 ADD_REG_XIMM(i, 0xfffffffful, us2, s2, carryset); \
200 ADD_REG_XIMM(i, 0x80000000ul, us2, s2, carryset); \
201 ADD_REG_XIMM(i, 0x7ffffffful, us2, s2, carryset); \
202 ADD_REG_XIMM(i, 0xfffffffffffffffful, us2, s2, carryset); \
203 ADD_REG_XIMM(i, 0x8000000000000000ul, us2, s2, carryset); \
204 ADD_REG_XIMM(i, 0x7ffffffffffffffful, us2, s2, carryset); \
207 #define for_each_m2(f) \
210 f(0x7ffffffffffffffful); \
211 f(0x8000000000000000ul); \
212 f(0xfffffffffffffffful); \
213 f(0x7fffffff00000000ul); \
214 f(0x8000000000000000ul); \
215 f(0xffffffff00000000ul); \
216 f(0x000000007ffffffful); \
217 f(0x0000000080000000ul); \
218 f(0x00000000fffffffful); \
219 f(0x000000000000fffful); \
220 f(0x0000000000007ffful); \
221 f(0x0000000000008000ul); \
222 f(0x000000000000fffful); \