callgrind/tests/simwork-cache.stderr.exp

   1
   2
   3 Events    : Ir Dr Dw I1mr D1mr D1mw ILmr DLmr DLmw
   4 Collected :
   5
   6 I   refs:
   7 I1  misses:
   8 LLi misses:
   9 I1  miss rate:
  10 LLi miss rate:
  11
  12 D   refs:
  13 D1  misses:
  14 LLd misses:
  15 D1  miss rate:
  16 LLd miss rate:
  17
  18 LL refs:
  19 LL misses:
  20 LL miss rate: