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drd/tests/swapcontext: Improve the portability of this test further
[valgrind.git] / none / tests / x86 / insn_basic.def
blob00906f97c063d2da33bf32f914d03b452adbd4bc
1 ###aaa eflags[0x11,0x01] al.ub[0x1] ah.ub[0x0] : => al.ub[0x1] ah.ub[0x00] eflags[0x11,0x00]
2 ###aaa eflags[0x11,0x01] al.ub[0x9] ah.ub[0x0] : => al.ub[0x9] ah.ub[0x00] eflags[0x11,0x00]
3 ###aaa eflags[0x11,0x00] al.ub[0xa] ah.ub[0x0] : => al.ub[0x0] ah.ub[0x01] eflags[0x11,0x11]
4 ###aaa eflags[0x11,0x00] al.ub[0xf] ah.ub[0x0] : => al.ub[0x5] ah.ub[0x01] eflags[0x11,0x11]
5 ###aaa eflags[0x11,0x10] al.ub[0x1] ah.ub[0x0] : => al.ub[0x7] ah.ub[0x01] eflags[0x11,0x11]
6 ###aaa eflags[0x11,0x10] al.ub[0x9] ah.ub[0x0] : => al.ub[0xf] ah.ub[0x01] eflags[0x11,0x11]
7 ###aaa eflags[0x11,0x10] al.ub[0xa] ah.ub[0x0] : => al.ub[0x0] ah.ub[0x01] eflags[0x11,0x11]
8 ###aaa eflags[0x11,0x10] al.ub[0xf] ah.ub[0x0] : => al.ub[0x5] ah.ub[0x01] eflags[0x11,0x11]
9 ###aad al.ub[37] ah.ub[2] : => al.ub[57] ah.ub[0]
10 ###aad al.ub[73] ah.ub[2] : => al.ub[93] ah.ub[0]
11 ###aam al.ub[37] ah.ub[0] : => al.ub[7] ah.ub[3]
12 ###aam al.ub[73] ah.ub[0] : => al.ub[3] ah.ub[7]
13 ###aas eflags[0x11,0x01] al.ub[0x1] ah.ub[0x2] : => al.ub[0x1] ah.ub[0x02] eflags[0x11,0x00]
14 ###aas eflags[0x11,0x01] al.ub[0x9] ah.ub[0x2] : => al.ub[0x9] ah.ub[0x02] eflags[0x11,0x00]
15 ###aas eflags[0x11,0x00] al.ub[0xa] ah.ub[0x2] : => al.ub[0x4] ah.ub[0x01] eflags[0x11,0x11]
16 ###aas eflags[0x11,0x00] al.ub[0xf] ah.ub[0x2] : => al.ub[0x9] ah.ub[0x01] eflags[0x11,0x11]
17 ###aas eflags[0x11,0x10] al.ub[0x1] ah.ub[0x2] : => al.ub[0xb] ah.ub[0x00] eflags[0x11,0x11]
18 ###aas eflags[0x11,0x10] al.ub[0x9] ah.ub[0x2] : => al.ub[0x3] ah.ub[0x01] eflags[0x11,0x11]
19 ###aas eflags[0x11,0x10] al.ub[0xa] ah.ub[0x2] : => al.ub[0x4] ah.ub[0x01] eflags[0x11,0x11]
20 ###aas eflags[0x11,0x10] al.ub[0xf] ah.ub[0x2] : => al.ub[0x9] ah.ub[0x01] eflags[0x11,0x11]
21 adcb eflags[0x1,0x0] : imm8[12] al.ub[34] => 1.ub[46]
22 adcb eflags[0x1,0x1] : imm8[12] al.ub[34] => 1.ub[47]
23 adcb eflags[0x1,0x0] : imm8[12] bl.ub[34] => 1.ub[46]
24 adcb eflags[0x1,0x1] : imm8[12] bl.ub[34] => 1.ub[47]
25 adcb eflags[0x1,0x0] : imm8[12] m8.ub[34] => 1.ub[46]
26 adcb eflags[0x1,0x1] : imm8[12] m8.ub[34] => 1.ub[47]
27 adcb eflags[0x1,0x0] : r8.ub[12] r8.ub[34] => 1.ub[46]
28 adcb eflags[0x1,0x1] : r8.ub[12] r8.ub[34] => 1.ub[47]
29 adcb eflags[0x1,0x0] : r8.ub[12] m8.ub[34] => 1.ub[46]
30 adcb eflags[0x1,0x1] : r8.ub[12] m8.ub[34] => 1.ub[47]
31 adcb eflags[0x1,0x0] : m8.ub[12] r8.ub[34] => 1.ub[46]
32 adcb eflags[0x1,0x1] : m8.ub[12] r8.ub[34] => 1.ub[47]
33 adcw eflags[0x1,0x0] : imm8[12] r16.uw[3456] => 1.uw[3468]
34 adcw eflags[0x1,0x1] : imm8[12] r16.uw[3456] => 1.uw[3469]
35 adcw eflags[0x1,0x0] : imm16[1234] ax.uw[5678] => 1.uw[6912]
36 adcw eflags[0x1,0x1] : imm16[1234] ax.uw[5678] => 1.uw[6913]
37 adcw eflags[0x1,0x0] : imm16[1234] bx.uw[5678] => 1.uw[6912]
38 adcw eflags[0x1,0x1] : imm16[1234] bx.uw[5678] => 1.uw[6913]
39 adcw eflags[0x1,0x0] : imm16[1234] m16.uw[5678] => 1.uw[6912]
40 adcw eflags[0x1,0x1] : imm16[1234] m16.uw[5678] => 1.uw[6913]
41 adcw eflags[0x1,0x0] : r16.uw[1234] r16.uw[5678] => 1.uw[6912]
42 adcw eflags[0x1,0x1] : r16.uw[1234] r16.uw[5678] => 1.uw[6913]
43 adcw eflags[0x1,0x0] : r16.uw[1234] m16.uw[5678] => 1.uw[6912]
44 adcw eflags[0x1,0x1] : r16.uw[1234] m16.uw[5678] => 1.uw[6913]
45 adcw eflags[0x1,0x0] : m16.uw[1234] r16.uw[5678] => 1.uw[6912]
46 adcw eflags[0x1,0x1] : m16.uw[1234] r16.uw[5678] => 1.uw[6913]
47 adcl eflags[0x1,0x0] : imm8[12] r32.ud[87654321] => 1.ud[87654333]
48 adcl eflags[0x1,0x1] : imm8[12] r32.ud[87654321] => 1.ud[87654334]
49 adcl eflags[0x1,0x0] : imm32[12345678] eax.ud[87654321] => 1.ud[99999999]
50 adcl eflags[0x1,0x1] : imm32[12345678] eax.ud[87654321] => 1.ud[100000000]
51 adcl eflags[0x1,0x0] : imm32[12345678] ebx.ud[87654321] => 1.ud[99999999]
52 adcl eflags[0x1,0x1] : imm32[12345678] ebx.ud[87654321] => 1.ud[100000000]
53 adcl eflags[0x1,0x0] : imm32[12345678] m32.ud[87654321] => 1.ud[99999999]
54 adcl eflags[0x1,0x1] : imm32[12345678] m32.ud[87654321] => 1.ud[100000000]
55 adcl eflags[0x1,0x0] : r32.ud[12345678] r32.ud[87654321] => 1.ud[99999999]
56 adcl eflags[0x1,0x1] : r32.ud[12345678] r32.ud[87654321] => 1.ud[100000000]
57 adcl eflags[0x1,0x0] : r32.ud[12345678] m32.ud[87654321] => 1.ud[99999999]
58 adcl eflags[0x1,0x1] : r32.ud[12345678] m32.ud[87654321] => 1.ud[100000000]
59 adcl eflags[0x1,0x0] : m32.ud[12345678] r32.ud[87654321] => 1.ud[99999999]
60 adcl eflags[0x1,0x1] : m32.ud[12345678] r32.ud[87654321] => 1.ud[100000000]
61 addb imm8[12] al.ub[34] => 1.ub[46]
62 addb imm8[12] bl.ub[34] => 1.ub[46]
63 addb imm8[12] m8.ub[34] => 1.ub[46]
64 addb r8.ub[12] r8.ub[34] => 1.ub[46]
65 addb r8.ub[12] m8.ub[34] => 1.ub[46]
66 addb m8.ub[12] r8.ub[34] => 1.ub[46]
67 addw imm8[12] r16.uw[3456] => 1.uw[3468]
68 addw imm16[1234] ax.uw[5678] => 1.uw[6912]
69 addw imm16[1234] bx.uw[5678] => 1.uw[6912]
70 addw imm16[1234] m16.uw[5678] => 1.uw[6912]
71 addw r16.uw[1234] r16.uw[5678] => 1.uw[6912]
72 addw r16.uw[1234] m16.uw[5678] => 1.uw[6912]
73 addw m16.uw[1234] r16.uw[5678] => 1.uw[6912]
74 addl imm8[12] r32.ud[87654321] => 1.ud[87654333]
75 addl imm32[12345678] eax.ud[87654321] => 1.ud[99999999]
76 addl imm32[12345678] ebx.ud[87654321] => 1.ud[99999999]
77 addl imm32[12345678] m32.ud[87654321] => 1.ud[99999999]
78 addl r32.ud[12345678] r32.ud[87654321] => 1.ud[99999999]
79 addl r32.ud[12345678] m32.ud[87654321] => 1.ud[99999999]
80 addl m32.ud[12345678] r32.ud[87654321] => 1.ud[99999999]
81 andb imm8[0x34] al.ub[0x56] => 1.ub[0x14]
82 andb imm8[0x34] bl.ub[0x56] => 1.ub[0x14]
83 andb imm8[0x34] m8.ub[0x56] => 1.ub[0x14]
84 andb r8.ub[0x34] r8.ub[0x56] => 1.ub[0x14]
85 andb r8.ub[0x34] m8.ub[0x56] => 1.ub[0x14]
86 andb m8.ub[0x34] r8.ub[0x56] => 1.ub[0x14]
87 andw imm8[0x31] r16.uw[0x1234] => 1.uw[0x0030]
88 andw imm16[0x4231] ax.uw[0x1234] => 1.uw[0x0230]
89 andw imm16[0x4231] bx.uw[0x1234] => 1.uw[0x0230]
90 andw imm16[0x4231] m16.uw[0x1234] => 1.uw[0x0230]
91 andw r16.uw[0x4231] r16.uw[0x1234] => 1.uw[0x0230]
92 andw r16.uw[0x4231] m16.uw[0x1234] => 1.uw[0x0230]
93 andw m16.uw[0x4231] r16.uw[0x1234] => 1.uw[0x0230]
94 andl imm8[0x31] r32.ud[0x12345678] => 1.ud[0x00000030]
95 andl imm32[0x86427531] eax.ud[0x12345678] => 1.ud[0x02005430]
96 andl imm32[0x86427531] ebx.ud[0x12345678] => 1.ud[0x02005430]
97 andl imm32[0x86427531] m32.ud[0x12345678] => 1.ud[0x02005430]
98 andl r32.ud[0x86427531] r32.ud[0x12345678] => 1.ud[0x02005430]
99 andl r32.ud[0x86427531] m32.ud[0x12345678] => 1.ud[0x02005430]
100 andl m32.ud[0x86427531] r32.ud[0x12345678] => 1.ud[0x02005430]
101 bsfw r16.uw[0x2468] r16.uw[0] => 1.uw[3]
102 bsfw m16.uw[0x8642] r16.uw[0] => 1.uw[1]
103 bsfl r32.ud[0x13572468] r32.ud[0] => 1.ud[3]
104 bsfl m32.ud[0x75318642] r32.ud[0] => 1.ud[1]
105 bsrw r16.uw[0x2468] r16.uw[0] => 1.uw[13]
106 bsrw m16.uw[0x8642] r16.uw[0] => 1.uw[15]
107 bsrl r32.ud[0x13572468] r32.ud[0] => 1.ud[28]
108 bsrl m32.ud[0x75318642] r32.ud[0] => 1.ud[30]
109 bswapl r32.ud[0x12345678] => 0.ud[0x78563412]
110 btw imm8[0] r16.uw[0x4231] => 1.uw[0x4231] eflags[0x001,0x001]
111 btw imm8[12] r16.uw[0x4231] => 1.uw[0x4231] eflags[0x001,0x000]
112 btw imm8[0] m16.uw[0x4231] => 1.uw[0x4231] eflags[0x001,0x001]
113 btw imm8[12] m16.uw[0x4231] => 1.uw[0x4231] eflags[0x001,0x000]
114 btw r16.uw[0] r16.uw[0x4231] => 1.uw[0x4231] eflags[0x001,0x001]
115 btw r16.uw[12] r16.uw[0x4231] => 1.uw[0x4231] eflags[0x001,0x000]
116 btw r16.uw[0] m16.uw[0x4231] => 1.uw[0x4231] eflags[0x001,0x001]
117 btw r16.uw[12] m16.uw[0x4231] => 1.uw[0x4231] eflags[0x001,0x000]
118 btl imm8[0] r32.ud[0x86427531] => 1.ud[0x86427531] eflags[0x001,0x001]
119 btl imm8[24] r32.ud[0x86427531] => 1.ud[0x86427531] eflags[0x001,0x000]
120 btl imm8[0] m32.ud[0x86427531] => 1.ud[0x86427531] eflags[0x001,0x001]
121 btl imm8[24] m32.ud[0x86427531] => 1.ud[0x86427531] eflags[0x001,0x000]
122 btl r32.ud[0] r32.ud[0x86427531] => 1.ud[0x86427531] eflags[0x001,0x001]
123 btl r32.ud[24] r32.ud[0x86427531] => 1.ud[0x86427531] eflags[0x001,0x000]
124 btl r32.ud[0] m32.ud[0x86427531] => 1.ud[0x86427531] eflags[0x001,0x001]
125 btl r32.ud[24] m32.ud[0x86427531] => 1.ud[0x86427531] eflags[0x001,0x000]
126 btcw imm8[0] r16.uw[0x4231] => 1.uw[0x4230] eflags[0x001,0x001]
127 btcw imm8[12] r16.uw[0x4231] => 1.uw[0x5231] eflags[0x001,0x000]
128 btcw imm8[0] m16.uw[0x4231] => 1.uw[0x4230] eflags[0x001,0x001]
129 btcw imm8[12] m16.uw[0x4231] => 1.uw[0x5231] eflags[0x001,0x000]
130 btcw r16.uw[0] r16.uw[0x4231] => 1.uw[0x4230] eflags[0x001,0x001]
131 btcw r16.uw[12] r16.uw[0x4231] => 1.uw[0x5231] eflags[0x001,0x000]
132 btcw r16.uw[0] m16.uw[0x4231] => 1.uw[0x4230] eflags[0x001,0x001]
133 btcw r16.uw[12] m16.uw[0x4231] => 1.uw[0x5231] eflags[0x001,0x000]
134 btcl imm8[0] r32.ud[0x86427531] => 1.ud[0x86427530] eflags[0x001,0x001]
135 btcl imm8[24] r32.ud[0x86427531] => 1.ud[0x87427531] eflags[0x001,0x000]
136 btcl imm8[0] m32.ud[0x86427531] => 1.ud[0x86427530] eflags[0x001,0x001]
137 btcl imm8[24] m32.ud[0x86427531] => 1.ud[0x87427531] eflags[0x001,0x000]
138 btcl r32.ud[0] r32.ud[0x86427531] => 1.ud[0x86427530] eflags[0x001,0x001]
139 btcl r32.ud[24] r32.ud[0x86427531] => 1.ud[0x87427531] eflags[0x001,0x000]
140 btcl r32.ud[0] m32.ud[0x86427531] => 1.ud[0x86427530] eflags[0x001,0x001]
141 btcl r32.ud[24] m32.ud[0x86427531] => 1.ud[0x87427531] eflags[0x001,0x000]
142 btrw imm8[0] r16.uw[0x4231] => 1.uw[0x4230] eflags[0x001,0x001]
143 btrw imm8[12] r16.uw[0x4231] => 1.uw[0x4231] eflags[0x001,0x000]
144 btrw imm8[0] m16.uw[0x4231] => 1.uw[0x4230] eflags[0x001,0x001]
145 btrw imm8[12] m16.uw[0x4231] => 1.uw[0x4231] eflags[0x001,0x000]
146 btrw r16.uw[0] r16.uw[0x4231] => 1.uw[0x4230] eflags[0x001,0x001]
147 btrw r16.uw[12] r16.uw[0x4231] => 1.uw[0x4231] eflags[0x001,0x000]
148 btrw r16.uw[0] m16.uw[0x4231] => 1.uw[0x4230] eflags[0x001,0x001]
149 btrw r16.uw[12] m16.uw[0x4231] => 1.uw[0x4231] eflags[0x001,0x000]
150 btrl imm8[0] r32.ud[0x86427531] => 1.ud[0x86427530] eflags[0x001,0x001]
151 btrl imm8[24] r32.ud[0x86427531] => 1.ud[0x86427531] eflags[0x001,0x000]
152 btrl imm8[0] m32.ud[0x86427531] => 1.ud[0x86427530] eflags[0x001,0x001]
153 btrl imm8[24] m32.ud[0x86427531] => 1.ud[0x86427531] eflags[0x001,0x000]
154 btrl r32.ud[0] r32.ud[0x86427531] => 1.ud[0x86427530] eflags[0x001,0x001]
155 btrl r32.ud[24] r32.ud[0x86427531] => 1.ud[0x86427531] eflags[0x001,0x000]
156 btrl r32.ud[0] m32.ud[0x86427531] => 1.ud[0x86427530] eflags[0x001,0x001]
157 btrl r32.ud[24] m32.ud[0x86427531] => 1.ud[0x86427531] eflags[0x001,0x000]
158 btsw imm8[0] r16.uw[0x4231] => 1.uw[0x4231] eflags[0x001,0x001]
159 btsw imm8[12] r16.uw[0x4231] => 1.uw[0x5231] eflags[0x001,0x000]
160 btsw imm8[0] m16.uw[0x4231] => 1.uw[0x4231] eflags[0x001,0x001]
161 btsw imm8[12] m16.uw[0x4231] => 1.uw[0x5231] eflags[0x001,0x000]
162 btsw r16.uw[0] r16.uw[0x4231] => 1.uw[0x4231] eflags[0x001,0x001]
163 btsw r16.uw[12] r16.uw[0x4231] => 1.uw[0x5231] eflags[0x001,0x000]
164 btsw r16.uw[0] m16.uw[0x4231] => 1.uw[0x4231] eflags[0x001,0x001]
165 btsw r16.uw[12] m16.uw[0x4231] => 1.uw[0x5231] eflags[0x001,0x000]
166 btsl imm8[0] r32.ud[0x86427531] => 1.ud[0x86427531] eflags[0x001,0x001]
167 btsl imm8[24] r32.ud[0x86427531] => 1.ud[0x87427531] eflags[0x001,0x000]
168 btsl imm8[0] m32.ud[0x86427531] => 1.ud[0x86427531] eflags[0x001,0x001]
169 btsl imm8[24] m32.ud[0x86427531] => 1.ud[0x87427531] eflags[0x001,0x000]
170 btsl r32.ud[0] r32.ud[0x86427531] => 1.ud[0x86427531] eflags[0x001,0x001]
171 btsl r32.ud[24] r32.ud[0x86427531] => 1.ud[0x87427531] eflags[0x001,0x000]
172 btsl r32.ud[0] m32.ud[0x86427531] => 1.ud[0x86427531] eflags[0x001,0x001]
173 btsl r32.ud[24] m32.ud[0x86427531] => 1.ud[0x87427531] eflags[0x001,0x000]
174 cbw al.sb[123] : => ax.sw[123]
175 cbw al.sb[-123] : => ax.sw[-123]
176 cdq eax.ud[0x12345678] : => edx.ud[0x00000000] eax.ud[0x12345678]
177 cdq eax.ud[0xfedcba98] : => edx.ud[0xffffffff] eax.ud[0xfedcba98]
178 clc eflags[0x001,0x000] : => eflags[0x001,0x000]
179 clc eflags[0x001,0x001] : => eflags[0x001,0x000]
180 cld eflags[0x400,0x000] : => eflags[0x400,0x000]
181 cld eflags[0x400,0x400] : => eflags[0x400,0x000]
182 cmc eflags[0x001,0x000] : => eflags[0x001,0x001]
183 cmc eflags[0x001,0x001] : => eflags[0x001,0x000]
184 cmpb imm8[3] al.ub[2] => eflags[0x010,0x010]
185 cmpb imm8[2] al.ub[3] => eflags[0x010,0x000]
186 cmpb imm8[12] al.ub[12] => eflags[0x044,0x044]
187 cmpb imm8[12] al.ub[34] => eflags[0x044,0x000]
188 cmpb imm8[34] al.ub[12] => eflags[0x081,0x081]
189 cmpb imm8[12] al.ub[34] => eflags[0x081,0x000]
190 cmpb imm8[100] al.sb[-100] => eflags[0x800,0x800]
191 cmpb imm8[50] al.sb[-50] => eflags[0x800,0x000]
192 cmpb imm8[-50] al.sb[50] => eflags[0x800,0x000]
193 cmpb imm8[-100] al.sb[100] => eflags[0x800,0x800]
194 cmpb imm8[3] r8.ub[2] => eflags[0x010,0x010]
195 cmpb imm8[2] r8.ub[3] => eflags[0x010,0x000]
196 cmpb imm8[12] r8.ub[12] => eflags[0x044,0x044]
197 cmpb imm8[12] r8.ub[34] => eflags[0x044,0x000]
198 cmpb imm8[34] r8.ub[12] => eflags[0x081,0x081]
199 cmpb imm8[12] r8.ub[34] => eflags[0x081,0x000]
200 cmpb imm8[100] r8.sb[-100] => eflags[0x800,0x800]
201 cmpb imm8[50] r8.sb[-50] => eflags[0x800,0x000]
202 cmpb imm8[-50] r8.sb[50] => eflags[0x800,0x000]
203 cmpb imm8[-100] r8.sb[100] => eflags[0x800,0x800]
204 cmpb imm8[3] m8.ub[2] => eflags[0x010,0x010]
205 cmpb imm8[2] m8.ub[3] => eflags[0x010,0x000]
206 cmpb imm8[12] m8.ub[12] => eflags[0x044,0x044]
207 cmpb imm8[12] m8.ub[34] => eflags[0x044,0x000]
208 cmpb imm8[34] m8.ub[12] => eflags[0x081,0x081]
209 cmpb imm8[12] m8.ub[34] => eflags[0x081,0x000]
210 cmpb imm8[100] m8.sb[-100] => eflags[0x800,0x800]
211 cmpb imm8[50] m8.sb[-50] => eflags[0x800,0x000]
212 cmpb imm8[-50] m8.sb[50] => eflags[0x800,0x000]
213 cmpb imm8[-100] m8.sb[100] => eflags[0x800,0x800]
214 cmpb r8.ub[3] r8.ub[2] => eflags[0x010,0x010]
215 cmpb r8.ub[2] r8.ub[3] => eflags[0x010,0x000]
216 cmpb r8.ub[12] r8.ub[12] => eflags[0x044,0x044]
217 cmpb r8.ub[12] r8.ub[34] => eflags[0x044,0x000]
218 cmpb r8.ub[34] r8.ub[12] => eflags[0x081,0x081]
219 cmpb r8.ub[12] r8.ub[34] => eflags[0x081,0x000]
220 cmpb r8.ub[100] r8.sb[-100] => eflags[0x800,0x800]
221 cmpb r8.ub[50] r8.sb[-50] => eflags[0x800,0x000]
222 cmpb r8.sb[-50] r8.sb[50] => eflags[0x800,0x000]
223 cmpb r8.sb[-100] r8.sb[100] => eflags[0x800,0x800]
224 cmpb r8.ub[3] m8.ub[2] => eflags[0x010,0x010]
225 cmpb r8.ub[2] m8.ub[3] => eflags[0x010,0x000]
226 cmpb r8.ub[12] m8.ub[12] => eflags[0x044,0x044]
227 cmpb r8.ub[12] m8.ub[34] => eflags[0x044,0x000]
228 cmpb r8.ub[34] m8.ub[12] => eflags[0x081,0x081]
229 cmpb r8.ub[12] m8.ub[34] => eflags[0x081,0x000]
230 cmpb r8.ub[100] m8.sb[-100] => eflags[0x800,0x800]
231 cmpb r8.ub[50] m8.sb[-50] => eflags[0x800,0x000]
232 cmpb r8.sb[-50] m8.sb[50] => eflags[0x800,0x000]
233 cmpb r8.sb[-100] m8.sb[100] => eflags[0x800,0x800]
234 cmpb m8.ub[3] r8.ub[2] => eflags[0x010,0x010]
235 cmpb m8.ub[2] r8.ub[3] => eflags[0x010,0x000]
236 cmpb m8.ub[12] r8.ub[12] => eflags[0x044,0x044]
237 cmpb m8.ub[12] r8.ub[34] => eflags[0x044,0x000]
238 cmpb m8.ub[34] r8.ub[12] => eflags[0x081,0x081]
239 cmpb m8.ub[12] r8.ub[34] => eflags[0x081,0x000]
240 cmpb m8.ub[100] r8.sb[-100] => eflags[0x800,0x800]
241 cmpb m8.ub[50] r8.sb[-50] => eflags[0x800,0x000]
242 cmpb m8.sb[-50] r8.sb[50] => eflags[0x800,0x000]
243 cmpb m8.sb[-100] r8.sb[100] => eflags[0x800,0x800]
244 cmpw imm8[3] r16.uw[2] => eflags[0x010,0x010]
245 cmpw imm8[2] r16.uw[3] => eflags[0x010,0x000]
246 cmpw imm8[12] r16.uw[12] => eflags[0x044,0x044]
247 cmpw imm8[12] r16.uw[34] => eflags[0x044,0x000]
248 cmpw imm8[34] r16.uw[12] => eflags[0x081,0x081]
249 cmpw imm8[12] r16.uw[34] => eflags[0x081,0x000]
250 cmpw imm8[100] r16.sw[-32700] => eflags[0x800,0x800]
251 cmpw imm8[50] r16.sw[-50] => eflags[0x800,0x000]
252 cmpw imm8[-50] r16.sw[50] => eflags[0x800,0x000]
253 cmpw imm8[-100] r16.sw[32700] => eflags[0x800,0x800]
254 cmpw imm8[3] m16.uw[2] => eflags[0x010,0x010]
255 cmpw imm8[2] m16.uw[3] => eflags[0x010,0x000]
256 cmpw imm8[12] m16.uw[12] => eflags[0x044,0x044]
257 cmpw imm8[12] m16.uw[34] => eflags[0x044,0x000]
258 cmpw imm8[34] m16.uw[12] => eflags[0x081,0x081]
259 cmpw imm8[12] m16.uw[34] => eflags[0x081,0x000]
260 cmpw imm8[100] m16.sw[-32700] => eflags[0x800,0x800]
261 cmpw imm8[50] m16.sw[-50] => eflags[0x800,0x000]
262 cmpw imm8[-50] m16.sw[50] => eflags[0x800,0x000]
263 cmpw imm8[-100] m16.sw[32700] => eflags[0x800,0x800]
264 cmpw imm16[3] ax.uw[2] => eflags[0x010,0x010]
265 cmpw imm16[2] ax.uw[3] => eflags[0x010,0x000]
266 cmpw imm16[12] ax.uw[12] => eflags[0x044,0x044]
267 cmpw imm16[12] ax.uw[34] => eflags[0x044,0x000]
268 cmpw imm16[34] ax.uw[12] => eflags[0x081,0x081]
269 cmpw imm16[12] ax.uw[34] => eflags[0x081,0x000]
270 cmpw imm16[100] ax.sw[-32700] => eflags[0x800,0x800]
271 cmpw imm16[50] ax.sw[-50] => eflags[0x800,0x000]
272 cmpw imm16[-50] ax.sw[50] => eflags[0x800,0x000]
273 cmpw imm16[-100] ax.sw[32700] => eflags[0x800,0x800]
274 cmpw imm16[3] r16.uw[2] => eflags[0x010,0x010]
275 cmpw imm16[2] r16.uw[3] => eflags[0x010,0x000]
276 cmpw imm16[12] r16.uw[12] => eflags[0x044,0x044]
277 cmpw imm16[12] r16.uw[34] => eflags[0x044,0x000]
278 cmpw imm16[34] r16.uw[12] => eflags[0x081,0x081]
279 cmpw imm16[12] r16.uw[34] => eflags[0x081,0x000]
280 cmpw imm16[100] r16.sw[-32700] => eflags[0x800,0x800]
281 cmpw imm16[50] r16.sw[-50] => eflags[0x800,0x000]
282 cmpw imm16[-50] r16.sw[50] => eflags[0x800,0x000]
283 cmpw imm16[-100] r16.sw[32700] => eflags[0x800,0x800]
284 cmpw imm16[3] m16.uw[2] => eflags[0x010,0x010]
285 cmpw imm16[2] m16.uw[3] => eflags[0x010,0x000]
286 cmpw imm16[12] m16.uw[12] => eflags[0x044,0x044]
287 cmpw imm16[12] m16.uw[34] => eflags[0x044,0x000]
288 cmpw imm16[34] m16.uw[12] => eflags[0x081,0x081]
289 cmpw imm16[12] m16.uw[34] => eflags[0x081,0x000]
290 cmpw imm16[100] m16.sw[-32700] => eflags[0x800,0x800]
291 cmpw imm16[50] m16.sw[-50] => eflags[0x800,0x000]
292 cmpw imm16[-50] m16.sw[50] => eflags[0x800,0x000]
293 cmpw imm16[-100] m16.sw[32700] => eflags[0x800,0x800]
294 cmpw r16.uw[3] r16.uw[2] => eflags[0x010,0x010]
295 cmpw r16.uw[2] r16.uw[3] => eflags[0x010,0x000]
296 cmpw r16.uw[12] r16.uw[12] => eflags[0x044,0x044]
297 cmpw r16.uw[12] r16.uw[34] => eflags[0x044,0x000]
298 cmpw r16.uw[34] r16.uw[12] => eflags[0x081,0x081]
299 cmpw r16.uw[12] r16.uw[34] => eflags[0x081,0x000]
300 cmpw r16.uw[100] r16.sw[-32700] => eflags[0x800,0x800]
301 cmpw r16.uw[50] r16.sw[-50] => eflags[0x800,0x000]
302 cmpw r16.sw[-50] r16.sw[50] => eflags[0x800,0x000]
303 cmpw r16.sw[-100] r16.sw[32700] => eflags[0x800,0x800]
304 cmpw r16.uw[3] m16.uw[2] => eflags[0x010,0x010]
305 cmpw r16.uw[2] m16.uw[3] => eflags[0x010,0x000]
306 cmpw r16.uw[12] m16.uw[12] => eflags[0x044,0x044]
307 cmpw r16.uw[12] m16.uw[34] => eflags[0x044,0x000]
308 cmpw r16.uw[34] m16.uw[12] => eflags[0x081,0x081]
309 cmpw r16.uw[12] m16.uw[34] => eflags[0x081,0x000]
310 cmpw r16.uw[100] m16.sw[-32700] => eflags[0x800,0x800]
311 cmpw r16.uw[50] m16.sw[-50] => eflags[0x800,0x000]
312 cmpw r16.sw[-50] m16.sw[50] => eflags[0x800,0x000]
313 cmpw r16.sw[-100] m16.sw[32700] => eflags[0x800,0x800]
314 cmpw m16.uw[3] r16.uw[2] => eflags[0x010,0x010]
315 cmpw m16.uw[2] r16.uw[3] => eflags[0x010,0x000]
316 cmpw m16.uw[12] r16.uw[12] => eflags[0x044,0x044]
317 cmpw m16.uw[12] r16.uw[34] => eflags[0x044,0x000]
318 cmpw m16.uw[34] r16.uw[12] => eflags[0x081,0x081]
319 cmpw m16.uw[12] r16.uw[34] => eflags[0x081,0x000]
320 cmpw m16.uw[100] r16.sw[-32700] => eflags[0x800,0x800]
321 cmpw m16.uw[50] r16.sw[-50] => eflags[0x800,0x000]
322 cmpw m16.sw[-50] r16.sw[50] => eflags[0x800,0x000]
323 cmpw m16.sw[-100] r16.sw[32700] => eflags[0x800,0x800]
324 cmpl imm8[3] r32.ud[2] => eflags[0x010,0x010]
325 cmpl imm8[2] r32.ud[3] => eflags[0x010,0x000]
326 cmpl imm8[12] r32.ud[12] => eflags[0x044,0x044]
327 cmpl imm8[12] r32.ud[34] => eflags[0x044,0x000]
328 cmpl imm8[34] r32.ud[12] => eflags[0x081,0x081]
329 cmpl imm8[12] r32.ud[34] => eflags[0x081,0x000]
330 cmpl imm8[100] r32.sd[-2147483600] => eflags[0x800,0x800]
331 cmpl imm8[50] r32.sd[-50] => eflags[0x800,0x000]
332 cmpl imm8[-50] r32.sd[50] => eflags[0x800,0x000]
333 cmpl imm8[-100] r32.sd[2147483600] => eflags[0x800,0x800]
334 cmpl imm8[3] m32.ud[2] => eflags[0x010,0x010]
335 cmpl imm8[2] m32.ud[3] => eflags[0x010,0x000]
336 cmpl imm8[12] m32.ud[12] => eflags[0x044,0x044]
337 cmpl imm8[12] m32.ud[34] => eflags[0x044,0x000]
338 cmpl imm8[34] m32.ud[12] => eflags[0x081,0x081]
339 cmpl imm8[12] m32.ud[34] => eflags[0x081,0x000]
340 cmpl imm8[100] m32.sd[-2147483600] => eflags[0x800,0x800]
341 cmpl imm8[50] m32.sd[-50] => eflags[0x800,0x000]
342 cmpl imm8[-50] m32.sd[50] => eflags[0x800,0x000]
343 cmpl imm8[-100] m32.sd[2147483600] => eflags[0x800,0x800]
344 cmpl imm32[3] eax.ud[2] => eflags[0x010,0x010]
345 cmpl imm32[2] eax.ud[3] => eflags[0x010,0x000]
346 cmpl imm32[12] eax.ud[12] => eflags[0x044,0x044]
347 cmpl imm32[12] eax.ud[34] => eflags[0x044,0x000]
348 cmpl imm32[34] eax.ud[12] => eflags[0x081,0x081]
349 cmpl imm32[12] eax.ud[34] => eflags[0x081,0x000]
350 cmpl imm32[100] eax.sd[-2147483600] => eflags[0x800,0x800]
351 cmpl imm32[50] eax.sd[-50] => eflags[0x800,0x000]
352 cmpl imm32[-50] eax.sd[50] => eflags[0x800,0x000]
353 cmpl imm32[-100] eax.sd[2147483600] => eflags[0x800,0x800]
354 cmpl imm32[3] r32.ud[2] => eflags[0x010,0x010]
355 cmpl imm32[2] r32.ud[3] => eflags[0x010,0x000]
356 cmpl imm32[12] r32.ud[12] => eflags[0x044,0x044]
357 cmpl imm32[12] r32.ud[34] => eflags[0x044,0x000]
358 cmpl imm32[34] r32.ud[12] => eflags[0x081,0x081]
359 cmpl imm32[12] r32.ud[34] => eflags[0x081,0x000]
360 cmpl imm32[100] r32.sd[-2147483600] => eflags[0x800,0x800]
361 cmpl imm32[50] r32.sd[-50] => eflags[0x800,0x000]
362 cmpl imm32[-50] r32.sd[50] => eflags[0x800,0x000]
363 cmpl imm32[-100] r32.sd[2147483600] => eflags[0x800,0x800]
364 cmpl imm32[3] m32.ud[2] => eflags[0x010,0x010]
365 cmpl imm32[2] m32.ud[3] => eflags[0x010,0x000]
366 cmpl imm32[12] m32.ud[12] => eflags[0x044,0x044]
367 cmpl imm32[12] m32.ud[34] => eflags[0x044,0x000]
368 cmpl imm32[34] m32.ud[12] => eflags[0x081,0x081]
369 cmpl imm32[12] m32.ud[34] => eflags[0x081,0x000]
370 cmpl imm32[100] m32.sd[-2147483600] => eflags[0x800,0x800]
371 cmpl imm32[50] m32.sd[-50] => eflags[0x800,0x000]
372 cmpl imm32[-50] m32.sd[50] => eflags[0x800,0x000]
373 cmpl imm32[-100] m32.sd[2147483600] => eflags[0x800,0x800]
374 cmpl r32.ud[3] r32.ud[2] => eflags[0x010,0x010]
375 cmpl r32.ud[2] r32.ud[3] => eflags[0x010,0x000]
376 cmpl r32.ud[12] r32.ud[12] => eflags[0x044,0x044]
377 cmpl r32.ud[12] r32.ud[34] => eflags[0x044,0x000]
378 cmpl r32.ud[34] r32.ud[12] => eflags[0x081,0x081]
379 cmpl r32.ud[12] r32.ud[34] => eflags[0x081,0x000]
380 cmpl r32.ud[100] r32.sd[-2147483600] => eflags[0x800,0x800]
381 cmpl r32.ud[50] r32.sd[-50] => eflags[0x800,0x000]
382 cmpl r32.sd[-50] r32.sd[50] => eflags[0x800,0x000]
383 cmpl r32.sd[-100] r32.sd[2147483600] => eflags[0x800,0x800]
384 cmpl r32.ud[3] m32.ud[2] => eflags[0x010,0x010]
385 cmpl r32.ud[2] m32.ud[3] => eflags[0x010,0x000]
386 cmpl r32.ud[12] m32.ud[12] => eflags[0x044,0x044]
387 cmpl r32.ud[12] m32.ud[34] => eflags[0x044,0x000]
388 cmpl r32.ud[34] m32.ud[12] => eflags[0x081,0x081]
389 cmpl r32.ud[12] m32.ud[34] => eflags[0x081,0x000]
390 cmpl r32.ud[100] m32.sd[-2147483600] => eflags[0x800,0x800]
391 cmpl r32.ud[50] m32.sd[-50] => eflags[0x800,0x000]
392 cmpl r32.sd[-50] m32.sd[50] => eflags[0x800,0x000]
393 cmpl r32.sd[-100] m32.sd[2147483600] => eflags[0x800,0x800]
394 cmpl m32.ud[3] r32.ud[2] => eflags[0x010,0x010]
395 cmpl m32.ud[2] r32.ud[3] => eflags[0x010,0x000]
396 cmpl m32.ud[12] r32.ud[12] => eflags[0x044,0x044]
397 cmpl m32.ud[12] r32.ud[34] => eflags[0x044,0x000]
398 cmpl m32.ud[34] r32.ud[12] => eflags[0x081,0x081]
399 cmpl m32.ud[12] r32.ud[34] => eflags[0x081,0x000]
400 cmpl m32.ud[100] r32.sd[-2147483600] => eflags[0x800,0x800]
401 cmpl m32.ud[50] r32.sd[-50] => eflags[0x800,0x000]
402 cmpl m32.sd[-50] r32.sd[50] => eflags[0x800,0x000]
403 cmpl m32.sd[-100] r32.sd[2147483600] => eflags[0x800,0x800]
404 cmpxchgb eflags[0x40,0x00] ax.uw[12] : r8.ub[56] r8.ub[12] => eflags[0x40,0x40] al.ub[12] 0.ub[56] 1.ub[56]
405 cmpxchgb eflags[0x40,0x40] al.ub[12] : r8.ub[56] r8.ub[34] => eflags[0x40,0x00] al.ub[34] 0.ub[56] 1.ub[34]
406 cmpxchgb eflags[0x40,0x00] al.ub[12] : r8.ub[56] m8.ub[12] => eflags[0x40,0x40] al.ub[12] 0.ub[56] 1.ub[56]
407 cmpxchgb eflags[0x40,0x40] al.ub[12] : r8.ub[56] m8.ub[34] => eflags[0x40,0x00] al.ub[34] 0.ub[56] 1.ub[34]
408 cmpxchgw eflags[0x40,0x00] ax.uw[123] : r16.uw[567] r16.uw[123] => eflags[0x40,0x40] ax.uw[123] 0.uw[567] 1.uw[567]
409 cmpxchgw eflags[0x40,0x40] ax.uw[123] : r16.uw[567] r16.uw[345] => eflags[0x40,0x00] ax.uw[345] 0.uw[567] 1.uw[345]
410 cmpxchgw eflags[0x40,0x00] ax.uw[123] : r16.uw[567] m16.uw[123] => eflags[0x40,0x40] ax.uw[123] 0.uw[567] 1.uw[567]
411 cmpxchgw eflags[0x40,0x40] ax.uw[123] : r16.uw[567] m16.uw[345] => eflags[0x40,0x00] ax.uw[345] 0.uw[567] 1.uw[345]
412 cmpxchgl eflags[0x40,0x00] eax.ud[1234] : r32.ud[5678] r32.ud[1234] => eflags[0x40,0x40] eax.ud[1234] 0.ud[5678] 1.ud[5678]
413 cmpxchgl eflags[0x40,0x40] eax.ud[1234] : r32.ud[5678] r32.ud[3456] => eflags[0x40,0x00] eax.ud[3456] 0.ud[5678] 1.ud[3456]
414 cmpxchgl eflags[0x40,0x00] eax.ud[1234] : r32.ud[5678] m32.ud[1234] => eflags[0x40,0x40] eax.ud[1234] 0.ud[5678] 1.ud[5678]
415 cmpxchgl eflags[0x40,0x40] eax.ud[1234] : r32.ud[5678] m32.ud[3456] => eflags[0x40,0x00] eax.ud[3456] 0.ud[5678] 1.ud[3456]
416 cwd ax.uw[0x1234] : => dx.uw[0x0000] ax.uw[0x1234]
417 cwd ax.uw[0xfedc] : => dx.uw[0xffff] ax.uw[0xfedc]
418 cwde ax.sw[12345] : => eax.sd[12345]
419 cwde ax.sw[-12345] : => eax.sd[-12345]
420 ###daa eflags[0x8d5,0x880] al.ub[0xae] : => al.ub[0x14] eflags[0xd5,0x15]
421 ###daa eflags[0x8d5,0x880] al.ub[0x2e] : => al.ub[0x34] eflags[0xd5,0x10]
422 ###das eflags[0x8d5,0x895] al.ub[0xee] : => al.ub[0x88] eflags[0xd5,0x95]
423 decb r8.ub[123] => 0.ub[122]
424 decb m8.ub[123] => 0.ub[122]
425 decw r16.uw[12345] => 0.uw[12344]
426 decw m16.uw[12345] => 0.uw[12344]
427 decl r32.ud[12345678] => 0.ud[12345677]
428 decl m32.ud[12345678] => 0.ud[12345677]
429 divb ax.uw[30276] : r8.ub[123] => al.ub[246] ah.ub[18]
430 divb ax.uw[30276] : m8.ub[123] => al.ub[246] ah.ub[18]
431 divw dx.uw[464] ax.uw[58794] : r16.uw[12345] => ax.uw[2468] dx.uw[38]
432 divw dx.uw[464] ax.uw[58794] : m16.uw[12345] => ax.uw[2468] dx.uw[38]
433 divl edx.ud[251958] eax.ud[673192206] : r32.ud[87654321] => eax.ud[12345678] edx.ud[20783136]
434 divl edx.ud[251958] eax.ud[673192206] : m32.ud[87654321] => eax.ud[12345678] edx.ud[20783136]
435 idivb ax.sw[-15157] : r8.sb[123] => al.sb[-123] ah.sb[-28]
436 idivb ax.sw[15157] : m8.sb[-123] => al.sb[-123] ah.sb[28]
437 idivw dx.sw[-464] ax.sw[-23456] : r16.sw[12345] => ax.sw[-2459] dx.sw[-10269]
438 idivw dx.sw[464] ax.sw[23456] : m16.sw[-12345] => ax.sw[-2465] dx.sw[1735]
439 idivl edx.sd[-251959] eax.sd[-673192206] : r32.sd[87654321] => eax.sd[-12345678] edx.sd[-20783136]
440 idivl edx.sd[251958] eax.sd[673192206] : m32.sd[-87654321] => eax.sd[-12345678] edx.sd[20783136]
441 imulb al.sb[123] : r8.sb[-123] => ax.sw[-15129]
442 imulb al.sb[-123] : m8.sb[123] => ax.sw[-15129]
443 imulw ax.sw[-12345] : r16.sw[12345] => dx.sw[-2326] ax.sw[-27825]
444 imulw ax.sw[12345] : m16.sw[-12345] => dx.sw[-2326] ax.sw[-27825]
445 imull eax.sd[-12345678] : r32.sd[12345678] => edx.sd[-35488] eax.sd[-260846532]
446 imull eax.sd[12345678] : m32.sd[-12345678] => edx.sd[-35488] eax.sd[-260846532]
447 imulw imm8[123] r16.uw[456] => 1.uw[56088]
448 imulw imm8[123] r16.uw[456] r16.uw[0] => 2.uw[56088]
449 imulw imm8[123] m16.uw[456] r16.uw[0] => 2.uw[56088]
450 imulw imm16[123] r16.uw[456] => 1.uw[56088]
451 imulw imm16[123] r16.uw[456] r16.uw[0] => 2.uw[56088]
452 imulw imm16[123] m16.uw[456] r16.uw[0] => 2.uw[56088]
453 imulw r16.uw[123] r16.uw[456] => 1.uw[56088]
454 imulw m16.uw[123] r16.uw[456] => 1.uw[56088]
455 imull imm8[123] r32.ud[67890] => 1.ud[8350470]
456 imull imm8[123] r32.ud[67890] r32.ud[0] => 2.ud[8350470]
457 imull imm8[123] m32.ud[67890] r32.ud[0] => 2.ud[8350470]
458 imull imm32[12345] r32.ud[67890] => 1.ud[838102050]
459 imull imm32[12345] r32.ud[67890] r32.ud[0] => 2.ud[838102050]
460 imull imm32[12345] m32.ud[67890] r32.ud[0] => 2.ud[838102050]
461 imull r32.ud[12345] r32.ud[67890] => 1.ud[838102050]
462 imull m32.ud[12345] r32.ud[67890] => 1.ud[838102050]
463 incb r8.ub[123] => 0.ub[124]
464 incb m8.ub[123] => 0.ub[124]
465 incw r16.uw[12345] => 0.uw[12346]
466 incw m16.uw[12345] => 0.uw[12346]
467 incl r32.ud[12345678] => 0.ud[12345679]
468 incl m32.ud[12345678] => 0.ud[12345679]
469 lahf eflags[0xff,0xfd] ah.ub[0x28] : => ah.ub[0xd7]
470 lahf eflags[0xff,0x28] ah.ub[0xfd] : => ah.ub[0x02]
471 movb imm8[123] r8.ub[0] => 1.ub[123]
472 movb imm8[123] m8.ub[0] => 1.ub[123]
473 movb r8.ub[123] r8.ub[0] => 1.ub[123]
474 movb r8.ub[123] m8.ub[0] => 1.ub[123]
475 movb m8.ub[123] r8.ub[0] => 1.ub[123]
476 movw imm16[12345] r16.uw[0] => 1.uw[12345]
477 movw imm16[12345] m16.uw[0] => 1.uw[12345]
478 movw r16.uw[12345] r16.uw[0] => 1.uw[12345]
479 movw r16.uw[12345] m16.uw[0] => 1.uw[12345]
480 movw m16.uw[12345] r16.uw[0] => 1.uw[12345]
481 movl imm32[12345678] r32.ud[0] => 1.ud[12345678]
482 movl imm32[12345678] m32.ud[0] => 1.ud[12345678]
483 movl r32.ud[12345678] r32.ud[0] => 1.ud[12345678]
484 movl r32.ud[12345678] m32.ud[0] => 1.ud[12345678]
485 movl m32.ud[12345678] r32.ud[0] => 1.ud[12345678]
486 movsbw r8.sb[123] r16.sw[0] => 1.sw[123]
487 movsbw m8.sb[-123] r16.sw[0] => 1.sw[-123]
488 movsbl r8.sb[123] r32.sd[0] => 1.sd[123]
489 movsbl m8.sb[-123] r32.sd[0] => 1.sd[-123]
490 movswl r16.sw[12345] r32.sd[0] => 1.sd[12345]
491 movswl m16.sw[-12345] r32.sd[0] => 1.sd[-12345]
492 movzbw r8.ub[123] r16.uw[0] => 1.uw[123]
493 movzbw m8.ub[246] r16.uw[0] => 1.uw[246]
494 movzbl r8.ub[123] r32.ud[0] => 1.ud[123]
495 movzbl m8.ub[246] r32.ud[0] => 1.ud[246]
496 movzwl r16.uw[12345] r32.ud[0] => 1.ud[12345]
497 movzwl m16.uw[49380] r32.ud[0] => 1.ud[49380]
498 mulb al.ub[123] : r8.ub[123] => ax.uw[15129]
499 mulb al.ub[123] : m8.ub[123] => ax.uw[15129]
500 mulw ax.uw[12345] : r16.uw[12345] => dx.uw[2325] ax.uw[27825]
501 mulw ax.uw[12345] : m16.uw[12345] => dx.uw[2325] ax.uw[27825]
502 mull eax.ud[12345678] : r32.ud[12345678] => edx.ud[35487] eax.ud[260846532]
503 mull eax.ud[12345678] : m32.ud[12345678] => edx.ud[35487] eax.ud[260846532]
504 negb r8.sb[123] => 0.sb[-123]
505 negb m8.sb[-123] => 0.sb[123]
506 negw r16.sw[12345] => 0.sw[-12345]
507 negw m16.sw[-12345] => 0.sw[12345]
508 negl r32.sd[12345678] => 0.sd[-12345678]
509 negl m32.sd[-12345678] => 0.sd[12345678]
510 notb r8.ub[0xca] => 0.ub[0x35]
511 notb m8.ub[0xca] => 0.ub[0x35]
512 notw r16.uw[0xf0ca] => 0.uw[0x0f35]
513 notw m16.uw[0xf0ca] => 0.uw[0x0f35]
514 notl r32.ud[0xff00f0ca] => 0.ud[0x00ff0f35]
515 notl m32.ud[0xff00f0ca] => 0.ud[0x00ff0f35]
516 orb imm8[0x34] al.ub[0x56] => 1.ub[0x76]
517 orb imm8[0x34] bl.ub[0x56] => 1.ub[0x76]
518 orb imm8[0x34] m8.ub[0x56] => 1.ub[0x76]
519 orb r8.ub[0x34] r8.ub[0x56] => 1.ub[0x76]
520 orb r8.ub[0x34] m8.ub[0x56] => 1.ub[0x76]
521 orb m8.ub[0x34] r8.ub[0x56] => 1.ub[0x76]
522 orw imm8[0x31] r16.uw[0x1234] => 1.uw[0x1235]
523 orw imm16[0x4231] ax.uw[0x1234] => 1.uw[0x5235]
524 orw imm16[0x4231] bx.uw[0x1234] => 1.uw[0x5235]
525 orw imm16[0x4231] m16.uw[0x1234] => 1.uw[0x5235]
526 orw r16.uw[0x4231] r16.uw[0x1234] => 1.uw[0x5235]
527 orw r16.uw[0x4231] m16.uw[0x1234] => 1.uw[0x5235]
528 orw m16.uw[0x4231] r16.uw[0x1234] => 1.uw[0x5235]
529 orl imm8[0x31] r32.ud[0x12345678] => 1.ud[0x12345679]
530 orl imm32[0x86427531] eax.ud[0x12345678] => 1.ud[0x96767779]
531 orl imm32[0x86427531] ebx.ud[0x12345678] => 1.ud[0x96767779]
532 orl imm32[0x86427531] m32.ud[0x12345678] => 1.ud[0x96767779]
533 orl r32.ud[0x86427531] r32.ud[0x12345678] => 1.ud[0x96767779]
534 orl r32.ud[0x86427531] m32.ud[0x12345678] => 1.ud[0x96767779]
535 orl m32.ud[0x86427531] r32.ud[0x12345678] => 1.ud[0x96767779]
536 rclb eflags[0x1,0x0] : r8.ub[0xca] => 0.ub[0x94] eflags[0x1,0x1]
537 rclb eflags[0x1,0x0] : m8.ub[0xca] => 0.ub[0x94] eflags[0x1,0x1]
538 rclb eflags[0x1,0x0] : imm8[2] r8.ub[0xca] => 1.ub[0x29] eflags[0x1,0x1]
539 rclb eflags[0x1,0x0] : imm8[2] m8.ub[0xca] => 1.ub[0x29] eflags[0x1,0x1]
540 rclb eflags[0x1,0x0] : cl.ub[2] r8.ub[0xca] => 1.ub[0x29] eflags[0x1,0x1]
541 rclb eflags[0x1,0x0] : cl.ub[2] m8.ub[0xca] => 1.ub[0x29] eflags[0x1,0x1]
542 rclw eflags[0x1,0x0] : r16.uw[0xf0ca] => 0.uw[0xe194] eflags[0x1,0x1]
543 rclw eflags[0x1,0x0] : m16.uw[0xf0ca] => 0.uw[0xe194] eflags[0x1,0x1]
544 rclw eflags[0x1,0x0] : imm8[4] r16.uw[0xf0ca] => 1.uw[0x0ca7] eflags[0x1,0x1]
545 rclw eflags[0x1,0x0] : imm8[4] m16.uw[0xf0ca] => 1.uw[0x0ca7] eflags[0x1,0x1]
546 rclw eflags[0x1,0x0] : cl.ub[4] r16.uw[0xf0ca] => 1.uw[0x0ca7] eflags[0x1,0x1]
547 rclw eflags[0x1,0x0] : cl.ub[4] m16.uw[0xf0ca] => 1.uw[0x0ca7] eflags[0x1,0x1]
548 rcll eflags[0x1,0x0] : r32.ud[0xff00f0ca] => 0.ud[0xfe01e194] eflags[0x1,0x1]
549 rcll eflags[0x1,0x0] : m32.ud[0xff00f0ca] => 0.ud[0xfe01e194] eflags[0x1,0x1]
550 rcll eflags[0x1,0x0] : imm8[8] r32.ud[0xff00f0ca] => 1.ud[0x00f0ca7f] eflags[0x1,0x1]
551 rcll eflags[0x1,0x0] : imm8[8] m32.ud[0xff00f0ca] => 1.ud[0x00f0ca7f] eflags[0x1,0x1]
552 rcll eflags[0x1,0x0] : cl.ub[8] r32.ud[0xff00f0ca] => 1.ud[0x00f0ca7f] eflags[0x1,0x1]
553 rcll eflags[0x1,0x0] : cl.ub[8] m32.ud[0xff00f0ca] => 1.ud[0x00f0ca7f] eflags[0x1,0x1]
554 rcrb eflags[0x1,0x1] : r8.ub[0xca] => 0.ub[0xe5] eflags[0x1,0x0]
555 rcrb eflags[0x1,0x1] : m8.ub[0xca] => 0.ub[0xe5] eflags[0x1,0x0]
556 rcrb eflags[0x1,0x0] : imm8[2] r8.ub[0xca] => 1.ub[0x32] eflags[0x1,0x1]
557 rcrb eflags[0x1,0x0] : imm8[2] m8.ub[0xca] => 1.ub[0x32] eflags[0x1,0x1]
558 rcrb eflags[0x1,0x0] : cl.ub[2] r8.ub[0xca] => 1.ub[0x32] eflags[0x1,0x1]
559 rcrb eflags[0x1,0x0] : cl.ub[2] m8.ub[0xca] => 1.ub[0x32] eflags[0x1,0x1]
560 rcrw eflags[0x1,0x1] : r16.uw[0xf0ca] => 0.uw[0xf865] eflags[0x1,0x0]
561 rcrw eflags[0x1,0x1] : m16.uw[0xf0ca] => 0.uw[0xf865] eflags[0x1,0x0]
562 rcrw eflags[0x1,0x0] : imm8[4] r16.uw[0xf0ca] => 1.uw[0x4f0c] eflags[0x1,0x1]
563 rcrw eflags[0x1,0x0] : imm8[4] m16.uw[0xf0ca] => 1.uw[0x4f0c] eflags[0x1,0x1]
564 rcrw eflags[0x1,0x0] : cl.ub[4] r16.uw[0xf0ca] => 1.uw[0x4f0c] eflags[0x1,0x1]
565 rcrw eflags[0x1,0x0] : cl.ub[4] m16.uw[0xf0ca] => 1.uw[0x4f0c] eflags[0x1,0x1]
566 rcrl eflags[0x1,0x1] : r32.ud[0xff00f0ca] => 0.ud[0xff807865] eflags[0x1,0x0]
567 rcrl eflags[0x1,0x1] : m32.ud[0xff00f0ca] => 0.ud[0xff807865] eflags[0x1,0x0]
568 rcrl eflags[0x1,0x0] : imm8[8] r32.ud[0xff00f0ca] => 1.ud[0x94ff00f0] eflags[0x1,0x1]
569 rcrl eflags[0x1,0x0] : imm8[8] m32.ud[0xff00f0ca] => 1.ud[0x94ff00f0] eflags[0x1,0x1]
570 rcrl eflags[0x1,0x0] : cl.ub[8] r32.ud[0xff00f0ca] => 1.ud[0x94ff00f0] eflags[0x1,0x1]
571 rcrl eflags[0x1,0x0] : cl.ub[8] m32.ud[0xff00f0ca] => 1.ud[0x94ff00f0] eflags[0x1,0x1]
572 rolb r8.ub[0xca] => 0.ub[0x95]
573 rolb m8.ub[0xca] => 0.ub[0x95]
574 rolb imm8[2] r8.ub[0xca] => 1.ub[0x2b]
575 rolb imm8[2] m8.ub[0xca] => 1.ub[0x2b]
576 rolb cl.ub[2] r8.ub[0xca] => 1.ub[0x2b]
577 rolb cl.ub[2] m8.ub[0xca] => 1.ub[0x2b]
578 rolw r16.uw[0xf0ca] => 0.uw[0xe195]
579 rolw m16.uw[0xf0ca] => 0.uw[0xe195]
580 rolw imm8[4] r16.uw[0xf0ca] => 1.uw[0x0caf]
581 rolw imm8[4] m16.uw[0xf0ca] => 1.uw[0x0caf]
582 rolw cl.ub[4] r16.uw[0xf0ca] => 1.uw[0x0caf]
583 rolw cl.ub[4] m16.uw[0xf0ca] => 1.uw[0x0caf]
584 roll r32.ud[0xff00f0ca] => 0.ud[0xfe01e195]
585 roll m32.ud[0xff00f0ca] => 0.ud[0xfe01e195]
586 roll imm8[8] r32.ud[0xff00f0ca] => 1.ud[0x00f0caff]
587 roll imm8[8] m32.ud[0xff00f0ca] => 1.ud[0x00f0caff]
588 roll cl.ub[8] r32.ud[0xff00f0ca] => 1.ud[0x00f0caff]
589 roll cl.ub[8] m32.ud[0xff00f0ca] => 1.ud[0x00f0caff]
590 rorb r8.ub[0xca] => 0.ub[0x65]
591 rorb m8.ub[0xca] => 0.ub[0x65]
592 rorb imm8[2] r8.ub[0xca] => 1.ub[0xb2]
593 rorb imm8[2] m8.ub[0xca] => 1.ub[0xb2]
594 rorb cl.ub[2] r8.ub[0xca] => 1.ub[0xb2]
595 rorb cl.ub[2] m8.ub[0xca] => 1.ub[0xb2]
596 rorw r16.uw[0xf0ca] => 0.uw[0x7865]
597 rorw m16.uw[0xf0ca] => 0.uw[0x7865]
598 rorw imm8[4] r16.uw[0xf0ca] => 1.uw[0xaf0c]
599 rorw imm8[4] m16.uw[0xf0ca] => 1.uw[0xaf0c]
600 rorw cl.ub[4] r16.uw[0xf0ca] => 1.uw[0xaf0c]
601 rorw cl.ub[4] m16.uw[0xf0ca] => 1.uw[0xaf0c]
602 rorl r32.ud[0xff00f0ca] => 0.ud[0x7f807865]
603 rorl m32.ud[0xff00f0ca] => 0.ud[0x7f807865]
604 rorl imm8[8] r32.ud[0xff00f0ca] => 1.ud[0xcaff00f0]
605 rorl imm8[8] m32.ud[0xff00f0ca] => 1.ud[0xcaff00f0]
606 rorl cl.ub[8] r32.ud[0xff00f0ca] => 1.ud[0xcaff00f0]
607 rorl cl.ub[8] m32.ud[0xff00f0ca] => 1.ud[0xcaff00f0]
608 sahf eflags[0xff,0x28] ah.ub[0xfd] : => eflags[0xfd,0xd5]
609 sahf eflags[0xff,0xfd] ah.ub[0x28] : => eflags[0xfd,0x00]
610 salb r8.ub[0xca] => 0.ub[0x94]
611 salb m8.ub[0xca] => 0.ub[0x94]
612 salb imm8[2] r8.ub[0xca] => 1.ub[0x28]
613 salb imm8[2] m8.ub[0xca] => 1.ub[0x28]
614 salb cl.ub[2] r8.ub[0xca] => 1.ub[0x28]
615 salb cl.ub[2] m8.ub[0xca] => 1.ub[0x28]
616 salw r16.uw[0xf0ca] => 0.uw[0xe194]
617 salw m16.uw[0xf0ca] => 0.uw[0xe194]
618 salw imm8[4] r16.uw[0xf0ca] => 1.uw[0x0ca0]
619 salw imm8[4] m16.uw[0xf0ca] => 1.uw[0x0ca0]
620 salw cl.ub[4] r16.uw[0xf0ca] => 1.uw[0x0ca0]
621 salw cl.ub[4] m16.uw[0xf0ca] => 1.uw[0x0ca0]
622 sall r32.ud[0xff00f0ca] => 0.ud[0xfe01e194]
623 sall m32.ud[0xff00f0ca] => 0.ud[0xfe01e194]
624 sall imm8[8] r32.ud[0xff00f0ca] => 1.ud[0x00f0ca00]
625 sall imm8[8] m32.ud[0xff00f0ca] => 1.ud[0x00f0ca00]
626 sall cl.ub[8] r32.ud[0xff00f0ca] => 1.ud[0x00f0ca00]
627 sall cl.ub[8] m32.ud[0xff00f0ca] => 1.ud[0x00f0ca00]
628 sarb r8.ub[0xca] => 0.ub[0xe5]
629 sarb m8.ub[0xca] => 0.ub[0xe5]
630 sarb imm8[2] r8.ub[0xca] => 1.ub[0xf2]
631 sarb imm8[2] m8.ub[0xca] => 1.ub[0xf2]
632 sarb cl.ub[2] r8.ub[0xca] => 1.ub[0xf2]
633 sarb cl.ub[2] m8.ub[0xca] => 1.ub[0xf2]
634 sarw r16.uw[0xf0ca] => 0.uw[0xf865]
635 sarw m16.uw[0xf0ca] => 0.uw[0xf865]
636 sarw imm8[4] r16.uw[0xf0ca] => 1.uw[0xff0c]
637 sarw imm8[4] m16.uw[0xf0ca] => 1.uw[0xff0c]
638 sarw cl.ub[4] r16.uw[0xf0ca] => 1.uw[0xff0c]
639 sarw cl.ub[4] m16.uw[0xf0ca] => 1.uw[0xff0c]
640 sarl r32.ud[0xff00f0ca] => 0.ud[0xff807865]
641 sarl m32.ud[0xff00f0ca] => 0.ud[0xff807865]
642 sarl imm8[8] r32.ud[0xff00f0ca] => 1.ud[0xffff00f0]
643 sarl imm8[8] m32.ud[0xff00f0ca] => 1.ud[0xffff00f0]
644 sarl cl.ub[8] r32.ud[0xff00f0ca] => 1.ud[0xffff00f0]
645 sarl cl.ub[8] m32.ud[0xff00f0ca] => 1.ud[0xffff00f0]
646 sbbb eflags[0x1,0x0] : imm8[12] al.ub[34] => 1.ub[22]
647 sbbb eflags[0x1,0x1] : imm8[12] al.ub[34] => 1.ub[21]
648 sbbb eflags[0x1,0x0] : imm8[12] bl.ub[34] => 1.ub[22]
649 sbbb eflags[0x1,0x1] : imm8[12] bl.ub[34] => 1.ub[21]
650 sbbb eflags[0x1,0x0] : imm8[12] m8.ub[34] => 1.ub[22]
651 sbbb eflags[0x1,0x1] : imm8[12] m8.ub[34] => 1.ub[21]
652 sbbb eflags[0x1,0x0] : r8.ub[12] r8.ub[34] => 1.ub[22]
653 sbbb eflags[0x1,0x1] : r8.ub[12] r8.ub[34] => 1.ub[21]
654 sbbb eflags[0x1,0x0] : r8.ub[12] m8.ub[34] => 1.ub[22]
655 sbbb eflags[0x1,0x1] : r8.ub[12] m8.ub[34] => 1.ub[21]
656 sbbb eflags[0x1,0x0] : m8.ub[12] r8.ub[34] => 1.ub[22]
657 sbbb eflags[0x1,0x1] : m8.ub[12] r8.ub[34] => 1.ub[21]
658 sbbw eflags[0x1,0x0] : imm8[12] r16.uw[3456] => 1.uw[3444]
659 sbbw eflags[0x1,0x1] : imm8[12] r16.uw[3456] => 1.uw[3443]
660 sbbw eflags[0x1,0x0] : imm16[1234] ax.uw[5678] => 1.uw[4444]
661 sbbw eflags[0x1,0x1] : imm16[1234] ax.uw[5678] => 1.uw[4443]
662 sbbw eflags[0x1,0x0] : imm16[1234] bx.uw[5678] => 1.uw[4444]
663 sbbw eflags[0x1,0x1] : imm16[1234] bx.uw[5678] => 1.uw[4443]
664 sbbw eflags[0x1,0x0] : imm16[1234] m16.uw[5678] => 1.uw[4444]
665 sbbw eflags[0x1,0x1] : imm16[1234] m16.uw[5678] => 1.uw[4443]
666 sbbw eflags[0x1,0x0] : r16.uw[1234] r16.uw[5678] => 1.uw[4444]
667 sbbw eflags[0x1,0x1] : r16.uw[1234] r16.uw[5678] => 1.uw[4443]
668 sbbw eflags[0x1,0x0] : r16.uw[1234] m16.uw[5678] => 1.uw[4444]
669 sbbw eflags[0x1,0x1] : r16.uw[1234] m16.uw[5678] => 1.uw[4443]
670 sbbw eflags[0x1,0x0] : m16.uw[1234] r16.uw[5678] => 1.uw[4444]
671 sbbw eflags[0x1,0x1] : m16.uw[1234] r16.uw[5678] => 1.uw[4443]
672 sbbl eflags[0x1,0x0] : imm8[12] r32.ud[87654321] => 1.ud[87654309]
673 sbbl eflags[0x1,0x1] : imm8[12] r32.ud[87654321] => 1.ud[87654308]
674 sbbl eflags[0x1,0x0] : imm32[12345678] eax.ud[87654321] => 1.ud[75308643]
675 sbbl eflags[0x1,0x1] : imm32[12345678] eax.ud[87654321] => 1.ud[75308642]
676 sbbl eflags[0x1,0x0] : imm32[12345678] ebx.ud[87654321] => 1.ud[75308643]
677 sbbl eflags[0x1,0x1] : imm32[12345678] ebx.ud[87654321] => 1.ud[75308642]
678 sbbl eflags[0x1,0x0] : imm32[12345678] m32.ud[87654321] => 1.ud[75308643]
679 sbbl eflags[0x1,0x1] : imm32[12345678] m32.ud[87654321] => 1.ud[75308642]
680 sbbl eflags[0x1,0x0] : r32.ud[12345678] r32.ud[87654321] => 1.ud[75308643]
681 sbbl eflags[0x1,0x1] : r32.ud[12345678] r32.ud[87654321] => 1.ud[75308642]
682 sbbl eflags[0x1,0x0] : r32.ud[12345678] m32.ud[87654321] => 1.ud[75308643]
683 sbbl eflags[0x1,0x1] : r32.ud[12345678] m32.ud[87654321] => 1.ud[75308642]
684 sbbl eflags[0x1,0x0] : m32.ud[12345678] r32.ud[87654321] => 1.ud[75308643]
685 sbbl eflags[0x1,0x1] : m32.ud[12345678] r32.ud[87654321] => 1.ud[75308642]
686 seta eflags[0x041,0x000] : r8.ub[123] => 0.ub[1]
687 seta eflags[0x041,0x001] : r8.ub[123] => 0.ub[0]
688 seta eflags[0x041,0x040] : r8.ub[123] => 0.ub[0]
689 seta eflags[0x041,0x041] : r8.ub[123] => 0.ub[0]
690 seta eflags[0x041,0x000] : m8.ub[123] => 0.ub[1]
691 seta eflags[0x041,0x001] : m8.ub[123] => 0.ub[0]
692 seta eflags[0x041,0x040] : m8.ub[123] => 0.ub[0]
693 seta eflags[0x041,0x041] : m8.ub[123] => 0.ub[0]
694 setae eflags[0x001,0x000] : r8.ub[123] => 0.ub[1]
695 setae eflags[0x001,0x001] : r8.ub[123] => 0.ub[0]
696 setae eflags[0x001,0x000] : m8.ub[123] => 0.ub[1]
697 setae eflags[0x001,0x001] : m8.ub[123] => 0.ub[0]
698 setb eflags[0x001,0x000] : r8.ub[123] => 0.ub[0]
699 setb eflags[0x001,0x001] : r8.ub[123] => 0.ub[1]
700 setb eflags[0x001,0x000] : m8.ub[123] => 0.ub[0]
701 setb eflags[0x001,0x001] : m8.ub[123] => 0.ub[1]
702 setbe eflags[0x041,0x000] : r8.ub[123] => 0.ub[0]
703 setbe eflags[0x041,0x001] : r8.ub[123] => 0.ub[1]
704 setbe eflags[0x041,0x040] : r8.ub[123] => 0.ub[1]
705 setbe eflags[0x041,0x041] : r8.ub[123] => 0.ub[1]
706 setbe eflags[0x041,0x000] : m8.ub[123] => 0.ub[0]
707 setbe eflags[0x041,0x001] : m8.ub[123] => 0.ub[1]
708 setbe eflags[0x041,0x040] : m8.ub[123] => 0.ub[1]
709 setbe eflags[0x041,0x041] : m8.ub[123] => 0.ub[1]
710 setc eflags[0x001,0x000] : r8.ub[123] => 0.ub[0]
711 setc eflags[0x001,0x001] : r8.ub[123] => 0.ub[1]
712 setc eflags[0x001,0x000] : m8.ub[123] => 0.ub[0]
713 setc eflags[0x001,0x001] : m8.ub[123] => 0.ub[1]
714 sete eflags[0x040,0x000] : r8.ub[123] => 0.ub[0]
715 sete eflags[0x040,0x040] : r8.ub[123] => 0.ub[1]
716 sete eflags[0x040,0x000] : m8.ub[123] => 0.ub[0]
717 sete eflags[0x040,0x040] : m8.ub[123] => 0.ub[1]
718 setg eflags[0x8c0,0x000] : r8.ub[123] => 0.ub[1]
719 setg eflags[0x8c0,0x040] : r8.ub[123] => 0.ub[0]
720 setg eflags[0x8c0,0x080] : r8.ub[123] => 0.ub[0]
721 setg eflags[0x8c0,0x0c0] : r8.ub[123] => 0.ub[0]
722 setg eflags[0x8c0,0x800] : r8.ub[123] => 0.ub[0]
723 setg eflags[0x8c0,0x840] : r8.ub[123] => 0.ub[0]
724 setg eflags[0x8c0,0x880] : r8.ub[123] => 0.ub[1]
725 setg eflags[0x8c0,0x8c0] : r8.ub[123] => 0.ub[0]
726 setg eflags[0x8c0,0x000] : m8.ub[123] => 0.ub[1]
727 setg eflags[0x8c0,0x040] : m8.ub[123] => 0.ub[0]
728 setg eflags[0x8c0,0x080] : m8.ub[123] => 0.ub[0]
729 setg eflags[0x8c0,0x0c0] : m8.ub[123] => 0.ub[0]
730 setg eflags[0x8c0,0x800] : m8.ub[123] => 0.ub[0]
731 setg eflags[0x8c0,0x840] : m8.ub[123] => 0.ub[0]
732 setg eflags[0x8c0,0x880] : m8.ub[123] => 0.ub[1]
733 setg eflags[0x8c0,0x8c0] : m8.ub[123] => 0.ub[0]
734 setge eflags[0x8c0,0x000] : r8.ub[123] => 0.ub[1]
735 setge eflags[0x8c0,0x080] : r8.ub[123] => 0.ub[0]
736 setge eflags[0x8c0,0x800] : r8.ub[123] => 0.ub[0]
737 setge eflags[0x8c0,0x880] : r8.ub[123] => 0.ub[1]
738 setge eflags[0x8c0,0x000] : m8.ub[123] => 0.ub[1]
739 setge eflags[0x8c0,0x080] : m8.ub[123] => 0.ub[0]
740 setge eflags[0x8c0,0x800] : m8.ub[123] => 0.ub[0]
741 setge eflags[0x8c0,0x880] : m8.ub[123] => 0.ub[1]
742 setl eflags[0x8c0,0x000] : r8.ub[123] => 0.ub[0]
743 setl eflags[0x8c0,0x080] : r8.ub[123] => 0.ub[1]
744 setl eflags[0x8c0,0x800] : r8.ub[123] => 0.ub[1]
745 setl eflags[0x8c0,0x880] : r8.ub[123] => 0.ub[0]
746 setl eflags[0x8c0,0x000] : m8.ub[123] => 0.ub[0]
747 setl eflags[0x8c0,0x080] : m8.ub[123] => 0.ub[1]
748 setl eflags[0x8c0,0x800] : m8.ub[123] => 0.ub[1]
749 setl eflags[0x8c0,0x880] : m8.ub[123] => 0.ub[0]
750 setle eflags[0x8c0,0x000] : r8.ub[123] => 0.ub[0]
751 setle eflags[0x8c0,0x040] : r8.ub[123] => 0.ub[1]
752 setle eflags[0x8c0,0x080] : r8.ub[123] => 0.ub[1]
753 setle eflags[0x8c0,0x0c0] : r8.ub[123] => 0.ub[1]
754 setle eflags[0x8c0,0x800] : r8.ub[123] => 0.ub[1]
755 setle eflags[0x8c0,0x840] : r8.ub[123] => 0.ub[1]
756 setle eflags[0x8c0,0x880] : r8.ub[123] => 0.ub[0]
757 setle eflags[0x8c0,0x8c0] : r8.ub[123] => 0.ub[1]
758 setle eflags[0x8c0,0x000] : m8.ub[123] => 0.ub[0]
759 setle eflags[0x8c0,0x040] : m8.ub[123] => 0.ub[1]
760 setle eflags[0x8c0,0x080] : m8.ub[123] => 0.ub[1]
761 setle eflags[0x8c0,0x0c0] : m8.ub[123] => 0.ub[1]
762 setle eflags[0x8c0,0x800] : m8.ub[123] => 0.ub[1]
763 setle eflags[0x8c0,0x840] : m8.ub[123] => 0.ub[1]
764 setle eflags[0x8c0,0x880] : m8.ub[123] => 0.ub[0]
765 setle eflags[0x8c0,0x8c0] : m8.ub[123] => 0.ub[1]
766 setna eflags[0x041,0x000] : r8.ub[123] => 0.ub[0]
767 setna eflags[0x041,0x001] : r8.ub[123] => 0.ub[1]
768 setna eflags[0x041,0x040] : r8.ub[123] => 0.ub[1]
769 setna eflags[0x041,0x041] : r8.ub[123] => 0.ub[1]
770 setna eflags[0x041,0x000] : m8.ub[123] => 0.ub[0]
771 setna eflags[0x041,0x001] : m8.ub[123] => 0.ub[1]
772 setna eflags[0x041,0x040] : m8.ub[123] => 0.ub[1]
773 setna eflags[0x041,0x041] : m8.ub[123] => 0.ub[1]
774 setnae eflags[0x001,0x000] : r8.ub[123] => 0.ub[0]
775 setnae eflags[0x001,0x001] : r8.ub[123] => 0.ub[1]
776 setnae eflags[0x001,0x000] : m8.ub[123] => 0.ub[0]
777 setnae eflags[0x001,0x001] : m8.ub[123] => 0.ub[1]
778 setnb eflags[0x001,0x000] : r8.ub[123] => 0.ub[1]
779 setnb eflags[0x001,0x001] : r8.ub[123] => 0.ub[0]
780 setnb eflags[0x001,0x000] : m8.ub[123] => 0.ub[1]
781 setnb eflags[0x001,0x001] : m8.ub[123] => 0.ub[0]
782 setnbe eflags[0x041,0x000] : r8.ub[123] => 0.ub[1]
783 setnbe eflags[0x041,0x001] : r8.ub[123] => 0.ub[0]
784 setnbe eflags[0x041,0x040] : r8.ub[123] => 0.ub[0]
785 setnbe eflags[0x041,0x041] : r8.ub[123] => 0.ub[0]
786 setnbe eflags[0x041,0x000] : m8.ub[123] => 0.ub[1]
787 setnbe eflags[0x041,0x001] : m8.ub[123] => 0.ub[0]
788 setnbe eflags[0x041,0x040] : m8.ub[123] => 0.ub[0]
789 setnbe eflags[0x041,0x041] : m8.ub[123] => 0.ub[0]
790 setnc eflags[0x001,0x000] : r8.ub[123] => 0.ub[1]
791 setnc eflags[0x001,0x001] : r8.ub[123] => 0.ub[0]
792 setnc eflags[0x001,0x000] : m8.ub[123] => 0.ub[1]
793 setnc eflags[0x001,0x001] : m8.ub[123] => 0.ub[0]
794 setne eflags[0x040,0x000] : r8.ub[123] => 0.ub[1]
795 setne eflags[0x040,0x040] : r8.ub[123] => 0.ub[0]
796 setne eflags[0x040,0x000] : m8.ub[123] => 0.ub[1]
797 setne eflags[0x040,0x040] : m8.ub[123] => 0.ub[0]
798 setng eflags[0x8c0,0x000] : r8.ub[123] => 0.ub[0]
799 setng eflags[0x8c0,0x040] : r8.ub[123] => 0.ub[1]
800 setng eflags[0x8c0,0x080] : r8.ub[123] => 0.ub[1]
801 setng eflags[0x8c0,0x0c0] : r8.ub[123] => 0.ub[1]
802 setng eflags[0x8c0,0x800] : r8.ub[123] => 0.ub[1]
803 setng eflags[0x8c0,0x840] : r8.ub[123] => 0.ub[1]
804 setng eflags[0x8c0,0x880] : r8.ub[123] => 0.ub[0]
805 setng eflags[0x8c0,0x8c0] : r8.ub[123] => 0.ub[1]
806 setng eflags[0x8c0,0x000] : m8.ub[123] => 0.ub[0]
807 setng eflags[0x8c0,0x040] : m8.ub[123] => 0.ub[1]
808 setng eflags[0x8c0,0x080] : m8.ub[123] => 0.ub[1]
809 setng eflags[0x8c0,0x0c0] : m8.ub[123] => 0.ub[1]
810 setng eflags[0x8c0,0x800] : m8.ub[123] => 0.ub[1]
811 setng eflags[0x8c0,0x840] : m8.ub[123] => 0.ub[1]
812 setng eflags[0x8c0,0x880] : m8.ub[123] => 0.ub[0]
813 setng eflags[0x8c0,0x8c0] : m8.ub[123] => 0.ub[1]
814 setnge eflags[0x8c0,0x000] : r8.ub[123] => 0.ub[0]
815 setnge eflags[0x8c0,0x080] : r8.ub[123] => 0.ub[1]
816 setnge eflags[0x8c0,0x800] : r8.ub[123] => 0.ub[1]
817 setnge eflags[0x8c0,0x880] : r8.ub[123] => 0.ub[0]
818 setnge eflags[0x8c0,0x000] : m8.ub[123] => 0.ub[0]
819 setnge eflags[0x8c0,0x080] : m8.ub[123] => 0.ub[1]
820 setnge eflags[0x8c0,0x800] : m8.ub[123] => 0.ub[1]
821 setnge eflags[0x8c0,0x880] : m8.ub[123] => 0.ub[0]
822 setnl eflags[0x8c0,0x000] : r8.ub[123] => 0.ub[1]
823 setnl eflags[0x8c0,0x080] : r8.ub[123] => 0.ub[0]
824 setnl eflags[0x8c0,0x800] : r8.ub[123] => 0.ub[0]
825 setnl eflags[0x8c0,0x880] : r8.ub[123] => 0.ub[1]
826 setnl eflags[0x8c0,0x000] : m8.ub[123] => 0.ub[1]
827 setnl eflags[0x8c0,0x080] : m8.ub[123] => 0.ub[0]
828 setnl eflags[0x8c0,0x800] : m8.ub[123] => 0.ub[0]
829 setnl eflags[0x8c0,0x880] : m8.ub[123] => 0.ub[1]
830 setnle eflags[0x8c0,0x000] : r8.ub[123] => 0.ub[1]
831 setnle eflags[0x8c0,0x040] : r8.ub[123] => 0.ub[0]
832 setnle eflags[0x8c0,0x080] : r8.ub[123] => 0.ub[0]
833 setnle eflags[0x8c0,0x0c0] : r8.ub[123] => 0.ub[0]
834 setnle eflags[0x8c0,0x800] : r8.ub[123] => 0.ub[0]
835 setnle eflags[0x8c0,0x840] : r8.ub[123] => 0.ub[0]
836 setnle eflags[0x8c0,0x880] : r8.ub[123] => 0.ub[1]
837 setnle eflags[0x8c0,0x8c0] : r8.ub[123] => 0.ub[0]
838 setnle eflags[0x8c0,0x000] : m8.ub[123] => 0.ub[1]
839 setnle eflags[0x8c0,0x040] : m8.ub[123] => 0.ub[0]
840 setnle eflags[0x8c0,0x080] : m8.ub[123] => 0.ub[0]
841 setnle eflags[0x8c0,0x0c0] : m8.ub[123] => 0.ub[0]
842 setnle eflags[0x8c0,0x800] : m8.ub[123] => 0.ub[0]
843 setnle eflags[0x8c0,0x840] : m8.ub[123] => 0.ub[0]
844 setnle eflags[0x8c0,0x880] : m8.ub[123] => 0.ub[1]
845 setnle eflags[0x8c0,0x8c0] : m8.ub[123] => 0.ub[0]
846 setno eflags[0x800,0x000] : r8.ub[123] => 0.ub[1]
847 setno eflags[0x800,0x800] : r8.ub[123] => 0.ub[0]
848 setno eflags[0x800,0x000] : m8.ub[123] => 0.ub[1]
849 setno eflags[0x800,0x800] : m8.ub[123] => 0.ub[0]
850 setnp eflags[0x004,0x000] : r8.ub[123] => 0.ub[1]
851 setnp eflags[0x004,0x004] : r8.ub[123] => 0.ub[0]
852 setnp eflags[0x004,0x000] : m8.ub[123] => 0.ub[1]
853 setnp eflags[0x004,0x004] : m8.ub[123] => 0.ub[0]
854 setns eflags[0x080,0x000] : r8.ub[123] => 0.ub[1]
855 setns eflags[0x080,0x080] : r8.ub[123] => 0.ub[0]
856 setns eflags[0x080,0x000] : m8.ub[123] => 0.ub[1]
857 setns eflags[0x080,0x080] : m8.ub[123] => 0.ub[0]
858 setnz eflags[0x040,0x000] : r8.ub[123] => 0.ub[1]
859 setnz eflags[0x040,0x040] : r8.ub[123] => 0.ub[0]
860 setnz eflags[0x040,0x000] : m8.ub[123] => 0.ub[1]
861 setnz eflags[0x040,0x040] : m8.ub[123] => 0.ub[0]
862 seto eflags[0x800,0x000] : r8.ub[123] => 0.ub[0]
863 seto eflags[0x800,0x800] : r8.ub[123] => 0.ub[1]
864 seto eflags[0x800,0x000] : m8.ub[123] => 0.ub[0]
865 seto eflags[0x800,0x800] : m8.ub[123] => 0.ub[1]
866 setp eflags[0x004,0x000] : r8.ub[123] => 0.ub[0]
867 setp eflags[0x004,0x004] : r8.ub[123] => 0.ub[1]
868 setp eflags[0x004,0x000] : m8.ub[123] => 0.ub[0]
869 setp eflags[0x004,0x004] : m8.ub[123] => 0.ub[1]
870 sets eflags[0x080,0x000] : r8.ub[123] => 0.ub[0]
871 sets eflags[0x080,0x080] : r8.ub[123] => 0.ub[1]
872 sets eflags[0x080,0x000] : m8.ub[123] => 0.ub[0]
873 sets eflags[0x080,0x080] : m8.ub[123] => 0.ub[1]
874 setz eflags[0x040,0x000] : r8.ub[123] => 0.ub[0]
875 setz eflags[0x040,0x040] : r8.ub[123] => 0.ub[1]
876 setz eflags[0x040,0x000] : m8.ub[123] => 0.ub[0]
877 setz eflags[0x040,0x040] : m8.ub[123] => 0.ub[1]
878 shlb r8.ub[0xca] => 0.ub[0x94]
879 shlb m8.ub[0xca] => 0.ub[0x94]
880 shlb imm8[2] r8.ub[0xca] => 1.ub[0x28]
881 shlb imm8[2] m8.ub[0xca] => 1.ub[0x28]
882 shlb cl.ub[2] r8.ub[0xca] => 1.ub[0x28]
883 shlb cl.ub[2] m8.ub[0xca] => 1.ub[0x28]
884 shlw r16.uw[0xf0ca] => 0.uw[0xe194]
885 shlw m16.uw[0xf0ca] => 0.uw[0xe194]
886 shlw imm8[4] r16.uw[0xf0ca] => 1.uw[0x0ca0]
887 shlw imm8[4] m16.uw[0xf0ca] => 1.uw[0x0ca0]
888 shlw cl.ub[4] r16.uw[0xf0ca] => 1.uw[0x0ca0]
889 shlw cl.ub[4] m16.uw[0xf0ca] => 1.uw[0x0ca0]
890 shll r32.ud[0xff00f0ca] => 0.ud[0xfe01e194]
891 shll m32.ud[0xff00f0ca] => 0.ud[0xfe01e194]
892 shll imm8[8] r32.ud[0xff00f0ca] => 1.ud[0x00f0ca00]
893 shll imm8[8] m32.ud[0xff00f0ca] => 1.ud[0x00f0ca00]
894 shll cl.ub[8] r32.ud[0xff00f0ca] => 1.ud[0x00f0ca00]
895 shll cl.ub[8] m32.ud[0xff00f0ca] => 1.ud[0x00f0ca00]
896 shrb r8.ub[0xca] => 0.ub[0x65]
897 shrb m8.ub[0xca] => 0.ub[0x65]
898 shrb imm8[2] r8.ub[0xca] => 1.ub[0x32]
899 shrb imm8[2] m8.ub[0xca] => 1.ub[0x32]
900 shrb cl.ub[2] r8.ub[0xca] => 1.ub[0x32]
901 shrb cl.ub[2] m8.ub[0xca] => 1.ub[0x32]
902 shrw r16.uw[0xf0ca] => 0.uw[0x7865]
903 shrw m16.uw[0xf0ca] => 0.uw[0x7865]
904 shrw imm8[4] r16.uw[0xf0ca] => 1.uw[0x0f0c]
905 shrw imm8[4] m16.uw[0xf0ca] => 1.uw[0x0f0c]
906 shrw cl.ub[4] r16.uw[0xf0ca] => 1.uw[0x0f0c]
907 shrw cl.ub[4] m16.uw[0xf0ca] => 1.uw[0x0f0c]
908 shrl r32.ud[0xff00f0ca] => 0.ud[0x7f807865]
909 shrl m32.ud[0xff00f0ca] => 0.ud[0x7f807865]
910 shrl imm8[8] r32.ud[0xff00f0ca] => 1.ud[0x00ff00f0]
911 shrl imm8[8] m32.ud[0xff00f0ca] => 1.ud[0x00ff00f0]
912 shrl cl.ub[8] r32.ud[0xff00f0ca] => 1.ud[0x00ff00f0]
913 shrl cl.ub[8] m32.ud[0xff00f0ca] => 1.ud[0x00ff00f0]
914 shldw imm8[1] r16.uw[0xf0ca] r16.uw[0xf0ca] => 2.uw[0xe195]
915 shldw imm8[1] r16.uw[0xf0ca] m16.uw[0xf0ca] => 2.uw[0xe195]
916 shldw imm8[4] r16.uw[0xf0ca] r16.uw[0xf0ca] => 2.uw[0x0caf]
917 shldw imm8[4] r16.uw[0xf0ca] m16.uw[0xf0ca] => 2.uw[0x0caf]
918 shldw cl.ub[1] r16.uw[0xf0ca] r16.uw[0xf0ca] => 2.uw[0xe195]
919 shldw cl.ub[1] r16.uw[0xf0ca] m16.uw[0xf0ca] => 2.uw[0xe195]
920 shldw cl.ub[4] r16.uw[0xf0ca] r16.uw[0xf0ca] => 2.uw[0x0caf]
921 shldw cl.ub[4] r16.uw[0xf0ca] m16.uw[0xf0ca] => 2.uw[0x0caf]
922 shldl imm8[1] r32.ud[0xff00f0ca] r32.ud[0xff00f0ca] => 2.ud[0xfe01e195]
923 shldl imm8[1] r32.ud[0xff00f0ca] m32.ud[0xff00f0ca] => 2.ud[0xfe01e195]
924 shldl imm8[8] r32.ud[0xff00f0ca] r32.ud[0xff00f0ca] => 2.ud[0x00f0caff]
925 shldl imm8[8] r32.ud[0xff00f0ca] m32.ud[0xff00f0ca] => 2.ud[0x00f0caff]
926 shldl cl.ub[1] r32.ud[0xff00f0ca] r32.ud[0xff00f0ca] => 2.ud[0xfe01e195]
927 shldl cl.ub[1] r32.ud[0xff00f0ca] m32.ud[0xff00f0ca] => 2.ud[0xfe01e195]
928 shldl cl.ub[8] r32.ud[0xff00f0ca] r32.ud[0xff00f0ca] => 2.ud[0x00f0caff]
929 shldl cl.ub[8] r32.ud[0xff00f0ca] m32.ud[0xff00f0ca] => 2.ud[0x00f0caff]
930 shrdw imm8[1] r16.uw[0xf0ca] r16.uw[0xf0ca] => 2.uw[0x7865]
931 shrdw imm8[1] r16.uw[0xf0ca] m16.uw[0xf0ca] => 2.uw[0x7865]
932 shrdw imm8[4] r16.uw[0xf0ca] r16.uw[0xf0ca] => 2.uw[0xaf0c]
933 shrdw imm8[4] r16.uw[0xf0ca] m16.uw[0xf0ca] => 2.uw[0xaf0c]
934 shrdw cl.ub[1] r16.uw[0xf0ca] r16.uw[0xf0ca] => 2.uw[0x7865]
935 shrdw cl.ub[1] r16.uw[0xf0ca] m16.uw[0xf0ca] => 2.uw[0x7865]
936 shrdw cl.ub[4] r16.uw[0xf0ca] r16.uw[0xf0ca] => 2.uw[0xaf0c]
937 shrdw cl.ub[4] r16.uw[0xf0ca] m16.uw[0xf0ca] => 2.uw[0xaf0c]
938 shrdl imm8[1] r32.ud[0xff00f0ca] r32.ud[0xff00f0ca] => 2.ud[0x7f807865]
939 shrdl imm8[1] r32.ud[0xff00f0ca] m32.ud[0xff00f0ca] => 2.ud[0x7f807865]
940 shrdl imm8[8] r32.ud[0xff00f0ca] r32.ud[0xff00f0ca] => 2.ud[0xcaff00f0]
941 shrdl imm8[8] r32.ud[0xff00f0ca] m32.ud[0xff00f0ca] => 2.ud[0xcaff00f0]
942 shrdl cl.ub[1] r32.ud[0xff00f0ca] r32.ud[0xff00f0ca] => 2.ud[0x7f807865]
943 shrdl cl.ub[1] r32.ud[0xff00f0ca] m32.ud[0xff00f0ca] => 2.ud[0x7f807865]
944 shrdl cl.ub[8] r32.ud[0xff00f0ca] r32.ud[0xff00f0ca] => 2.ud[0xcaff00f0]
945 shrdl cl.ub[8] r32.ud[0xff00f0ca] m32.ud[0xff00f0ca] => 2.ud[0xcaff00f0]
946 stc eflags[0x001,0x000] : => eflags[0x001,0x001]
947 stc eflags[0x001,0x001] : => eflags[0x001,0x001]
948 std eflags[0x400,0x000] : => eflags[0x400,0x400]
949 std eflags[0x400,0x400] : => eflags[0x400,0x400]
950 subb imm8[12] al.ub[34] => 1.ub[22]
951 subb imm8[12] bl.ub[34] => 1.ub[22]
952 subb imm8[12] m8.ub[34] => 1.ub[22]
953 subb r8.ub[12] r8.ub[34] => 1.ub[22]
954 subb r8.ub[12] m8.ub[34] => 1.ub[22]
955 subb m8.ub[12] r8.ub[34] => 1.ub[22]
956 subw imm8[12] r16.uw[3456] => 1.uw[3444]
957 subw imm16[1234] ax.uw[5678] => 1.uw[4444]
958 subw imm16[1234] bx.uw[5678] => 1.uw[4444]
959 subw imm16[1234] m16.uw[5678] => 1.uw[4444]
960 subw r16.uw[1234] r16.uw[5678] => 1.uw[4444]
961 subw r16.uw[1234] m16.uw[5678] => 1.uw[4444]
962 subw m16.uw[1234] r16.uw[5678] => 1.uw[4444]
963 subl imm8[12] r32.ud[87654321] => 1.ud[87654309]
964 subl imm32[12345678] r32.ud[87654321] => 1.ud[75308643]
965 subl imm32[12345678] eax.ud[87654321] => 1.ud[75308643]
966 subl imm32[12345678] ebx.ud[87654321] => 1.ud[75308643]
967 subl r32.ud[12345678] r32.ud[87654321] => 1.ud[75308643]
968 subl r32.ud[12345678] m32.ud[87654321] => 1.ud[75308643]
969 subl m32.ud[12345678] r32.ud[87654321] => 1.ud[75308643]
970 testb imm8[0x1a] al.ub[0x1a] => eflags[0x8c5,0x000]
971 testb imm8[0x5a] al.ub[0x5a] => eflags[0x8c5,0x004]
972 testb imm8[0x1a] al.ub[0xa1] => eflags[0x8c5,0x044]
973 testb imm8[0xa1] al.ub[0xa1] => eflags[0x8c5,0x080]
974 testb imm8[0xa5] al.ub[0xa5] => eflags[0x8c5,0x084]
975 testb imm8[0x1a] bl.ub[0x1a] => eflags[0x8c5,0x000]
976 testb imm8[0x5a] bl.ub[0x5a] => eflags[0x8c5,0x004]
977 testb imm8[0x1a] bl.ub[0xa1] => eflags[0x8c5,0x044]
978 testb imm8[0xa1] bl.ub[0xa1] => eflags[0x8c5,0x080]
979 testb imm8[0xa5] bl.ub[0xa5] => eflags[0x8c5,0x084]
980 testb imm8[0x1a] m8.ub[0x1a] => eflags[0x8c5,0x000]
981 testb imm8[0x5a] m8.ub[0x5a] => eflags[0x8c5,0x004]
982 testb imm8[0x1a] m8.ub[0xa1] => eflags[0x8c5,0x044]
983 testb imm8[0xa1] m8.ub[0xa1] => eflags[0x8c5,0x080]
984 testb imm8[0xa5] m8.ub[0xa5] => eflags[0x8c5,0x084]
985 testb r8.ub[0x1a] r8.ub[0x1a] => eflags[0x8c5,0x000]
986 testb r8.ub[0x5a] r8.ub[0x5a] => eflags[0x8c5,0x004]
987 testb r8.ub[0x1a] r8.ub[0xa1] => eflags[0x8c5,0x044]
988 testb r8.ub[0xa1] r8.ub[0xa1] => eflags[0x8c5,0x080]
989 testb r8.ub[0xa5] r8.ub[0xa5] => eflags[0x8c5,0x084]
990 testb r8.ub[0x1a] m8.ub[0x1a] => eflags[0x8c5,0x000]
991 testb r8.ub[0x5a] m8.ub[0x5a] => eflags[0x8c5,0x004]
992 testb r8.ub[0x1a] m8.ub[0xa1] => eflags[0x8c5,0x044]
993 testb r8.ub[0xa1] m8.ub[0xa1] => eflags[0x8c5,0x080]
994 testb r8.ub[0xa5] m8.ub[0xa5] => eflags[0x8c5,0x084]
995 testw imm16[0x1a1a] ax.uw[0x1a1a] => eflags[0x8c5,0x000]
996 testw imm16[0x5a5a] ax.uw[0x5a5a] => eflags[0x8c5,0x004]
997 testw imm16[0x1a1a] ax.uw[0xa1a1] => eflags[0x8c5,0x044]
998 testw imm16[0xa1a1] ax.uw[0xa1a1] => eflags[0x8c5,0x080]
999 testw imm16[0xa5a5] ax.uw[0xa5a5] => eflags[0x8c5,0x084]
1000 testw imm16[0x1a1a] bx.uw[0x1a1a] => eflags[0x8c5,0x000]
1001 testw imm16[0x5a5a] bx.uw[0x5a5a] => eflags[0x8c5,0x004]
1002 testw imm16[0x1a1a] bx.uw[0xa1a1] => eflags[0x8c5,0x044]
1003 testw imm16[0xa1a1] bx.uw[0xa1a1] => eflags[0x8c5,0x080]
1004 testw imm16[0xa5a5] bx.uw[0xa5a5] => eflags[0x8c5,0x084]
1005 testw imm16[0x1a1a] m16.uw[0x1a1a] => eflags[0x8c5,0x000]
1006 testw imm16[0x5a5a] m16.uw[0x5a5a] => eflags[0x8c5,0x004]
1007 testw imm16[0x1a1a] m16.uw[0xa1a1] => eflags[0x8c5,0x044]
1008 testw imm16[0xa1a1] m16.uw[0xa1a1] => eflags[0x8c5,0x080]
1009 testw imm16[0xa5a5] m16.uw[0xa5a5] => eflags[0x8c5,0x084]
1010 testw r16.uw[0x1a1a] r16.uw[0x1a1a] => eflags[0x8c5,0x000]
1011 testw r16.uw[0x5a5a] r16.uw[0x5a5a] => eflags[0x8c5,0x004]
1012 testw r16.uw[0x1a1a] r16.uw[0xa1a1] => eflags[0x8c5,0x044]
1013 testw r16.uw[0xa1a1] r16.uw[0xa1a1] => eflags[0x8c5,0x080]
1014 testw r16.uw[0xa5a5] r16.uw[0xa5a5] => eflags[0x8c5,0x084]
1015 testw r16.uw[0x1a1a] m16.uw[0x1a1a] => eflags[0x8c5,0x000]
1016 testw r16.uw[0x5a5a] m16.uw[0x5a5a] => eflags[0x8c5,0x004]
1017 testw r16.uw[0x1a1a] m16.uw[0xa1a1] => eflags[0x8c5,0x044]
1018 testw r16.uw[0xa1a1] m16.uw[0xa1a1] => eflags[0x8c5,0x080]
1019 testw r16.uw[0xa5a5] m16.uw[0xa5a5] => eflags[0x8c5,0x084]
1020 testl imm32[0x1a1a1a1a] eax.ud[0x1a1a1a1a] => eflags[0x8c5,0x000]
1021 testl imm32[0x5a5a5a5a] eax.ud[0x5a5a5a5a] => eflags[0x8c5,0x004]
1022 testl imm32[0x1a1a1a1a] eax.ud[0xa1a1a1a1] => eflags[0x8c5,0x044]
1023 testl imm32[0xa1a1a1a1] eax.ud[0xa1a1a1a1] => eflags[0x8c5,0x080]
1024 testl imm32[0xa5a5a5a5] eax.ud[0xa5a5a5a5] => eflags[0x8c5,0x084]
1025 testl imm32[0x1a1a1a1a] ebx.ud[0x1a1a1a1a] => eflags[0x8c5,0x000]
1026 testl imm32[0x5a5a5a5a] ebx.ud[0x5a5a5a5a] => eflags[0x8c5,0x004]
1027 testl imm32[0x1a1a1a1a] ebx.ud[0xa1a1a1a1] => eflags[0x8c5,0x044]
1028 testl imm32[0xa1a1a1a1] ebx.ud[0xa1a1a1a1] => eflags[0x8c5,0x080]
1029 testl imm32[0xa5a5a5a5] ebx.ud[0xa5a5a5a5] => eflags[0x8c5,0x084]
1030 testl imm32[0x1a1a1a1a] m32.ud[0x1a1a1a1a] => eflags[0x8c5,0x000]
1031 testl imm32[0x5a5a5a5a] m32.ud[0x5a5a5a5a] => eflags[0x8c5,0x004]
1032 testl imm32[0x1a1a1a1a] m32.ud[0xa1a1a1a1] => eflags[0x8c5,0x044]
1033 testl imm32[0xa1a1a1a1] m32.ud[0xa1a1a1a1] => eflags[0x8c5,0x080]
1034 testl imm32[0xa5a5a5a5] m32.ud[0xa5a5a5a5] => eflags[0x8c5,0x084]
1035 testl r32.ud[0x1a1a1a1a] r32.ud[0x1a1a1a1a] => eflags[0x8c5,0x000]
1036 testl r32.ud[0x5a5a5a5a] r32.ud[0x5a5a5a5a] => eflags[0x8c5,0x004]
1037 testl r32.ud[0x1a1a1a1a] r32.ud[0xa1a1a1a1] => eflags[0x8c5,0x044]
1038 testl r32.ud[0xa1a1a1a1] r32.ud[0xa1a1a1a1] => eflags[0x8c5,0x080]
1039 testl r32.ud[0xa5a5a5a5] r32.ud[0xa5a5a5a5] => eflags[0x8c5,0x084]
1040 testl r32.ud[0x1a1a1a1a] m32.ud[0x1a1a1a1a] => eflags[0x8c5,0x000]
1041 testl r32.ud[0x5a5a5a5a] m32.ud[0x5a5a5a5a] => eflags[0x8c5,0x004]
1042 testl r32.ud[0x1a1a1a1a] m32.ud[0xa1a1a1a1] => eflags[0x8c5,0x044]
1043 testl r32.ud[0xa1a1a1a1] m32.ud[0xa1a1a1a1] => eflags[0x8c5,0x080]
1044 testl r32.ud[0xa5a5a5a5] m32.ud[0xa5a5a5a5] => eflags[0x8c5,0x084]
1045 ###xaddb r8.ub[12] r8.ub[34] => 0.ub[34] 1.ub[46]
1046 ###xaddb r8.ub[12] m8.ub[34] => 0.ub[34] 1.ub[46]
1047 ###xaddw r16.uw[1234] r16.uw[5678] => 0.uw[5678] 1.uw[6912]
1048 xaddw r16.uw[1234] m16.uw[5678] => 0.uw[5678] 1.uw[6912]
1049 ###xaddl r32.ud[12345678] r32.ud[87654321] => 0.ud[87654321] 1.ud[99999999]
1050 xaddl r32.ud[12345678] m32.ud[87654321] => 0.ud[87654321] 1.ud[99999999]
1051 xchgb r8.ub[12] r8.ub[34] => 0.ub[34] 1.ub[12]
1052 xchgb r8.ub[12] m8.ub[34] => 0.ub[34] 1.ub[12]
1053 xchgb m8.ub[12] r8.ub[34] => 0.ub[34] 1.ub[12]
1054 xchgw ax.uw[1234] bx.uw[5678] => 0.uw[5678] 1.uw[1234]
1055 xchgw bx.uw[1234] ax.uw[5678] => 0.uw[5678] 1.uw[1234]
1056 xchgw ax.uw[1234] cx.uw[5678] => 0.uw[5678] 1.uw[1234]
1057 xchgw r16.uw[1234] m16.uw[5678] => 0.uw[5678] 1.uw[1234]
1058 xchgw m16.uw[1234] r16.uw[5678] => 0.uw[5678] 1.uw[1234]
1059 xchgl eax.ud[12345678] ebx.ud[87654321] => 0.ud[87654321] 1.ud[12345678]
1060 xchgl ebx.ud[12345678] eax.ud[87654321] => 0.ud[87654321] 1.ud[12345678]
1061 xchgl ebx.ud[12345678] ecx.ud[87654321] => 0.ud[87654321] 1.ud[12345678]
1062 xchgl r32.ud[12345678] m32.ud[87654321] => 0.ud[87654321] 1.ud[12345678]
1063 xchgl m32.ud[12345678] r32.ud[87654321] => 0.ud[87654321] 1.ud[12345678]
1064 xorb imm8[0x34] al.ub[0x56] => 1.ub[0x62]
1065 xorb imm8[0x34] bl.ub[0x56] => 1.ub[0x62]
1066 xorb imm8[0x34] m8.ub[0x56] => 1.ub[0x62]
1067 xorb r8.ub[0x34] r8.ub[0x56] => 1.ub[0x62]
1068 xorb r8.ub[0x34] m8.ub[0x56] => 1.ub[0x62]
1069 xorb m8.ub[0x34] r8.ub[0x56] => 1.ub[0x62]
1070 xorw imm8[0x31] r16.uw[0x1234] => 1.uw[0x1205]
1071 xorw imm16[0x4231] ax.uw[0x1234] => 1.uw[0x5005]
1072 xorw imm16[0x4231] bx.uw[0x1234] => 1.uw[0x5005]
1073 xorw imm16[0x4231] m16.uw[0x1234] => 1.uw[0x5005]
1074 xorw r16.uw[0x4231] r16.uw[0x1234] => 1.uw[0x5005]
1075 xorw r16.uw[0x4231] m16.uw[0x1234] => 1.uw[0x5005]
1076 xorw m16.uw[0x4231] r16.uw[0x1234] => 1.uw[0x5005]
1077 xorl imm8[0x31] r32.ud[0x12345678] => 1.ud[0x12345649]
1078 xorl imm32[0x86427531] eax.ud[0x12345678] => 1.ud[0x94762349]
1079 xorl imm32[0x86427531] ebx.ud[0x12345678] => 1.ud[0x94762349]
1080 xorl imm32[0x86427531] m32.ud[0x12345678] => 1.ud[0x94762349]
1081 xorl r32.ud[0x86427531] r32.ud[0x12345678] => 1.ud[0x94762349]
1082 xorl r32.ud[0x86427531] m32.ud[0x12345678] => 1.ud[0x94762349]
1083 xorl m32.ud[0x86427531] r32.ud[0x12345678] => 1.ud[0x94762349]
Instrumentation framework for detecting many memory management and threading bugs, and profile your programs in detail.