VEX/priv/ir_defs.c

   1
   2 /*---------------------------------------------------------------*/
   3 /*--- begin                                         ir_defs.c ---*/
   4 /*---------------------------------------------------------------*/
   5
   6 /*
   7    This file is part of Valgrind, a dynamic binary instrumentation
   8    framework.
   9
  10    Copyright (C) 2004-2017 OpenWorks LLP
  11       info@open-works.net
  12
  13    This program is free software; you can redistribute it and/or
  14    modify it under the terms of the GNU General Public License as
  15    published by the Free Software Foundation; either version 2 of the
  16    License, or (at your option) any later version.
  17
  18    This program is distributed in the hope that it will be useful, but
  19    WITHOUT ANY WARRANTY; without even the implied warranty of
  20    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  21    General Public License for more details.
  22
  23    You should have received a copy of the GNU General Public License
  24    along with this program; if not, write to the Free Software
  25    Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
  26    02110-1301, USA.
  27
  28    The GNU General Public License is contained in the file COPYING.
  29
  30    Neither the names of the U.S. Department of Energy nor the
  31    University of California nor the names of its contributors may be
  32    used to endorse or promote products derived from this software
  33    without prior written permission.
  34 */
  35
  36 #include "libvex_basictypes.h"
  37 #include "libvex_ir.h"
  38 #include "libvex.h"
  39
  40 #include "main_util.h"
  41
  42
  43 /*---------------------------------------------------------------*/
  44 /*--- Printing the IR                                         ---*/
  45 /*---------------------------------------------------------------*/
  46
  47 void ppIRType ( IRType ty )
  48 {
  49    switch (ty) {
  50       case Ity_INVALID: vex_printf("Ity_INVALID"); break;
  51       case Ity_I1:      vex_printf( "I1");   break;
  52       case Ity_I8:      vex_printf( "I8");   break;
  53       case Ity_I16:     vex_printf( "I16");  break;
  54       case Ity_I32:     vex_printf( "I32");  break;
  55       case Ity_I64:     vex_printf( "I64");  break;
  56       case Ity_I128:    vex_printf( "I128"); break;
  57       case Ity_F16:     vex_printf( "F16");  break;
  58       case Ity_F32:     vex_printf( "F32");  break;
  59       case Ity_F64:     vex_printf( "F64");  break;
  60       case Ity_F128:    vex_printf( "F128"); break;
  61       case Ity_D32:     vex_printf( "D32");  break;
  62       case Ity_D64:     vex_printf( "D64");  break;
  63       case Ity_D128:    vex_printf( "D128"); break;
  64       case Ity_V128:    vex_printf( "V128"); break;
  65       case Ity_V256:    vex_printf( "V256"); break;
  66       default: vex_printf("ty = 0x%x\n", (UInt)ty);
  67                vpanic("ppIRType");
  68    }
  69 }
  70
  71 void ppIRConst ( const IRConst* con )
  72 {
  73    union { ULong i64; Double f64; UInt i32; Float f32; } u;
  74    vassert(sizeof(ULong) == sizeof(Double));
  75    switch (con->tag) {
  76       case Ico_U1:   vex_printf( "%d:I1",        con->Ico.U1 ? 1 : 0); break;
  77       case Ico_U8:   vex_printf( "0x%x:I8",      (UInt)(con->Ico.U8)); break;
  78       case Ico_U16:  vex_printf( "0x%x:I16",     (UInt)(con->Ico.U16)); break;
  79       case Ico_U32:  vex_printf( "0x%x:I32",     (UInt)(con->Ico.U32)); break;
  80       case Ico_U64:  vex_printf( "0x%llx:I64",   (ULong)(con->Ico.U64)); break;
  81       case Ico_F32:  u.f32 = con->Ico.F32;
  82                      vex_printf( "F32{0x%x}",   u.i32);
  83                      break;
  84       case Ico_F32i: vex_printf( "F32i{0x%x}",   con->Ico.F32i); break;
  85       case Ico_F64:  u.f64 = con->Ico.F64;
  86                      vex_printf( "F64{0x%llx}",  u.i64);
  87                      break;
  88       case Ico_F64i: vex_printf( "F64i{0x%llx}", con->Ico.F64i); break;
  89       case Ico_V128: vex_printf( "V128{0x%04x}", (UInt)(con->Ico.V128)); break;
  90       case Ico_V256: vex_printf( "V256{0x%08x}", con->Ico.V256); break;
  91       default: vpanic("ppIRConst");
  92    }
  93 }
  94
  95 void ppIRCallee ( const IRCallee* ce )
  96 {
  97    vex_printf("%s", ce->name);
  98    if (ce->regparms > 0)
  99       vex_printf("[rp=%d]", ce->regparms);
 100    if (ce->mcx_mask > 0)
 101       vex_printf("[mcx=0x%x]", ce->mcx_mask);
 102    vex_printf("{%p}", (void*)ce->addr);
 103 }
 104
 105 void ppIRRegArray ( const IRRegArray* arr )
 106 {
 107    vex_printf("(%d:%dx", arr->base, arr->nElems);
 108    ppIRType(arr->elemTy);
 109    vex_printf(")");
 110 }
 111
 112 void ppIRTemp ( IRTemp tmp )
 113 {
 114    if (tmp == IRTemp_INVALID)
 115       vex_printf("IRTemp_INVALID");
 116    else
 117       vex_printf( "t%u", tmp);
 118 }
 119
 120 void ppIROp ( IROp op )
 121 {
 122    const HChar* str = NULL;
 123    IROp   base;
 124    switch (op) {
 125       case Iop_Add8 ... Iop_Add64:
 126          str = "Add"; base = Iop_Add8; break;
 127       case Iop_Sub8 ... Iop_Sub64:
 128          str = "Sub"; base = Iop_Sub8; break;
 129       case Iop_Mul8 ... Iop_Mul64:
 130          str = "Mul"; base = Iop_Mul8; break;
 131       case Iop_Or8 ... Iop_Or64:
 132          str = "Or"; base = Iop_Or8; break;
 133       case Iop_And8 ... Iop_And64:
 134          str = "And"; base = Iop_And8; break;
 135       case Iop_Xor8 ... Iop_Xor64:
 136          str = "Xor"; base = Iop_Xor8; break;
 137       case Iop_Shl8 ... Iop_Shl64:
 138          str = "Shl"; base = Iop_Shl8; break;
 139       case Iop_Shr8 ... Iop_Shr64:
 140          str = "Shr"; base = Iop_Shr8; break;
 141       case Iop_Sar8 ... Iop_Sar64:
 142          str = "Sar"; base = Iop_Sar8; break;
 143       case Iop_CmpEQ8 ... Iop_CmpEQ64:
 144          str = "CmpEQ"; base = Iop_CmpEQ8; break;
 145       case Iop_CmpNE8 ... Iop_CmpNE64:
 146          str = "CmpNE"; base = Iop_CmpNE8; break;
 147       case Iop_CasCmpEQ8 ... Iop_CasCmpEQ64:
 148          str = "CasCmpEQ"; base = Iop_CasCmpEQ8; break;
 149       case Iop_CasCmpNE8 ... Iop_CasCmpNE64:
 150          str = "CasCmpNE"; base = Iop_CasCmpNE8; break;
 151       case Iop_ExpCmpNE8 ... Iop_ExpCmpNE64:
 152          str = "ExpCmpNE"; base = Iop_ExpCmpNE8; break;
 153       case Iop_Not8 ... Iop_Not64:
 154          str = "Not"; base = Iop_Not8; break;
 155       /* other cases must explicitly "return;" */
 156       case Iop_8Uto16:   vex_printf("8Uto16");  return;
 157       case Iop_8Uto32:   vex_printf("8Uto32");  return;
 158       case Iop_16Uto32:  vex_printf("16Uto32"); return;
 159       case Iop_8Sto16:   vex_printf("8Sto16");  return;
 160       case Iop_8Sto32:   vex_printf("8Sto32");  return;
 161       case Iop_16Sto32:  vex_printf("16Sto32"); return;
 162       case Iop_32Sto64:  vex_printf("32Sto64"); return;
 163       case Iop_32Uto64:  vex_printf("32Uto64"); return;
 164       case Iop_32to8:    vex_printf("32to8");   return;
 165       case Iop_16Uto64:  vex_printf("16Uto64"); return;
 166       case Iop_16Sto64:  vex_printf("16Sto64"); return;
 167       case Iop_8Uto64:   vex_printf("8Uto64"); return;
 168       case Iop_8Sto64:   vex_printf("8Sto64"); return;
 169       case Iop_64to16:   vex_printf("64to16"); return;
 170       case Iop_64to8:    vex_printf("64to8");  return;
 171
 172       case Iop_Not1:     vex_printf("Not1");    return;
 173       case Iop_32to1:    vex_printf("32to1");   return;
 174       case Iop_64to1:    vex_printf("64to1");   return;
 175       case Iop_1Uto8:    vex_printf("1Uto8");   return;
 176       case Iop_1Uto32:   vex_printf("1Uto32");  return;
 177       case Iop_1Uto64:   vex_printf("1Uto64");  return;
 178       case Iop_1Sto8:    vex_printf("1Sto8");  return;
 179       case Iop_1Sto16:   vex_printf("1Sto16");  return;
 180       case Iop_1Sto32:   vex_printf("1Sto32");  return;
 181       case Iop_1Sto64:   vex_printf("1Sto64");  return;
 182
 183       case Iop_MullS8:   vex_printf("MullS8");  return;
 184       case Iop_MullS16:  vex_printf("MullS16"); return;
 185       case Iop_MullS32:  vex_printf("MullS32"); return;
 186       case Iop_MullS64:  vex_printf("MullS64"); return;
 187       case Iop_MullU8:   vex_printf("MullU8");  return;
 188       case Iop_MullU16:  vex_printf("MullU16"); return;
 189       case Iop_MullU32:  vex_printf("MullU32"); return;
 190       case Iop_MullU64:  vex_printf("MullU64"); return;
 191
 192       case Iop_Clz64:    vex_printf("Clz64"); return;
 193       case Iop_Clz32:    vex_printf("Clz32"); return;
 194       case Iop_Ctz64:    vex_printf("Ctz64"); return;
 195       case Iop_Ctz32:    vex_printf("Ctz32"); return;
 196
 197       case Iop_CmpLT32S: vex_printf("CmpLT32S"); return;
 198       case Iop_CmpLE32S: vex_printf("CmpLE32S"); return;
 199       case Iop_CmpLT32U: vex_printf("CmpLT32U"); return;
 200       case Iop_CmpLE32U: vex_printf("CmpLE32U"); return;
 201
 202       case Iop_CmpLT64S: vex_printf("CmpLT64S"); return;
 203       case Iop_CmpLE64S: vex_printf("CmpLE64S"); return;
 204       case Iop_CmpLT64U: vex_printf("CmpLT64U"); return;
 205       case Iop_CmpLE64U: vex_printf("CmpLE64U"); return;
 206
 207       case Iop_CmpNEZ8:  vex_printf("CmpNEZ8"); return;
 208       case Iop_CmpNEZ16: vex_printf("CmpNEZ16"); return;
 209       case Iop_CmpNEZ32: vex_printf("CmpNEZ32"); return;
 210       case Iop_CmpNEZ64: vex_printf("CmpNEZ64"); return;
 211
 212       case Iop_CmpwNEZ32: vex_printf("CmpwNEZ32"); return;
 213       case Iop_CmpwNEZ64: vex_printf("CmpwNEZ64"); return;
 214
 215       case Iop_Left8:  vex_printf("Left8"); return;
 216       case Iop_Left16: vex_printf("Left16"); return;
 217       case Iop_Left32: vex_printf("Left32"); return;
 218       case Iop_Left64: vex_printf("Left64"); return;
 219       case Iop_Max32U: vex_printf("Max32U"); return;
 220
 221       case Iop_CmpORD32U: vex_printf("CmpORD32U"); return;
 222       case Iop_CmpORD32S: vex_printf("CmpORD32S"); return;
 223
 224       case Iop_CmpORD64U: vex_printf("CmpORD64U"); return;
 225       case Iop_CmpORD64S: vex_printf("CmpORD64S"); return;
 226
 227       case Iop_DivU32: vex_printf("DivU32"); return;
 228       case Iop_DivS32: vex_printf("DivS32"); return;
 229       case Iop_DivU64: vex_printf("DivU64"); return;
 230       case Iop_DivS64: vex_printf("DivS64"); return;
 231       case Iop_DivU64E: vex_printf("DivU64E"); return;
 232       case Iop_DivS64E: vex_printf("DivS64E"); return;
 233       case Iop_DivU32E: vex_printf("DivU32E"); return;
 234       case Iop_DivS32E: vex_printf("DivS32E"); return;
 235
 236       case Iop_DivModU64to32: vex_printf("DivModU64to32"); return;
 237       case Iop_DivModS64to32: vex_printf("DivModS64to32"); return;
 238
 239       case Iop_DivModU32to32: vex_printf("DivModU32to32"); return;
 240       case Iop_DivModS32to32: vex_printf("DivModS32to32"); return;
 241
 242       case Iop_DivModU128to64: vex_printf("DivModU128to64"); return;
 243       case Iop_DivModS128to64: vex_printf("DivModS128to64"); return;
 244
 245       case Iop_DivModS64to64: vex_printf("DivModS64to64"); return;
 246       case Iop_DivModU64to64: vex_printf("DivModU64to64"); return;
 247
 248       case Iop_16HIto8:  vex_printf("16HIto8"); return;
 249       case Iop_16to8:    vex_printf("16to8");   return;
 250       case Iop_8HLto16:  vex_printf("8HLto16"); return;
 251
 252       case Iop_32HIto16: vex_printf("32HIto16"); return;
 253       case Iop_32to16:   vex_printf("32to16");   return;
 254       case Iop_16HLto32: vex_printf("16HLto32"); return;
 255
 256       case Iop_64HIto32: vex_printf("64HIto32"); return;
 257       case Iop_64to32:   vex_printf("64to32");   return;
 258       case Iop_32HLto64: vex_printf("32HLto64"); return;
 259
 260       case Iop_128HIto64: vex_printf("128HIto64"); return;
 261       case Iop_128to64:   vex_printf("128to64");   return;
 262       case Iop_64HLto128: vex_printf("64HLto128"); return;
 263
 264       case Iop_CmpF32:    vex_printf("CmpF32");    return;
 265       case Iop_F32toI32S: vex_printf("F32toI32S");  return;
 266       case Iop_F32toI64S: vex_printf("F32toI64S");  return;
 267       case Iop_I32StoF32: vex_printf("I32StoF32");  return;
 268       case Iop_I64StoF32: vex_printf("I64StoF32");  return;
 269
 270       case Iop_AddF64:    vex_printf("AddF64"); return;
 271       case Iop_SubF64:    vex_printf("SubF64"); return;
 272       case Iop_MulF64:    vex_printf("MulF64"); return;
 273       case Iop_DivF64:    vex_printf("DivF64"); return;
 274       case Iop_AddF64r32: vex_printf("AddF64r32"); return;
 275       case Iop_SubF64r32: vex_printf("SubF64r32"); return;
 276       case Iop_MulF64r32: vex_printf("MulF64r32"); return;
 277       case Iop_DivF64r32: vex_printf("DivF64r32"); return;
 278       case Iop_AddF32:    vex_printf("AddF32"); return;
 279       case Iop_SubF32:    vex_printf("SubF32"); return;
 280       case Iop_MulF32:    vex_printf("MulF32"); return;
 281       case Iop_DivF32:    vex_printf("DivF32"); return;
 282
 283         /* 128 bit floating point */
 284       case Iop_AddF128:   vex_printf("AddF128");  return;
 285       case Iop_SubF128:   vex_printf("SubF128");  return;
 286       case Iop_MulF128:   vex_printf("MulF128");  return;
 287       case Iop_DivF128:   vex_printf("DivF128");  return;
 288
 289       case Iop_TruncF128toI64S:   vex_printf("TruncF128toI64S");  return;
 290       case Iop_TruncF128toI32S:   vex_printf("TruncF128toI32S");  return;
 291       case Iop_TruncF128toI64U:   vex_printf("TruncF128toI64U");  return;
 292       case Iop_TruncF128toI32U:   vex_printf("TruncF128toI32U");  return;
 293
 294       case Iop_MAddF128:   vex_printf("MAddF128");  return;
 295       case Iop_MSubF128:   vex_printf("MSubF128");  return;
 296       case Iop_NegMAddF128:   vex_printf("NegMAddF128");  return;
 297       case Iop_NegMSubF128:   vex_printf("NegMSubF128");  return;
 298
 299       case Iop_AbsF128:   vex_printf("AbsF128");  return;
 300       case Iop_NegF128:   vex_printf("NegF128");  return;
 301       case Iop_SqrtF128:  vex_printf("SqrtF128"); return;
 302       case Iop_CmpF128:   vex_printf("CmpF128");  return;
 303
 304       case Iop_F64HLtoF128: vex_printf("F64HLtoF128"); return;
 305       case Iop_F128HItoF64: vex_printf("F128HItoF64"); return;
 306       case Iop_F128LOtoF64: vex_printf("F128LOtoF64"); return;
 307       case Iop_I32StoF128: vex_printf("I32StoF128"); return;
 308       case Iop_I64StoF128: vex_printf("I64StoF128"); return;
 309       case Iop_I32UtoF128: vex_printf("I32UtoF128"); return;
 310       case Iop_I64UtoF128: vex_printf("I64UtoF128"); return;
 311       case Iop_F128toI32S: vex_printf("F128toI32S"); return;
 312       case Iop_F128toI64S: vex_printf("F128toI64S"); return;
 313       case Iop_F128toI32U: vex_printf("F128toI32U"); return;
 314       case Iop_F128toI64U: vex_printf("F128toI64U"); return;
 315       case Iop_F32toF128:  vex_printf("F32toF128");  return;
 316       case Iop_F64toF128:  vex_printf("F64toF128");  return;
 317       case Iop_F128toF64:  vex_printf("F128toF64");  return;
 318       case Iop_F128toF32:  vex_printf("F128toF32");  return;
 319       case Iop_F128toI128S: vex_printf("F128toI128");  return;
 320       case Iop_RndF128:    vex_printf("RndF128");  return;
 321
 322         /* s390 specific */
 323       case Iop_MAddF32:    vex_printf("s390_MAddF32"); return;
 324       case Iop_MSubF32:    vex_printf("s390_MSubF32"); return;
 325
 326       case Iop_ScaleF64:      vex_printf("ScaleF64"); return;
 327       case Iop_AtanF64:       vex_printf("AtanF64"); return;
 328       case Iop_Yl2xF64:       vex_printf("Yl2xF64"); return;
 329       case Iop_Yl2xp1F64:     vex_printf("Yl2xp1F64"); return;
 330       case Iop_PRemF64:       vex_printf("PRemF64"); return;
 331       case Iop_PRemC3210F64:  vex_printf("PRemC3210F64"); return;
 332       case Iop_PRem1F64:      vex_printf("PRem1F64"); return;
 333       case Iop_PRem1C3210F64: vex_printf("PRem1C3210F64"); return;
 334       case Iop_NegF64:        vex_printf("NegF64"); return;
 335       case Iop_AbsF64:        vex_printf("AbsF64"); return;
 336       case Iop_NegF32:        vex_printf("NegF32"); return;
 337       case Iop_AbsF32:        vex_printf("AbsF32"); return;
 338       case Iop_SqrtF64:       vex_printf("SqrtF64"); return;
 339       case Iop_SqrtF32:       vex_printf("SqrtF32"); return;
 340       case Iop_SinF64:    vex_printf("SinF64"); return;
 341       case Iop_CosF64:    vex_printf("CosF64"); return;
 342       case Iop_TanF64:    vex_printf("TanF64"); return;
 343       case Iop_2xm1F64:   vex_printf("2xm1F64"); return;
 344
 345       case Iop_MAddF64:    vex_printf("MAddF64"); return;
 346       case Iop_MSubF64:    vex_printf("MSubF64"); return;
 347       case Iop_MAddF64r32: vex_printf("MAddF64r32"); return;
 348       case Iop_MSubF64r32: vex_printf("MSubF64r32"); return;
 349
 350       case Iop_RSqrtEst5GoodF64: vex_printf("RSqrtEst5GoodF64"); return;
 351       case Iop_RoundF64toF64_NEAREST: vex_printf("RoundF64toF64_NEAREST"); return;
 352       case Iop_RoundF64toF64_NegINF: vex_printf("RoundF64toF64_NegINF"); return;
 353       case Iop_RoundF64toF64_PosINF: vex_printf("RoundF64toF64_PosINF"); return;
 354       case Iop_RoundF64toF64_ZERO: vex_printf("RoundF64toF64_ZERO"); return;
 355
 356       case Iop_TruncF64asF32: vex_printf("TruncF64asF32"); return;
 357
 358       case Iop_RecpExpF64: vex_printf("RecpExpF64"); return;
 359       case Iop_RecpExpF32: vex_printf("RecpExpF32"); return;
 360
 361       case Iop_MaxNumF64: vex_printf("MaxNumF64"); return;
 362       case Iop_MinNumF64: vex_printf("MinNumF64"); return;
 363       case Iop_MaxNumF32: vex_printf("MaxNumF32"); return;
 364       case Iop_MinNumF32: vex_printf("MinNumF32"); return;
 365
 366       case Iop_F16toF64: vex_printf("F16toF64"); return;
 367       case Iop_F64toF16: vex_printf("F64toF16"); return;
 368       case Iop_F16toF32: vex_printf("F16toF32"); return;
 369       case Iop_F32toF16: vex_printf("F32toF16"); return;
 370
 371       case Iop_QAdd32S: vex_printf("QAdd32S"); return;
 372       case Iop_QSub32S: vex_printf("QSub32S"); return;
 373       case Iop_Add16x2:   vex_printf("Add16x2"); return;
 374       case Iop_Sub16x2:   vex_printf("Sub16x2"); return;
 375       case Iop_QAdd16Sx2: vex_printf("QAdd16Sx2"); return;
 376       case Iop_QAdd16Ux2: vex_printf("QAdd16Ux2"); return;
 377       case Iop_QSub16Sx2: vex_printf("QSub16Sx2"); return;
 378       case Iop_QSub16Ux2: vex_printf("QSub16Ux2"); return;
 379       case Iop_HAdd16Ux2: vex_printf("HAdd16Ux2"); return;
 380       case Iop_HAdd16Sx2: vex_printf("HAdd16Sx2"); return;
 381       case Iop_HSub16Ux2: vex_printf("HSub16Ux2"); return;
 382       case Iop_HSub16Sx2: vex_printf("HSub16Sx2"); return;
 383
 384       case Iop_Add8x4:   vex_printf("Add8x4"); return;
 385       case Iop_Sub8x4:   vex_printf("Sub8x4"); return;
 386       case Iop_QAdd8Sx4: vex_printf("QAdd8Sx4"); return;
 387       case Iop_QAdd8Ux4: vex_printf("QAdd8Ux4"); return;
 388       case Iop_QSub8Sx4: vex_printf("QSub8Sx4"); return;
 389       case Iop_QSub8Ux4: vex_printf("QSub8Ux4"); return;
 390       case Iop_HAdd8Ux4: vex_printf("HAdd8Ux4"); return;
 391       case Iop_HAdd8Sx4: vex_printf("HAdd8Sx4"); return;
 392       case Iop_HSub8Ux4: vex_printf("HSub8Ux4"); return;
 393       case Iop_HSub8Sx4: vex_printf("HSub8Sx4"); return;
 394       case Iop_Sad8Ux4:  vex_printf("Sad8Ux4"); return;
 395
 396       case Iop_CmpNEZ16x2: vex_printf("CmpNEZ16x2"); return;
 397       case Iop_CmpNEZ8x4:  vex_printf("CmpNEZ8x4"); return;
 398
 399       case Iop_CmpF64:    vex_printf("CmpF64"); return;
 400
 401       case Iop_F64toI16S: vex_printf("F64toI16S"); return;
 402       case Iop_F64toI32S: vex_printf("F64toI32S"); return;
 403       case Iop_F64toI64S: vex_printf("F64toI64S"); return;
 404       case Iop_F64toI64U: vex_printf("F64toI64U"); return;
 405       case Iop_F32toI32U: vex_printf("F32toI32U");  return;
 406       case Iop_F32toI64U: vex_printf("F32toI64U");  return;
 407
 408       case Iop_F64toI32U: vex_printf("F64toI32U"); return;
 409
 410       case Iop_I32StoF64: vex_printf("I32StoF64"); return;
 411       case Iop_I64StoF64: vex_printf("I64StoF64"); return;
 412       case Iop_I64UtoF64: vex_printf("I64UtoF64"); return;
 413       case Iop_I32UtoF32: vex_printf("I32UtoF32"); return;
 414       case Iop_I64UtoF32: vex_printf("I64UtoF32"); return;
 415
 416       case Iop_I32UtoF64: vex_printf("I32UtoF64"); return;
 417
 418       case Iop_F32toF64: vex_printf("F32toF64"); return;
 419       case Iop_F64toF32: vex_printf("F64toF32"); return;
 420
 421       case Iop_RoundF128toInt: vex_printf("RoundF128toInt"); return;
 422       case Iop_RoundF64toInt: vex_printf("RoundF64toInt"); return;
 423       case Iop_RoundF32toInt: vex_printf("RoundF32toInt"); return;
 424       case Iop_RoundF64toF32: vex_printf("RoundF64toF32"); return;
 425
 426       case Iop_ReinterpF64asI64: vex_printf("ReinterpF64asI64"); return;
 427       case Iop_ReinterpI64asF64: vex_printf("ReinterpI64asF64"); return;
 428       case Iop_ReinterpF32asI32: vex_printf("ReinterpF32asI32"); return;
 429       case Iop_ReinterpI32asF32: vex_printf("ReinterpI32asF32"); return;
 430
 431       case Iop_I32UtoFx4: vex_printf("I32UtoFx4"); return;
 432       case Iop_I32StoFx4: vex_printf("I32StoFx4"); return;
 433
 434       case Iop_F32toF16x4: vex_printf("F32toF16x4"); return;
 435       case Iop_F16toF32x4: vex_printf("F16toF32x4"); return;
 436       case Iop_F16toF64x2: vex_printf("F16toF64x2"); return;
 437       case Iop_F64toF16x2: vex_printf("F64toF16x2"); return;
 438
 439       case Iop_RSqrtEst32Fx4: vex_printf("RSqrtEst32Fx4"); return;
 440       case Iop_RSqrtEst32Ux4: vex_printf("RSqrtEst32Ux4"); return;
 441       case Iop_RSqrtEst32Fx2: vex_printf("RSqrtEst32Fx2"); return;
 442       case Iop_RSqrtEst32Ux2: vex_printf("RSqrtEst32Ux2"); return;
 443
 444       case Iop_QFtoI32Ux4_RZ: vex_printf("QFtoI32Ux4_RZ"); return;
 445       case Iop_QFtoI32Sx4_RZ: vex_printf("QFtoI32Sx4_RZ"); return;
 446
 447       case Iop_FtoI32Ux4_RZ: vex_printf("FtoI32Ux4_RZ"); return;
 448       case Iop_FtoI32Sx4_RZ: vex_printf("FtoI32Sx4_RZ"); return;
 449
 450       case Iop_I32UtoFx2: vex_printf("I32UtoFx2"); return;
 451       case Iop_I32StoFx2: vex_printf("I32StoFx2"); return;
 452
 453       case Iop_FtoI32Ux2_RZ: vex_printf("FtoI32Ux2_RZ"); return;
 454       case Iop_FtoI32Sx2_RZ: vex_printf("FtoI32Sx2_RZ"); return;
 455
 456       case Iop_RoundF32x4_RM: vex_printf("RoundF32x4_RM"); return;
 457       case Iop_RoundF32x4_RP: vex_printf("RoundF32x4_RP"); return;
 458       case Iop_RoundF32x4_RN: vex_printf("RoundF32x4_RN"); return;
 459       case Iop_RoundF32x4_RZ: vex_printf("RoundF32x4_RZ"); return;
 460
 461       case Iop_Abs8x8: vex_printf("Abs8x8"); return;
 462       case Iop_Abs16x4: vex_printf("Abs16x4"); return;
 463       case Iop_Abs32x2: vex_printf("Abs32x2"); return;
 464       case Iop_Add8x8: vex_printf("Add8x8"); return;
 465       case Iop_Add16x4: vex_printf("Add16x4"); return;
 466       case Iop_Add32x2: vex_printf("Add32x2"); return;
 467       case Iop_QAdd8Ux8: vex_printf("QAdd8Ux8"); return;
 468       case Iop_QAdd16Ux4: vex_printf("QAdd16Ux4"); return;
 469       case Iop_QAdd32Ux2: vex_printf("QAdd32Ux2"); return;
 470       case Iop_QAdd64Ux1: vex_printf("QAdd64Ux1"); return;
 471       case Iop_QAdd8Sx8: vex_printf("QAdd8Sx8"); return;
 472       case Iop_QAdd16Sx4: vex_printf("QAdd16Sx4"); return;
 473       case Iop_QAdd32Sx2: vex_printf("QAdd32Sx2"); return;
 474       case Iop_QAdd64Sx1: vex_printf("QAdd64Sx1"); return;
 475       case Iop_PwAdd8x8: vex_printf("PwAdd8x8"); return;
 476       case Iop_PwAdd16x4: vex_printf("PwAdd16x4"); return;
 477       case Iop_PwAdd32x2: vex_printf("PwAdd32x2"); return;
 478       case Iop_PwAdd32Fx2: vex_printf("PwAdd32Fx2"); return;
 479       case Iop_PwAddL8Ux8: vex_printf("PwAddL8Ux8"); return;
 480       case Iop_PwAddL16Ux4: vex_printf("PwAddL16Ux4"); return;
 481       case Iop_PwAddL32Ux2: vex_printf("PwAddL32Ux2"); return;
 482       case Iop_PwAddL8Sx8: vex_printf("PwAddL8Sx8"); return;
 483       case Iop_PwAddL16Sx4: vex_printf("PwAddL16Sx4"); return;
 484       case Iop_PwAddL32Sx2: vex_printf("PwAddL32Sx2"); return;
 485       case Iop_Sub8x8: vex_printf("Sub8x8"); return;
 486       case Iop_Sub16x4: vex_printf("Sub16x4"); return;
 487       case Iop_Sub32x2: vex_printf("Sub32x2"); return;
 488       case Iop_QSub8Ux8: vex_printf("QSub8Ux8"); return;
 489       case Iop_QSub16Ux4: vex_printf("QSub16Ux4"); return;
 490       case Iop_QSub32Ux2: vex_printf("QSub32Ux2"); return;
 491       case Iop_QSub64Ux1: vex_printf("QSub64Ux1"); return;
 492       case Iop_QSub8Sx8: vex_printf("QSub8Sx8"); return;
 493       case Iop_QSub16Sx4: vex_printf("QSub16Sx4"); return;
 494       case Iop_QSub32Sx2: vex_printf("QSub32Sx2"); return;
 495       case Iop_QSub64Sx1: vex_printf("QSub64Sx1"); return;
 496       case Iop_Mul8x8: vex_printf("Mul8x8"); return;
 497       case Iop_Mul16x4: vex_printf("Mul16x4"); return;
 498       case Iop_Mul32x2: vex_printf("Mul32x2"); return;
 499       case Iop_Mul32Fx2: vex_printf("Mul32Fx2"); return;
 500       case Iop_PolynomialMul8x8: vex_printf("PolynomialMul8x8"); return;
 501       case Iop_MulHi16Ux4: vex_printf("MulHi16Ux4"); return;
 502       case Iop_MulHi16Sx4: vex_printf("MulHi16Sx4"); return;
 503       case Iop_QDMulHi16Sx4: vex_printf("QDMulHi16Sx4"); return;
 504       case Iop_QDMulHi32Sx2: vex_printf("QDMulHi32Sx2"); return;
 505       case Iop_QRDMulHi16Sx4: vex_printf("QRDMulHi16Sx4"); return;
 506       case Iop_QRDMulHi32Sx2: vex_printf("QRDMulHi32Sx2"); return;
 507       case Iop_QDMull16Sx4: vex_printf("QDMull16Sx4"); return;
 508       case Iop_QDMull32Sx2: vex_printf("QDMull32Sx2"); return;
 509       case Iop_Avg8Ux8: vex_printf("Avg8Ux8"); return;
 510       case Iop_Avg16Ux4: vex_printf("Avg16Ux4"); return;
 511       case Iop_Max8Sx8: vex_printf("Max8Sx8"); return;
 512       case Iop_Max16Sx4: vex_printf("Max16Sx4"); return;
 513       case Iop_Max32Sx2: vex_printf("Max32Sx2"); return;
 514       case Iop_Max8Ux8: vex_printf("Max8Ux8"); return;
 515       case Iop_Max16Ux4: vex_printf("Max16Ux4"); return;
 516       case Iop_Max32Ux2: vex_printf("Max32Ux2"); return;
 517       case Iop_Min8Sx8: vex_printf("Min8Sx8"); return;
 518       case Iop_Min16Sx4: vex_printf("Min16Sx4"); return;
 519       case Iop_Min32Sx2: vex_printf("Min32Sx2"); return;
 520       case Iop_Min8Ux8: vex_printf("Min8Ux8"); return;
 521       case Iop_Min16Ux4: vex_printf("Min16Ux4"); return;
 522       case Iop_Min32Ux2: vex_printf("Min32Ux2"); return;
 523       case Iop_PwMax8Sx8: vex_printf("PwMax8Sx8"); return;
 524       case Iop_PwMax16Sx4: vex_printf("PwMax16Sx4"); return;
 525       case Iop_PwMax32Sx2: vex_printf("PwMax32Sx2"); return;
 526       case Iop_PwMax8Ux8: vex_printf("PwMax8Ux8"); return;
 527       case Iop_PwMax16Ux4: vex_printf("PwMax16Ux4"); return;
 528       case Iop_PwMax32Ux2: vex_printf("PwMax32Ux2"); return;
 529       case Iop_PwMin8Sx8: vex_printf("PwMin8Sx8"); return;
 530       case Iop_PwMin16Sx4: vex_printf("PwMin16Sx4"); return;
 531       case Iop_PwMin32Sx2: vex_printf("PwMin32Sx2"); return;
 532       case Iop_PwMin8Ux8: vex_printf("PwMin8Ux8"); return;
 533       case Iop_PwMin16Ux4: vex_printf("PwMin16Ux4"); return;
 534       case Iop_PwMin32Ux2: vex_printf("PwMin32Ux2"); return;
 535       case Iop_CmpEQ8x8: vex_printf("CmpEQ8x8"); return;
 536       case Iop_CmpEQ16x4: vex_printf("CmpEQ16x4"); return;
 537       case Iop_CmpEQ32x2: vex_printf("CmpEQ32x2"); return;
 538       case Iop_CmpGT8Ux8: vex_printf("CmpGT8Ux8"); return;
 539       case Iop_CmpGT16Ux4: vex_printf("CmpGT16Ux4"); return;
 540       case Iop_CmpGT32Ux2: vex_printf("CmpGT32Ux2"); return;
 541       case Iop_CmpGT8Sx8: vex_printf("CmpGT8Sx8"); return;
 542       case Iop_CmpGT16Sx4: vex_printf("CmpGT16Sx4"); return;
 543       case Iop_CmpGT32Sx2: vex_printf("CmpGT32Sx2"); return;
 544       case Iop_Cnt8x8: vex_printf("Cnt8x8"); return;
 545       case Iop_Clz8x8: vex_printf("Clz8x8"); return;
 546       case Iop_Clz16x4: vex_printf("Clz16x4"); return;
 547       case Iop_Clz32x2: vex_printf("Clz32x2"); return;
 548       case Iop_Cls8x8: vex_printf("Cls8x8"); return;
 549       case Iop_Cls16x4: vex_printf("Cls16x4"); return;
 550       case Iop_Cls32x2: vex_printf("Cls32x2"); return;
 551       case Iop_ShlN8x8: vex_printf("ShlN8x8"); return;
 552       case Iop_ShlN16x4: vex_printf("ShlN16x4"); return;
 553       case Iop_ShlN32x2: vex_printf("ShlN32x2"); return;
 554       case Iop_ShrN8x8: vex_printf("ShrN8x8"); return;
 555       case Iop_ShrN16x4: vex_printf("ShrN16x4"); return;
 556       case Iop_ShrN32x2: vex_printf("ShrN32x2"); return;
 557       case Iop_SarN8x8: vex_printf("SarN8x8"); return;
 558       case Iop_SarN16x4: vex_printf("SarN16x4"); return;
 559       case Iop_SarN32x2: vex_printf("SarN32x2"); return;
 560       case Iop_QNarrowBin16Sto8Ux8: vex_printf("QNarrowBin16Sto8Ux8"); return;
 561       case Iop_QNarrowBin16Sto8Sx8: vex_printf("QNarrowBin16Sto8Sx8"); return;
 562       case Iop_QNarrowBin32Sto16Sx4: vex_printf("QNarrowBin32Sto16Sx4"); return;
 563       case Iop_QNarrowBin64Sto32Sx4: vex_printf("QNarrowBin64Sto32Sx4"); return;
 564       case Iop_QNarrowBin64Uto32Ux4: vex_printf("QNarrowBin64Uto32Ux4"); return;
 565       case Iop_NarrowBin16to8x8: vex_printf("NarrowBin16to8x8"); return;
 566       case Iop_NarrowBin32to16x4: vex_printf("NarrowBin32to16x4"); return;
 567       case Iop_NarrowBin64to32x4: vex_printf("NarrowBin64to32x4"); return;
 568       case Iop_InterleaveHI8x8: vex_printf("InterleaveHI8x8"); return;
 569       case Iop_InterleaveHI16x4: vex_printf("InterleaveHI16x4"); return;
 570       case Iop_InterleaveHI32x2: vex_printf("InterleaveHI32x2"); return;
 571       case Iop_InterleaveLO8x8: vex_printf("InterleaveLO8x8"); return;
 572       case Iop_InterleaveLO16x4: vex_printf("InterleaveLO16x4"); return;
 573       case Iop_InterleaveLO32x2: vex_printf("InterleaveLO32x2"); return;
 574       case Iop_CatOddLanes8x8: vex_printf("CatOddLanes8x8"); return;
 575       case Iop_CatOddLanes16x4: vex_printf("CatOddLanes16x4"); return;
 576       case Iop_CatEvenLanes8x8: vex_printf("CatEvenLanes8x8"); return;
 577       case Iop_CatEvenLanes16x4: vex_printf("CatEvenLanes16x4"); return;
 578       case Iop_InterleaveOddLanes8x8: vex_printf("InterleaveOddLanes8x8"); return;
 579       case Iop_InterleaveOddLanes16x4: vex_printf("InterleaveOddLanes16x4"); return;
 580       case Iop_InterleaveEvenLanes8x8: vex_printf("InterleaveEvenLanes8x8"); return;
 581       case Iop_InterleaveEvenLanes16x4: vex_printf("InterleaveEvenLanes16x4"); return;
 582       case Iop_Shl8x8: vex_printf("Shl8x8"); return;
 583       case Iop_Shl16x4: vex_printf("Shl16x4"); return;
 584       case Iop_Shl32x2: vex_printf("Shl32x2"); return;
 585       case Iop_Shr8x8: vex_printf("Shr8x8"); return;
 586       case Iop_Shr16x4: vex_printf("Shr16x4"); return;
 587       case Iop_Shr32x2: vex_printf("Shr32x2"); return;
 588       case Iop_QShl8x8: vex_printf("QShl8x8"); return;
 589       case Iop_QShl16x4: vex_printf("QShl16x4"); return;
 590       case Iop_QShl32x2: vex_printf("QShl32x2"); return;
 591       case Iop_QShl64x1: vex_printf("QShl64x1"); return;
 592       case Iop_QSal8x8: vex_printf("QSal8x8"); return;
 593       case Iop_QSal16x4: vex_printf("QSal16x4"); return;
 594       case Iop_QSal32x2: vex_printf("QSal32x2"); return;
 595       case Iop_QSal64x1: vex_printf("QSal64x1"); return;
 596       case Iop_QShlNsatUU8x8: vex_printf("QShlNsatUU8x8"); return;
 597       case Iop_QShlNsatUU16x4: vex_printf("QShlNsatUU16x4"); return;
 598       case Iop_QShlNsatUU32x2: vex_printf("QShlNsatUU32x2"); return;
 599       case Iop_QShlNsatUU64x1: vex_printf("QShlNsatUU64x1"); return;
 600       case Iop_QShlNsatSU8x8: vex_printf("QShlNsatSU8x8"); return;
 601       case Iop_QShlNsatSU16x4: vex_printf("QShlNsatSU16x4"); return;
 602       case Iop_QShlNsatSU32x2: vex_printf("QShlNsatSU32x2"); return;
 603       case Iop_QShlNsatSU64x1: vex_printf("QShlNsatSU64x1"); return;
 604       case Iop_QShlNsatSS8x8: vex_printf("QShlNsatSS8x8"); return;
 605       case Iop_QShlNsatSS16x4: vex_printf("QShlNsatSS16x4"); return;
 606       case Iop_QShlNsatSS32x2: vex_printf("QShlNsatSS32x2"); return;
 607       case Iop_QShlNsatSS64x1: vex_printf("QShlNsatSS64x1"); return;
 608       case Iop_Sar8x8: vex_printf("Sar8x8"); return;
 609       case Iop_Sar16x4: vex_printf("Sar16x4"); return;
 610       case Iop_Sar32x2: vex_printf("Sar32x2"); return;
 611       case Iop_Sal8x8: vex_printf("Sal8x8"); return;
 612       case Iop_Sal16x4: vex_printf("Sal16x4"); return;
 613       case Iop_Sal32x2: vex_printf("Sal32x2"); return;
 614       case Iop_Sal64x1: vex_printf("Sal64x1"); return;
 615       case Iop_Perm8x8: vex_printf("Perm8x8"); return;
 616       case Iop_Reverse8sIn16_x4: vex_printf("Reverse8sIn16_x4"); return;
 617       case Iop_Reverse8sIn32_x2: vex_printf("Reverse8sIn32_x2"); return;
 618       case Iop_Reverse16sIn32_x2: vex_printf("Reverse16sIn32_x2"); return;
 619       case Iop_Reverse8sIn64_x1: vex_printf("Reverse8sIn64_x1"); return;
 620       case Iop_Reverse16sIn64_x1: vex_printf("Reverse16sIn64_x1"); return;
 621       case Iop_Reverse32sIn64_x1: vex_printf("Reverse32sIn64_x1"); return;
 622       case Iop_Abs32Fx2: vex_printf("Abs32Fx2"); return;
 623       case Iop_GetMSBs8x8: vex_printf("GetMSBs8x8"); return;
 624       case Iop_GetMSBs8x16: vex_printf("GetMSBs8x16"); return;
 625
 626       case Iop_CmpNEZ32x2: vex_printf("CmpNEZ32x2"); return;
 627       case Iop_CmpNEZ16x4: vex_printf("CmpNEZ16x4"); return;
 628       case Iop_CmpNEZ8x8:  vex_printf("CmpNEZ8x8"); return;
 629
 630       case Iop_Add32Fx4:  vex_printf("Add32Fx4"); return;
 631       case Iop_Add32Fx2:  vex_printf("Add32Fx2"); return;
 632       case Iop_Add32F0x4: vex_printf("Add32F0x4"); return;
 633       case Iop_Add64Fx2:  vex_printf("Add64Fx2"); return;
 634       case Iop_Add64F0x2: vex_printf("Add64F0x2"); return;
 635
 636       case Iop_Div32Fx4:  vex_printf("Div32Fx4"); return;
 637       case Iop_Div32F0x4: vex_printf("Div32F0x4"); return;
 638       case Iop_Div64Fx2:  vex_printf("Div64Fx2"); return;
 639       case Iop_Div64F0x2: vex_printf("Div64F0x2"); return;
 640
 641       case Iop_Max32Fx8:  vex_printf("Max32Fx8"); return;
 642       case Iop_Max32Fx4:  vex_printf("Max32Fx4"); return;
 643       case Iop_Max32Fx2:  vex_printf("Max32Fx2"); return;
 644       case Iop_PwMax32Fx4:  vex_printf("PwMax32Fx4"); return;
 645       case Iop_PwMax32Fx2:  vex_printf("PwMax32Fx2"); return;
 646       case Iop_Max32F0x4: vex_printf("Max32F0x4"); return;
 647       case Iop_Max64Fx4:  vex_printf("Max64Fx4"); return;
 648       case Iop_Max64Fx2:  vex_printf("Max64Fx2"); return;
 649       case Iop_Max64F0x2: vex_printf("Max64F0x2"); return;
 650
 651       case Iop_Min32Fx8:  vex_printf("Min32Fx8"); return;
 652       case Iop_Min32Fx4:  vex_printf("Min32Fx4"); return;
 653       case Iop_Min32Fx2:  vex_printf("Min32Fx2"); return;
 654       case Iop_PwMin32Fx4:  vex_printf("PwMin32Fx4"); return;
 655       case Iop_PwMin32Fx2:  vex_printf("PwMin32Fx2"); return;
 656       case Iop_Min32F0x4: vex_printf("Min32F0x4"); return;
 657       case Iop_Min64Fx4:  vex_printf("Min64Fx4"); return;
 658       case Iop_Min64Fx2:  vex_printf("Min64Fx2"); return;
 659       case Iop_Min64F0x2: vex_printf("Min64F0x2"); return;
 660
 661       case Iop_Mul32Fx4:  vex_printf("Mul32Fx4"); return;
 662       case Iop_Mul32F0x4: vex_printf("Mul32F0x4"); return;
 663       case Iop_Mul64Fx2:  vex_printf("Mul64Fx2"); return;
 664       case Iop_Mul64F0x2: vex_printf("Mul64F0x2"); return;
 665
 666       case Iop_RecipEst32Ux2: vex_printf("RecipEst32Ux2"); return;
 667       case Iop_RecipEst32Fx2: vex_printf("RecipEst32Fx2"); return;
 668       case Iop_RecipEst32Fx4: vex_printf("RecipEst32Fx4"); return;
 669       case Iop_RecipEst32Fx8: vex_printf("RecipEst32Fx8"); return;
 670       case Iop_RecipEst32Ux4: vex_printf("RecipEst32Ux4"); return;
 671       case Iop_RecipEst32F0x4: vex_printf("RecipEst32F0x4"); return;
 672       case Iop_RecipStep32Fx2: vex_printf("RecipStep32Fx2"); return;
 673       case Iop_RecipStep32Fx4: vex_printf("RecipStep32Fx4"); return;
 674       case Iop_RecipEst64Fx2: vex_printf("RecipEst64Fx2"); return;
 675       case Iop_RecipStep64Fx2: vex_printf("RecipStep64Fx2"); return;
 676
 677       case Iop_Abs32Fx4:  vex_printf("Abs32Fx4"); return;
 678       case Iop_Abs64Fx2:  vex_printf("Abs64Fx2"); return;
 679       case Iop_RSqrtStep32Fx4:  vex_printf("RSqrtStep32Fx4"); return;
 680       case Iop_RSqrtStep64Fx2:  vex_printf("RSqrtStep64Fx2"); return;
 681       case Iop_RSqrtStep32Fx2:  vex_printf("RSqrtStep32Fx2"); return;
 682       case Iop_RSqrtEst64Fx2: vex_printf("RSqrtEst64Fx2"); return;
 683
 684       case Iop_RSqrtEst32F0x4: vex_printf("RSqrtEst32F0x4"); return;
 685       case Iop_RSqrtEst32Fx8: vex_printf("RSqrtEst32Fx8"); return;
 686
 687       case Iop_Sqrt32Fx4:  vex_printf("Sqrt32Fx4"); return;
 688       case Iop_Sqrt32F0x4: vex_printf("Sqrt32F0x4"); return;
 689       case Iop_Sqrt64Fx2:  vex_printf("Sqrt64Fx2"); return;
 690       case Iop_Sqrt64F0x2: vex_printf("Sqrt64F0x2"); return;
 691       case Iop_Sqrt32Fx8:  vex_printf("Sqrt32Fx8"); return;
 692       case Iop_Sqrt64Fx4:  vex_printf("Sqrt64Fx4"); return;
 693
 694       case Iop_Scale2_32Fx4: vex_printf("Scale2_32Fx4"); return;
 695       case Iop_Scale2_64Fx2: vex_printf("Scale2_64Fx2"); return;
 696       case Iop_Log2_32Fx4: vex_printf("Log2_32Fx4"); return;
 697       case Iop_Log2_64Fx2: vex_printf("Log2_64Fx2"); return;
 698
 699       case Iop_Sub32Fx4:  vex_printf("Sub32Fx4"); return;
 700       case Iop_Sub32Fx2:  vex_printf("Sub32Fx2"); return;
 701       case Iop_Sub32F0x4: vex_printf("Sub32F0x4"); return;
 702       case Iop_Sub64Fx2:  vex_printf("Sub64Fx2"); return;
 703       case Iop_Sub64F0x2: vex_printf("Sub64F0x2"); return;
 704
 705       case Iop_CmpEQ32Fx4: vex_printf("CmpEQ32Fx4"); return;
 706       case Iop_CmpLT32Fx4: vex_printf("CmpLT32Fx4"); return;
 707       case Iop_CmpLE32Fx4: vex_printf("CmpLE32Fx4"); return;
 708       case Iop_CmpGT32Fx4: vex_printf("CmpGT32Fx4"); return;
 709       case Iop_CmpGE32Fx4: vex_printf("CmpGE32Fx4"); return;
 710       case Iop_CmpUN32Fx4: vex_printf("CmpUN32Fx4"); return;
 711       case Iop_CmpEQ64Fx2: vex_printf("CmpEQ64Fx2"); return;
 712       case Iop_CmpLT64Fx2: vex_printf("CmpLT64Fx2"); return;
 713       case Iop_CmpLE64Fx2: vex_printf("CmpLE64Fx2"); return;
 714       case Iop_CmpUN64Fx2: vex_printf("CmpUN64Fx2"); return;
 715       case Iop_CmpGT32Fx2: vex_printf("CmpGT32Fx2"); return;
 716       case Iop_CmpEQ32Fx2: vex_printf("CmpEQ32Fx2"); return;
 717       case Iop_CmpGE32Fx2: vex_printf("CmpGE32Fx2"); return;
 718
 719       case Iop_CmpEQ32F0x4: vex_printf("CmpEQ32F0x4"); return;
 720       case Iop_CmpLT32F0x4: vex_printf("CmpLT32F0x4"); return;
 721       case Iop_CmpLE32F0x4: vex_printf("CmpLE32F0x4"); return;
 722       case Iop_CmpUN32F0x4: vex_printf("CmpUN32F0x4"); return;
 723       case Iop_CmpEQ64F0x2: vex_printf("CmpEQ64F0x2"); return;
 724       case Iop_CmpLT64F0x2: vex_printf("CmpLT64F0x2"); return;
 725       case Iop_CmpLE64F0x2: vex_printf("CmpLE64F0x2"); return;
 726       case Iop_CmpUN64F0x2: vex_printf("CmpUN64F0x2"); return;
 727
 728       case Iop_Neg64Fx2: vex_printf("Neg64Fx2"); return;
 729       case Iop_Neg32Fx4: vex_printf("Neg32Fx4"); return;
 730       case Iop_Neg32Fx2: vex_printf("Neg32Fx2"); return;
 731
 732       case Iop_F32x4_2toQ16x8: vex_printf("F32x4_2toQ16x8"); return;
 733       case Iop_F64x2_2toQ32x4: vex_printf("F64x2_2toQ32x4"); return;
 734
 735       case Iop_V128to64:   vex_printf("V128to64");   return;
 736       case Iop_V128HIto64: vex_printf("V128HIto64"); return;
 737       case Iop_64HLtoV128: vex_printf("64HLtoV128"); return;
 738
 739       case Iop_64UtoV128:   vex_printf("64UtoV128"); return;
 740       case Iop_SetV128lo64: vex_printf("SetV128lo64"); return;
 741
 742       case Iop_ZeroHI64ofV128:  vex_printf("ZeroHI64ofV128"); return;
 743       case Iop_ZeroHI96ofV128:  vex_printf("ZeroHI96ofV128"); return;
 744       case Iop_ZeroHI112ofV128: vex_printf("ZeroHI112ofV128"); return;
 745       case Iop_ZeroHI120ofV128: vex_printf("ZeroHI120ofV128"); return;
 746
 747       case Iop_32UtoV128:   vex_printf("32UtoV128"); return;
 748       case Iop_V128to32:    vex_printf("V128to32"); return;
 749       case Iop_SetV128lo32: vex_printf("SetV128lo32"); return;
 750
 751       case Iop_Dup8x16: vex_printf("Dup8x16"); return;
 752       case Iop_Dup16x8: vex_printf("Dup16x8"); return;
 753       case Iop_Dup32x4: vex_printf("Dup32x4"); return;
 754       case Iop_Dup8x8: vex_printf("Dup8x8"); return;
 755       case Iop_Dup16x4: vex_printf("Dup16x4"); return;
 756       case Iop_Dup32x2: vex_printf("Dup32x2"); return;
 757
 758       case Iop_NotV128:    vex_printf("NotV128"); return;
 759       case Iop_AndV128:    vex_printf("AndV128"); return;
 760       case Iop_OrV128:     vex_printf("OrV128");  return;
 761       case Iop_XorV128:    vex_printf("XorV128"); return;
 762
 763       case Iop_CmpNEZ8x16: vex_printf("CmpNEZ8x16"); return;
 764       case Iop_CmpNEZ16x8: vex_printf("CmpNEZ16x8"); return;
 765       case Iop_CmpNEZ32x4: vex_printf("CmpNEZ32x4"); return;
 766       case Iop_CmpNEZ64x2: vex_printf("CmpNEZ64x2"); return;
 767
 768       case Iop_Abs8x16: vex_printf("Abs8x16"); return;
 769       case Iop_Abs16x8: vex_printf("Abs16x8"); return;
 770       case Iop_Abs32x4: vex_printf("Abs32x4"); return;
 771       case Iop_Abs64x2: vex_printf("Abs64x2"); return;
 772
 773       case Iop_Add8x16:   vex_printf("Add8x16"); return;
 774       case Iop_Add16x8:   vex_printf("Add16x8"); return;
 775       case Iop_Add32x4:   vex_printf("Add32x4"); return;
 776       case Iop_Add64x2:   vex_printf("Add64x2"); return;
 777       case Iop_QAdd8Ux16: vex_printf("QAdd8Ux16"); return;
 778       case Iop_QAdd16Ux8: vex_printf("QAdd16Ux8"); return;
 779       case Iop_QAdd32Ux4: vex_printf("QAdd32Ux4"); return;
 780       case Iop_QAdd8Sx16: vex_printf("QAdd8Sx16"); return;
 781       case Iop_QAdd16Sx8: vex_printf("QAdd16Sx8"); return;
 782       case Iop_QAdd32Sx4: vex_printf("QAdd32Sx4"); return;
 783       case Iop_QAdd64Ux2: vex_printf("QAdd64Ux2"); return;
 784       case Iop_QAdd64Sx2: vex_printf("QAdd64Sx2"); return;
 785
 786       case Iop_QAddExtUSsatSS8x16: vex_printf("QAddExtUSsatSS8x16"); return;
 787       case Iop_QAddExtUSsatSS16x8: vex_printf("QAddExtUSsatSS16x8"); return;
 788       case Iop_QAddExtUSsatSS32x4: vex_printf("QAddExtUSsatSS32x4"); return;
 789       case Iop_QAddExtUSsatSS64x2: vex_printf("QAddExtUSsatSS64x2"); return;
 790       case Iop_QAddExtSUsatUU8x16: vex_printf("QAddExtSUsatUU8x16"); return;
 791       case Iop_QAddExtSUsatUU16x8: vex_printf("QAddExtSUsatUU16x8"); return;
 792       case Iop_QAddExtSUsatUU32x4: vex_printf("QAddExtSUsatUU32x4"); return;
 793       case Iop_QAddExtSUsatUU64x2: vex_printf("QAddExtSUsatUU64x2"); return;
 794
 795       case Iop_PwAdd8x16: vex_printf("PwAdd8x16"); return;
 796       case Iop_PwAdd16x8: vex_printf("PwAdd16x8"); return;
 797       case Iop_PwAdd32x4: vex_printf("PwAdd32x4"); return;
 798       case Iop_PwAddL8Ux16: vex_printf("PwAddL8Ux16"); return;
 799       case Iop_PwAddL16Ux8: vex_printf("PwAddL16Ux8"); return;
 800       case Iop_PwAddL32Ux4: vex_printf("PwAddL32Ux4"); return;
 801       case Iop_PwAddL8Sx16: vex_printf("PwAddL8Sx16"); return;
 802       case Iop_PwAddL16Sx8: vex_printf("PwAddL16Sx8"); return;
 803       case Iop_PwAddL32Sx4: vex_printf("PwAddL32Sx4"); return;
 804
 805       case Iop_Sub8x16:   vex_printf("Sub8x16"); return;
 806       case Iop_Sub16x8:   vex_printf("Sub16x8"); return;
 807       case Iop_Sub32x4:   vex_printf("Sub32x4"); return;
 808       case Iop_Sub64x2:   vex_printf("Sub64x2"); return;
 809       case Iop_QSub8Ux16: vex_printf("QSub8Ux16"); return;
 810       case Iop_QSub16Ux8: vex_printf("QSub16Ux8"); return;
 811       case Iop_QSub32Ux4: vex_printf("QSub32Ux4"); return;
 812       case Iop_QSub8Sx16: vex_printf("QSub8Sx16"); return;
 813       case Iop_QSub16Sx8: vex_printf("QSub16Sx8"); return;
 814       case Iop_QSub32Sx4: vex_printf("QSub32Sx4"); return;
 815       case Iop_QSub64Ux2: vex_printf("QSub64Ux2"); return;
 816       case Iop_QSub64Sx2: vex_printf("QSub64Sx2"); return;
 817
 818       case Iop_Mul8x16:    vex_printf("Mul8x16"); return;
 819       case Iop_Mul16x8:    vex_printf("Mul16x8"); return;
 820       case Iop_Mul32x4:    vex_printf("Mul32x4"); return;
 821       case Iop_Mull8Ux8:    vex_printf("Mull8Ux8"); return;
 822       case Iop_Mull8Sx8:    vex_printf("Mull8Sx8"); return;
 823       case Iop_Mull16Ux4:    vex_printf("Mull16Ux4"); return;
 824       case Iop_Mull16Sx4:    vex_printf("Mull16Sx4"); return;
 825       case Iop_Mull32Ux2:    vex_printf("Mull32Ux2"); return;
 826       case Iop_Mull32Sx2:    vex_printf("Mull32Sx2"); return;
 827       case Iop_PolynomialMul8x16: vex_printf("PolynomialMul8x16"); return;
 828       case Iop_PolynomialMull8x8: vex_printf("PolynomialMull8x8"); return;
 829       case Iop_MulHi16Ux8: vex_printf("MulHi16Ux8"); return;
 830       case Iop_MulHi32Ux4: vex_printf("MulHi32Ux4"); return;
 831       case Iop_MulHi16Sx8: vex_printf("MulHi16Sx8"); return;
 832       case Iop_MulHi32Sx4: vex_printf("MulHi32Sx4"); return;
 833       case Iop_QDMulHi16Sx8: vex_printf("QDMulHi16Sx8"); return;
 834       case Iop_QDMulHi32Sx4: vex_printf("QDMulHi32Sx4"); return;
 835       case Iop_QRDMulHi16Sx8: vex_printf("QRDMulHi16Sx8"); return;
 836       case Iop_QRDMulHi32Sx4: vex_printf("QRDMulHi32Sx4"); return;
 837
 838       case Iop_MullEven8Ux16: vex_printf("MullEven8Ux16"); return;
 839       case Iop_MullEven16Ux8: vex_printf("MullEven16Ux8"); return;
 840       case Iop_MullEven32Ux4: vex_printf("MullEven32Ux4"); return;
 841       case Iop_MullEven8Sx16: vex_printf("MullEven8Sx16"); return;
 842       case Iop_MullEven16Sx8: vex_printf("MullEven16Sx8"); return;
 843       case Iop_MullEven32Sx4: vex_printf("MullEven32Sx4"); return;
 844
 845       case Iop_PolynomialMulAdd8x16:
 846          vex_printf("PolynomialMulAdd8x16"); return;
 847       case Iop_PolynomialMulAdd16x8:
 848          vex_printf("PolynomialMulAdd16x8"); return;
 849       case Iop_PolynomialMulAdd32x4:
 850          vex_printf("PolynomialMulAdd32x4"); return;
 851       case Iop_PolynomialMulAdd64x2:
 852          vex_printf("PolynomialMulAdd64x2"); return;
 853
 854       case Iop_Avg8Ux16: vex_printf("Avg8Ux16"); return;
 855       case Iop_Avg16Ux8: vex_printf("Avg16Ux8"); return;
 856       case Iop_Avg32Ux4: vex_printf("Avg32Ux4"); return;
 857       case Iop_Avg8Sx16: vex_printf("Avg8Sx16"); return;
 858       case Iop_Avg16Sx8: vex_printf("Avg16Sx8"); return;
 859       case Iop_Avg32Sx4: vex_printf("Avg32Sx4"); return;
 860
 861       case Iop_Max8Sx16: vex_printf("Max8Sx16"); return;
 862       case Iop_Max16Sx8: vex_printf("Max16Sx8"); return;
 863       case Iop_Max32Sx4: vex_printf("Max32Sx4"); return;
 864       case Iop_Max64Sx2: vex_printf("Max64Sx2"); return;
 865       case Iop_Max8Ux16: vex_printf("Max8Ux16"); return;
 866       case Iop_Max16Ux8: vex_printf("Max16Ux8"); return;
 867       case Iop_Max32Ux4: vex_printf("Max32Ux4"); return;
 868       case Iop_Max64Ux2: vex_printf("Max64Ux2"); return;
 869
 870       case Iop_Min8Sx16: vex_printf("Min8Sx16"); return;
 871       case Iop_Min16Sx8: vex_printf("Min16Sx8"); return;
 872       case Iop_Min32Sx4: vex_printf("Min32Sx4"); return;
 873       case Iop_Min64Sx2: vex_printf("Min64Sx2"); return;
 874       case Iop_Min8Ux16: vex_printf("Min8Ux16"); return;
 875       case Iop_Min16Ux8: vex_printf("Min16Ux8"); return;
 876       case Iop_Min32Ux4: vex_printf("Min32Ux4"); return;
 877       case Iop_Min64Ux2: vex_printf("Min64Ux2"); return;
 878
 879       case Iop_CmpEQ8x16:  vex_printf("CmpEQ8x16"); return;
 880       case Iop_CmpEQ16x8:  vex_printf("CmpEQ16x8"); return;
 881       case Iop_CmpEQ32x4:  vex_printf("CmpEQ32x4"); return;
 882       case Iop_CmpEQ64x2:  vex_printf("CmpEQ64x2"); return;
 883       case Iop_CmpGT8Sx16: vex_printf("CmpGT8Sx16"); return;
 884       case Iop_CmpGT16Sx8: vex_printf("CmpGT16Sx8"); return;
 885       case Iop_CmpGT32Sx4: vex_printf("CmpGT32Sx4"); return;
 886       case Iop_CmpGT64Sx2: vex_printf("CmpGT64Sx2"); return;
 887       case Iop_CmpGT8Ux16: vex_printf("CmpGT8Ux16"); return;
 888       case Iop_CmpGT16Ux8: vex_printf("CmpGT16Ux8"); return;
 889       case Iop_CmpGT32Ux4: vex_printf("CmpGT32Ux4"); return;
 890       case Iop_CmpGT64Ux2: vex_printf("CmpGT64Ux2"); return;
 891
 892       case Iop_Cnt8x16: vex_printf("Cnt8x16"); return;
 893       case Iop_Clz8x16: vex_printf("Clz8x16"); return;
 894       case Iop_Clz16x8: vex_printf("Clz16x8"); return;
 895       case Iop_Clz32x4: vex_printf("Clz32x4"); return;
 896       case Iop_Clz64x2: vex_printf("Clz64x2"); return;
 897       case Iop_Cls8x16: vex_printf("Cls8x16"); return;
 898       case Iop_Cls16x8: vex_printf("Cls16x8"); return;
 899       case Iop_Cls32x4: vex_printf("Cls32x4"); return;
 900       case Iop_Ctz8x16: vex_printf("Iop_Ctz8x16"); return;
 901       case Iop_Ctz16x8: vex_printf("Iop_Ctz16x8"); return;
 902       case Iop_Ctz32x4: vex_printf("Iop_Ctz32x4"); return;
 903       case Iop_Ctz64x2: vex_printf("Iop_Ctz64x2"); return;
 904
 905       case Iop_ShlV128: vex_printf("ShlV128"); return;
 906       case Iop_ShrV128: vex_printf("ShrV128"); return;
 907
 908       case Iop_ShlN8x16: vex_printf("ShlN8x16"); return;
 909       case Iop_ShlN16x8: vex_printf("ShlN16x8"); return;
 910       case Iop_ShlN32x4: vex_printf("ShlN32x4"); return;
 911       case Iop_ShlN64x2: vex_printf("ShlN64x2"); return;
 912       case Iop_ShrN8x16: vex_printf("ShrN8x16"); return;
 913       case Iop_ShrN16x8: vex_printf("ShrN16x8"); return;
 914       case Iop_ShrN32x4: vex_printf("ShrN32x4"); return;
 915       case Iop_ShrN64x2: vex_printf("ShrN64x2"); return;
 916       case Iop_SarN8x16: vex_printf("SarN8x16"); return;
 917       case Iop_SarN16x8: vex_printf("SarN16x8"); return;
 918       case Iop_SarN32x4: vex_printf("SarN32x4"); return;
 919       case Iop_SarN64x2: vex_printf("SarN64x2"); return;
 920
 921       case Iop_Shl8x16: vex_printf("Shl8x16"); return;
 922       case Iop_Shl16x8: vex_printf("Shl16x8"); return;
 923       case Iop_Shl32x4: vex_printf("Shl32x4"); return;
 924       case Iop_Shl64x2: vex_printf("Shl64x2"); return;
 925       case Iop_QSal8x16: vex_printf("QSal8x16"); return;
 926       case Iop_QSal16x8: vex_printf("QSal16x8"); return;
 927       case Iop_QSal32x4: vex_printf("QSal32x4"); return;
 928       case Iop_QSal64x2: vex_printf("QSal64x2"); return;
 929       case Iop_QShl8x16: vex_printf("QShl8x16"); return;
 930       case Iop_QShl16x8: vex_printf("QShl16x8"); return;
 931       case Iop_QShl32x4: vex_printf("QShl32x4"); return;
 932       case Iop_QShl64x2: vex_printf("QShl64x2"); return;
 933       case Iop_QShlNsatSS8x16: vex_printf("QShlNsatSS8x16"); return;
 934       case Iop_QShlNsatSS16x8: vex_printf("QShlNsatSS16x8"); return;
 935       case Iop_QShlNsatSS32x4: vex_printf("QShlNsatSS32x4"); return;
 936       case Iop_QShlNsatSS64x2: vex_printf("QShlNsatSS64x2"); return;
 937       case Iop_QShlNsatUU8x16: vex_printf("QShlNsatUU8x16"); return;
 938       case Iop_QShlNsatUU16x8: vex_printf("QShlNsatUU16x8"); return;
 939       case Iop_QShlNsatUU32x4: vex_printf("QShlNsatUU32x4"); return;
 940       case Iop_QShlNsatUU64x2: vex_printf("QShlNsatUU64x2"); return;
 941       case Iop_QShlNsatSU8x16: vex_printf("QShlNsatSU8x16"); return;
 942       case Iop_QShlNsatSU16x8: vex_printf("QShlNsatSU16x8"); return;
 943       case Iop_QShlNsatSU32x4: vex_printf("QShlNsatSU32x4"); return;
 944       case Iop_QShlNsatSU64x2: vex_printf("QShlNsatSU64x2"); return;
 945       case Iop_Shr8x16: vex_printf("Shr8x16"); return;
 946       case Iop_Shr16x8: vex_printf("Shr16x8"); return;
 947       case Iop_Shr32x4: vex_printf("Shr32x4"); return;
 948       case Iop_Shr64x2: vex_printf("Shr64x2"); return;
 949       case Iop_Sar8x16: vex_printf("Sar8x16"); return;
 950       case Iop_Sar16x8: vex_printf("Sar16x8"); return;
 951       case Iop_Sar32x4: vex_printf("Sar32x4"); return;
 952       case Iop_Sar64x2: vex_printf("Sar64x2"); return;
 953       case Iop_Sal8x16: vex_printf("Sal8x16"); return;
 954       case Iop_Sal16x8: vex_printf("Sal16x8"); return;
 955       case Iop_Sal32x4: vex_printf("Sal32x4"); return;
 956       case Iop_Sal64x2: vex_printf("Sal64x2"); return;
 957       case Iop_Rol8x16: vex_printf("Rol8x16"); return;
 958       case Iop_Rol16x8: vex_printf("Rol16x8"); return;
 959       case Iop_Rol32x4: vex_printf("Rol32x4"); return;
 960       case Iop_Rol64x2: vex_printf("Rol64x2"); return;
 961
 962       case Iop_QandUQsh8x16: vex_printf("QandUQsh8x16"); return;
 963       case Iop_QandUQsh16x8: vex_printf("QandUQsh16x8"); return;
 964       case Iop_QandUQsh32x4: vex_printf("QandUQsh32x4"); return;
 965       case Iop_QandUQsh64x2: vex_printf("QandUQsh64x2"); return;
 966       case Iop_QandSQsh8x16: vex_printf("QandSQsh8x16"); return;
 967       case Iop_QandSQsh16x8: vex_printf("QandSQsh16x8"); return;
 968       case Iop_QandSQsh32x4: vex_printf("QandSQsh32x4"); return;
 969       case Iop_QandSQsh64x2: vex_printf("QandSQsh64x2"); return;
 970       case Iop_QandUQRsh8x16: vex_printf("QandUQRsh8x16"); return;
 971       case Iop_QandUQRsh16x8: vex_printf("QandUQRsh16x8"); return;
 972       case Iop_QandUQRsh32x4: vex_printf("QandUQRsh32x4"); return;
 973       case Iop_QandUQRsh64x2: vex_printf("QandUQRsh64x2"); return;
 974       case Iop_QandSQRsh8x16: vex_printf("QandSQRsh8x16"); return;
 975       case Iop_QandSQRsh16x8: vex_printf("QandSQRsh16x8"); return;
 976       case Iop_QandSQRsh32x4: vex_printf("QandSQRsh32x4"); return;
 977       case Iop_QandSQRsh64x2: vex_printf("QandSQRsh64x2"); return;
 978
 979       case Iop_Sh8Sx16: vex_printf("Sh8Sx16"); return;
 980       case Iop_Sh16Sx8: vex_printf("Sh16Sx8"); return;
 981       case Iop_Sh32Sx4: vex_printf("Sh32Sx4"); return;
 982       case Iop_Sh64Sx2: vex_printf("Sh64Sx2"); return;
 983       case Iop_Sh8Ux16: vex_printf("Sh8Ux16"); return;
 984       case Iop_Sh16Ux8: vex_printf("Sh16Ux8"); return;
 985       case Iop_Sh32Ux4: vex_printf("Sh32Ux4"); return;
 986       case Iop_Sh64Ux2: vex_printf("Sh64Ux2"); return;
 987       case Iop_Rsh8Sx16: vex_printf("Rsh8Sx16"); return;
 988       case Iop_Rsh16Sx8: vex_printf("Rsh16Sx8"); return;
 989       case Iop_Rsh32Sx4: vex_printf("Rsh32Sx4"); return;
 990       case Iop_Rsh64Sx2: vex_printf("Rsh64Sx2"); return;
 991       case Iop_Rsh8Ux16: vex_printf("Rsh8Ux16"); return;
 992       case Iop_Rsh16Ux8: vex_printf("Rsh16Ux8"); return;
 993       case Iop_Rsh32Ux4: vex_printf("Rsh32Ux4"); return;
 994       case Iop_Rsh64Ux2: vex_printf("Rsh64Ux2"); return;
 995
 996       case Iop_QandQShrNnarrow16Uto8Ux8:
 997          vex_printf("QandQShrNnarrow16Uto8Ux8"); return;
 998       case Iop_QandQShrNnarrow32Uto16Ux4:
 999          vex_printf("QandQShrNnarrow32Uto16Ux4"); return;
1000       case Iop_QandQShrNnarrow64Uto32Ux2:
1001          vex_printf("QandQShrNnarrow64Uto32Ux2"); return;
1002       case Iop_QandQSarNnarrow16Sto8Sx8:
1003          vex_printf("QandQSarNnarrow16Sto8Sx8"); return;
1004       case Iop_QandQSarNnarrow32Sto16Sx4:
1005          vex_printf("QandQSarNnarrow32Sto16Sx4"); return;
1006       case Iop_QandQSarNnarrow64Sto32Sx2:
1007          vex_printf("QandQSarNnarrow64Sto32Sx2"); return;
1008       case Iop_QandQSarNnarrow16Sto8Ux8:
1009          vex_printf("QandQSarNnarrow16Sto8Ux8"); return;
1010       case Iop_QandQSarNnarrow32Sto16Ux4:
1011          vex_printf("QandQSarNnarrow32Sto16Ux4"); return;
1012       case Iop_QandQSarNnarrow64Sto32Ux2:
1013          vex_printf("QandQSarNnarrow64Sto32Ux2"); return;
1014       case Iop_QandQRShrNnarrow16Uto8Ux8:
1015          vex_printf("QandQRShrNnarrow16Uto8Ux8"); return;
1016       case Iop_QandQRShrNnarrow32Uto16Ux4:
1017          vex_printf("QandQRShrNnarrow32Uto16Ux4"); return;
1018       case Iop_QandQRShrNnarrow64Uto32Ux2:
1019          vex_printf("QandQRShrNnarrow64Uto32Ux2"); return;
1020       case Iop_QandQRSarNnarrow16Sto8Sx8:
1021          vex_printf("QandQRSarNnarrow16Sto8Sx8"); return;
1022       case Iop_QandQRSarNnarrow32Sto16Sx4:
1023          vex_printf("QandQRSarNnarrow32Sto16Sx4"); return;
1024       case Iop_QandQRSarNnarrow64Sto32Sx2:
1025          vex_printf("QandQRSarNnarrow64Sto32Sx2"); return;
1026       case Iop_QandQRSarNnarrow16Sto8Ux8:
1027          vex_printf("QandQRSarNnarrow16Sto8Ux8"); return;
1028       case Iop_QandQRSarNnarrow32Sto16Ux4:
1029          vex_printf("QandQRSarNnarrow32Sto16Ux4"); return;
1030       case Iop_QandQRSarNnarrow64Sto32Ux2:
1031          vex_printf("QandQRSarNnarrow64Sto32Ux2"); return;
1032
1033       case Iop_NarrowBin16to8x16:    vex_printf("NarrowBin16to8x16"); return;
1034       case Iop_NarrowBin32to16x8:    vex_printf("NarrowBin32to16x8"); return;
1035       case Iop_QNarrowBin16Uto8Ux16: vex_printf("QNarrowBin16Uto8Ux16"); return;
1036       case Iop_QNarrowBin32Sto16Ux8: vex_printf("QNarrowBin32Sto16Ux8"); return;
1037       case Iop_QNarrowBin16Sto8Ux16: vex_printf("QNarrowBin16Sto8Ux16"); return;
1038       case Iop_QNarrowBin32Uto16Ux8: vex_printf("QNarrowBin32Uto16Ux8"); return;
1039       case Iop_QNarrowBin16Sto8Sx16: vex_printf("QNarrowBin16Sto8Sx16"); return;
1040       case Iop_QNarrowBin32Sto16Sx8: vex_printf("QNarrowBin32Sto16Sx8"); return;
1041       case Iop_NarrowUn16to8x8:     vex_printf("NarrowUn16to8x8");  return;
1042       case Iop_NarrowUn32to16x4:    vex_printf("NarrowUn32to16x4"); return;
1043       case Iop_NarrowUn64to32x2:    vex_printf("NarrowUn64to32x2"); return;
1044       case Iop_QNarrowUn16Uto8Ux8:  vex_printf("QNarrowUn16Uto8Ux8");  return;
1045       case Iop_QNarrowUn32Uto16Ux4: vex_printf("QNarrowUn32Uto16Ux4"); return;
1046       case Iop_QNarrowUn64Uto32Ux2: vex_printf("QNarrowUn64Uto32Ux2"); return;
1047       case Iop_QNarrowUn16Sto8Sx8:  vex_printf("QNarrowUn16Sto8Sx8");  return;
1048       case Iop_QNarrowUn32Sto16Sx4: vex_printf("QNarrowUn32Sto16Sx4"); return;
1049       case Iop_QNarrowUn64Sto32Sx2: vex_printf("QNarrowUn64Sto32Sx2"); return;
1050       case Iop_QNarrowUn16Sto8Ux8:  vex_printf("QNarrowUn16Sto8Ux8");  return;
1051       case Iop_QNarrowUn32Sto16Ux4: vex_printf("QNarrowUn32Sto16Ux4"); return;
1052       case Iop_QNarrowUn64Sto32Ux2: vex_printf("QNarrowUn64Sto32Ux2"); return;
1053       case Iop_Widen8Uto16x8:  vex_printf("Widen8Uto16x8");  return;
1054       case Iop_Widen16Uto32x4: vex_printf("Widen16Uto32x4"); return;
1055       case Iop_Widen32Uto64x2: vex_printf("Widen32Uto64x2"); return;
1056       case Iop_Widen8Sto16x8:  vex_printf("Widen8Sto16x8");  return;
1057       case Iop_Widen16Sto32x4: vex_printf("Widen16Sto32x4"); return;
1058       case Iop_Widen32Sto64x2: vex_printf("Widen32Sto64x2"); return;
1059
1060       case Iop_InterleaveHI8x16: vex_printf("InterleaveHI8x16"); return;
1061       case Iop_InterleaveHI16x8: vex_printf("InterleaveHI16x8"); return;
1062       case Iop_InterleaveHI32x4: vex_printf("InterleaveHI32x4"); return;
1063       case Iop_InterleaveHI64x2: vex_printf("InterleaveHI64x2"); return;
1064       case Iop_InterleaveLO8x16: vex_printf("InterleaveLO8x16"); return;
1065       case Iop_InterleaveLO16x8: vex_printf("InterleaveLO16x8"); return;
1066       case Iop_InterleaveLO32x4: vex_printf("InterleaveLO32x4"); return;
1067       case Iop_InterleaveLO64x2: vex_printf("InterleaveLO64x2"); return;
1068
1069       case Iop_CatOddLanes8x16: vex_printf("CatOddLanes8x16"); return;
1070       case Iop_CatOddLanes16x8: vex_printf("CatOddLanes16x8"); return;
1071       case Iop_CatOddLanes32x4: vex_printf("CatOddLanes32x4"); return;
1072       case Iop_CatEvenLanes8x16: vex_printf("CatEvenLanes8x16"); return;
1073       case Iop_CatEvenLanes16x8: vex_printf("CatEvenLanes16x8"); return;
1074       case Iop_CatEvenLanes32x4: vex_printf("CatEvenLanes32x4"); return;
1075
1076       case Iop_InterleaveOddLanes8x16: vex_printf("InterleaveOddLanes8x16"); return;
1077       case Iop_InterleaveOddLanes16x8: vex_printf("InterleaveOddLanes16x8"); return;
1078       case Iop_InterleaveOddLanes32x4: vex_printf("InterleaveOddLanes32x4"); return;
1079       case Iop_InterleaveEvenLanes8x16: vex_printf("InterleaveEvenLanes8x16"); return;
1080       case Iop_InterleaveEvenLanes16x8: vex_printf("InterleaveEvenLanes16x8"); return;
1081       case Iop_InterleaveEvenLanes32x4: vex_printf("InterleaveEvenLanes32x4"); return;
1082       case Iop_PackOddLanes8x16: vex_printf("InterleavePackOddLanes8x16"); return;
1083       case Iop_PackOddLanes16x8: vex_printf("InterleavePackOddLanes16x8"); return;
1084       case Iop_PackOddLanes32x4: vex_printf("InterleavePackOddLanes32x4"); return;
1085       case Iop_PackEvenLanes8x16: vex_printf("InterleavePackEvenLanes8x16"); return;
1086       case Iop_PackEvenLanes16x8: vex_printf("InterleavePackEvenLanes16x8"); return;
1087       case Iop_PackEvenLanes32x4: vex_printf("InterleavePackEvenLanes32x4"); return;
1088
1089       case Iop_GetElem8x16: vex_printf("GetElem8x16"); return;
1090       case Iop_GetElem16x8: vex_printf("GetElem16x8"); return;
1091       case Iop_GetElem32x4: vex_printf("GetElem32x4"); return;
1092       case Iop_GetElem64x2: vex_printf("GetElem64x2"); return;
1093
1094       case Iop_SetElem8x16: vex_printf("SetElem8x16"); return;
1095       case Iop_SetElem16x8: vex_printf("SetElem16x8"); return;
1096       case Iop_SetElem32x4: vex_printf("SetElem32x4"); return;
1097       case Iop_SetElem64x2: vex_printf("SetElem64x2"); return;
1098
1099       case Iop_GetElem8x8: vex_printf("GetElem8x8"); return;
1100       case Iop_GetElem16x4: vex_printf("GetElem16x4"); return;
1101       case Iop_GetElem32x2: vex_printf("GetElem32x2"); return;
1102       case Iop_SetElem8x8: vex_printf("SetElem8x8"); return;
1103       case Iop_SetElem16x4: vex_printf("SetElem16x4"); return;
1104       case Iop_SetElem32x2: vex_printf("SetElem32x2"); return;
1105
1106       case Iop_Slice64: vex_printf("Slice64"); return;
1107       case Iop_SliceV128: vex_printf("SliceV128"); return;
1108
1109       case Iop_Perm8x16: vex_printf("Perm8x16"); return;
1110       case Iop_Perm32x4: vex_printf("Perm32x4"); return;
1111       case Iop_Perm8x16x2: vex_printf("Perm8x16x2"); return;
1112       case Iop_Reverse8sIn16_x8: vex_printf("Reverse8sIn16_x8"); return;
1113       case Iop_Reverse8sIn32_x4: vex_printf("Reverse8sIn32_x4"); return;
1114       case Iop_Reverse16sIn32_x4: vex_printf("Reverse16sIn32_x4"); return;
1115       case Iop_Reverse8sIn64_x2: vex_printf("Reverse8sIn64_x2"); return;
1116       case Iop_Reverse16sIn64_x2: vex_printf("Reverse16sIn64_x2"); return;
1117       case Iop_Reverse32sIn64_x2: vex_printf("Reverse32sIn64_x2"); return;
1118       case Iop_Reverse1sIn8_x16: vex_printf("Reverse1sIn8_x16"); return;
1119
1120       case Iop_F32ToFixed32Ux4_RZ: vex_printf("F32ToFixed32Ux4_RZ"); return;
1121       case Iop_F32ToFixed32Sx4_RZ: vex_printf("F32ToFixed32Sx4_RZ"); return;
1122       case Iop_Fixed32UToF32x4_RN: vex_printf("Fixed32UToF32x4_RN"); return;
1123       case Iop_Fixed32SToF32x4_RN: vex_printf("Fixed32SToF32x4_RN"); return;
1124       case Iop_F32ToFixed32Ux2_RZ: vex_printf("F32ToFixed32Ux2_RZ"); return;
1125       case Iop_F32ToFixed32Sx2_RZ: vex_printf("F32ToFixed32Sx2_RZ"); return;
1126       case Iop_Fixed32UToF32x2_RN: vex_printf("Fixed32UToF32x2_RN"); return;
1127       case Iop_Fixed32SToF32x2_RN: vex_printf("Fixed32SToF32x2_RN"); return;
1128
1129       case Iop_D32toD64:  vex_printf("D32toD64");   return;
1130       case Iop_D64toD32:  vex_printf("D64toD32");   return;
1131       case Iop_AddD64:  vex_printf("AddD64");   return;
1132       case Iop_SubD64:  vex_printf("SubD64");   return;
1133       case Iop_MulD64:  vex_printf("MulD64");   return;
1134       case Iop_DivD64:  vex_printf("DivD64");   return;
1135       case Iop_ShlD64:  vex_printf("ShlD64"); return;
1136       case Iop_ShrD64:  vex_printf("ShrD64"); return;
1137       case Iop_D64toI32S:  vex_printf("D64toI32S");  return;
1138       case Iop_D64toI32U:  vex_printf("D64toI32U");  return;
1139       case Iop_D64toI64S:  vex_printf("D64toI64S");  return;
1140       case Iop_D64toI64U:  vex_printf("D64toI64U");  return;
1141       case Iop_I32StoD64:  vex_printf("I32StoD64");  return;
1142       case Iop_I32UtoD64:  vex_printf("I32UtoD64");  return;
1143       case Iop_I64StoD64:  vex_printf("I64StoD64");  return;
1144       case Iop_I64UtoD64:  vex_printf("I64UtoD64");  return;
1145       case Iop_I32StoD128: vex_printf("I32StoD128"); return;
1146       case Iop_I32UtoD128: vex_printf("I32UtoD128"); return;
1147       case Iop_I64StoD128: vex_printf("I64StoD128"); return;
1148       case Iop_I64UtoD128: vex_printf("I64UtoD128"); return;
1149       case Iop_D64toD128:  vex_printf("D64toD128");  return;
1150       case Iop_D128toD64:  vex_printf("D128toD64");  return;
1151       case Iop_D128toI32S: vex_printf("D128toI32S"); return;
1152       case Iop_D128toI32U: vex_printf("D128toI32U"); return;
1153       case Iop_D128toI64S: vex_printf("D128toI64S"); return;
1154       case Iop_D128toI64U: vex_printf("D128toI64U"); return;
1155       case Iop_F32toD32:   vex_printf("F32toD32");   return;
1156       case Iop_F32toD64:   vex_printf("F32toD64");   return;
1157       case Iop_F32toD128:  vex_printf("F32toD128");  return;
1158       case Iop_F64toD32:   vex_printf("F64toD32");   return;
1159       case Iop_F64toD64:   vex_printf("F64toD64");   return;
1160       case Iop_F64toD128:  vex_printf("F64toD128");  return;
1161       case Iop_F128toD32:  vex_printf("F128toD32");  return;
1162       case Iop_F128toD64:  vex_printf("F128toD64");  return;
1163       case Iop_F128toD128: vex_printf("F128toD128"); return;
1164       case Iop_D32toF32:   vex_printf("D32toF32");   return;
1165       case Iop_D32toF64:   vex_printf("D32toF64");   return;
1166       case Iop_D32toF128:  vex_printf("D32toF128");  return;
1167       case Iop_D64toF32:   vex_printf("D64toF32");   return;
1168       case Iop_D64toF64:   vex_printf("D64toF64");   return;
1169       case Iop_D64toF128:  vex_printf("D64toF128");  return;
1170       case Iop_D128toF32:  vex_printf("D128toF32");  return;
1171       case Iop_D128toF64:  vex_printf("D128toF64");  return;
1172       case Iop_D128toF128: vex_printf("D128toF128"); return;
1173       case Iop_AddD128: vex_printf("AddD128");  return;
1174       case Iop_SubD128: vex_printf("SubD128");  return;
1175       case Iop_MulD128: vex_printf("MulD128");  return;
1176       case Iop_DivD128: vex_printf("DivD128");  return;
1177       case Iop_ShlD128: vex_printf("ShlD128");  return;
1178       case Iop_ShrD128: vex_printf("ShrD128");  return;
1179       case Iop_RoundD64toInt:  vex_printf("RoundD64toInt");  return;
1180       case Iop_RoundD128toInt: vex_printf("RoundD128toInt"); return;
1181       case Iop_QuantizeD64:    vex_printf("QuantizeD64");    return;
1182       case Iop_QuantizeD128:   vex_printf("QuantizeD128");   return;
1183       case Iop_ExtractExpD64:  vex_printf("ExtractExpD64");  return;
1184       case Iop_ExtractExpD128: vex_printf("ExtractExpD128"); return;
1185       case Iop_ExtractSigD64:  vex_printf("ExtractSigD64");  return;
1186       case Iop_ExtractSigD128: vex_printf("ExtractSigD128"); return;
1187       case Iop_InsertExpD64:   vex_printf("InsertExpD64");   return;
1188       case Iop_InsertExpD128:  vex_printf("InsertExpD128");  return;
1189       case Iop_CmpD64:         vex_printf("CmpD64");     return;
1190       case Iop_CmpD128:        vex_printf("CmpD128");    return;
1191       case Iop_CmpExpD64:      vex_printf("CmpExpD64");  return;
1192       case Iop_CmpExpD128:     vex_printf("CmpExpD128"); return;
1193       case Iop_D64HLtoD128: vex_printf("D64HLtoD128");   return;
1194       case Iop_D128HItoD64: vex_printf("D128HItoD64");   return;
1195       case Iop_D128LOtoD64: vex_printf("D128LOtoD64");   return;
1196       case Iop_SignificanceRoundD64: vex_printf("SignificanceRoundD64");
1197          return;
1198       case Iop_SignificanceRoundD128: vex_printf("SignificanceRoundD128");
1199          return;
1200       case Iop_ReinterpI64asD64: vex_printf("ReinterpI64asD64"); return;
1201       case Iop_ReinterpD64asI64: vex_printf("ReinterpD64asI64"); return;
1202       case Iop_V256to64_0: vex_printf("V256to64_0"); return;
1203       case Iop_V256to64_1: vex_printf("V256to64_1"); return;
1204       case Iop_V256to64_2: vex_printf("V256to64_2"); return;
1205       case Iop_V256to64_3: vex_printf("V256to64_3"); return;
1206       case Iop_64x4toV256: vex_printf("64x4toV256"); return;
1207       case Iop_V256toV128_0: vex_printf("V256toV128_0"); return;
1208       case Iop_V256toV128_1: vex_printf("V256toV128_1"); return;
1209       case Iop_V128HLtoV256: vex_printf("V128HLtoV256"); return;
1210       case Iop_DPBtoBCD: vex_printf("DPBtoBCD"); return;
1211       case Iop_BCDtoDPB: vex_printf("BCDtoDPB"); return;
1212       case Iop_Add64Fx4: vex_printf("Add64Fx4"); return;
1213       case Iop_Sub64Fx4: vex_printf("Sub64Fx4"); return;
1214       case Iop_Mul64Fx4: vex_printf("Mul64Fx4"); return;
1215       case Iop_Div64Fx4: vex_printf("Div64Fx4"); return;
1216       case Iop_Add32Fx8: vex_printf("Add32Fx8"); return;
1217       case Iop_Sub32Fx8: vex_printf("Sub32Fx8"); return;
1218       case Iop_Mul32Fx8: vex_printf("Mul32Fx8"); return;
1219       case Iop_Div32Fx8: vex_printf("Div32Fx8"); return;
1220       case Iop_AndV256: vex_printf("AndV256"); return;
1221       case Iop_OrV256:  vex_printf("OrV256"); return;
1222       case Iop_XorV256: vex_printf("XorV256"); return;
1223       case Iop_NotV256: vex_printf("NotV256"); return;
1224       case Iop_CmpNEZ64x4: vex_printf("CmpNEZ64x4"); return;
1225       case Iop_CmpNEZ32x8: vex_printf("CmpNEZ32x8"); return;
1226       case Iop_CmpNEZ16x16: vex_printf("CmpNEZ16x16"); return;
1227       case Iop_CmpNEZ8x32: vex_printf("CmpNEZ8x32"); return;
1228
1229       case Iop_Add8x32:   vex_printf("Add8x32"); return;
1230       case Iop_Add16x16:  vex_printf("Add16x16"); return;
1231       case Iop_Add32x8:   vex_printf("Add32x8"); return;
1232       case Iop_Add64x4:   vex_printf("Add64x4"); return;
1233       case Iop_Sub8x32:   vex_printf("Sub8x32"); return;
1234       case Iop_Sub16x16:  vex_printf("Sub16x16"); return;
1235       case Iop_Sub32x8:   vex_printf("Sub32x8"); return;
1236       case Iop_Sub64x4:   vex_printf("Sub64x4"); return;
1237       case Iop_QAdd8Ux32: vex_printf("QAdd8Ux32"); return;
1238       case Iop_QAdd16Ux16: vex_printf("QAdd16Ux16"); return;
1239       case Iop_QAdd8Sx32: vex_printf("QAdd8Sx32"); return;
1240       case Iop_QAdd16Sx16: vex_printf("QAdd16Sx16"); return;
1241       case Iop_QSub8Ux32: vex_printf("QSub8Ux32"); return;
1242       case Iop_QSub16Ux16: vex_printf("QSub16Ux16"); return;
1243       case Iop_QSub8Sx32: vex_printf("QSub8Sx32"); return;
1244       case Iop_QSub16Sx16: vex_printf("QSub16Sx16"); return;
1245
1246       case Iop_Mul16x16:    vex_printf("Mul16x16"); return;
1247       case Iop_Mul32x8:     vex_printf("Mul32x8"); return;
1248       case Iop_MulHi16Ux16: vex_printf("MulHi16Ux16"); return;
1249       case Iop_MulHi16Sx16: vex_printf("MulHi16Sx16"); return;
1250
1251       case Iop_Avg8Ux32:  vex_printf("Avg8Ux32"); return;
1252       case Iop_Avg16Ux16: vex_printf("Avg16Ux16"); return;
1253
1254       case Iop_Max8Sx32:  vex_printf("Max8Sx32"); return;
1255       case Iop_Max16Sx16: vex_printf("Max16Sx16"); return;
1256       case Iop_Max32Sx8:  vex_printf("Max32Sx8"); return;
1257       case Iop_Max8Ux32:  vex_printf("Max8Ux32"); return;
1258       case Iop_Max16Ux16: vex_printf("Max16Ux16"); return;
1259       case Iop_Max32Ux8:  vex_printf("Max32Ux8"); return;
1260
1261       case Iop_Min8Sx32:  vex_printf("Min8Sx32"); return;
1262       case Iop_Min16Sx16: vex_printf("Min16Sx16"); return;
1263       case Iop_Min32Sx8:  vex_printf("Min32Sx8"); return;
1264       case Iop_Min8Ux32:  vex_printf("Min8Ux32"); return;
1265       case Iop_Min16Ux16: vex_printf("Min16Ux16"); return;
1266       case Iop_Min32Ux8:  vex_printf("Min32Ux8"); return;
1267
1268       case Iop_CmpEQ8x32:   vex_printf("CmpEQ8x32"); return;
1269       case Iop_CmpEQ16x16:  vex_printf("CmpEQ16x16"); return;
1270       case Iop_CmpEQ32x8:   vex_printf("CmpEQ32x8"); return;
1271       case Iop_CmpEQ64x4:   vex_printf("CmpEQ64x4"); return;
1272       case Iop_CmpGT8Sx32:  vex_printf("CmpGT8Sx32"); return;
1273       case Iop_CmpGT16Sx16: vex_printf("CmpGT16Sx16"); return;
1274       case Iop_CmpGT32Sx8:  vex_printf("CmpGT32Sx8"); return;
1275       case Iop_CmpGT64Sx4:  vex_printf("CmpGT64Sx4"); return;
1276
1277       case Iop_ShlN16x16:  vex_printf("ShlN16x16"); return;
1278       case Iop_ShlN32x8:   vex_printf("ShlN32x8"); return;
1279       case Iop_ShlN64x4:   vex_printf("ShlN64x4"); return;
1280       case Iop_ShrN16x16:  vex_printf("ShrN16x16"); return;
1281       case Iop_ShrN32x8:   vex_printf("ShrN32x8"); return;
1282       case Iop_ShrN64x4:   vex_printf("ShrN64x4"); return;
1283       case Iop_SarN16x16:  vex_printf("SarN16x16"); return;
1284       case Iop_SarN32x8:   vex_printf("SarN32x8"); return;
1285
1286       case Iop_Perm32x8:   vex_printf("Perm32x8"); return;
1287
1288       case Iop_CipherV128:   vex_printf("CipherV128"); return;
1289       case Iop_CipherLV128:  vex_printf("CipherLV128"); return;
1290       case Iop_NCipherV128:  vex_printf("NCipherV128"); return;
1291       case Iop_NCipherLV128: vex_printf("NCipherLV128"); return;
1292       case Iop_CipherSV128:  vex_printf("CipherSV128"); return;
1293
1294       case Iop_SHA256:  vex_printf("SHA256"); return;
1295       case Iop_SHA512:  vex_printf("SHA512"); return;
1296       case Iop_BCDAdd:  vex_printf("BCDAdd"); return;
1297       case Iop_BCDSub:  vex_printf("BCDSub"); return;
1298       case Iop_I128StoBCD128:  vex_printf("bcdcfsq."); return;
1299       case Iop_BCD128toI128S:  vex_printf("bcdctsq."); return;
1300       case Iop_Rotx32:  vex_printf("bitswap"); return;
1301       case Iop_Rotx64:  vex_printf("dbitswap"); return;
1302
1303       case Iop_PwBitMtxXpose64x2: vex_printf("BitMatrixTranspose64x2"); return;
1304
1305       default: vpanic("ppIROp(1)");
1306    }
1307
1308    vassert(str);
1309    switch (op - base) {
1310       case 0: vex_printf("%s",str); vex_printf("8"); break;
1311       case 1: vex_printf("%s",str); vex_printf("16"); break;
1312       case 2: vex_printf("%s",str); vex_printf("32"); break;
1313       case 3: vex_printf("%s",str); vex_printf("64"); break;
1314       default: vpanic("ppIROp(2)");
1315    }
1316 }
1317
1318 void ppIRExpr ( const IRExpr* e )
1319 {
1320   Int i;
1321   switch (e->tag) {
1322     case Iex_Binder:
1323       vex_printf("BIND-%d", e->Iex.Binder.binder);
1324       break;
1325     case Iex_Get:
1326       vex_printf( "GET:" );
1327       ppIRType(e->Iex.Get.ty);
1328       vex_printf("(%d)", e->Iex.Get.offset);
1329       break;
1330     case Iex_GetI:
1331       vex_printf( "GETI" );
1332       ppIRRegArray(e->Iex.GetI.descr);
1333       vex_printf("[");
1334       ppIRExpr(e->Iex.GetI.ix);
1335       vex_printf(",%d]", e->Iex.GetI.bias);
1336       break;
1337     case Iex_RdTmp:
1338       ppIRTemp(e->Iex.RdTmp.tmp);
1339       break;
1340     case Iex_Qop: {
1341       const IRQop *qop = e->Iex.Qop.details;
1342       ppIROp(qop->op);
1343       vex_printf( "(" );
1344       ppIRExpr(qop->arg1);
1345       vex_printf( "," );
1346       ppIRExpr(qop->arg2);
1347       vex_printf( "," );
1348       ppIRExpr(qop->arg3);
1349       vex_printf( "," );
1350       ppIRExpr(qop->arg4);
1351       vex_printf( ")" );
1352       break;
1353     }
1354     case Iex_Triop: {
1355       const IRTriop *triop = e->Iex.Triop.details;
1356       ppIROp(triop->op);
1357       vex_printf( "(" );
1358       ppIRExpr(triop->arg1);
1359       vex_printf( "," );
1360       ppIRExpr(triop->arg2);
1361       vex_printf( "," );
1362       ppIRExpr(triop->arg3);
1363       vex_printf( ")" );
1364       break;
1365     }
1366     case Iex_Binop:
1367       ppIROp(e->Iex.Binop.op);
1368       vex_printf( "(" );
1369       ppIRExpr(e->Iex.Binop.arg1);
1370       vex_printf( "," );
1371       ppIRExpr(e->Iex.Binop.arg2);
1372       vex_printf( ")" );
1373       break;
1374     case Iex_Unop:
1375       ppIROp(e->Iex.Unop.op);
1376       vex_printf( "(" );
1377       ppIRExpr(e->Iex.Unop.arg);
1378       vex_printf( ")" );
1379       break;
1380     case Iex_Load:
1381       vex_printf( "LD%s:", e->Iex.Load.end==Iend_LE ? "le" : "be" );
1382       ppIRType(e->Iex.Load.ty);
1383       vex_printf( "(" );
1384       ppIRExpr(e->Iex.Load.addr);
1385       vex_printf( ")" );
1386       break;
1387     case Iex_Const:
1388       ppIRConst(e->Iex.Const.con);
1389       break;
1390     case Iex_CCall:
1391       ppIRCallee(e->Iex.CCall.cee);
1392       vex_printf("(");
1393       for (i = 0; e->Iex.CCall.args[i] != NULL; i++) {
1394         IRExpr* arg = e->Iex.CCall.args[i];
1395         ppIRExpr(arg);
1396
1397         if (e->Iex.CCall.args[i+1] != NULL) {
1398           vex_printf(",");
1399         }
1400       }
1401       vex_printf("):");
1402       ppIRType(e->Iex.CCall.retty);
1403       break;
1404     case Iex_ITE:
1405       vex_printf("ITE(");
1406       ppIRExpr(e->Iex.ITE.cond);
1407       vex_printf(",");
1408       ppIRExpr(e->Iex.ITE.iftrue);
1409       vex_printf(",");
1410       ppIRExpr(e->Iex.ITE.iffalse);
1411       vex_printf(")");
1412       break;
1413     case Iex_VECRET:
1414       vex_printf("VECRET");
1415       break;
1416     case Iex_GSPTR:
1417       vex_printf("GSPTR");
1418       break;
1419     default:
1420       vpanic("ppIRExpr");
1421   }
1422 }
1423
1424 void ppIREffect ( IREffect fx )
1425 {
1426    switch (fx) {
1427       case Ifx_None:   vex_printf("noFX"); return;
1428       case Ifx_Read:   vex_printf("RdFX"); return;
1429       case Ifx_Write:  vex_printf("WrFX"); return;
1430       case Ifx_Modify: vex_printf("MoFX"); return;
1431       default: vpanic("ppIREffect");
1432    }
1433 }
1434
1435 void ppIRDirty ( const IRDirty* d )
1436 {
1437    Int i;
1438    if (d->tmp != IRTemp_INVALID) {
1439       ppIRTemp(d->tmp);
1440       vex_printf(" = ");
1441    }
1442    vex_printf("DIRTY ");
1443    ppIRExpr(d->guard);
1444    if (d->mFx != Ifx_None) {
1445       vex_printf(" ");
1446       ppIREffect(d->mFx);
1447       vex_printf("-mem(");
1448       ppIRExpr(d->mAddr);
1449       vex_printf(",%d)", d->mSize);
1450    }
1451    for (i = 0; i < d->nFxState; i++) {
1452       vex_printf(" ");
1453       ppIREffect(d->fxState[i].fx);
1454       vex_printf("-gst(%u,%u", (UInt)d->fxState[i].offset,
1455                                (UInt)d->fxState[i].size);
1456       if (d->fxState[i].nRepeats > 0) {
1457          vex_printf(",reps%u,step%u", (UInt)d->fxState[i].nRepeats,
1458                                       (UInt)d->fxState[i].repeatLen);
1459       }
1460       vex_printf(")");
1461    }
1462    vex_printf(" ::: ");
1463    ppIRCallee(d->cee);
1464    vex_printf("(");
1465    for (i = 0; d->args[i] != NULL; i++) {
1466       IRExpr* arg = d->args[i];
1467       ppIRExpr(arg);
1468
1469       if (d->args[i+1] != NULL) {
1470          vex_printf(",");
1471       }
1472    }
1473    vex_printf(")");
1474 }
1475
1476 void ppIRCAS ( const IRCAS* cas )
1477 {
1478    /* Print even structurally invalid constructions, as an aid to
1479       debugging. */
1480    if (cas->oldHi != IRTemp_INVALID) {
1481       ppIRTemp(cas->oldHi);
1482       vex_printf(",");
1483    }
1484    ppIRTemp(cas->oldLo);
1485    vex_printf(" = CAS%s(", cas->end==Iend_LE ? "le" : "be" );
1486    ppIRExpr(cas->addr);
1487    vex_printf("::");
1488    if (cas->expdHi) {
1489       ppIRExpr(cas->expdHi);
1490       vex_printf(",");
1491    }
1492    ppIRExpr(cas->expdLo);
1493    vex_printf("->");
1494    if (cas->dataHi) {
1495       ppIRExpr(cas->dataHi);
1496       vex_printf(",");
1497    }
1498    ppIRExpr(cas->dataLo);
1499    vex_printf(")");
1500 }
1501
1502 void ppIRPutI ( const IRPutI* puti )
1503 {
1504    vex_printf( "PUTI" );
1505    ppIRRegArray(puti->descr);
1506    vex_printf("[");
1507    ppIRExpr(puti->ix);
1508    vex_printf(",%d] = ", puti->bias);
1509    ppIRExpr(puti->data);
1510 }
1511
1512 void ppIRStoreG ( const IRStoreG* sg )
1513 {
1514    vex_printf("if (");
1515    ppIRExpr(sg->guard);
1516    vex_printf(") { ST%s(", sg->end==Iend_LE ? "le" : "be");
1517    ppIRExpr(sg->addr);
1518    vex_printf(") = ");
1519    ppIRExpr(sg->data);
1520    vex_printf(" }");
1521 }
1522
1523 void ppIRLoadGOp ( IRLoadGOp cvt )
1524 {
1525    switch (cvt) {
1526       case ILGop_INVALID:   vex_printf("ILGop_INVALID"); break;
1527       case ILGop_IdentV128: vex_printf("IdentV128"); break;
1528       case ILGop_Ident64:   vex_printf("Ident64"); break;
1529       case ILGop_Ident32:   vex_printf("Ident32"); break;
1530       case ILGop_16Uto32:   vex_printf("16Uto32"); break;
1531       case ILGop_16Sto32:   vex_printf("16Sto32"); break;
1532       case ILGop_8Uto32:    vex_printf("8Uto32"); break;
1533       case ILGop_8Sto32:    vex_printf("8Sto32"); break;
1534       default: vpanic("ppIRLoadGOp");
1535    }
1536 }
1537
1538 void ppIRLoadG ( const IRLoadG* lg )
1539 {
1540    ppIRTemp(lg->dst);
1541    vex_printf(" = if-strict (");
1542    ppIRExpr(lg->guard);
1543    vex_printf(") ");
1544    ppIRLoadGOp(lg->cvt);
1545    vex_printf("(LD%s(", lg->end==Iend_LE ? "le" : "be");
1546    ppIRExpr(lg->addr);
1547    vex_printf(")) else ");
1548    ppIRExpr(lg->alt);
1549 }
1550
1551 void ppIRJumpKind ( IRJumpKind kind )
1552 {
1553    switch (kind) {
1554       case Ijk_Boring:        vex_printf("Boring"); break;
1555       case Ijk_Call:          vex_printf("Call"); break;
1556       case Ijk_Ret:           vex_printf("Return"); break;
1557       case Ijk_ClientReq:     vex_printf("ClientReq"); break;
1558       case Ijk_Yield:         vex_printf("Yield"); break;
1559       case Ijk_EmWarn:        vex_printf("EmWarn"); break;
1560       case Ijk_EmFail:        vex_printf("EmFail"); break;
1561       case Ijk_NoDecode:      vex_printf("NoDecode"); break;
1562       case Ijk_MapFail:       vex_printf("MapFail"); break;
1563       case Ijk_InvalICache:   vex_printf("InvalICache"); break;
1564       case Ijk_FlushDCache:   vex_printf("FlushDCache"); break;
1565       case Ijk_NoRedir:       vex_printf("NoRedir"); break;
1566       case Ijk_SigILL:        vex_printf("SigILL"); break;
1567       case Ijk_SigTRAP:       vex_printf("SigTRAP"); break;
1568       case Ijk_SigSEGV:       vex_printf("SigSEGV"); break;
1569       case Ijk_SigBUS:        vex_printf("SigBUS"); break;
1570       case Ijk_SigFPE_IntDiv: vex_printf("SigFPE_IntDiv"); break;
1571       case Ijk_SigFPE_IntOvf: vex_printf("SigFPE_IntOvf"); break;
1572       case Ijk_Sys_syscall:   vex_printf("Sys_syscall"); break;
1573       case Ijk_Sys_int32:     vex_printf("Sys_int32"); break;
1574       case Ijk_Sys_int128:    vex_printf("Sys_int128"); break;
1575       case Ijk_Sys_int129:    vex_printf("Sys_int129"); break;
1576       case Ijk_Sys_int130:    vex_printf("Sys_int130"); break;
1577       case Ijk_Sys_int145:    vex_printf("Sys_int145"); break;
1578       case Ijk_Sys_int210:    vex_printf("Sys_int210"); break;
1579       case Ijk_Sys_sysenter:  vex_printf("Sys_sysenter"); break;
1580       default:                vpanic("ppIRJumpKind");
1581    }
1582 }
1583
1584 void ppIRMBusEvent ( IRMBusEvent event )
1585 {
1586    switch (event) {
1587       case Imbe_Fence:
1588          vex_printf("Fence"); break;
1589       case Imbe_CancelReservation:
1590          vex_printf("CancelReservation"); break;
1591       default:
1592          vpanic("ppIRMBusEvent");
1593    }
1594 }
1595
1596 void ppIRStmt ( const IRStmt* s )
1597 {
1598    if (!s) {
1599       vex_printf("!!! IRStmt* which is NULL !!!");
1600       return;
1601    }
1602    switch (s->tag) {
1603       case Ist_NoOp:
1604          vex_printf("IR-NoOp");
1605          break;
1606       case Ist_IMark:
1607          vex_printf( "------ IMark(0x%lx, %u, %u) ------",
1608                      s->Ist.IMark.addr, s->Ist.IMark.len,
1609                      (UInt)s->Ist.IMark.delta);
1610          break;
1611       case Ist_AbiHint:
1612          vex_printf("====== AbiHint(");
1613          ppIRExpr(s->Ist.AbiHint.base);
1614          vex_printf(", %d, ", s->Ist.AbiHint.len);
1615          ppIRExpr(s->Ist.AbiHint.nia);
1616          vex_printf(") ======");
1617          break;
1618       case Ist_Put:
1619          vex_printf( "PUT(%d) = ", s->Ist.Put.offset);
1620          ppIRExpr(s->Ist.Put.data);
1621          break;
1622       case Ist_PutI:
1623          ppIRPutI(s->Ist.PutI.details);
1624          break;
1625       case Ist_WrTmp:
1626          ppIRTemp(s->Ist.WrTmp.tmp);
1627          vex_printf( " = " );
1628          ppIRExpr(s->Ist.WrTmp.data);
1629          break;
1630       case Ist_Store:
1631          vex_printf( "ST%s(", s->Ist.Store.end==Iend_LE ? "le" : "be" );
1632          ppIRExpr(s->Ist.Store.addr);
1633          vex_printf( ") = ");
1634          ppIRExpr(s->Ist.Store.data);
1635          break;
1636       case Ist_StoreG:
1637          ppIRStoreG(s->Ist.StoreG.details);
1638          break;
1639       case Ist_LoadG:
1640          ppIRLoadG(s->Ist.LoadG.details);
1641          break;
1642       case Ist_CAS:
1643          ppIRCAS(s->Ist.CAS.details);
1644          break;
1645       case Ist_LLSC:
1646          if (s->Ist.LLSC.storedata == NULL) {
1647             ppIRTemp(s->Ist.LLSC.result);
1648             vex_printf(" = LD%s-Linked(",
1649                        s->Ist.LLSC.end==Iend_LE ? "le" : "be");
1650             ppIRExpr(s->Ist.LLSC.addr);
1651             vex_printf(")");
1652          } else {
1653             ppIRTemp(s->Ist.LLSC.result);
1654             vex_printf(" = ( ST%s-Cond(",
1655                        s->Ist.LLSC.end==Iend_LE ? "le" : "be");
1656             ppIRExpr(s->Ist.LLSC.addr);
1657             vex_printf(") = ");
1658             ppIRExpr(s->Ist.LLSC.storedata);
1659             vex_printf(" )");
1660          }
1661          break;
1662       case Ist_Dirty:
1663          ppIRDirty(s->Ist.Dirty.details);
1664          break;
1665       case Ist_MBE:
1666          vex_printf("IR-");
1667          ppIRMBusEvent(s->Ist.MBE.event);
1668          break;
1669       case Ist_Exit:
1670          vex_printf( "if (" );
1671          ppIRExpr(s->Ist.Exit.guard);
1672          vex_printf( ") { PUT(%d) = ", s->Ist.Exit.offsIP);
1673          ppIRConst(s->Ist.Exit.dst);
1674          vex_printf("; exit-");
1675          ppIRJumpKind(s->Ist.Exit.jk);
1676          vex_printf(" } ");
1677          break;
1678       default:
1679          vpanic("ppIRStmt");
1680    }
1681 }
1682
1683 void ppIRTypeEnv ( const IRTypeEnv* env )
1684 {
1685    UInt i;
1686    for (i = 0; i < env->types_used; i++) {
1687       if (i % 8 == 0)
1688          vex_printf( "   ");
1689       ppIRTemp(i);
1690       vex_printf( ":");
1691       ppIRType(env->types[i]);
1692       if (i % 8 == 7)
1693          vex_printf( "\n");
1694       else
1695          vex_printf( "   ");
1696    }
1697    if (env->types_used > 0 && env->types_used % 8 != 7)
1698       vex_printf( "\n");
1699 }
1700
1701 void ppIRSB ( const IRSB* bb )
1702 {
1703    Int i;
1704    vex_printf("IRSB {\n");
1705    ppIRTypeEnv(bb->tyenv);
1706    vex_printf("\n");
1707    for (i = 0; i < bb->stmts_used; i++) {
1708       vex_printf( "   ");
1709       ppIRStmt(bb->stmts[i]);
1710       vex_printf( "\n");
1711    }
1712    vex_printf( "   PUT(%d) = ", bb->offsIP );
1713    ppIRExpr( bb->next );
1714    vex_printf( "; exit-");
1715    ppIRJumpKind(bb->jumpkind);
1716    vex_printf( "\n}\n");
1717 }
1718
1719
1720 /*---------------------------------------------------------------*/
1721 /*--- Constructors                                            ---*/
1722 /*---------------------------------------------------------------*/
1723
1724
1725 /* Constructors -- IRConst */
1726
1727 IRConst* IRConst_U1 ( Bool bit )
1728 {
1729    IRConst* c = LibVEX_Alloc_inline(sizeof(IRConst));
1730    c->tag     = Ico_U1;
1731    c->Ico.U1  = bit;
1732    /* call me paranoid; I don't care :-) */
1733    vassert(bit == False || bit == True);
1734    return c;
1735 }
1736 IRConst* IRConst_U8 ( UChar u8 )
1737 {
1738    IRConst* c = LibVEX_Alloc_inline(sizeof(IRConst));
1739    c->tag     = Ico_U8;
1740    c->Ico.U8  = u8;
1741    return c;
1742 }
1743 IRConst* IRConst_U16 ( UShort u16 )
1744 {
1745    IRConst* c = LibVEX_Alloc_inline(sizeof(IRConst));
1746    c->tag     = Ico_U16;
1747    c->Ico.U16 = u16;
1748    return c;
1749 }
1750 IRConst* IRConst_U32 ( UInt u32 )
1751 {
1752    IRConst* c = LibVEX_Alloc_inline(sizeof(IRConst));
1753    c->tag     = Ico_U32;
1754    c->Ico.U32 = u32;
1755    return c;
1756 }
1757 IRConst* IRConst_U64 ( ULong u64 )
1758 {
1759    IRConst* c = LibVEX_Alloc_inline(sizeof(IRConst));
1760    c->tag     = Ico_U64;
1761    c->Ico.U64 = u64;
1762    return c;
1763 }
1764 IRConst* IRConst_F32 ( Float f32 )
1765 {
1766    IRConst* c = LibVEX_Alloc_inline(sizeof(IRConst));
1767    c->tag     = Ico_F32;
1768    c->Ico.F32 = f32;
1769    return c;
1770 }
1771 IRConst* IRConst_F32i ( UInt f32i )
1772 {
1773    IRConst* c  = LibVEX_Alloc_inline(sizeof(IRConst));
1774    c->tag      = Ico_F32i;
1775    c->Ico.F32i = f32i;
1776    return c;
1777 }
1778 IRConst* IRConst_F64 ( Double f64 )
1779 {
1780    IRConst* c = LibVEX_Alloc_inline(sizeof(IRConst));
1781    c->tag     = Ico_F64;
1782    c->Ico.F64 = f64;
1783    return c;
1784 }
1785 IRConst* IRConst_F64i ( ULong f64i )
1786 {
1787    IRConst* c  = LibVEX_Alloc_inline(sizeof(IRConst));
1788    c->tag      = Ico_F64i;
1789    c->Ico.F64i = f64i;
1790    return c;
1791 }
1792 IRConst* IRConst_V128 ( UShort con )
1793 {
1794    IRConst* c  = LibVEX_Alloc_inline(sizeof(IRConst));
1795    c->tag      = Ico_V128;
1796    c->Ico.V128 = con;
1797    return c;
1798 }
1799 IRConst* IRConst_V256 ( UInt con )
1800 {
1801    IRConst* c  = LibVEX_Alloc_inline(sizeof(IRConst));
1802    c->tag      = Ico_V256;
1803    c->Ico.V256 = con;
1804    return c;
1805 }
1806
1807 /* Constructors -- IRCallee */
1808
1809 IRCallee* mkIRCallee ( Int regparms, const HChar* name, void* addr )
1810 {
1811    IRCallee* ce = LibVEX_Alloc_inline(sizeof(IRCallee));
1812    ce->regparms = regparms;
1813    ce->name     = name;
1814    ce->addr     = addr;
1815    ce->mcx_mask = 0;
1816    vassert(regparms >= 0 && regparms <= 3);
1817    vassert(name != NULL);
1818    vassert(addr != 0);
1819    return ce;
1820 }
1821
1822
1823 /* Constructors -- IRRegArray */
1824
1825 IRRegArray* mkIRRegArray ( Int base, IRType elemTy, Int nElems )
1826 {
1827    IRRegArray* arr = LibVEX_Alloc_inline(sizeof(IRRegArray));
1828    arr->base       = base;
1829    arr->elemTy     = elemTy;
1830    arr->nElems     = nElems;
1831    vassert(!(arr->base < 0 || arr->base > 10000 /* somewhat arbitrary */));
1832    vassert(!(arr->elemTy == Ity_I1));
1833    vassert(!(arr->nElems <= 0 || arr->nElems > 500 /* somewhat arbitrary */));
1834    return arr;
1835 }
1836
1837
1838 /* Constructors -- IRExpr */
1839
1840 IRExpr* IRExpr_Binder ( Int binder ) {
1841    IRExpr* e            = LibVEX_Alloc_inline(sizeof(IRExpr));
1842    e->tag               = Iex_Binder;
1843    e->Iex.Binder.binder = binder;
1844    return e;
1845 }
1846 IRExpr* IRExpr_Get ( Int off, IRType ty ) {
1847    IRExpr* e         = LibVEX_Alloc_inline(sizeof(IRExpr));
1848    e->tag            = Iex_Get;
1849    e->Iex.Get.offset = off;
1850    e->Iex.Get.ty     = ty;
1851    return e;
1852 }
1853 IRExpr* IRExpr_GetI ( IRRegArray* descr, IRExpr* ix, Int bias ) {
1854    IRExpr* e         = LibVEX_Alloc_inline(sizeof(IRExpr));
1855    e->tag            = Iex_GetI;
1856    e->Iex.GetI.descr = descr;
1857    e->Iex.GetI.ix    = ix;
1858    e->Iex.GetI.bias  = bias;
1859    return e;
1860 }
1861 IRExpr* IRExpr_RdTmp ( IRTemp tmp ) {
1862    IRExpr* e        = LibVEX_Alloc_inline(sizeof(IRExpr));
1863    e->tag           = Iex_RdTmp;
1864    e->Iex.RdTmp.tmp = tmp;
1865    return e;
1866 }
1867 IRExpr* IRExpr_Qop ( IROp op, IRExpr* arg1, IRExpr* arg2,
1868                               IRExpr* arg3, IRExpr* arg4 ) {
1869    IRExpr* e       = LibVEX_Alloc_inline(sizeof(IRExpr));
1870    IRQop*  qop     = LibVEX_Alloc_inline(sizeof(IRQop));
1871    qop->op         = op;
1872    qop->arg1       = arg1;
1873    qop->arg2       = arg2;
1874    qop->arg3       = arg3;
1875    qop->arg4       = arg4;
1876    e->tag          = Iex_Qop;
1877    e->Iex.Qop.details = qop;
1878    return e;
1879 }
1880 IRExpr* IRExpr_Triop  ( IROp op, IRExpr* arg1,
1881                                  IRExpr* arg2, IRExpr* arg3 ) {
1882    IRExpr*  e         = LibVEX_Alloc_inline(sizeof(IRExpr));
1883    IRTriop* triop     = LibVEX_Alloc_inline(sizeof(IRTriop));
1884    triop->op         = op;
1885    triop->arg1       = arg1;
1886    triop->arg2       = arg2;
1887    triop->arg3       = arg3;
1888    e->tag            = Iex_Triop;
1889    e->Iex.Triop.details = triop;
1890    return e;
1891 }
1892 IRExpr* IRExpr_Binop ( IROp op, IRExpr* arg1, IRExpr* arg2 ) {
1893    IRExpr* e         = LibVEX_Alloc_inline(sizeof(IRExpr));
1894    e->tag            = Iex_Binop;
1895    e->Iex.Binop.op   = op;
1896    e->Iex.Binop.arg1 = arg1;
1897    e->Iex.Binop.arg2 = arg2;
1898    return e;
1899 }
1900 IRExpr* IRExpr_Unop ( IROp op, IRExpr* arg ) {
1901    IRExpr* e       = LibVEX_Alloc_inline(sizeof(IRExpr));
1902    e->tag          = Iex_Unop;
1903    e->Iex.Unop.op  = op;
1904    e->Iex.Unop.arg = arg;
1905    return e;
1906 }
1907 IRExpr* IRExpr_Load ( IREndness end, IRType ty, IRExpr* addr ) {
1908    IRExpr* e        = LibVEX_Alloc_inline(sizeof(IRExpr));
1909    e->tag           = Iex_Load;
1910    e->Iex.Load.end  = end;
1911    e->Iex.Load.ty   = ty;
1912    e->Iex.Load.addr = addr;
1913    vassert(end == Iend_LE || end == Iend_BE);
1914    return e;
1915 }
1916 IRExpr* IRExpr_Const ( IRConst* con ) {
1917    IRExpr* e        = LibVEX_Alloc_inline(sizeof(IRExpr));
1918    e->tag           = Iex_Const;
1919    e->Iex.Const.con = con;
1920    return e;
1921 }
1922 IRExpr* IRExpr_CCall ( IRCallee* cee, IRType retty, IRExpr** args ) {
1923    IRExpr* e          = LibVEX_Alloc_inline(sizeof(IRExpr));
1924    e->tag             = Iex_CCall;
1925    e->Iex.CCall.cee   = cee;
1926    e->Iex.CCall.retty = retty;
1927    e->Iex.CCall.args  = args;
1928    return e;
1929 }
1930 IRExpr* IRExpr_ITE ( IRExpr* cond, IRExpr* iftrue, IRExpr* iffalse ) {
1931    IRExpr* e          = LibVEX_Alloc_inline(sizeof(IRExpr));
1932    e->tag             = Iex_ITE;
1933    e->Iex.ITE.cond    = cond;
1934    e->Iex.ITE.iftrue  = iftrue;
1935    e->Iex.ITE.iffalse = iffalse;
1936    return e;
1937 }
1938 IRExpr* IRExpr_VECRET ( void ) {
1939    IRExpr* e = LibVEX_Alloc_inline(sizeof(IRExpr));
1940    e->tag    = Iex_VECRET;
1941    return e;
1942 }
1943 IRExpr* IRExpr_GSPTR ( void ) {
1944    IRExpr* e = LibVEX_Alloc_inline(sizeof(IRExpr));
1945    e->tag    = Iex_GSPTR;
1946    return e;
1947 }
1948
1949
1950 /* Constructors for NULL-terminated IRExpr expression vectors,
1951    suitable for use as arg lists in clean/dirty helper calls. */
1952
1953 IRExpr** mkIRExprVec_0 ( void ) {
1954    IRExpr** vec = LibVEX_Alloc_inline(1 * sizeof(IRExpr*));
1955    vec[0] = NULL;
1956    return vec;
1957 }
1958 IRExpr** mkIRExprVec_1 ( IRExpr* arg1 ) {
1959    IRExpr** vec = LibVEX_Alloc_inline(2 * sizeof(IRExpr*));
1960    vec[0] = arg1;
1961    vec[1] = NULL;
1962    return vec;
1963 }
1964 IRExpr** mkIRExprVec_2 ( IRExpr* arg1, IRExpr* arg2 ) {
1965    IRExpr** vec = LibVEX_Alloc_inline(3 * sizeof(IRExpr*));
1966    vec[0] = arg1;
1967    vec[1] = arg2;
1968    vec[2] = NULL;
1969    return vec;
1970 }
1971 IRExpr** mkIRExprVec_3 ( IRExpr* arg1, IRExpr* arg2, IRExpr* arg3 ) {
1972    IRExpr** vec = LibVEX_Alloc_inline(4 * sizeof(IRExpr*));
1973    vec[0] = arg1;
1974    vec[1] = arg2;
1975    vec[2] = arg3;
1976    vec[3] = NULL;
1977    return vec;
1978 }
1979 IRExpr** mkIRExprVec_4 ( IRExpr* arg1, IRExpr* arg2, IRExpr* arg3,
1980                          IRExpr* arg4 ) {
1981    IRExpr** vec = LibVEX_Alloc_inline(5 * sizeof(IRExpr*));
1982    vec[0] = arg1;
1983    vec[1] = arg2;
1984    vec[2] = arg3;
1985    vec[3] = arg4;
1986    vec[4] = NULL;
1987    return vec;
1988 }
1989 IRExpr** mkIRExprVec_5 ( IRExpr* arg1, IRExpr* arg2, IRExpr* arg3,
1990                          IRExpr* arg4, IRExpr* arg5 ) {
1991    IRExpr** vec = LibVEX_Alloc_inline(6 * sizeof(IRExpr*));
1992    vec[0] = arg1;
1993    vec[1] = arg2;
1994    vec[2] = arg3;
1995    vec[3] = arg4;
1996    vec[4] = arg5;
1997    vec[5] = NULL;
1998    return vec;
1999 }
2000 IRExpr** mkIRExprVec_6 ( IRExpr* arg1, IRExpr* arg2, IRExpr* arg3,
2001                          IRExpr* arg4, IRExpr* arg5, IRExpr* arg6 ) {
2002    IRExpr** vec = LibVEX_Alloc_inline(7 * sizeof(IRExpr*));
2003    vec[0] = arg1;
2004    vec[1] = arg2;
2005    vec[2] = arg3;
2006    vec[3] = arg4;
2007    vec[4] = arg5;
2008    vec[5] = arg6;
2009    vec[6] = NULL;
2010    return vec;
2011 }
2012 IRExpr** mkIRExprVec_7 ( IRExpr* arg1, IRExpr* arg2, IRExpr* arg3,
2013                          IRExpr* arg4, IRExpr* arg5, IRExpr* arg6,
2014                          IRExpr* arg7 ) {
2015    IRExpr** vec = LibVEX_Alloc_inline(8 * sizeof(IRExpr*));
2016    vec[0] = arg1;
2017    vec[1] = arg2;
2018    vec[2] = arg3;
2019    vec[3] = arg4;
2020    vec[4] = arg5;
2021    vec[5] = arg6;
2022    vec[6] = arg7;
2023    vec[7] = NULL;
2024    return vec;
2025 }
2026 IRExpr** mkIRExprVec_8 ( IRExpr* arg1, IRExpr* arg2, IRExpr* arg3,
2027                          IRExpr* arg4, IRExpr* arg5, IRExpr* arg6,
2028                          IRExpr* arg7, IRExpr* arg8 ) {
2029    IRExpr** vec = LibVEX_Alloc_inline(9 * sizeof(IRExpr*));
2030    vec[0] = arg1;
2031    vec[1] = arg2;
2032    vec[2] = arg3;
2033    vec[3] = arg4;
2034    vec[4] = arg5;
2035    vec[5] = arg6;
2036    vec[6] = arg7;
2037    vec[7] = arg8;
2038    vec[8] = NULL;
2039    return vec;
2040 }
2041 IRExpr** mkIRExprVec_9 ( IRExpr* arg1, IRExpr* arg2, IRExpr* arg3,
2042                          IRExpr* arg4, IRExpr* arg5, IRExpr* arg6,
2043                          IRExpr* arg7, IRExpr* arg8, IRExpr* arg9 ) {
2044    IRExpr** vec = LibVEX_Alloc_inline(10 * sizeof(IRExpr*));
2045    vec[0] = arg1;
2046    vec[1] = arg2;
2047    vec[2] = arg3;
2048    vec[3] = arg4;
2049    vec[4] = arg5;
2050    vec[5] = arg6;
2051    vec[6] = arg7;
2052    vec[7] = arg8;
2053    vec[8] = arg9;
2054    vec[9] = NULL;
2055    return vec;
2056 }
2057 IRExpr** mkIRExprVec_13 ( IRExpr* arg1,  IRExpr* arg2,  IRExpr* arg3,
2058                           IRExpr* arg4,  IRExpr* arg5,  IRExpr* arg6,
2059                           IRExpr* arg7,  IRExpr* arg8,  IRExpr* arg9,
2060                           IRExpr* arg10, IRExpr* arg11, IRExpr* arg12,
2061                           IRExpr* arg13
2062  ) {
2063    IRExpr** vec = LibVEX_Alloc_inline(14 * sizeof(IRExpr*));
2064    vec[0]  = arg1;
2065    vec[1]  = arg2;
2066    vec[2]  = arg3;
2067    vec[3]  = arg4;
2068    vec[4]  = arg5;
2069    vec[5]  = arg6;
2070    vec[6]  = arg7;
2071    vec[7]  = arg8;
2072    vec[8]  = arg9;
2073    vec[9]  = arg10;
2074    vec[10] = arg11;
2075    vec[11] = arg12;
2076    vec[12] = arg13;
2077    vec[13] = NULL;
2078    return vec;
2079 }
2080
2081
2082 /* Constructors -- IRDirty */
2083
2084 IRDirty* emptyIRDirty ( void ) {
2085    IRDirty* d = LibVEX_Alloc_inline(sizeof(IRDirty));
2086    d->cee      = NULL;
2087    d->guard    = NULL;
2088    d->args     = NULL;
2089    d->tmp      = IRTemp_INVALID;
2090    d->mFx      = Ifx_None;
2091    d->mAddr    = NULL;
2092    d->mSize    = 0;
2093    d->nFxState = 0;
2094    return d;
2095 }
2096
2097
2098 /* Constructors -- IRCAS */
2099
2100 IRCAS* mkIRCAS ( IRTemp oldHi, IRTemp oldLo,
2101                  IREndness end, IRExpr* addr,
2102                  IRExpr* expdHi, IRExpr* expdLo,
2103                  IRExpr* dataHi, IRExpr* dataLo ) {
2104    IRCAS* cas = LibVEX_Alloc_inline(sizeof(IRCAS));
2105    cas->oldHi  = oldHi;
2106    cas->oldLo  = oldLo;
2107    cas->end    = end;
2108    cas->addr   = addr;
2109    cas->expdHi = expdHi;
2110    cas->expdLo = expdLo;
2111    cas->dataHi = dataHi;
2112    cas->dataLo = dataLo;
2113    return cas;
2114 }
2115
2116
2117 /* Constructors -- IRPutI */
2118
2119 IRPutI* mkIRPutI ( IRRegArray* descr, IRExpr* ix,
2120                    Int bias, IRExpr* data )
2121 {
2122    IRPutI* puti = LibVEX_Alloc_inline(sizeof(IRPutI));
2123    puti->descr  = descr;
2124    puti->ix     = ix;
2125    puti->bias   = bias;
2126    puti->data   = data;
2127    return puti;
2128 }
2129
2130
2131 /* Constructors -- IRStoreG and IRLoadG */
2132
2133 IRStoreG* mkIRStoreG ( IREndness end,
2134                        IRExpr* addr, IRExpr* data, IRExpr* guard )
2135 {
2136    IRStoreG* sg = LibVEX_Alloc_inline(sizeof(IRStoreG));
2137    sg->end      = end;
2138    sg->addr     = addr;
2139    sg->data     = data;
2140    sg->guard    = guard;
2141    return sg;
2142 }
2143
2144 IRLoadG* mkIRLoadG ( IREndness end, IRLoadGOp cvt,
2145                      IRTemp dst, IRExpr* addr, IRExpr* alt, IRExpr* guard )
2146 {
2147    IRLoadG* lg = LibVEX_Alloc_inline(sizeof(IRLoadG));
2148    lg->end     = end;
2149    lg->cvt     = cvt;
2150    lg->dst     = dst;
2151    lg->addr    = addr;
2152    lg->alt     = alt;
2153    lg->guard   = guard;
2154    return lg;
2155 }
2156
2157
2158 /* Constructors -- IRStmt */
2159
2160 IRStmt* IRStmt_NoOp ( void )
2161 {
2162    /* Just use a single static closure. */
2163    static IRStmt static_closure;
2164    static_closure.tag = Ist_NoOp;
2165    return &static_closure;
2166 }
2167 IRStmt* IRStmt_IMark ( Addr addr, UInt len, UChar delta ) {
2168    IRStmt* s          = LibVEX_Alloc_inline(sizeof(IRStmt));
2169    s->tag             = Ist_IMark;
2170    s->Ist.IMark.addr  = addr;
2171    s->Ist.IMark.len   = len;
2172    s->Ist.IMark.delta = delta;
2173    return s;
2174 }
2175 IRStmt* IRStmt_AbiHint ( IRExpr* base, Int len, IRExpr* nia ) {
2176    IRStmt* s           = LibVEX_Alloc_inline(sizeof(IRStmt));
2177    s->tag              = Ist_AbiHint;
2178    s->Ist.AbiHint.base = base;
2179    s->Ist.AbiHint.len  = len;
2180    s->Ist.AbiHint.nia  = nia;
2181    return s;
2182 }
2183 IRStmt* IRStmt_Put ( Int off, IRExpr* data ) {
2184    IRStmt* s         = LibVEX_Alloc_inline(sizeof(IRStmt));
2185    s->tag            = Ist_Put;
2186    s->Ist.Put.offset = off;
2187    s->Ist.Put.data   = data;
2188    return s;
2189 }
2190 IRStmt* IRStmt_PutI ( IRPutI* details ) {
2191    IRStmt* s          = LibVEX_Alloc_inline(sizeof(IRStmt));
2192    s->tag             = Ist_PutI;
2193    s->Ist.PutI.details = details;
2194    return s;
2195 }
2196 IRStmt* IRStmt_WrTmp ( IRTemp tmp, IRExpr* data ) {
2197    IRStmt* s         = LibVEX_Alloc_inline(sizeof(IRStmt));
2198    s->tag            = Ist_WrTmp;
2199    s->Ist.WrTmp.tmp  = tmp;
2200    s->Ist.WrTmp.data = data;
2201    return s;
2202 }
2203 IRStmt* IRStmt_Store ( IREndness end, IRExpr* addr, IRExpr* data ) {
2204    IRStmt* s         = LibVEX_Alloc_inline(sizeof(IRStmt));
2205    s->tag            = Ist_Store;
2206    s->Ist.Store.end  = end;
2207    s->Ist.Store.addr = addr;
2208    s->Ist.Store.data = data;
2209    vassert(end == Iend_LE || end == Iend_BE);
2210    return s;
2211 }
2212 IRStmt* IRStmt_StoreG ( IREndness end, IRExpr* addr, IRExpr* data,
2213                         IRExpr* guard ) {
2214    IRStmt* s             = LibVEX_Alloc_inline(sizeof(IRStmt));
2215    s->tag                = Ist_StoreG;
2216    s->Ist.StoreG.details = mkIRStoreG(end, addr, data, guard);
2217    vassert(end == Iend_LE || end == Iend_BE);
2218    return s;
2219 }
2220 IRStmt* IRStmt_LoadG ( IREndness end, IRLoadGOp cvt, IRTemp dst,
2221                        IRExpr* addr, IRExpr* alt, IRExpr* guard ) {
2222    IRStmt* s            = LibVEX_Alloc_inline(sizeof(IRStmt));
2223    s->tag               = Ist_LoadG;
2224    s->Ist.LoadG.details = mkIRLoadG(end, cvt, dst, addr, alt, guard);
2225    return s;
2226 }
2227 IRStmt* IRStmt_CAS ( IRCAS* cas ) {
2228    IRStmt* s          = LibVEX_Alloc_inline(sizeof(IRStmt));
2229    s->tag             = Ist_CAS;
2230    s->Ist.CAS.details = cas;
2231    return s;
2232 }
2233 IRStmt* IRStmt_LLSC ( IREndness end,
2234                       IRTemp result, IRExpr* addr, IRExpr* storedata ) {
2235    IRStmt* s = LibVEX_Alloc_inline(sizeof(IRStmt));
2236    s->tag                = Ist_LLSC;
2237    s->Ist.LLSC.end       = end;
2238    s->Ist.LLSC.result    = result;
2239    s->Ist.LLSC.addr      = addr;
2240    s->Ist.LLSC.storedata = storedata;
2241    return s;
2242 }
2243 IRStmt* IRStmt_Dirty ( IRDirty* d )
2244 {
2245    IRStmt* s            = LibVEX_Alloc_inline(sizeof(IRStmt));
2246    s->tag               = Ist_Dirty;
2247    s->Ist.Dirty.details = d;
2248    return s;
2249 }
2250 IRStmt* IRStmt_MBE ( IRMBusEvent event )
2251 {
2252    IRStmt* s        = LibVEX_Alloc_inline(sizeof(IRStmt));
2253    s->tag           = Ist_MBE;
2254    s->Ist.MBE.event = event;
2255    return s;
2256 }
2257 IRStmt* IRStmt_Exit ( IRExpr* guard, IRJumpKind jk, IRConst* dst,
2258                       Int offsIP ) {
2259    IRStmt* s          = LibVEX_Alloc_inline(sizeof(IRStmt));
2260    s->tag             = Ist_Exit;
2261    s->Ist.Exit.guard  = guard;
2262    s->Ist.Exit.jk     = jk;
2263    s->Ist.Exit.dst    = dst;
2264    s->Ist.Exit.offsIP = offsIP;
2265    return s;
2266 }
2267
2268
2269 /* Constructors -- IRTypeEnv */
2270
2271 IRTypeEnv* emptyIRTypeEnv ( void )
2272 {
2273    IRTypeEnv* env   = LibVEX_Alloc_inline(sizeof(IRTypeEnv));
2274    env->types       = LibVEX_Alloc_inline(8 * sizeof(IRType));
2275    env->types_size  = 8;
2276    env->types_used  = 0;
2277    return env;
2278 }
2279
2280
2281 /* Constructors -- IRSB */
2282
2283 IRSB* emptyIRSB ( void )
2284 {
2285    IRSB* bb       = LibVEX_Alloc_inline(sizeof(IRSB));
2286    bb->tyenv      = emptyIRTypeEnv();
2287    bb->stmts_used = 0;
2288    bb->stmts_size = 8;
2289    bb->stmts      = LibVEX_Alloc_inline(bb->stmts_size * sizeof(IRStmt*));
2290    bb->next       = NULL;
2291    bb->jumpkind   = Ijk_Boring;
2292    bb->offsIP     = 0;
2293    return bb;
2294 }
2295
2296
2297 /*---------------------------------------------------------------*/
2298 /*--- (Deep) copy constructors.  These make complete copies   ---*/
2299 /*--- the original, which can be modified without affecting   ---*/
2300 /*--- the original.                                           ---*/
2301 /*---------------------------------------------------------------*/
2302
2303 /* Copying IR Expr vectors (for call args). */
2304
2305 /* Shallow copy of an IRExpr vector */
2306
2307 IRExpr** shallowCopyIRExprVec ( IRExpr** vec )
2308 {
2309    Int      i;
2310    IRExpr** newvec;
2311    for (i = 0; vec[i]; i++)
2312       ;
2313    newvec = LibVEX_Alloc_inline((i+1)*sizeof(IRExpr*));
2314    for (i = 0; vec[i]; i++)
2315       newvec[i] = vec[i];
2316    newvec[i] = NULL;
2317    return newvec;
2318 }
2319
2320 /* Deep copy of an IRExpr vector */
2321
2322 IRExpr** deepCopyIRExprVec ( IRExpr *const * vec )
2323 {
2324    Int      i;
2325    IRExpr** newvec;
2326    for (i = 0; vec[i]; i++)
2327       ;
2328    newvec = LibVEX_Alloc_inline((i+1)*sizeof(IRExpr*));
2329    for (i = 0; vec[i]; i++)
2330       newvec[i] = deepCopyIRExpr(vec[i]);
2331    newvec[i] = NULL;
2332    return newvec;
2333 }
2334
2335 /* Deep copy constructors for all heap-allocated IR types follow. */
2336
2337 IRConst* deepCopyIRConst ( const IRConst* c )
2338 {
2339    switch (c->tag) {
2340       case Ico_U1:   return IRConst_U1(c->Ico.U1);
2341       case Ico_U8:   return IRConst_U8(c->Ico.U8);
2342       case Ico_U16:  return IRConst_U16(c->Ico.U16);
2343       case Ico_U32:  return IRConst_U32(c->Ico.U32);
2344       case Ico_U64:  return IRConst_U64(c->Ico.U64);
2345       case Ico_F32:  return IRConst_F32(c->Ico.F32);
2346       case Ico_F32i: return IRConst_F32i(c->Ico.F32i);
2347       case Ico_F64:  return IRConst_F64(c->Ico.F64);
2348       case Ico_F64i: return IRConst_F64i(c->Ico.F64i);
2349       case Ico_V128: return IRConst_V128(c->Ico.V128);
2350       case Ico_V256: return IRConst_V256(c->Ico.V256);
2351       default: vpanic("deepCopyIRConst");
2352    }
2353 }
2354
2355 IRCallee* deepCopyIRCallee ( const IRCallee* ce )
2356 {
2357    IRCallee* ce2 = mkIRCallee(ce->regparms, ce->name, ce->addr);
2358    ce2->mcx_mask = ce->mcx_mask;
2359    return ce2;
2360 }
2361
2362 IRRegArray* deepCopyIRRegArray ( const IRRegArray* d )
2363 {
2364    return mkIRRegArray(d->base, d->elemTy, d->nElems);
2365 }
2366
2367 IRExpr* deepCopyIRExpr ( const IRExpr* e )
2368 {
2369    switch (e->tag) {
2370       case Iex_Get:
2371          return IRExpr_Get(e->Iex.Get.offset, e->Iex.Get.ty);
2372       case Iex_GetI:
2373          return IRExpr_GetI(deepCopyIRRegArray(e->Iex.GetI.descr),
2374                             deepCopyIRExpr(e->Iex.GetI.ix),
2375                             e->Iex.GetI.bias);
2376       case Iex_RdTmp:
2377          return IRExpr_RdTmp(e->Iex.RdTmp.tmp);
2378       case Iex_Qop: {
2379          const IRQop* qop = e->Iex.Qop.details;
2380
2381          return IRExpr_Qop(qop->op,
2382                            deepCopyIRExpr(qop->arg1),
2383                            deepCopyIRExpr(qop->arg2),
2384                            deepCopyIRExpr(qop->arg3),
2385                            deepCopyIRExpr(qop->arg4));
2386       }
2387       case Iex_Triop:  {
2388          const IRTriop *triop = e->Iex.Triop.details;
2389
2390          return IRExpr_Triop(triop->op,
2391                              deepCopyIRExpr(triop->arg1),
2392                              deepCopyIRExpr(triop->arg2),
2393                              deepCopyIRExpr(triop->arg3));
2394       }
2395       case Iex_Binop:
2396          return IRExpr_Binop(e->Iex.Binop.op,
2397                              deepCopyIRExpr(e->Iex.Binop.arg1),
2398                              deepCopyIRExpr(e->Iex.Binop.arg2));
2399       case Iex_Unop:
2400          return IRExpr_Unop(e->Iex.Unop.op,
2401                             deepCopyIRExpr(e->Iex.Unop.arg));
2402       case Iex_Load:
2403          return IRExpr_Load(e->Iex.Load.end,
2404                             e->Iex.Load.ty,
2405                             deepCopyIRExpr(e->Iex.Load.addr));
2406       case Iex_Const:
2407          return IRExpr_Const(deepCopyIRConst(e->Iex.Const.con));
2408       case Iex_CCall:
2409          return IRExpr_CCall(deepCopyIRCallee(e->Iex.CCall.cee),
2410                              e->Iex.CCall.retty,
2411                              deepCopyIRExprVec(e->Iex.CCall.args));
2412
2413       case Iex_ITE:
2414          return IRExpr_ITE(deepCopyIRExpr(e->Iex.ITE.cond),
2415                            deepCopyIRExpr(e->Iex.ITE.iftrue),
2416                            deepCopyIRExpr(e->Iex.ITE.iffalse));
2417       case Iex_VECRET:
2418          return IRExpr_VECRET();
2419
2420       case Iex_GSPTR:
2421          return IRExpr_GSPTR();
2422
2423       case Iex_Binder:
2424          return IRExpr_Binder(e->Iex.Binder.binder);
2425
2426       default:
2427          vpanic("deepCopyIRExpr");
2428    }
2429 }
2430
2431 IRDirty* deepCopyIRDirty ( const IRDirty* d )
2432 {
2433    Int      i;
2434    IRDirty* d2 = emptyIRDirty();
2435    d2->cee   = deepCopyIRCallee(d->cee);
2436    d2->guard = deepCopyIRExpr(d->guard);
2437    d2->args  = deepCopyIRExprVec(d->args);
2438    d2->tmp   = d->tmp;
2439    d2->mFx   = d->mFx;
2440    d2->mAddr = d->mAddr==NULL ? NULL : deepCopyIRExpr(d->mAddr);
2441    d2->mSize = d->mSize;
2442    d2->nFxState = d->nFxState;
2443    for (i = 0; i < d2->nFxState; i++)
2444       d2->fxState[i] = d->fxState[i];
2445    return d2;
2446 }
2447
2448 IRCAS* deepCopyIRCAS ( const IRCAS* cas )
2449 {
2450    return mkIRCAS( cas->oldHi, cas->oldLo, cas->end,
2451                    deepCopyIRExpr(cas->addr),
2452                    cas->expdHi==NULL ? NULL : deepCopyIRExpr(cas->expdHi),
2453                    deepCopyIRExpr(cas->expdLo),
2454                    cas->dataHi==NULL ? NULL : deepCopyIRExpr(cas->dataHi),
2455                    deepCopyIRExpr(cas->dataLo) );
2456 }
2457
2458 IRPutI* deepCopyIRPutI ( const IRPutI * puti )
2459 {
2460   return mkIRPutI( deepCopyIRRegArray(puti->descr),
2461                    deepCopyIRExpr(puti->ix),
2462                    puti->bias,
2463                    deepCopyIRExpr(puti->data));
2464 }
2465
2466 IRStmt* deepCopyIRStmt ( const IRStmt* s )
2467 {
2468    switch (s->tag) {
2469       case Ist_NoOp:
2470          return IRStmt_NoOp();
2471       case Ist_AbiHint:
2472          return IRStmt_AbiHint(deepCopyIRExpr(s->Ist.AbiHint.base),
2473                                s->Ist.AbiHint.len,
2474                                deepCopyIRExpr(s->Ist.AbiHint.nia));
2475       case Ist_IMark:
2476          return IRStmt_IMark(s->Ist.IMark.addr,
2477                              s->Ist.IMark.len,
2478                              s->Ist.IMark.delta);
2479       case Ist_Put:
2480          return IRStmt_Put(s->Ist.Put.offset,
2481                            deepCopyIRExpr(s->Ist.Put.data));
2482       case Ist_PutI:
2483          return IRStmt_PutI(deepCopyIRPutI(s->Ist.PutI.details));
2484       case Ist_WrTmp:
2485          return IRStmt_WrTmp(s->Ist.WrTmp.tmp,
2486                              deepCopyIRExpr(s->Ist.WrTmp.data));
2487       case Ist_Store:
2488          return IRStmt_Store(s->Ist.Store.end,
2489                              deepCopyIRExpr(s->Ist.Store.addr),
2490                              deepCopyIRExpr(s->Ist.Store.data));
2491       case Ist_StoreG: {
2492          const IRStoreG* sg = s->Ist.StoreG.details;
2493          return IRStmt_StoreG(sg->end,
2494                               deepCopyIRExpr(sg->addr),
2495                               deepCopyIRExpr(sg->data),
2496                               deepCopyIRExpr(sg->guard));
2497       }
2498       case Ist_LoadG: {
2499          const IRLoadG* lg = s->Ist.LoadG.details;
2500          return IRStmt_LoadG(lg->end, lg->cvt, lg->dst,
2501                              deepCopyIRExpr(lg->addr),
2502                              deepCopyIRExpr(lg->alt),
2503                              deepCopyIRExpr(lg->guard));
2504       }
2505       case Ist_CAS:
2506          return IRStmt_CAS(deepCopyIRCAS(s->Ist.CAS.details));
2507       case Ist_LLSC:
2508          return IRStmt_LLSC(s->Ist.LLSC.end,
2509                             s->Ist.LLSC.result,
2510                             deepCopyIRExpr(s->Ist.LLSC.addr),
2511                             s->Ist.LLSC.storedata
2512                                ? deepCopyIRExpr(s->Ist.LLSC.storedata)
2513                                : NULL);
2514       case Ist_Dirty:
2515          return IRStmt_Dirty(deepCopyIRDirty(s->Ist.Dirty.details));
2516       case Ist_MBE:
2517          return IRStmt_MBE(s->Ist.MBE.event);
2518       case Ist_Exit:
2519          return IRStmt_Exit(deepCopyIRExpr(s->Ist.Exit.guard),
2520                             s->Ist.Exit.jk,
2521                             deepCopyIRConst(s->Ist.Exit.dst),
2522                             s->Ist.Exit.offsIP);
2523       default:
2524          vpanic("deepCopyIRStmt");
2525    }
2526 }
2527
2528 IRTypeEnv* deepCopyIRTypeEnv ( const IRTypeEnv* src )
2529 {
2530    Int        i;
2531    IRTypeEnv* dst = LibVEX_Alloc_inline(sizeof(IRTypeEnv));
2532    dst->types_size = src->types_size;
2533    dst->types_used = src->types_used;
2534    dst->types = LibVEX_Alloc_inline(dst->types_size * sizeof(IRType));
2535    for (i = 0; i < src->types_used; i++)
2536       dst->types[i] = src->types[i];
2537    return dst;
2538 }
2539
2540 IRSB* deepCopyIRSB ( const IRSB* bb )
2541 {
2542    Int      i;
2543    IRStmt** sts2;
2544    IRSB* bb2 = deepCopyIRSBExceptStmts(bb);
2545    bb2->stmts_used = bb2->stmts_size = bb->stmts_used;
2546    sts2 = LibVEX_Alloc_inline(bb2->stmts_used * sizeof(IRStmt*));
2547    for (i = 0; i < bb2->stmts_used; i++)
2548       sts2[i] = deepCopyIRStmt(bb->stmts[i]);
2549    bb2->stmts = sts2;
2550    return bb2;
2551 }
2552
2553 IRSB* deepCopyIRSBExceptStmts ( const IRSB* bb )
2554 {
2555    IRSB* bb2     = emptyIRSB();
2556    bb2->tyenv    = deepCopyIRTypeEnv(bb->tyenv);
2557    bb2->next     = deepCopyIRExpr(bb->next);
2558    bb2->jumpkind = bb->jumpkind;
2559    bb2->offsIP   = bb->offsIP;
2560    return bb2;
2561 }
2562
2563
2564 /*---------------------------------------------------------------*/
2565 /*--- Primop types                                            ---*/
2566 /*---------------------------------------------------------------*/
2567
2568 void typeOfPrimop ( IROp op,
2569                     /*OUTs*/
2570                     IRType* t_dst,
2571                     IRType* t_arg1, IRType* t_arg2,
2572                     IRType* t_arg3, IRType* t_arg4 )
2573 {
2574 #  define UNARY(_ta1,_td)                                      \
2575       *t_dst = (_td); *t_arg1 = (_ta1); break
2576 #  define BINARY(_ta1,_ta2,_td)                                \
2577      *t_dst = (_td); *t_arg1 = (_ta1); *t_arg2 = (_ta2); break
2578 #  define TERNARY(_ta1,_ta2,_ta3,_td)                          \
2579      *t_dst = (_td); *t_arg1 = (_ta1);                         \
2580      *t_arg2 = (_ta2); *t_arg3 = (_ta3); break
2581 #  define QUATERNARY(_ta1,_ta2,_ta3,_ta4,_td)                  \
2582      *t_dst = (_td); *t_arg1 = (_ta1);                         \
2583      *t_arg2 = (_ta2); *t_arg3 = (_ta3);                       \
2584      *t_arg4 = (_ta4); break
2585 #  define COMPARISON(_ta)                                      \
2586      *t_dst = Ity_I1; *t_arg1 = *t_arg2 = (_ta); break;
2587 #  define UNARY_COMPARISON(_ta)                                \
2588      *t_dst = Ity_I1; *t_arg1 = (_ta); break;
2589
2590    /* Rounding mode values are always Ity_I32, encoded as per
2591       IRRoundingMode */
2592    const IRType ity_RMode = Ity_I32;
2593
2594    *t_dst  = Ity_INVALID;
2595    *t_arg1 = Ity_INVALID;
2596    *t_arg2 = Ity_INVALID;
2597    *t_arg3 = Ity_INVALID;
2598    *t_arg4 = Ity_INVALID;
2599    switch (op) {
2600       case Iop_Add8: case Iop_Sub8: case Iop_Mul8:
2601       case Iop_Or8:  case Iop_And8: case Iop_Xor8:
2602          BINARY(Ity_I8,Ity_I8, Ity_I8);
2603
2604       case Iop_Add16: case Iop_Sub16: case Iop_Mul16:
2605       case Iop_Or16:  case Iop_And16: case Iop_Xor16:
2606          BINARY(Ity_I16,Ity_I16, Ity_I16);
2607
2608       case Iop_CmpORD32U:
2609       case Iop_CmpORD32S:
2610       case Iop_Add32: case Iop_Sub32: case Iop_Mul32:
2611       case Iop_Or32:  case Iop_And32: case Iop_Xor32:
2612       case Iop_Max32U:
2613       case Iop_QAdd32S: case Iop_QSub32S:
2614       case Iop_Add16x2: case Iop_Sub16x2:
2615       case Iop_QAdd16Sx2: case Iop_QAdd16Ux2:
2616       case Iop_QSub16Sx2: case Iop_QSub16Ux2:
2617       case Iop_HAdd16Ux2: case Iop_HAdd16Sx2:
2618       case Iop_HSub16Ux2: case Iop_HSub16Sx2:
2619       case Iop_Add8x4: case Iop_Sub8x4:
2620       case Iop_QAdd8Sx4: case Iop_QAdd8Ux4:
2621       case Iop_QSub8Sx4: case Iop_QSub8Ux4:
2622       case Iop_HAdd8Ux4: case Iop_HAdd8Sx4:
2623       case Iop_HSub8Ux4: case Iop_HSub8Sx4:
2624       case Iop_Sad8Ux4:
2625          BINARY(Ity_I32,Ity_I32, Ity_I32);
2626
2627       case Iop_Add64: case Iop_Sub64: case Iop_Mul64:
2628       case Iop_Or64:  case Iop_And64: case Iop_Xor64:
2629       case Iop_CmpORD64U:
2630       case Iop_CmpORD64S:
2631       case Iop_Avg8Ux8: case Iop_Avg16Ux4:
2632       case Iop_Add8x8: case Iop_Add16x4: case Iop_Add32x2:
2633       case Iop_Add32Fx2: case Iop_Sub32Fx2:
2634       case Iop_CmpEQ8x8: case Iop_CmpEQ16x4: case Iop_CmpEQ32x2:
2635       case Iop_CmpGT8Sx8: case Iop_CmpGT16Sx4: case Iop_CmpGT32Sx2:
2636       case Iop_CmpGT8Ux8: case Iop_CmpGT16Ux4: case Iop_CmpGT32Ux2:
2637       case Iop_CmpGT32Fx2: case Iop_CmpEQ32Fx2: case Iop_CmpGE32Fx2:
2638       case Iop_InterleaveHI8x8: case Iop_InterleaveLO8x8:
2639       case Iop_InterleaveHI16x4: case Iop_InterleaveLO16x4:
2640       case Iop_InterleaveHI32x2: case Iop_InterleaveLO32x2:
2641       case Iop_CatOddLanes8x8: case Iop_CatEvenLanes8x8:
2642       case Iop_CatOddLanes16x4: case Iop_CatEvenLanes16x4:
2643       case Iop_InterleaveOddLanes8x8: case Iop_InterleaveEvenLanes8x8:
2644       case Iop_InterleaveOddLanes16x4: case Iop_InterleaveEvenLanes16x4:
2645       case Iop_Perm8x8:
2646       case Iop_Max8Ux8: case Iop_Max16Ux4: case Iop_Max32Ux2:
2647       case Iop_Max8Sx8: case Iop_Max16Sx4: case Iop_Max32Sx2:
2648       case Iop_Max32Fx2: case Iop_Min32Fx2:
2649       case Iop_PwMax32Fx2: case Iop_PwMin32Fx2:
2650       case Iop_Min8Ux8: case Iop_Min16Ux4: case Iop_Min32Ux2:
2651       case Iop_Min8Sx8: case Iop_Min16Sx4: case Iop_Min32Sx2:
2652       case Iop_PwMax8Ux8: case Iop_PwMax16Ux4: case Iop_PwMax32Ux2:
2653       case Iop_PwMax8Sx8: case Iop_PwMax16Sx4: case Iop_PwMax32Sx2:
2654       case Iop_PwMin8Ux8: case Iop_PwMin16Ux4: case Iop_PwMin32Ux2:
2655       case Iop_PwMin8Sx8: case Iop_PwMin16Sx4: case Iop_PwMin32Sx2:
2656       case Iop_Mul8x8: case Iop_Mul16x4: case Iop_Mul32x2:
2657       case Iop_Mul32Fx2:
2658       case Iop_PolynomialMul8x8:
2659       case Iop_MulHi16Sx4: case Iop_MulHi16Ux4:
2660       case Iop_QDMulHi16Sx4: case Iop_QDMulHi32Sx2:
2661       case Iop_QRDMulHi16Sx4: case Iop_QRDMulHi32Sx2:
2662       case Iop_QAdd8Sx8: case Iop_QAdd16Sx4:
2663       case Iop_QAdd32Sx2: case Iop_QAdd64Sx1:
2664       case Iop_QAdd8Ux8: case Iop_QAdd16Ux4:
2665       case Iop_QAdd32Ux2: case Iop_QAdd64Ux1:
2666       case Iop_PwAdd8x8: case Iop_PwAdd16x4: case Iop_PwAdd32x2:
2667       case Iop_PwAdd32Fx2:
2668       case Iop_QNarrowBin32Sto16Sx4:
2669       case Iop_QNarrowBin16Sto8Sx8: case Iop_QNarrowBin16Sto8Ux8:
2670       case Iop_NarrowBin16to8x8: case Iop_NarrowBin32to16x4:
2671       case Iop_Sub8x8: case Iop_Sub16x4: case Iop_Sub32x2:
2672       case Iop_QSub8Sx8: case Iop_QSub16Sx4:
2673       case Iop_QSub32Sx2: case Iop_QSub64Sx1:
2674       case Iop_QSub8Ux8: case Iop_QSub16Ux4:
2675       case Iop_QSub32Ux2: case Iop_QSub64Ux1:
2676       case Iop_Shl8x8: case Iop_Shl16x4: case Iop_Shl32x2:
2677       case Iop_Shr8x8: case Iop_Shr16x4: case Iop_Shr32x2:
2678       case Iop_Sar8x8: case Iop_Sar16x4: case Iop_Sar32x2:
2679       case Iop_Sal8x8: case Iop_Sal16x4: case Iop_Sal32x2: case Iop_Sal64x1:
2680       case Iop_QShl8x8: case Iop_QShl16x4: case Iop_QShl32x2: case Iop_QShl64x1:
2681       case Iop_QSal8x8: case Iop_QSal16x4: case Iop_QSal32x2: case Iop_QSal64x1:
2682       case Iop_RecipStep32Fx2:
2683       case Iop_RSqrtStep32Fx2:
2684          BINARY(Ity_I64,Ity_I64, Ity_I64);
2685
2686       case Iop_ShlN32x2: case Iop_ShlN16x4: case Iop_ShlN8x8:
2687       case Iop_ShrN32x2: case Iop_ShrN16x4: case Iop_ShrN8x8:
2688       case Iop_SarN32x2: case Iop_SarN16x4: case Iop_SarN8x8:
2689       case Iop_QShlNsatUU8x8:  case Iop_QShlNsatUU16x4:
2690       case Iop_QShlNsatUU32x2: case Iop_QShlNsatUU64x1:
2691       case Iop_QShlNsatSU8x8:  case Iop_QShlNsatSU16x4:
2692       case Iop_QShlNsatSU32x2: case Iop_QShlNsatSU64x1:
2693       case Iop_QShlNsatSS8x8:  case Iop_QShlNsatSS16x4:
2694       case Iop_QShlNsatSS32x2: case Iop_QShlNsatSS64x1:
2695          BINARY(Ity_I64,Ity_I8, Ity_I64);
2696
2697       case Iop_Shl8: case Iop_Shr8: case Iop_Sar8:
2698          BINARY(Ity_I8,Ity_I8, Ity_I8);
2699       case Iop_Shl16: case Iop_Shr16: case Iop_Sar16:
2700          BINARY(Ity_I16,Ity_I8, Ity_I16);
2701       case Iop_Shl32: case Iop_Shr32: case Iop_Sar32:
2702          BINARY(Ity_I32,Ity_I8, Ity_I32);
2703       case Iop_Shl64: case Iop_Shr64: case Iop_Sar64:
2704          BINARY(Ity_I64,Ity_I8, Ity_I64);
2705
2706       case Iop_Not8:
2707          UNARY(Ity_I8, Ity_I8);
2708       case Iop_Not16:
2709          UNARY(Ity_I16, Ity_I16);
2710       case Iop_Not32:
2711       case Iop_CmpNEZ16x2: case Iop_CmpNEZ8x4:
2712          UNARY(Ity_I32, Ity_I32);
2713
2714       case Iop_Not64:
2715       case Iop_CmpNEZ32x2: case Iop_CmpNEZ16x4: case Iop_CmpNEZ8x8:
2716       case Iop_Cnt8x8:
2717       case Iop_Clz8x8: case Iop_Clz16x4: case Iop_Clz32x2:
2718       case Iop_Cls8x8: case Iop_Cls16x4: case Iop_Cls32x2:
2719       case Iop_PwAddL8Ux8: case Iop_PwAddL16Ux4: case Iop_PwAddL32Ux2:
2720       case Iop_PwAddL8Sx8: case Iop_PwAddL16Sx4: case Iop_PwAddL32Sx2:
2721       case Iop_Reverse8sIn64_x1: case Iop_Reverse16sIn64_x1:
2722       case Iop_Reverse32sIn64_x1:
2723       case Iop_Reverse8sIn32_x2: case Iop_Reverse16sIn32_x2:
2724       case Iop_Reverse8sIn16_x4:
2725       case Iop_FtoI32Sx2_RZ: case Iop_FtoI32Ux2_RZ:
2726       case Iop_I32StoFx2: case Iop_I32UtoFx2:
2727       case Iop_RecipEst32Ux2: case Iop_RecipEst32Fx2:
2728       case Iop_Abs32Fx2:
2729       case Iop_RSqrtEst32Fx2:
2730       case Iop_RSqrtEst32Ux2:
2731       case Iop_Neg32Fx2:
2732       case Iop_Abs8x8: case Iop_Abs16x4: case Iop_Abs32x2:
2733          UNARY(Ity_I64, Ity_I64);
2734
2735       case Iop_CmpEQ8: case Iop_CmpNE8:
2736       case Iop_CasCmpEQ8: case Iop_CasCmpNE8: case Iop_ExpCmpNE8:
2737          COMPARISON(Ity_I8);
2738       case Iop_CmpEQ16: case Iop_CmpNE16:
2739       case Iop_CasCmpEQ16: case Iop_CasCmpNE16: case Iop_ExpCmpNE16:
2740          COMPARISON(Ity_I16);
2741       case Iop_CmpEQ32: case Iop_CmpNE32:
2742       case Iop_CasCmpEQ32: case Iop_CasCmpNE32: case Iop_ExpCmpNE32:
2743       case Iop_CmpLT32S: case Iop_CmpLE32S:
2744       case Iop_CmpLT32U: case Iop_CmpLE32U:
2745          COMPARISON(Ity_I32);
2746       case Iop_CmpEQ64: case Iop_CmpNE64:
2747       case Iop_CasCmpEQ64: case Iop_CasCmpNE64: case Iop_ExpCmpNE64:
2748       case Iop_CmpLT64S: case Iop_CmpLE64S:
2749       case Iop_CmpLT64U: case Iop_CmpLE64U:
2750          COMPARISON(Ity_I64);
2751
2752       case Iop_CmpNEZ8:  UNARY_COMPARISON(Ity_I8);
2753       case Iop_CmpNEZ16: UNARY_COMPARISON(Ity_I16);
2754       case Iop_CmpNEZ32: UNARY_COMPARISON(Ity_I32);
2755       case Iop_CmpNEZ64: UNARY_COMPARISON(Ity_I64);
2756
2757       case Iop_Left8:  UNARY(Ity_I8, Ity_I8);
2758       case Iop_Left16: UNARY(Ity_I16,Ity_I16);
2759       case Iop_CmpwNEZ32: case Iop_Left32: UNARY(Ity_I32,Ity_I32);
2760       case Iop_CmpwNEZ64: case Iop_Left64: UNARY(Ity_I64,Ity_I64);
2761
2762       case Iop_GetMSBs8x8:  UNARY(Ity_I64, Ity_I8);
2763       case Iop_GetMSBs8x16: UNARY(Ity_V128, Ity_I16);
2764
2765       case Iop_MullU8: case Iop_MullS8:
2766          BINARY(Ity_I8,Ity_I8, Ity_I16);
2767       case Iop_MullU16: case Iop_MullS16:
2768          BINARY(Ity_I16,Ity_I16, Ity_I32);
2769       case Iop_MullU32: case Iop_MullS32:
2770          BINARY(Ity_I32,Ity_I32, Ity_I64);
2771       case Iop_MullU64: case Iop_MullS64:
2772          BINARY(Ity_I64,Ity_I64, Ity_I128);
2773
2774       case Iop_Clz32: case Iop_Ctz32:
2775          UNARY(Ity_I32, Ity_I32);
2776
2777       case Iop_Clz64: case Iop_Ctz64:
2778          UNARY(Ity_I64, Ity_I64);
2779
2780       case Iop_DivU32: case Iop_DivS32: case Iop_DivU32E: case Iop_DivS32E:
2781          BINARY(Ity_I32,Ity_I32, Ity_I32);
2782
2783       case Iop_DivU64: case Iop_DivS64: case Iop_DivS64E: case Iop_DivU64E:
2784          BINARY(Ity_I64,Ity_I64, Ity_I64);
2785
2786       case Iop_DivModU64to32: case Iop_DivModS64to32:
2787          BINARY(Ity_I64, Ity_I32, Ity_I64);
2788
2789       case Iop_DivModU32to32: case Iop_DivModS32to32:
2790          BINARY(Ity_I32, Ity_I32, Ity_I64);
2791
2792       case Iop_DivModU128to64: case Iop_DivModS128to64:
2793          BINARY(Ity_I128,Ity_I64, Ity_I128);
2794
2795       case Iop_DivModU64to64: case Iop_DivModS64to64:
2796          BINARY(Ity_I64,Ity_I64, Ity_I128);
2797
2798       case Iop_16HIto8: case Iop_16to8:
2799          UNARY(Ity_I16, Ity_I8);
2800       case Iop_8HLto16:
2801          BINARY(Ity_I8,Ity_I8, Ity_I16);
2802
2803       case Iop_32HIto16: case Iop_32to16:
2804          UNARY(Ity_I32, Ity_I16);
2805       case Iop_16HLto32:
2806          BINARY(Ity_I16,Ity_I16, Ity_I32);
2807
2808       case Iop_64HIto32: case Iop_64to32:
2809          UNARY(Ity_I64, Ity_I32);
2810       case Iop_32HLto64:
2811          BINARY(Ity_I32,Ity_I32, Ity_I64);
2812
2813       case Iop_128HIto64: case Iop_128to64:
2814          UNARY(Ity_I128, Ity_I64);
2815       case Iop_64HLto128:
2816          BINARY(Ity_I64,Ity_I64, Ity_I128);
2817
2818       case Iop_Not1:   UNARY(Ity_I1, Ity_I1);
2819       case Iop_1Uto8:  UNARY(Ity_I1, Ity_I8);
2820       case Iop_1Sto8:  UNARY(Ity_I1, Ity_I8);
2821       case Iop_1Sto16: UNARY(Ity_I1, Ity_I16);
2822       case Iop_1Uto32: case Iop_1Sto32: UNARY(Ity_I1, Ity_I32);
2823       case Iop_1Sto64: case Iop_1Uto64: UNARY(Ity_I1, Ity_I64);
2824       case Iop_32to1:  UNARY(Ity_I32, Ity_I1);
2825       case Iop_64to1:  UNARY(Ity_I64, Ity_I1);
2826
2827       case Iop_8Uto32: case Iop_8Sto32:
2828          UNARY(Ity_I8, Ity_I32);
2829
2830       case Iop_8Uto16: case Iop_8Sto16:
2831          UNARY(Ity_I8, Ity_I16);
2832
2833       case Iop_16Uto32: case Iop_16Sto32:
2834          UNARY(Ity_I16, Ity_I32);
2835
2836       case Iop_32Sto64: case Iop_32Uto64:
2837          UNARY(Ity_I32, Ity_I64);
2838
2839       case Iop_8Uto64: case Iop_8Sto64:
2840          UNARY(Ity_I8, Ity_I64);
2841
2842       case Iop_16Uto64: case Iop_16Sto64:
2843          UNARY(Ity_I16, Ity_I64);
2844       case Iop_64to16:
2845          UNARY(Ity_I64, Ity_I16);
2846
2847       case Iop_32to8: UNARY(Ity_I32, Ity_I8);
2848       case Iop_64to8: UNARY(Ity_I64, Ity_I8);
2849
2850       case Iop_AddF64:    case Iop_SubF64:
2851       case Iop_MulF64:    case Iop_DivF64:
2852       case Iop_AddF64r32: case Iop_SubF64r32:
2853       case Iop_MulF64r32: case Iop_DivF64r32:
2854          TERNARY(ity_RMode,Ity_F64,Ity_F64, Ity_F64);
2855
2856       case Iop_AddF32: case Iop_SubF32:
2857       case Iop_MulF32: case Iop_DivF32:
2858          TERNARY(ity_RMode,Ity_F32,Ity_F32, Ity_F32);
2859
2860       case Iop_NegF64: case Iop_AbsF64:
2861          UNARY(Ity_F64, Ity_F64);
2862
2863       case Iop_NegF32: case Iop_AbsF32:
2864          UNARY(Ity_F32, Ity_F32);
2865
2866       case Iop_SqrtF64:
2867       case Iop_RecpExpF64:
2868          BINARY(ity_RMode,Ity_F64, Ity_F64);
2869
2870       case Iop_SqrtF32:
2871       case Iop_RoundF32toInt:
2872       case Iop_RecpExpF32:
2873          BINARY(ity_RMode,Ity_F32, Ity_F32);
2874
2875       case Iop_MaxNumF64: case Iop_MinNumF64:
2876          BINARY(Ity_F64,Ity_F64, Ity_F64);
2877
2878       case Iop_MaxNumF32: case Iop_MinNumF32:
2879          BINARY(Ity_F32,Ity_F32, Ity_F32);
2880
2881      case Iop_CmpF32:
2882          BINARY(Ity_F32,Ity_F32, Ity_I32);
2883
2884       case Iop_CmpF64:
2885          BINARY(Ity_F64,Ity_F64, Ity_I32);
2886
2887       case Iop_CmpF128:
2888          BINARY(Ity_F128,Ity_F128, Ity_I32);
2889
2890       case Iop_F64toI16S: BINARY(ity_RMode,Ity_F64, Ity_I16);
2891       case Iop_F64toI32S: BINARY(ity_RMode,Ity_F64, Ity_I32);
2892       case Iop_F64toI64S: case Iop_F64toI64U:
2893          BINARY(ity_RMode,Ity_F64, Ity_I64);
2894
2895       case Iop_F64toI32U: BINARY(ity_RMode,Ity_F64, Ity_I32);
2896
2897       case Iop_I32StoF64: UNARY(Ity_I32, Ity_F64);
2898       case Iop_I64StoF64: BINARY(ity_RMode,Ity_I64, Ity_F64);
2899       case Iop_I64UtoF64: BINARY(ity_RMode,Ity_I64, Ity_F64);
2900       case Iop_I64UtoF32: BINARY(ity_RMode,Ity_I64, Ity_F32);
2901
2902       case Iop_I32UtoF64: UNARY(Ity_I32, Ity_F64);
2903
2904       case Iop_F32toI32S: BINARY(ity_RMode,Ity_F32, Ity_I32);
2905       case Iop_F32toI64S: BINARY(ity_RMode,Ity_F32, Ity_I64);
2906       case Iop_F32toI32U: BINARY(ity_RMode,Ity_F32, Ity_I32);
2907       case Iop_F32toI64U: BINARY(ity_RMode,Ity_F32, Ity_I64);
2908
2909       case Iop_I32UtoF32: BINARY(ity_RMode,Ity_I32, Ity_F32);
2910       case Iop_I32StoF32: BINARY(ity_RMode,Ity_I32, Ity_F32);
2911       case Iop_I64StoF32: BINARY(ity_RMode,Ity_I64, Ity_F32);
2912
2913       case Iop_F32toF64: UNARY(Ity_F32, Ity_F64);
2914       case Iop_F16toF64: UNARY(Ity_F16, Ity_F64);
2915       case Iop_F16toF32: UNARY(Ity_F16, Ity_F32);
2916
2917       case Iop_F64toF32: BINARY(ity_RMode,Ity_F64, Ity_F32);
2918       case Iop_F64toF16: BINARY(ity_RMode,Ity_F64, Ity_F16);
2919       case Iop_F32toF16: BINARY(ity_RMode,Ity_F32, Ity_F16);
2920
2921       case Iop_ReinterpI64asF64: UNARY(Ity_I64, Ity_F64);
2922       case Iop_ReinterpF64asI64: UNARY(Ity_F64, Ity_I64);
2923       case Iop_ReinterpI32asF32: UNARY(Ity_I32, Ity_F32);
2924       case Iop_ReinterpF32asI32: UNARY(Ity_F32, Ity_I32);
2925
2926       case Iop_AtanF64: case Iop_Yl2xF64:  case Iop_Yl2xp1F64:
2927       case Iop_ScaleF64: case Iop_PRemF64: case Iop_PRem1F64:
2928          TERNARY(ity_RMode,Ity_F64,Ity_F64, Ity_F64);
2929
2930       case Iop_PRemC3210F64: case Iop_PRem1C3210F64:
2931          TERNARY(ity_RMode,Ity_F64,Ity_F64, Ity_I32);
2932
2933       case Iop_SinF64: case Iop_CosF64: case Iop_TanF64:
2934       case Iop_2xm1F64:
2935       case Iop_RoundF64toInt: BINARY(ity_RMode,Ity_F64, Ity_F64);
2936
2937       case Iop_MAddF64: case Iop_MSubF64:
2938       case Iop_MAddF64r32: case Iop_MSubF64r32:
2939          QUATERNARY(ity_RMode,Ity_F64,Ity_F64,Ity_F64, Ity_F64);
2940
2941       case Iop_RSqrtEst5GoodF64:
2942       case Iop_RoundF64toF64_NEAREST: case Iop_RoundF64toF64_NegINF:
2943       case Iop_RoundF64toF64_PosINF: case Iop_RoundF64toF64_ZERO:
2944          UNARY(Ity_F64, Ity_F64);
2945       case Iop_RoundF64toF32:
2946          BINARY(ity_RMode,Ity_F64, Ity_F64);
2947       case Iop_TruncF64asF32:
2948          UNARY(Ity_F64, Ity_F32);
2949
2950       case Iop_I32UtoFx4:
2951       case Iop_I32StoFx4:
2952       case Iop_QFtoI32Ux4_RZ:
2953       case Iop_QFtoI32Sx4_RZ:
2954       case Iop_FtoI32Ux4_RZ:
2955       case Iop_FtoI32Sx4_RZ:
2956       case Iop_RoundF32x4_RM:
2957       case Iop_RoundF32x4_RP:
2958       case Iop_RoundF32x4_RN:
2959       case Iop_RoundF32x4_RZ:
2960       case Iop_Abs64Fx2: case Iop_Abs32Fx4:
2961       case Iop_RSqrtEst32Fx4:
2962       case Iop_RSqrtEst32Ux4:
2963          UNARY(Ity_V128, Ity_V128);
2964
2965       case Iop_Sqrt64Fx2:
2966       case Iop_Sqrt32Fx4:
2967          BINARY(ity_RMode,Ity_V128, Ity_V128);
2968
2969       case Iop_64HLtoV128:
2970          BINARY(Ity_I64,Ity_I64, Ity_V128);
2971
2972       case Iop_Scale2_32Fx4:
2973       case Iop_Scale2_64Fx2:
2974          TERNARY(ity_RMode,Ity_V128,Ity_V128, Ity_V128);
2975       case Iop_Log2_32Fx4:
2976       case Iop_Log2_64Fx2:
2977          UNARY(Ity_V128, Ity_V128);
2978
2979       case Iop_V128to64: case Iop_V128HIto64:
2980       case Iop_NarrowUn16to8x8:
2981       case Iop_NarrowUn32to16x4:
2982       case Iop_NarrowUn64to32x2:
2983       case Iop_QNarrowUn16Uto8Ux8:
2984       case Iop_QNarrowUn32Uto16Ux4:
2985       case Iop_QNarrowUn64Uto32Ux2:
2986       case Iop_QNarrowUn16Sto8Sx8:
2987       case Iop_QNarrowUn32Sto16Sx4:
2988       case Iop_QNarrowUn64Sto32Sx2:
2989       case Iop_QNarrowUn16Sto8Ux8:
2990       case Iop_QNarrowUn32Sto16Ux4:
2991       case Iop_QNarrowUn64Sto32Ux2:
2992       case Iop_F32toF16x4:
2993          UNARY(Ity_V128, Ity_I64);
2994
2995       case Iop_Widen8Uto16x8:
2996       case Iop_Widen16Uto32x4:
2997       case Iop_Widen32Uto64x2:
2998       case Iop_Widen8Sto16x8:
2999       case Iop_Widen16Sto32x4:
3000       case Iop_Widen32Sto64x2:
3001       case Iop_F16toF32x4:
3002          UNARY(Ity_I64, Ity_V128);
3003
3004       case Iop_V128to32:    UNARY(Ity_V128, Ity_I32);
3005       case Iop_32UtoV128:   UNARY(Ity_I32, Ity_V128);
3006       case Iop_64UtoV128:   UNARY(Ity_I64, Ity_V128);
3007       case Iop_SetV128lo32: BINARY(Ity_V128,Ity_I32, Ity_V128);
3008       case Iop_SetV128lo64: BINARY(Ity_V128,Ity_I64, Ity_V128);
3009
3010       case Iop_Dup8x16: UNARY(Ity_I8, Ity_V128);
3011       case Iop_Dup16x8: UNARY(Ity_I16, Ity_V128);
3012       case Iop_Dup32x4: UNARY(Ity_I32, Ity_V128);
3013       case Iop_Dup8x8:  UNARY(Ity_I8, Ity_I64);
3014       case Iop_Dup16x4: UNARY(Ity_I16, Ity_I64);
3015       case Iop_Dup32x2: UNARY(Ity_I32, Ity_I64);
3016
3017       case Iop_CmpEQ32Fx4: case Iop_CmpLT32Fx4:
3018       case Iop_CmpEQ64Fx2: case Iop_CmpLT64Fx2:
3019       case Iop_CmpLE32Fx4: case Iop_CmpUN32Fx4:
3020       case Iop_CmpLE64Fx2: case Iop_CmpUN64Fx2:
3021       case Iop_CmpGT32Fx4: case Iop_CmpGE32Fx4:
3022       case Iop_CmpEQ32F0x4: case Iop_CmpLT32F0x4:
3023       case Iop_CmpEQ64F0x2: case Iop_CmpLT64F0x2:
3024       case Iop_CmpLE32F0x4: case Iop_CmpUN32F0x4:
3025       case Iop_CmpLE64F0x2: case Iop_CmpUN64F0x2:
3026       case Iop_Add32F0x4:
3027       case Iop_Add64F0x2:
3028       case Iop_Div32F0x4:
3029       case Iop_Div64F0x2:
3030       case Iop_Max32Fx4: case Iop_Max32F0x4:
3031       case Iop_PwMax32Fx4: case Iop_PwMin32Fx4:
3032       case Iop_Max64Fx2: case Iop_Max64F0x2:
3033       case Iop_Min32Fx4: case Iop_Min32F0x4:
3034       case Iop_Min64Fx2: case Iop_Min64F0x2:
3035       case Iop_Mul32F0x4:
3036       case Iop_Mul64F0x2:
3037       case Iop_Sub32F0x4:
3038       case Iop_Sub64F0x2:
3039       case Iop_AndV128: case Iop_OrV128: case Iop_XorV128:
3040       case Iop_Add8x16:   case Iop_Add16x8:
3041       case Iop_Add32x4:   case Iop_Add64x2:
3042       case Iop_QAdd8Ux16: case Iop_QAdd16Ux8:
3043       case Iop_QAdd32Ux4: case Iop_QAdd64Ux2:
3044       case Iop_QAdd8Sx16: case Iop_QAdd16Sx8:
3045       case Iop_QAdd32Sx4: case Iop_QAdd64Sx2:
3046       case Iop_QAddExtUSsatSS8x16: case Iop_QAddExtUSsatSS16x8:
3047       case Iop_QAddExtUSsatSS32x4: case Iop_QAddExtUSsatSS64x2:
3048       case Iop_QAddExtSUsatUU8x16: case Iop_QAddExtSUsatUU16x8:
3049       case Iop_QAddExtSUsatUU32x4: case Iop_QAddExtSUsatUU64x2:
3050       case Iop_PwAdd8x16: case Iop_PwAdd16x8: case Iop_PwAdd32x4:
3051       case Iop_Sub8x16:   case Iop_Sub16x8:
3052       case Iop_Sub32x4:   case Iop_Sub64x2:
3053       case Iop_QSub8Ux16: case Iop_QSub16Ux8:
3054       case Iop_QSub32Ux4: case Iop_QSub64Ux2:
3055       case Iop_QSub8Sx16: case Iop_QSub16Sx8:
3056       case Iop_QSub32Sx4: case Iop_QSub64Sx2:
3057       case Iop_Mul8x16: case Iop_Mul16x8: case Iop_Mul32x4:
3058       case Iop_PolynomialMul8x16:
3059       case Iop_PolynomialMulAdd8x16: case Iop_PolynomialMulAdd16x8:
3060       case Iop_PolynomialMulAdd32x4: case Iop_PolynomialMulAdd64x2:
3061       case Iop_MulHi16Ux8: case Iop_MulHi32Ux4:
3062       case Iop_MulHi16Sx8: case Iop_MulHi32Sx4:
3063       case Iop_QDMulHi16Sx8: case Iop_QDMulHi32Sx4:
3064       case Iop_QRDMulHi16Sx8: case Iop_QRDMulHi32Sx4:
3065       case Iop_MullEven8Ux16: case Iop_MullEven16Ux8: case Iop_MullEven32Ux4:
3066       case Iop_MullEven8Sx16: case Iop_MullEven16Sx8: case Iop_MullEven32Sx4:
3067       case Iop_Avg8Ux16: case Iop_Avg16Ux8: case Iop_Avg32Ux4:
3068       case Iop_Avg8Sx16: case Iop_Avg16Sx8: case Iop_Avg32Sx4:
3069       case Iop_Max8Sx16: case Iop_Max16Sx8: case Iop_Max32Sx4:
3070       case Iop_Max64Sx2:
3071       case Iop_Max8Ux16: case Iop_Max16Ux8: case Iop_Max32Ux4:
3072       case Iop_Max64Ux2:
3073       case Iop_Min8Sx16: case Iop_Min16Sx8: case Iop_Min32Sx4:
3074       case Iop_Min64Sx2:
3075       case Iop_Min8Ux16: case Iop_Min16Ux8: case Iop_Min32Ux4:
3076       case Iop_Min64Ux2:
3077       case Iop_CmpEQ8x16:  case Iop_CmpEQ16x8:  case Iop_CmpEQ32x4:
3078       case Iop_CmpEQ64x2:
3079       case Iop_CmpGT8Sx16: case Iop_CmpGT16Sx8: case Iop_CmpGT32Sx4:
3080       case Iop_CmpGT64Sx2:
3081       case Iop_CmpGT8Ux16: case Iop_CmpGT16Ux8: case Iop_CmpGT32Ux4:
3082       case Iop_CmpGT64Ux2:
3083       case Iop_Shl8x16: case Iop_Shl16x8: case Iop_Shl32x4: case Iop_Shl64x2:
3084       case Iop_QShl8x16: case Iop_QShl16x8:
3085       case Iop_QShl32x4: case Iop_QShl64x2:
3086       case Iop_QSal8x16: case Iop_QSal16x8:
3087       case Iop_QSal32x4: case Iop_QSal64x2:
3088       case Iop_Shr8x16: case Iop_Shr16x8: case Iop_Shr32x4: case Iop_Shr64x2:
3089       case Iop_Sar8x16: case Iop_Sar16x8: case Iop_Sar32x4: case Iop_Sar64x2:
3090       case Iop_Sal8x16: case Iop_Sal16x8: case Iop_Sal32x4: case Iop_Sal64x2:
3091       case Iop_Rol8x16: case Iop_Rol16x8: case Iop_Rol32x4:case Iop_Rol64x2:
3092       case Iop_QNarrowBin16Sto8Ux16: case Iop_QNarrowBin32Sto16Ux8:
3093       case Iop_QNarrowBin16Sto8Sx16: case Iop_QNarrowBin32Sto16Sx8:
3094       case Iop_QNarrowBin16Uto8Ux16: case Iop_QNarrowBin32Uto16Ux8:
3095       case Iop_QNarrowBin64Sto32Sx4: case Iop_QNarrowBin64Uto32Ux4:
3096       case Iop_NarrowBin16to8x16:   case Iop_NarrowBin32to16x8:
3097       case Iop_NarrowBin64to32x4:
3098       case Iop_InterleaveHI8x16: case Iop_InterleaveHI16x8:
3099       case Iop_InterleaveHI32x4: case Iop_InterleaveHI64x2:
3100       case Iop_InterleaveLO8x16: case Iop_InterleaveLO16x8:
3101       case Iop_InterleaveLO32x4: case Iop_InterleaveLO64x2:
3102       case Iop_CatOddLanes8x16: case Iop_CatEvenLanes8x16:
3103       case Iop_CatOddLanes16x8: case Iop_CatEvenLanes16x8:
3104       case Iop_CatOddLanes32x4: case Iop_CatEvenLanes32x4:
3105       case Iop_InterleaveOddLanes8x16: case Iop_InterleaveEvenLanes8x16:
3106       case Iop_InterleaveOddLanes16x8: case Iop_InterleaveEvenLanes16x8:
3107       case Iop_InterleaveOddLanes32x4: case Iop_InterleaveEvenLanes32x4:
3108       case Iop_PackOddLanes8x16: case Iop_PackEvenLanes8x16:
3109       case Iop_PackOddLanes16x8: case Iop_PackEvenLanes16x8:
3110       case Iop_PackOddLanes32x4: case Iop_PackEvenLanes32x4:
3111       case Iop_Perm8x16: case Iop_Perm32x4:
3112       case Iop_RecipStep32Fx4: case Iop_RecipStep64Fx2:
3113       case Iop_RSqrtStep32Fx4: case Iop_RSqrtStep64Fx2:
3114       case Iop_CipherV128:
3115       case Iop_CipherLV128:
3116       case Iop_NCipherV128:
3117       case Iop_NCipherLV128:
3118       case Iop_Sh8Sx16: case Iop_Sh16Sx8:
3119       case Iop_Sh32Sx4: case Iop_Sh64Sx2:
3120       case Iop_Sh8Ux16: case Iop_Sh16Ux8:
3121       case Iop_Sh32Ux4: case Iop_Sh64Ux2:
3122       case Iop_Rsh8Sx16: case Iop_Rsh16Sx8:
3123       case Iop_Rsh32Sx4: case Iop_Rsh64Sx2:
3124       case Iop_Rsh8Ux16: case Iop_Rsh16Ux8:
3125       case Iop_Rsh32Ux4: case Iop_Rsh64Ux2:
3126       case Iop_MulI128by10E:
3127       case Iop_MulI128by10ECarry:
3128          BINARY(Ity_V128,Ity_V128, Ity_V128);
3129
3130       case Iop_Perm8x16x2:
3131          TERNARY(Ity_V128, Ity_V128, Ity_V128, Ity_V128);
3132
3133       case Iop_PolynomialMull8x8:
3134       case Iop_Mull8Ux8: case Iop_Mull8Sx8:
3135       case Iop_Mull16Ux4: case Iop_Mull16Sx4:
3136       case Iop_Mull32Ux2: case Iop_Mull32Sx2:
3137          BINARY(Ity_I64, Ity_I64, Ity_V128);
3138
3139       case Iop_NotV128:
3140       case Iop_RecipEst32Fx4: case Iop_RecipEst32F0x4:
3141       case Iop_RecipEst64Fx2: case Iop_RSqrtEst64Fx2:
3142       case Iop_RecipEst32Ux4:
3143       case Iop_RSqrtEst32F0x4:
3144       case Iop_Sqrt32F0x4:
3145       case Iop_Sqrt64F0x2:
3146       case Iop_CmpNEZ8x16: case Iop_CmpNEZ16x8:
3147       case Iop_CmpNEZ32x4: case Iop_CmpNEZ64x2:
3148       case Iop_Cnt8x16:
3149       case Iop_Clz8x16: case Iop_Clz16x8: case Iop_Clz32x4: case Iop_Clz64x2:
3150       case Iop_Cls8x16: case Iop_Cls16x8: case Iop_Cls32x4:
3151       case Iop_PwAddL8Ux16: case Iop_PwAddL16Ux8: case Iop_PwAddL32Ux4:
3152       case Iop_PwAddL8Sx16: case Iop_PwAddL16Sx8: case Iop_PwAddL32Sx4:
3153       case Iop_Reverse8sIn64_x2: case Iop_Reverse16sIn64_x2:
3154       case Iop_Reverse32sIn64_x2:
3155       case Iop_Reverse8sIn32_x4: case Iop_Reverse16sIn32_x4:
3156       case Iop_Reverse8sIn16_x8:
3157       case Iop_Reverse1sIn8_x16:
3158       case Iop_Neg64Fx2: case Iop_Neg32Fx4:
3159       case Iop_Abs8x16: case Iop_Abs16x8: case Iop_Abs32x4: case Iop_Abs64x2:
3160       case Iop_CipherSV128:
3161       case Iop_PwBitMtxXpose64x2:
3162       case Iop_ZeroHI64ofV128:  case Iop_ZeroHI96ofV128:
3163       case Iop_ZeroHI112ofV128: case Iop_ZeroHI120ofV128:
3164       case Iop_F16toF64x2:
3165       case Iop_F64toF16x2:
3166       case Iop_MulI128by10:
3167       case Iop_MulI128by10Carry:
3168       case Iop_Ctz8x16: case Iop_Ctz16x8:
3169       case Iop_Ctz32x4: case Iop_Ctz64x2:
3170       case Iop_BCD128toI128S:
3171          UNARY(Ity_V128, Ity_V128);
3172
3173       case Iop_ShlV128: case Iop_ShrV128:
3174       case Iop_ShlN8x16: case Iop_ShlN16x8:
3175       case Iop_ShlN32x4: case Iop_ShlN64x2:
3176       case Iop_ShrN8x16: case Iop_ShrN16x8:
3177       case Iop_ShrN32x4: case Iop_ShrN64x2:
3178       case Iop_SarN8x16: case Iop_SarN16x8:
3179       case Iop_SarN32x4: case Iop_SarN64x2:
3180       case Iop_QShlNsatUU8x16: case Iop_QShlNsatUU16x8:
3181       case Iop_QShlNsatUU32x4: case Iop_QShlNsatUU64x2:
3182       case Iop_QShlNsatSU8x16: case Iop_QShlNsatSU16x8:
3183       case Iop_QShlNsatSU32x4: case Iop_QShlNsatSU64x2:
3184       case Iop_QShlNsatSS8x16: case Iop_QShlNsatSS16x8:
3185       case Iop_QShlNsatSS32x4: case Iop_QShlNsatSS64x2:
3186       case Iop_SHA256:    case Iop_SHA512:
3187       case Iop_QandQShrNnarrow16Uto8Ux8:
3188       case Iop_QandQShrNnarrow32Uto16Ux4:
3189       case Iop_QandQShrNnarrow64Uto32Ux2:
3190       case Iop_QandQSarNnarrow16Sto8Sx8:
3191       case Iop_QandQSarNnarrow32Sto16Sx4:
3192       case Iop_QandQSarNnarrow64Sto32Sx2:
3193       case Iop_QandQSarNnarrow16Sto8Ux8:
3194       case Iop_QandQSarNnarrow32Sto16Ux4:
3195       case Iop_QandQSarNnarrow64Sto32Ux2:
3196       case Iop_QandQRShrNnarrow16Uto8Ux8:
3197       case Iop_QandQRShrNnarrow32Uto16Ux4:
3198       case Iop_QandQRShrNnarrow64Uto32Ux2:
3199       case Iop_QandQRSarNnarrow16Sto8Sx8:
3200       case Iop_QandQRSarNnarrow32Sto16Sx4:
3201       case Iop_QandQRSarNnarrow64Sto32Sx2:
3202       case Iop_QandQRSarNnarrow16Sto8Ux8:
3203       case Iop_QandQRSarNnarrow32Sto16Ux4:
3204       case Iop_QandQRSarNnarrow64Sto32Ux2:
3205       case Iop_I128StoBCD128:
3206          BINARY(Ity_V128, Ity_I8, Ity_V128);
3207
3208       case Iop_F32ToFixed32Ux4_RZ:
3209       case Iop_F32ToFixed32Sx4_RZ:
3210       case Iop_Fixed32UToF32x4_RN:
3211       case Iop_Fixed32SToF32x4_RN:
3212          BINARY(Ity_V128, Ity_I8, Ity_V128);
3213
3214       case Iop_F32ToFixed32Ux2_RZ:
3215       case Iop_F32ToFixed32Sx2_RZ:
3216       case Iop_Fixed32UToF32x2_RN:
3217       case Iop_Fixed32SToF32x2_RN:
3218          BINARY(Ity_I64, Ity_I8, Ity_I64);
3219
3220       case Iop_GetElem8x16:
3221          BINARY(Ity_V128, Ity_I8, Ity_I8);
3222       case Iop_GetElem16x8:
3223          BINARY(Ity_V128, Ity_I8, Ity_I16);
3224       case Iop_GetElem32x4:
3225          BINARY(Ity_V128, Ity_I8, Ity_I32);
3226       case Iop_GetElem64x2:
3227          BINARY(Ity_V128, Ity_I8, Ity_I64);
3228       case Iop_SetElem8x16:
3229          TERNARY(Ity_V128, Ity_I8, Ity_I8, Ity_V128);
3230       case Iop_SetElem16x8:
3231          TERNARY(Ity_V128, Ity_I8, Ity_I16, Ity_V128);
3232       case Iop_SetElem32x4:
3233          TERNARY(Ity_V128, Ity_I8, Ity_I32, Ity_V128);
3234       case Iop_SetElem64x2:
3235          TERNARY(Ity_V128, Ity_I8, Ity_I64, Ity_V128);
3236       case Iop_GetElem8x8:
3237          BINARY(Ity_I64, Ity_I8, Ity_I8);
3238       case Iop_GetElem16x4:
3239          BINARY(Ity_I64, Ity_I8, Ity_I16);
3240       case Iop_GetElem32x2:
3241          BINARY(Ity_I64, Ity_I8, Ity_I32);
3242       case Iop_SetElem8x8:
3243          TERNARY(Ity_I64, Ity_I8, Ity_I8, Ity_I64);
3244       case Iop_SetElem16x4:
3245          TERNARY(Ity_I64, Ity_I8, Ity_I16, Ity_I64);
3246       case Iop_SetElem32x2:
3247          TERNARY(Ity_I64, Ity_I8, Ity_I32, Ity_I64);
3248
3249       case Iop_Slice64:
3250          TERNARY(Ity_I64, Ity_I64, Ity_I8, Ity_I64);
3251       case Iop_SliceV128:
3252          TERNARY(Ity_V128, Ity_V128, Ity_I8, Ity_V128);
3253
3254       case Iop_BCDAdd:
3255       case Iop_BCDSub:
3256          BINARY(Ity_V128, Ity_V128, Ity_V128);
3257
3258       case Iop_QDMull16Sx4: case Iop_QDMull32Sx2:
3259          BINARY(Ity_I64, Ity_I64, Ity_V128);
3260
3261       /* s390 specific */
3262       case Iop_MAddF32:
3263       case Iop_MSubF32:
3264          QUATERNARY(ity_RMode,Ity_F32,Ity_F32,Ity_F32, Ity_F32);
3265
3266       case Iop_F64HLtoF128:
3267         BINARY(Ity_F64,Ity_F64, Ity_F128);
3268
3269       case Iop_F128HItoF64:
3270       case Iop_F128LOtoF64:
3271         UNARY(Ity_F128, Ity_F64);
3272
3273       case Iop_AddF128:
3274       case Iop_SubF128:
3275       case Iop_MulF128:
3276       case Iop_DivF128:
3277          TERNARY(ity_RMode,Ity_F128,Ity_F128, Ity_F128);
3278
3279       case Iop_MAddF128:
3280       case Iop_MSubF128:
3281       case Iop_NegMAddF128:
3282       case Iop_NegMSubF128:
3283          QUATERNARY(ity_RMode,Ity_F128,Ity_F128,Ity_F128, Ity_F128);
3284
3285       case Iop_Add64Fx2: case Iop_Sub64Fx2:
3286       case Iop_Mul64Fx2: case Iop_Div64Fx2:
3287       case Iop_Add32Fx4: case Iop_Sub32Fx4:
3288       case Iop_Mul32Fx4: case Iop_Div32Fx4:
3289       case Iop_F64x2_2toQ32x4: case Iop_F32x4_2toQ16x8:
3290          TERNARY(ity_RMode,Ity_V128,Ity_V128, Ity_V128);
3291
3292       case Iop_Add64Fx4: case Iop_Sub64Fx4:
3293       case Iop_Mul64Fx4: case Iop_Div64Fx4:
3294       case Iop_Add32Fx8: case Iop_Sub32Fx8:
3295       case Iop_Mul32Fx8: case Iop_Div32Fx8:
3296          TERNARY(ity_RMode,Ity_V256,Ity_V256, Ity_V256);
3297
3298       case Iop_NegF128:
3299       case Iop_AbsF128:
3300          UNARY(Ity_F128, Ity_F128);
3301
3302       case Iop_SqrtF128:
3303       case Iop_RoundF128toInt:
3304          BINARY(ity_RMode,Ity_F128, Ity_F128);
3305
3306       case Iop_I32StoF128: UNARY(Ity_I32, Ity_F128);
3307       case Iop_I64StoF128: UNARY(Ity_I64, Ity_F128);
3308
3309       case Iop_I32UtoF128: UNARY(Ity_I32, Ity_F128);
3310       case Iop_I64UtoF128: UNARY(Ity_I64, Ity_F128);
3311
3312       case Iop_F128toI32S: BINARY(ity_RMode,Ity_F128, Ity_I32);
3313       case Iop_F128toI64S: BINARY(ity_RMode,Ity_F128, Ity_I64);
3314
3315       case Iop_F128toI32U: BINARY(ity_RMode,Ity_F128, Ity_I32);
3316       case Iop_F128toI64U: BINARY(ity_RMode,Ity_F128, Ity_I64);
3317
3318       case Iop_F32toF128: UNARY(Ity_F32, Ity_F128);
3319       case Iop_F64toF128: UNARY(Ity_F64, Ity_F128);
3320
3321       case Iop_F128toF32: BINARY(ity_RMode,Ity_F128, Ity_F32);
3322       case Iop_F128toF64: BINARY(ity_RMode,Ity_F128, Ity_F64);
3323
3324       case Iop_TruncF128toI32S:
3325       case Iop_TruncF128toI64S:
3326       case Iop_TruncF128toI32U:
3327       case Iop_TruncF128toI64U:
3328          UNARY(Ity_F128, Ity_F128);
3329
3330       case Iop_F128toI128S:
3331       case Iop_RndF128:
3332          BINARY(ity_RMode,Ity_F128, Ity_F128);
3333
3334       case Iop_D32toD64:
3335          UNARY(Ity_D32, Ity_D64);
3336
3337       case Iop_ExtractExpD64:
3338          UNARY(Ity_D64, Ity_I64);
3339
3340       case Iop_ExtractSigD64:
3341          UNARY(Ity_D64, Ity_I64);
3342
3343       case Iop_InsertExpD64:
3344          BINARY(Ity_I64,Ity_D64, Ity_D64);
3345
3346       case Iop_ExtractExpD128:
3347          UNARY(Ity_D128, Ity_I64);
3348
3349       case Iop_ExtractSigD128:
3350         UNARY(Ity_D128, Ity_I64);
3351
3352       case Iop_InsertExpD128:
3353          BINARY(Ity_I64,Ity_D128, Ity_D128);
3354
3355       case Iop_D64toD128:
3356          UNARY(Ity_D64, Ity_D128);
3357
3358       case Iop_ReinterpD64asI64:
3359         UNARY(Ity_D64, Ity_I64);
3360
3361       case Iop_ReinterpI64asD64:
3362          UNARY(Ity_I64, Ity_D64);
3363
3364       case Iop_RoundD64toInt:
3365          BINARY(ity_RMode,Ity_D64, Ity_D64);
3366
3367       case Iop_RoundD128toInt:
3368          BINARY(ity_RMode,Ity_D128, Ity_D128);
3369
3370       case Iop_I32StoD128:
3371       case Iop_I32UtoD128:
3372          UNARY(Ity_I32, Ity_D128);
3373
3374       case Iop_I64StoD128:
3375          UNARY(Ity_I64, Ity_D128);
3376
3377       case Iop_I64UtoD128:
3378          UNARY(Ity_I64, Ity_D128);
3379
3380       case Iop_DPBtoBCD:
3381       case Iop_BCDtoDPB:
3382          UNARY(Ity_I64, Ity_I64);
3383
3384       case Iop_D128HItoD64:
3385       case Iop_D128LOtoD64:
3386          UNARY(Ity_D128, Ity_D64);
3387
3388       case Iop_D128toI64S:
3389          BINARY(ity_RMode, Ity_D128, Ity_I64);
3390
3391       case Iop_D128toI64U:
3392          BINARY(ity_RMode, Ity_D128, Ity_I64);
3393
3394       case Iop_D128toI32S:
3395       case Iop_D128toI32U:
3396          BINARY(ity_RMode, Ity_D128, Ity_I32);
3397
3398       case Iop_D64HLtoD128:
3399          BINARY(Ity_D64, Ity_D64, Ity_D128);
3400
3401       case Iop_ShlD64:
3402       case Iop_ShrD64:
3403          BINARY(Ity_D64, Ity_I8, Ity_D64 );
3404
3405       case Iop_D64toD32:
3406          BINARY(ity_RMode, Ity_D64, Ity_D32);
3407
3408       case Iop_D64toI32S:
3409       case Iop_D64toI32U:
3410          BINARY(ity_RMode, Ity_D64, Ity_I32);
3411
3412       case Iop_D64toI64S:
3413          BINARY(ity_RMode, Ity_D64, Ity_I64);
3414
3415       case Iop_D64toI64U:
3416          BINARY(ity_RMode, Ity_D64, Ity_I64);
3417
3418       case Iop_I32StoD64:
3419       case Iop_I32UtoD64:
3420          UNARY(Ity_I32, Ity_D64);
3421
3422       case Iop_I64StoD64:
3423          BINARY(ity_RMode, Ity_I64, Ity_D64);
3424
3425       case Iop_I64UtoD64:
3426          BINARY(ity_RMode, Ity_I64, Ity_D64);
3427
3428       case Iop_F32toD32:
3429          BINARY(ity_RMode, Ity_F32, Ity_D32);
3430
3431       case Iop_F32toD64:
3432          BINARY(ity_RMode, Ity_F32, Ity_D64);
3433
3434       case Iop_F32toD128:
3435          BINARY(ity_RMode, Ity_F32, Ity_D128);
3436
3437       case Iop_F64toD32:
3438          BINARY(ity_RMode, Ity_F64, Ity_D32);
3439
3440       case Iop_F64toD64:
3441          BINARY(ity_RMode, Ity_F64, Ity_D64);
3442
3443       case Iop_F64toD128:
3444          BINARY(ity_RMode, Ity_F64, Ity_D128);
3445
3446       case Iop_F128toD32:
3447          BINARY(ity_RMode, Ity_F128, Ity_D32);
3448
3449       case Iop_F128toD64:
3450          BINARY(ity_RMode, Ity_F128, Ity_D64);
3451
3452       case Iop_F128toD128:
3453          BINARY(ity_RMode, Ity_F128, Ity_D128);
3454
3455       case Iop_D32toF32:
3456          BINARY(ity_RMode, Ity_D32, Ity_F32);
3457
3458       case Iop_D32toF64:
3459          BINARY(ity_RMode, Ity_D32, Ity_F64);
3460
3461       case Iop_D32toF128:
3462          BINARY(ity_RMode, Ity_D32, Ity_F128);
3463
3464       case Iop_D64toF32:
3465          BINARY(ity_RMode, Ity_D64, Ity_F32);
3466
3467       case Iop_D64toF64:
3468          BINARY(ity_RMode, Ity_D64, Ity_F64);
3469
3470       case Iop_D64toF128:
3471          BINARY(ity_RMode, Ity_D64, Ity_F128);
3472
3473       case Iop_D128toF32:
3474          BINARY(ity_RMode, Ity_D128, Ity_F32);
3475
3476       case Iop_D128toF64:
3477          BINARY(ity_RMode, Ity_D128, Ity_F64);
3478
3479       case Iop_D128toF128:
3480          BINARY(ity_RMode, Ity_D128, Ity_F128);
3481
3482       case Iop_CmpD64:
3483       case Iop_CmpExpD64:
3484          BINARY(Ity_D64,Ity_D64, Ity_I32);
3485
3486       case Iop_CmpD128:
3487       case Iop_CmpExpD128:
3488          BINARY(Ity_D128,Ity_D128, Ity_I32);
3489
3490       case Iop_QuantizeD64:
3491          TERNARY(ity_RMode,Ity_D64,Ity_D64, Ity_D64);
3492
3493       case Iop_SignificanceRoundD64:
3494          TERNARY(ity_RMode, Ity_I8,Ity_D64, Ity_D64);
3495
3496       case Iop_QuantizeD128:
3497          TERNARY(ity_RMode,Ity_D128,Ity_D128, Ity_D128);
3498
3499       case Iop_SignificanceRoundD128:
3500          TERNARY(ity_RMode, Ity_I8,Ity_D128, Ity_D128);
3501
3502       case Iop_ShlD128:
3503       case Iop_ShrD128:
3504          BINARY(Ity_D128, Ity_I8, Ity_D128 );
3505
3506       case Iop_AddD64:
3507       case Iop_SubD64:
3508       case Iop_MulD64:
3509       case Iop_DivD64:
3510          TERNARY( ity_RMode, Ity_D64, Ity_D64, Ity_D64 );
3511
3512       case Iop_D128toD64:
3513          BINARY( ity_RMode, Ity_D128, Ity_D64 );
3514
3515       case Iop_AddD128:
3516       case Iop_SubD128:
3517       case Iop_MulD128:
3518       case Iop_DivD128:
3519          TERNARY(ity_RMode,Ity_D128,Ity_D128, Ity_D128);
3520
3521       case Iop_V256to64_0: case Iop_V256to64_1:
3522       case Iop_V256to64_2: case Iop_V256to64_3:
3523          UNARY(Ity_V256, Ity_I64);
3524
3525       case Iop_64x4toV256:
3526          QUATERNARY(Ity_I64, Ity_I64, Ity_I64, Ity_I64, Ity_V256);
3527
3528       case Iop_AndV256:  case Iop_OrV256:
3529       case Iop_XorV256:
3530       case Iop_Max32Fx8: case Iop_Min32Fx8:
3531       case Iop_Max64Fx4: case Iop_Min64Fx4:
3532       case Iop_Add8x32:  case Iop_Add16x16:
3533       case Iop_Add32x8:  case Iop_Add64x4:
3534       case Iop_Sub8x32:  case Iop_Sub16x16:
3535       case Iop_Sub32x8:  case Iop_Sub64x4:
3536       case Iop_Mul16x16: case Iop_Mul32x8:
3537       case Iop_MulHi16Ux16: case Iop_MulHi16Sx16:
3538       case Iop_Avg8Ux32: case Iop_Avg16Ux16:
3539       case Iop_Max8Sx32: case Iop_Max16Sx16: case Iop_Max32Sx8:
3540       case Iop_Max8Ux32: case Iop_Max16Ux16: case Iop_Max32Ux8:
3541       case Iop_Min8Sx32: case Iop_Min16Sx16: case Iop_Min32Sx8:
3542       case Iop_Min8Ux32: case Iop_Min16Ux16: case Iop_Min32Ux8:
3543       case Iop_CmpEQ8x32:  case Iop_CmpEQ16x16:
3544       case Iop_CmpEQ32x8:  case Iop_CmpEQ64x4:
3545       case Iop_CmpGT8Sx32: case Iop_CmpGT16Sx16:
3546       case Iop_CmpGT32Sx8: case Iop_CmpGT64Sx4:
3547       case Iop_QAdd8Ux32: case Iop_QAdd16Ux16:
3548       case Iop_QAdd8Sx32: case Iop_QAdd16Sx16:
3549       case Iop_QSub8Ux32: case Iop_QSub16Ux16:
3550       case Iop_QSub8Sx32: case Iop_QSub16Sx16:
3551       case Iop_Perm32x8:
3552          BINARY(Ity_V256,Ity_V256, Ity_V256);
3553
3554       case Iop_V256toV128_1: case Iop_V256toV128_0:
3555          UNARY(Ity_V256, Ity_V128);
3556
3557       case Iop_QandUQsh8x16:  case Iop_QandUQsh16x8:
3558       case Iop_QandUQsh32x4:  case Iop_QandUQsh64x2:
3559       case Iop_QandSQsh8x16:  case Iop_QandSQsh16x8:
3560       case Iop_QandSQsh32x4:  case Iop_QandSQsh64x2:
3561       case Iop_QandUQRsh8x16: case Iop_QandUQRsh16x8:
3562       case Iop_QandUQRsh32x4: case Iop_QandUQRsh64x2:
3563       case Iop_QandSQRsh8x16: case Iop_QandSQRsh16x8:
3564       case Iop_QandSQRsh32x4: case Iop_QandSQRsh64x2:
3565       case Iop_V128HLtoV256:
3566          BINARY(Ity_V128,Ity_V128, Ity_V256);
3567
3568       case Iop_NotV256:
3569       case Iop_RSqrtEst32Fx8:
3570       case Iop_Sqrt32Fx8:
3571       case Iop_Sqrt64Fx4:
3572       case Iop_RecipEst32Fx8:
3573       case Iop_CmpNEZ8x32: case Iop_CmpNEZ16x16:
3574       case Iop_CmpNEZ64x4: case Iop_CmpNEZ32x8:
3575          UNARY(Ity_V256, Ity_V256);
3576
3577       case Iop_ShlN16x16: case Iop_ShlN32x8:
3578       case Iop_ShlN64x4:
3579       case Iop_ShrN16x16: case Iop_ShrN32x8:
3580       case Iop_ShrN64x4:
3581       case Iop_SarN16x16: case Iop_SarN32x8:
3582          BINARY(Ity_V256,Ity_I8, Ity_V256);
3583       case Iop_Rotx32:
3584          QUATERNARY(Ity_I32, Ity_I8, Ity_I8, Ity_I8, Ity_I32);
3585       case Iop_Rotx64:
3586          QUATERNARY(Ity_I64, Ity_I8, Ity_I8, Ity_I8, Ity_I64);
3587
3588       default:
3589          ppIROp(op);
3590          vpanic("typeOfPrimop");
3591    }
3592 #  undef UNARY
3593 #  undef BINARY
3594 #  undef TERNARY
3595 #  undef COMPARISON
3596 #  undef UNARY_COMPARISON
3597 }
3598
3599
3600 /*---------------------------------------------------------------*/
3601 /*--- Helper functions for the IR -- IR Basic Blocks          ---*/
3602 /*---------------------------------------------------------------*/
3603
3604 void addStmtToIRSB ( IRSB* bb, IRStmt* st )
3605 {
3606    Int i;
3607    if (bb->stmts_used == bb->stmts_size) {
3608       IRStmt** stmts2 = LibVEX_Alloc_inline(2 * bb->stmts_size * sizeof(IRStmt*));
3609       for (i = 0; i < bb->stmts_size; i++)
3610          stmts2[i] = bb->stmts[i];
3611       bb->stmts = stmts2;
3612       bb->stmts_size *= 2;
3613    }
3614    vassert(bb->stmts_used < bb->stmts_size);
3615    bb->stmts[bb->stmts_used] = st;
3616    bb->stmts_used++;
3617 }
3618
3619
3620 /*---------------------------------------------------------------*/
3621 /*--- Helper functions for the IR -- IR Type Environments     ---*/
3622 /*---------------------------------------------------------------*/
3623
3624 /* Allocate a new IRTemp, given its type. */
3625
3626 IRTemp newIRTemp ( IRTypeEnv* env, IRType ty )
3627 {
3628    vassert(env);
3629    vassert(env->types_used >= 0);
3630    vassert(env->types_size >= 0);
3631    vassert(env->types_used <= env->types_size);
3632    if (env->types_used < env->types_size) {
3633       env->types[env->types_used] = ty;
3634       return env->types_used++;
3635    } else {
3636       Int i;
3637       Int new_size = env->types_size==0 ? 8 : 2*env->types_size;
3638       IRType* new_types
3639          = LibVEX_Alloc_inline(new_size * sizeof(IRType));
3640       for (i = 0; i < env->types_used; i++)
3641          new_types[i] = env->types[i];
3642       env->types      = new_types;
3643       env->types_size = new_size;
3644       return newIRTemp(env, ty);
3645    }
3646 }
3647
3648
3649 /*---------------------------------------------------------------*/
3650 /*--- Helper functions for the IR -- finding types of exprs   ---*/
3651 /*---------------------------------------------------------------*/
3652
3653 inline
3654 IRType typeOfIRTemp ( const IRTypeEnv* env, IRTemp tmp )
3655 {
3656    vassert(tmp >= 0);
3657    vassert(tmp < env->types_used);
3658    return env->types[tmp];
3659 }
3660
3661 IRType typeOfIRConst ( const IRConst* con )
3662 {
3663    switch (con->tag) {
3664       case Ico_U1:    return Ity_I1;
3665       case Ico_U8:    return Ity_I8;
3666       case Ico_U16:   return Ity_I16;
3667       case Ico_U32:   return Ity_I32;
3668       case Ico_U64:   return Ity_I64;
3669       case Ico_F32:   return Ity_F32;
3670       case Ico_F32i:  return Ity_F32;
3671       case Ico_F64:   return Ity_F64;
3672       case Ico_F64i:  return Ity_F64;
3673       case Ico_V128:  return Ity_V128;
3674       case Ico_V256:  return Ity_V256;
3675       default: vpanic("typeOfIRConst");
3676    }
3677 }
3678
3679 void typeOfIRLoadGOp ( IRLoadGOp cvt,
3680                        /*OUT*/IRType* t_res, /*OUT*/IRType* t_arg )
3681 {
3682    switch (cvt) {
3683       case ILGop_IdentV128:
3684          *t_res = Ity_V128; *t_arg = Ity_V128; break;
3685       case ILGop_Ident64:
3686          *t_res = Ity_I64; *t_arg = Ity_I64; break;
3687       case ILGop_Ident32:
3688          *t_res = Ity_I32; *t_arg = Ity_I32; break;
3689       case ILGop_16Uto32: case ILGop_16Sto32:
3690          *t_res = Ity_I32; *t_arg = Ity_I16; break;
3691       case ILGop_8Uto32: case ILGop_8Sto32:
3692          *t_res = Ity_I32; *t_arg = Ity_I8; break;
3693       default:
3694          vpanic("typeOfIRLoadGOp");
3695    }
3696 }
3697
3698 IRType typeOfIRExpr ( const IRTypeEnv* tyenv, const IRExpr* e )
3699 {
3700    IRType t_dst, t_arg1, t_arg2, t_arg3, t_arg4;
3701  start:
3702    switch (e->tag) {
3703       case Iex_Load:
3704          return e->Iex.Load.ty;
3705       case Iex_Get:
3706          return e->Iex.Get.ty;
3707       case Iex_GetI:
3708          return e->Iex.GetI.descr->elemTy;
3709       case Iex_RdTmp:
3710          return typeOfIRTemp(tyenv, e->Iex.RdTmp.tmp);
3711       case Iex_Const:
3712          return typeOfIRConst(e->Iex.Const.con);
3713       case Iex_Qop:
3714          typeOfPrimop(e->Iex.Qop.details->op,
3715                       &t_dst, &t_arg1, &t_arg2, &t_arg3, &t_arg4);
3716          return t_dst;
3717       case Iex_Triop:
3718          typeOfPrimop(e->Iex.Triop.details->op,
3719                       &t_dst, &t_arg1, &t_arg2, &t_arg3, &t_arg4);
3720          return t_dst;
3721       case Iex_Binop:
3722          typeOfPrimop(e->Iex.Binop.op,
3723                       &t_dst, &t_arg1, &t_arg2, &t_arg3, &t_arg4);
3724          return t_dst;
3725       case Iex_Unop:
3726          typeOfPrimop(e->Iex.Unop.op,
3727                       &t_dst, &t_arg1, &t_arg2, &t_arg3, &t_arg4);
3728          return t_dst;
3729       case Iex_CCall:
3730          return e->Iex.CCall.retty;
3731       case Iex_ITE:
3732          e = e->Iex.ITE.iffalse;
3733          goto start;
3734          /* return typeOfIRExpr(tyenv, e->Iex.ITE.iffalse); */
3735       case Iex_Binder:
3736          vpanic("typeOfIRExpr: Binder is not a valid expression");
3737       case Iex_VECRET:
3738          vpanic("typeOfIRExpr: VECRET is not a valid expression");
3739       case Iex_GSPTR:
3740          vpanic("typeOfIRExpr: GSPTR is not a valid expression");
3741       default:
3742          ppIRExpr(e);
3743          vpanic("typeOfIRExpr");
3744    }
3745 }
3746
3747 /* Is this any value actually in the enumeration 'IRType' ? */
3748 Bool isPlausibleIRType ( IRType ty )
3749 {
3750    switch (ty) {
3751       case Ity_INVALID: case Ity_I1:
3752       case Ity_I8: case Ity_I16: case Ity_I32:
3753       case Ity_I64: case Ity_I128:
3754       case Ity_F16: case Ity_F32: case Ity_F64: case Ity_F128:
3755       case Ity_D32: case Ity_D64: case Ity_D128:
3756       case Ity_V128: case Ity_V256:
3757          return True;
3758       default:
3759          return False;
3760    }
3761 }
3762
3763
3764 /*---------------------------------------------------------------*/
3765 /*--- Sanity checking -- FLATNESS                             ---*/
3766 /*---------------------------------------------------------------*/
3767
3768 /* Check that the canonical flatness constraints hold on an
3769    IRStmt. The only place where any expression is allowed to be
3770    non-atomic is the RHS of IRStmt_Tmp. */
3771
3772 /* Relies on:
3773    inline static Bool isAtom ( IRExpr* e ) {
3774       return e->tag == Iex_RdTmp || e->tag == Iex_Const;
3775    }
3776 */
3777
3778 static inline Bool isIRAtom_or_VECRET_or_GSPTR ( const IRExpr* e )
3779 {
3780   if (isIRAtom(e)) {
3781     return True;
3782   }
3783
3784   return UNLIKELY(is_IRExpr_VECRET_or_GSPTR(e));
3785 }
3786
3787 Bool isFlatIRStmt ( const IRStmt* st )
3788 {
3789    Int      i;
3790    const IRExpr*  e;
3791    const IRQop*   qop;
3792    const IRTriop* triop;
3793
3794    switch (st->tag) {
3795       case Ist_AbiHint:
3796          return isIRAtom(st->Ist.AbiHint.base)
3797                 && isIRAtom(st->Ist.AbiHint.nia);
3798       case Ist_Put:
3799          return isIRAtom(st->Ist.Put.data);
3800       case Ist_PutI: {
3801          const IRPutI *puti = st->Ist.PutI.details;
3802          return toBool( isIRAtom(puti->ix)
3803                         && isIRAtom(puti->data) );
3804       }
3805       case Ist_WrTmp:
3806          /* This is the only interesting case.  The RHS can be any
3807             expression, *but* all its subexpressions *must* be
3808             atoms. */
3809          e = st->Ist.WrTmp.data;
3810          switch (e->tag) {
3811             case Iex_Binder: return True;
3812             case Iex_Get:    return True;
3813             case Iex_GetI:   return isIRAtom(e->Iex.GetI.ix);
3814             case Iex_RdTmp:  return True;
3815             case Iex_Qop:    qop = e->Iex.Qop.details;
3816                              return toBool(
3817                                     isIRAtom(qop->arg1)
3818                                     && isIRAtom(qop->arg2)
3819                                     && isIRAtom(qop->arg3)
3820                                     && isIRAtom(qop->arg4));
3821             case Iex_Triop:  triop = e->Iex.Triop.details;
3822                              return toBool(
3823                                     isIRAtom(triop->arg1)
3824                                     && isIRAtom(triop->arg2)
3825                                     && isIRAtom(triop->arg3));
3826             case Iex_Binop:  return toBool(
3827                                     isIRAtom(e->Iex.Binop.arg1)
3828                                     && isIRAtom(e->Iex.Binop.arg2));
3829             case Iex_Unop:   return isIRAtom(e->Iex.Unop.arg);
3830             case Iex_Load:   return isIRAtom(e->Iex.Load.addr);
3831             case Iex_Const:  return True;
3832             case Iex_CCall:  for (i = 0; e->Iex.CCall.args[i]; i++)
3833                                 if (!isIRAtom(e->Iex.CCall.args[i]))
3834                                    return False;
3835                              return True;
3836             case Iex_ITE:    return toBool (
3837                                     isIRAtom(e->Iex.ITE.cond)
3838                                     && isIRAtom(e->Iex.ITE.iftrue)
3839                                     && isIRAtom(e->Iex.ITE.iffalse));
3840             default:         vpanic("isFlatIRStmt(e)");
3841          }
3842          /*notreached*/
3843          vassert(0);
3844       case Ist_Store:
3845          return toBool( isIRAtom(st->Ist.Store.addr)
3846                         && isIRAtom(st->Ist.Store.data) );
3847       case Ist_StoreG: {
3848          const IRStoreG* sg = st->Ist.StoreG.details;
3849          return toBool( isIRAtom(sg->addr)
3850                         && isIRAtom(sg->data) && isIRAtom(sg->guard) );
3851       }
3852       case Ist_LoadG: {
3853          const IRLoadG* lg = st->Ist.LoadG.details;
3854          return toBool( isIRAtom(lg->addr)
3855                         && isIRAtom(lg->alt) && isIRAtom(lg->guard) );
3856       }
3857       case Ist_CAS: {
3858         const IRCAS* cas = st->Ist.CAS.details;
3859          return toBool( isIRAtom(cas->addr)
3860                         && (cas->expdHi ? isIRAtom(cas->expdHi) : True)
3861                         && isIRAtom(cas->expdLo)
3862                         && (cas->dataHi ? isIRAtom(cas->dataHi) : True)
3863                         && isIRAtom(cas->dataLo) );
3864       }
3865       case Ist_LLSC:
3866          return toBool( isIRAtom(st->Ist.LLSC.addr)
3867                         && (st->Ist.LLSC.storedata
3868                                ? isIRAtom(st->Ist.LLSC.storedata) : True) );
3869       case Ist_Dirty: {
3870          const IRDirty* di = st->Ist.Dirty.details;
3871          if (!isIRAtom(di->guard))
3872             return False;
3873          for (i = 0; di->args[i]; i++)
3874             if (!isIRAtom_or_VECRET_or_GSPTR(di->args[i]))
3875                return False;
3876          if (di->mAddr && !isIRAtom(di->mAddr))
3877             return False;
3878          return True;
3879       }
3880       case Ist_NoOp:
3881       case Ist_IMark:
3882       case Ist_MBE:
3883          return True;
3884       case Ist_Exit:
3885          return isIRAtom(st->Ist.Exit.guard);
3886       default:
3887          vpanic("isFlatIRStmt(st)");
3888    }
3889 }
3890
3891
3892 /*---------------------------------------------------------------*/
3893 /*--- Sanity checking                                         ---*/
3894 /*---------------------------------------------------------------*/
3895
3896 /* Checks:
3897
3898    Everything is type-consistent.  No ill-typed anything.
3899    The target address at the end of the BB is a 32- or 64-
3900    bit expression, depending on the guest's word size.
3901
3902    Each temp is assigned only once, before its uses.
3903 */
3904
3905 static inline Int countArgs ( IRExpr** args )
3906 {
3907    Int i;
3908    for (i = 0; args[i]; i++)
3909       ;
3910    return i;
3911 }
3912
3913 static
3914 __attribute((noreturn))
3915 void sanityCheckFail ( const IRSB* bb, const IRStmt* stmt, const HChar* what )
3916 {
3917    vex_printf("\nIR SANITY CHECK FAILURE\n\n");
3918    ppIRSB(bb);
3919    if (stmt) {
3920       vex_printf("\nIN STATEMENT:\n\n");
3921       ppIRStmt(stmt);
3922    }
3923    vex_printf("\n\nERROR = %s\n\n", what );
3924    vpanic("sanityCheckFail: exiting due to bad IR");
3925 }
3926
3927 static Bool saneIRRegArray ( const IRRegArray* arr )
3928 {
3929    if (arr->base < 0 || arr->base > 10000 /* somewhat arbitrary */)
3930       return False;
3931    if (arr->elemTy == Ity_I1)
3932       return False;
3933    if (arr->nElems <= 0 || arr->nElems > 500 /* somewhat arbitrary */)
3934       return False;
3935    return True;
3936 }
3937
3938 static Bool saneIRCallee ( const IRCallee* cee )
3939 {
3940    if (cee->name == NULL)
3941       return False;
3942    if (cee->addr == 0)
3943       return False;
3944    if (cee->regparms < 0 || cee->regparms > 3)
3945       return False;
3946    return True;
3947 }
3948
3949 static Bool saneIRConst ( const IRConst* con )
3950 {
3951    switch (con->tag) {
3952       case Ico_U1:
3953          return toBool( con->Ico.U1 == True || con->Ico.U1 == False );
3954       default:
3955          /* Is there anything we can meaningfully check?  I don't
3956             think so. */
3957          return True;
3958    }
3959 }
3960
3961 /* Traverse a Stmt/Expr, inspecting IRTemp uses.  Report any out of
3962    range ones.  Report any which are read and for which the current
3963    def_count is zero. */
3964
3965 static
3966 void useBeforeDef_Temp ( const IRSB* bb, const IRStmt* stmt, IRTemp tmp,
3967                          Int* def_counts )
3968 {
3969    if (tmp < 0 || tmp >= bb->tyenv->types_used)
3970       sanityCheckFail(bb,stmt, "out of range Temp in IRExpr");
3971    if (def_counts[tmp] < 1)
3972       sanityCheckFail(bb,stmt, "IRTemp use before def in IRExpr");
3973 }
3974
3975 static
3976 void assignedOnce_Temp(const IRSB *bb, const IRStmt *stmt, IRTemp tmp,
3977                        Int *def_counts, UInt n_def_counts,
3978                        const HChar *err_msg_out_of_range,
3979                        const HChar *err_msg_assigned_more_than_once)
3980 {
3981    if (tmp < 0 || tmp >= n_def_counts) {
3982       sanityCheckFail(bb, stmt, err_msg_out_of_range);
3983    }
3984
3985    def_counts[tmp]++;
3986    if (def_counts[tmp] > 1) {
3987       sanityCheckFail(bb, stmt, err_msg_assigned_more_than_once);
3988    }
3989 }
3990
3991 static
3992 void useBeforeDef_Expr ( const IRSB* bb, const IRStmt* stmt,
3993                          const IRExpr* expr, Int* def_counts )
3994 {
3995    Int i;
3996    switch (expr->tag) {
3997       case Iex_Get:
3998          break;
3999       case Iex_GetI:
4000          useBeforeDef_Expr(bb,stmt,expr->Iex.GetI.ix,def_counts);
4001          break;
4002       case Iex_RdTmp:
4003          useBeforeDef_Temp(bb,stmt,expr->Iex.RdTmp.tmp,def_counts);
4004          break;
4005       case Iex_Qop: {
4006          const IRQop* qop = expr->Iex.Qop.details;
4007          useBeforeDef_Expr(bb,stmt,qop->arg1,def_counts);
4008          useBeforeDef_Expr(bb,stmt,qop->arg2,def_counts);
4009          useBeforeDef_Expr(bb,stmt,qop->arg3,def_counts);
4010          useBeforeDef_Expr(bb,stmt,qop->arg4,def_counts);
4011          break;
4012       }
4013       case Iex_Triop: {
4014          const IRTriop* triop = expr->Iex.Triop.details;
4015          useBeforeDef_Expr(bb,stmt,triop->arg1,def_counts);
4016          useBeforeDef_Expr(bb,stmt,triop->arg2,def_counts);
4017          useBeforeDef_Expr(bb,stmt,triop->arg3,def_counts);
4018          break;
4019       }
4020       case Iex_Binop:
4021          useBeforeDef_Expr(bb,stmt,expr->Iex.Binop.arg1,def_counts);
4022          useBeforeDef_Expr(bb,stmt,expr->Iex.Binop.arg2,def_counts);
4023          break;
4024       case Iex_Unop:
4025          useBeforeDef_Expr(bb,stmt,expr->Iex.Unop.arg,def_counts);
4026          break;
4027       case Iex_Load:
4028          useBeforeDef_Expr(bb,stmt,expr->Iex.Load.addr,def_counts);
4029          break;
4030       case Iex_Const:
4031          break;
4032       case Iex_CCall:
4033          for (i = 0; expr->Iex.CCall.args[i]; i++) {
4034             const IRExpr* arg = expr->Iex.CCall.args[i];
4035             if (UNLIKELY(is_IRExpr_VECRET_or_GSPTR(arg))) {
4036                /* These aren't allowed in CCall lists.  Let's detect
4037                   and throw them out here, though, rather than
4038                   segfaulting a bit later on. */
4039                sanityCheckFail(bb,stmt, "IRExprP__* value in CCall arg list");
4040             } else {
4041                useBeforeDef_Expr(bb,stmt,arg,def_counts);
4042             }
4043          }
4044          break;
4045       case Iex_ITE:
4046          useBeforeDef_Expr(bb,stmt,expr->Iex.ITE.cond,def_counts);
4047          useBeforeDef_Expr(bb,stmt,expr->Iex.ITE.iftrue,def_counts);
4048          useBeforeDef_Expr(bb,stmt,expr->Iex.ITE.iffalse,def_counts);
4049          break;
4050       default:
4051          vpanic("useBeforeDef_Expr");
4052    }
4053 }
4054
4055 static
4056 void useBeforeDef_Stmt ( const IRSB* bb, const IRStmt* stmt, Int* def_counts )
4057 {
4058    Int       i;
4059    const IRDirty*  d;
4060    const IRCAS*    cas;
4061    const IRPutI*   puti;
4062    const IRLoadG*  lg;
4063    const IRStoreG* sg;
4064    switch (stmt->tag) {
4065       case Ist_IMark:
4066          break;
4067       case Ist_AbiHint:
4068          useBeforeDef_Expr(bb,stmt,stmt->Ist.AbiHint.base,def_counts);
4069          useBeforeDef_Expr(bb,stmt,stmt->Ist.AbiHint.nia,def_counts);
4070          break;
4071       case Ist_Put:
4072          useBeforeDef_Expr(bb,stmt,stmt->Ist.Put.data,def_counts);
4073          break;
4074       case Ist_PutI:
4075          puti = stmt->Ist.PutI.details;
4076          useBeforeDef_Expr(bb,stmt,puti->ix,def_counts);
4077          useBeforeDef_Expr(bb,stmt,puti->data,def_counts);
4078          break;
4079       case Ist_WrTmp:
4080          useBeforeDef_Expr(bb,stmt,stmt->Ist.WrTmp.data,def_counts);
4081          break;
4082       case Ist_Store:
4083          useBeforeDef_Expr(bb,stmt,stmt->Ist.Store.addr,def_counts);
4084          useBeforeDef_Expr(bb,stmt,stmt->Ist.Store.data,def_counts);
4085          break;
4086       case Ist_StoreG:
4087          sg = stmt->Ist.StoreG.details;
4088          useBeforeDef_Expr(bb,stmt,sg->addr,def_counts);
4089          useBeforeDef_Expr(bb,stmt,sg->data,def_counts);
4090          useBeforeDef_Expr(bb,stmt,sg->guard,def_counts);
4091          break;
4092       case Ist_LoadG:
4093          lg = stmt->Ist.LoadG.details;
4094          useBeforeDef_Expr(bb,stmt,lg->addr,def_counts);
4095          useBeforeDef_Expr(bb,stmt,lg->alt,def_counts);
4096          useBeforeDef_Expr(bb,stmt,lg->guard,def_counts);
4097          break;
4098       case Ist_CAS:
4099          cas = stmt->Ist.CAS.details;
4100          useBeforeDef_Expr(bb,stmt,cas->addr,def_counts);
4101          if (cas->expdHi)
4102             useBeforeDef_Expr(bb,stmt,cas->expdHi,def_counts);
4103          useBeforeDef_Expr(bb,stmt,cas->expdLo,def_counts);
4104          if (cas->dataHi)
4105             useBeforeDef_Expr(bb,stmt,cas->dataHi,def_counts);
4106          useBeforeDef_Expr(bb,stmt,cas->dataLo,def_counts);
4107          break;
4108       case Ist_LLSC:
4109          useBeforeDef_Expr(bb,stmt,stmt->Ist.LLSC.addr,def_counts);
4110          if (stmt->Ist.LLSC.storedata != NULL)
4111             useBeforeDef_Expr(bb,stmt,stmt->Ist.LLSC.storedata,def_counts);
4112          break;
4113       case Ist_Dirty:
4114          d = stmt->Ist.Dirty.details;
4115          for (i = 0; d->args[i] != NULL; i++) {
4116             IRExpr* arg = d->args[i];
4117             if (UNLIKELY(is_IRExpr_VECRET_or_GSPTR(arg))) {
4118                /* This is ensured by isFlatIRStmt */
4119               ;
4120             } else {
4121                useBeforeDef_Expr(bb,stmt,arg,def_counts);
4122             }
4123          }
4124          if (d->mFx != Ifx_None)
4125             useBeforeDef_Expr(bb,stmt,d->mAddr,def_counts);
4126          break;
4127       case Ist_NoOp:
4128       case Ist_MBE:
4129          break;
4130       case Ist_Exit:
4131          useBeforeDef_Expr(bb,stmt,stmt->Ist.Exit.guard,def_counts);
4132          break;
4133       default:
4134          vpanic("useBeforeDef_Stmt");
4135    }
4136 }
4137
4138 static
4139 void assignedOnce_Stmt(const IRSB *bb, const IRStmt *stmt,
4140                        Int *def_counts, UInt n_def_counts)
4141 {
4142    switch (stmt->tag) {
4143    case Ist_WrTmp:
4144       assignedOnce_Temp(
4145          bb, stmt, stmt->Ist.WrTmp.tmp, def_counts, n_def_counts,
4146          "IRStmt.Tmp: destination tmp is out of range",
4147          "IRStmt.Tmp: destination tmp is assigned more than once");
4148       break;
4149    case Ist_LoadG:
4150       assignedOnce_Temp(
4151          bb, stmt, stmt->Ist.LoadG.details->dst, def_counts, n_def_counts,
4152          "IRStmt.LoadG: destination tmp is out of range",
4153          "IRStmt.LoadG: destination tmp is assigned more than once");
4154       break;
4155    case Ist_Dirty:
4156       if (stmt->Ist.Dirty.details->tmp != IRTemp_INVALID) {
4157          assignedOnce_Temp(
4158             bb, stmt, stmt->Ist.Dirty.details->tmp, def_counts, n_def_counts,
4159             "IRStmt.Dirty: destination tmp is out of range",
4160             "IRStmt.Dirty: destination tmp is assigned more than once");
4161       }
4162       break;
4163    case Ist_CAS:
4164       if (stmt->Ist.CAS.details->oldHi != IRTemp_INVALID) {
4165          assignedOnce_Temp(
4166             bb, stmt, stmt->Ist.CAS.details->oldHi, def_counts, n_def_counts,
4167             "IRStmt.CAS: destination tmpHi is out of range",
4168             "IRStmt.CAS: destination tmpHi is assigned more than once");
4169       }
4170       assignedOnce_Temp(
4171          bb, stmt, stmt->Ist.CAS.details->oldLo, def_counts, n_def_counts,
4172          "IRStmt.CAS: destination tmpLo is out of range",
4173          "IRStmt.CAS: destination tmpLo is assigned more than once");
4174       break;
4175    case Ist_LLSC:
4176       assignedOnce_Temp(
4177          bb, stmt, stmt->Ist.LLSC.result, def_counts, n_def_counts,
4178          "IRStmt.LLSC: destination tmp is out of range",
4179          "IRStmt.LLSC: destination tmp is assigned more than once");
4180       break;
4181    // Ignore all other cases
4182    case Ist_NoOp: case Ist_IMark: case Ist_AbiHint: case Ist_Put: case Ist_PutI:
4183    case Ist_Store: case Ist_StoreG: case Ist_MBE: case Ist_Exit:
4184       break;
4185    default:
4186       vassert(0);
4187    }
4188 }
4189
4190 static
4191 void tcExpr ( const IRSB* bb, const IRStmt* stmt, const IRExpr* expr,
4192               IRType gWordTy )
4193 {
4194    Int        i;
4195    IRType     t_dst, t_arg1, t_arg2, t_arg3, t_arg4;
4196    const IRTypeEnv* tyenv = bb->tyenv;
4197    switch (expr->tag) {
4198       case Iex_Get:
4199       case Iex_RdTmp:
4200          break;
4201       case Iex_GetI:
4202          tcExpr(bb,stmt, expr->Iex.GetI.ix, gWordTy );
4203          if (typeOfIRExpr(tyenv,expr->Iex.GetI.ix) != Ity_I32)
4204             sanityCheckFail(bb,stmt,"IRExpr.GetI.ix: not :: Ity_I32");
4205          if (!saneIRRegArray(expr->Iex.GetI.descr))
4206             sanityCheckFail(bb,stmt,"IRExpr.GetI.descr: invalid descr");
4207          break;
4208       case Iex_Qop: {
4209          IRType ttarg1, ttarg2, ttarg3, ttarg4;
4210          const IRQop* qop = expr->Iex.Qop.details;
4211          tcExpr(bb,stmt, qop->arg1, gWordTy );
4212          tcExpr(bb,stmt, qop->arg2, gWordTy );
4213          tcExpr(bb,stmt, qop->arg3, gWordTy );
4214          tcExpr(bb,stmt, qop->arg4, gWordTy );
4215          typeOfPrimop(qop->op,
4216                       &t_dst, &t_arg1, &t_arg2, &t_arg3, &t_arg4);
4217          if (t_arg1 == Ity_INVALID || t_arg2 == Ity_INVALID
4218              || t_arg3 == Ity_INVALID || t_arg4 == Ity_INVALID) {
4219             vex_printf(" op name: " );
4220             ppIROp(qop->op);
4221             vex_printf("\n");
4222             sanityCheckFail(bb,stmt,
4223                "Iex.Qop: wrong arity op\n"
4224                "... name of op precedes BB printout\n");
4225          }
4226          ttarg1 = typeOfIRExpr(tyenv, qop->arg1);
4227          ttarg2 = typeOfIRExpr(tyenv, qop->arg2);
4228          ttarg3 = typeOfIRExpr(tyenv, qop->arg3);
4229          ttarg4 = typeOfIRExpr(tyenv, qop->arg4);
4230          if (t_arg1 != ttarg1 || t_arg2 != ttarg2
4231              || t_arg3 != ttarg3 || t_arg4 != ttarg4) {
4232             vex_printf(" op name: ");
4233             ppIROp(qop->op);
4234             vex_printf("\n");
4235             vex_printf(" op type is (");
4236             ppIRType(t_arg1);
4237             vex_printf(",");
4238             ppIRType(t_arg2);
4239             vex_printf(",");
4240             ppIRType(t_arg3);
4241             vex_printf(",");
4242             ppIRType(t_arg4);
4243             vex_printf(") -> ");
4244             ppIRType (t_dst);
4245             vex_printf("\narg tys are (");
4246             ppIRType(ttarg1);
4247             vex_printf(",");
4248             ppIRType(ttarg2);
4249             vex_printf(",");
4250             ppIRType(ttarg3);
4251             vex_printf(",");
4252             ppIRType(ttarg4);
4253             vex_printf(")\n");
4254             sanityCheckFail(bb,stmt,
4255                "Iex.Qop: arg tys don't match op tys\n"
4256                "... additional details precede BB printout\n");
4257          }
4258          break;
4259       }
4260       case Iex_Triop: {
4261          IRType ttarg1, ttarg2, ttarg3;
4262          const IRTriop *triop = expr->Iex.Triop.details;
4263          tcExpr(bb,stmt, triop->arg1, gWordTy );
4264          tcExpr(bb,stmt, triop->arg2, gWordTy );
4265          tcExpr(bb,stmt, triop->arg3, gWordTy );
4266          typeOfPrimop(triop->op,
4267                       &t_dst, &t_arg1, &t_arg2, &t_arg3, &t_arg4);
4268          if (t_arg1 == Ity_INVALID || t_arg2 == Ity_INVALID
4269              || t_arg3 == Ity_INVALID || t_arg4 != Ity_INVALID) {
4270             vex_printf(" op name: " );
4271             ppIROp(triop->op);
4272             vex_printf("\n");
4273             sanityCheckFail(bb,stmt,
4274                "Iex.Triop: wrong arity op\n"
4275                "... name of op precedes BB printout\n");
4276          }
4277          ttarg1 = typeOfIRExpr(tyenv, triop->arg1);
4278          ttarg2 = typeOfIRExpr(tyenv, triop->arg2);
4279          ttarg3 = typeOfIRExpr(tyenv, triop->arg3);
4280          if (t_arg1 != ttarg1 || t_arg2 != ttarg2 || t_arg3 != ttarg3) {
4281             vex_printf(" op name: ");
4282             ppIROp(triop->op);
4283             vex_printf("\n");
4284             vex_printf(" op type is (");
4285             ppIRType(t_arg1);
4286             vex_printf(",");
4287             ppIRType(t_arg2);
4288             vex_printf(",");
4289             ppIRType(t_arg3);
4290             vex_printf(") -> ");
4291             ppIRType (t_dst);
4292             vex_printf("\narg tys are (");
4293             ppIRType(ttarg1);
4294             vex_printf(",");
4295             ppIRType(ttarg2);
4296             vex_printf(",");
4297             ppIRType(ttarg3);
4298             vex_printf(")\n");
4299             sanityCheckFail(bb,stmt,
4300                "Iex.Triop: arg tys don't match op tys\n"
4301                "... additional details precede BB printout\n");
4302          }
4303          break;
4304       }
4305       case Iex_Binop: {
4306          IRType ttarg1, ttarg2;
4307          tcExpr(bb,stmt, expr->Iex.Binop.arg1, gWordTy );
4308          tcExpr(bb,stmt, expr->Iex.Binop.arg2, gWordTy );
4309          typeOfPrimop(expr->Iex.Binop.op,
4310                       &t_dst, &t_arg1, &t_arg2, &t_arg3, &t_arg4);
4311          if (t_arg1 == Ity_INVALID || t_arg2 == Ity_INVALID
4312              || t_arg3 != Ity_INVALID || t_arg4 != Ity_INVALID) {
4313             vex_printf(" op name: " );
4314             ppIROp(expr->Iex.Binop.op);
4315             vex_printf("\n");
4316             sanityCheckFail(bb,stmt,
4317                "Iex.Binop: wrong arity op\n"
4318                "... name of op precedes BB printout\n");
4319          }
4320          ttarg1 = typeOfIRExpr(tyenv, expr->Iex.Binop.arg1);
4321          ttarg2 = typeOfIRExpr(tyenv, expr->Iex.Binop.arg2);
4322          if (t_arg1 != ttarg1 || t_arg2 != ttarg2) {
4323             vex_printf(" op name: ");
4324             ppIROp(expr->Iex.Binop.op);
4325             vex_printf("\n");
4326             vex_printf(" op type is (");
4327             ppIRType(t_arg1);
4328             vex_printf(",");
4329             ppIRType(t_arg2);
4330             vex_printf(") -> ");
4331             ppIRType (t_dst);
4332             vex_printf("\narg tys are (");
4333             ppIRType(ttarg1);
4334             vex_printf(",");
4335             ppIRType(ttarg2);
4336             vex_printf(")\n");
4337             sanityCheckFail(bb,stmt,
4338                "Iex.Binop: arg tys don't match op tys\n"
4339                "... additional details precede BB printout\n");
4340          }
4341          break;
4342       }
4343       case Iex_Unop:
4344          tcExpr(bb,stmt, expr->Iex.Unop.arg, gWordTy );
4345          typeOfPrimop(expr->Iex.Unop.op,
4346                       &t_dst, &t_arg1, &t_arg2, &t_arg3, &t_arg4);
4347          if (t_arg1 == Ity_INVALID || t_arg2 != Ity_INVALID
4348              || t_arg3 != Ity_INVALID || t_arg4 != Ity_INVALID)
4349             sanityCheckFail(bb,stmt,"Iex.Unop: wrong arity op");
4350          if (t_arg1 != typeOfIRExpr(tyenv, expr->Iex.Unop.arg))
4351             sanityCheckFail(bb,stmt,"Iex.Unop: arg ty doesn't match op ty");
4352          break;
4353       case Iex_Load:
4354          tcExpr(bb,stmt, expr->Iex.Load.addr, gWordTy);
4355          if (typeOfIRExpr(tyenv, expr->Iex.Load.addr) != gWordTy)
4356             sanityCheckFail(bb,stmt,"Iex.Load.addr: not :: guest word type");
4357          if (expr->Iex.Load.end != Iend_LE && expr->Iex.Load.end != Iend_BE)
4358             sanityCheckFail(bb,stmt,"Iex.Load.end: bogus endianness");
4359          break;
4360       case Iex_CCall:
4361          if (!saneIRCallee(expr->Iex.CCall.cee))
4362             sanityCheckFail(bb,stmt,"Iex.CCall.cee: bad IRCallee");
4363          if (expr->Iex.CCall.cee->regparms > countArgs(expr->Iex.CCall.args))
4364             sanityCheckFail(bb,stmt,"Iex.CCall.cee: #regparms > #args");
4365          for (i = 0; expr->Iex.CCall.args[i]; i++) {
4366             if (i >= 32)
4367                sanityCheckFail(bb,stmt,"Iex.CCall: > 32 args");
4368             IRExpr* arg = expr->Iex.CCall.args[i];
4369             if (UNLIKELY(is_IRExpr_VECRET_or_GSPTR(arg)))
4370                sanityCheckFail(bb,stmt,"Iex.CCall.args: is VECRET/GSPTR");
4371             tcExpr(bb,stmt, arg, gWordTy);
4372          }
4373          if (expr->Iex.CCall.retty == Ity_I1)
4374             sanityCheckFail(bb,stmt,"Iex.CCall.retty: cannot return :: Ity_I1");
4375          for (i = 0; expr->Iex.CCall.args[i]; i++)
4376             if (typeOfIRExpr(tyenv, expr->Iex.CCall.args[i]) == Ity_I1)
4377                sanityCheckFail(bb,stmt,"Iex.CCall.arg: arg :: Ity_I1");
4378          break;
4379       case Iex_Const:
4380          if (!saneIRConst(expr->Iex.Const.con))
4381             sanityCheckFail(bb,stmt,"Iex.Const.con: invalid const");
4382          break;
4383       case Iex_ITE:
4384          tcExpr(bb,stmt, expr->Iex.ITE.cond, gWordTy);
4385          tcExpr(bb,stmt, expr->Iex.ITE.iftrue, gWordTy);
4386          tcExpr(bb,stmt, expr->Iex.ITE.iffalse, gWordTy);
4387          if (typeOfIRExpr(tyenv, expr->Iex.ITE.cond) != Ity_I1)
4388             sanityCheckFail(bb,stmt,"Iex.ITE.cond: cond :: Ity_I1");
4389          if (typeOfIRExpr(tyenv, expr->Iex.ITE.iftrue)
4390              != typeOfIRExpr(tyenv, expr->Iex.ITE.iffalse))
4391             sanityCheckFail(bb,stmt,"Iex.ITE: iftrue/iffalse mismatch");
4392          break;
4393       default:
4394          vpanic("tcExpr");
4395    }
4396 }
4397
4398
4399 static
4400 void tcStmt ( const IRSB* bb, const IRStmt* stmt, IRType gWordTy )
4401 {
4402    Int        i;
4403    IRType     tyExpd, tyData;
4404    const IRTypeEnv* tyenv = bb->tyenv;
4405    switch (stmt->tag) {
4406       case Ist_IMark:
4407          /* Somewhat heuristic, but rule out totally implausible
4408             instruction sizes and deltas. */
4409          if (stmt->Ist.IMark.len > 24)
4410             sanityCheckFail(bb,stmt,"IRStmt.IMark.len: implausible");
4411          if (stmt->Ist.IMark.delta > 1)
4412             sanityCheckFail(bb,stmt,"IRStmt.IMark.delta: implausible");
4413          break;
4414       case Ist_AbiHint:
4415          if (typeOfIRExpr(tyenv, stmt->Ist.AbiHint.base) != gWordTy)
4416             sanityCheckFail(bb,stmt,"IRStmt.AbiHint.base: "
4417                                     "not :: guest word type");
4418          if (typeOfIRExpr(tyenv, stmt->Ist.AbiHint.nia) != gWordTy)
4419             sanityCheckFail(bb,stmt,"IRStmt.AbiHint.nia: "
4420                                     "not :: guest word type");
4421          break;
4422       case Ist_Put:
4423          tcExpr( bb, stmt, stmt->Ist.Put.data, gWordTy );
4424          if (typeOfIRExpr(tyenv,stmt->Ist.Put.data) == Ity_I1)
4425             sanityCheckFail(bb,stmt,"IRStmt.Put.data: cannot Put :: Ity_I1");
4426          break;
4427       case Ist_PutI:{
4428          const IRPutI* puti = stmt->Ist.PutI.details;
4429          tcExpr( bb, stmt, puti->data, gWordTy );
4430          tcExpr( bb, stmt, puti->ix, gWordTy );
4431          if (typeOfIRExpr(tyenv,puti->data) == Ity_I1)
4432             sanityCheckFail(bb,stmt,"IRStmt.PutI.data: cannot PutI :: Ity_I1");
4433          if (typeOfIRExpr(tyenv,puti->data)
4434              != puti->descr->elemTy)
4435             sanityCheckFail(bb,stmt,"IRStmt.PutI.data: data ty != elem ty");
4436          if (typeOfIRExpr(tyenv,puti->ix) != Ity_I32)
4437             sanityCheckFail(bb,stmt,"IRStmt.PutI.ix: not :: Ity_I32");
4438          if (!saneIRRegArray(puti->descr))
4439             sanityCheckFail(bb,stmt,"IRStmt.PutI.descr: invalid descr");
4440          break;
4441       }
4442       case Ist_WrTmp:
4443          tcExpr( bb, stmt, stmt->Ist.WrTmp.data, gWordTy );
4444          if (typeOfIRTemp(tyenv, stmt->Ist.WrTmp.tmp)
4445              != typeOfIRExpr(tyenv, stmt->Ist.WrTmp.data))
4446             sanityCheckFail(bb,stmt,
4447                             "IRStmt.Put.Tmp: tmp and expr do not match");
4448          break;
4449       case Ist_Store:
4450          tcExpr( bb, stmt, stmt->Ist.Store.addr, gWordTy );
4451          tcExpr( bb, stmt, stmt->Ist.Store.data, gWordTy );
4452          if (typeOfIRExpr(tyenv, stmt->Ist.Store.addr) != gWordTy)
4453             sanityCheckFail(bb,stmt,
4454                             "IRStmt.Store.addr: not :: guest word type");
4455          if (typeOfIRExpr(tyenv, stmt->Ist.Store.data) == Ity_I1)
4456             sanityCheckFail(bb,stmt,
4457                             "IRStmt.Store.data: cannot Store :: Ity_I1");
4458          if (stmt->Ist.Store.end != Iend_LE && stmt->Ist.Store.end != Iend_BE)
4459             sanityCheckFail(bb,stmt,"Ist.Store.end: bogus endianness");
4460          break;
4461       case Ist_StoreG: {
4462          const IRStoreG* sg = stmt->Ist.StoreG.details;
4463          tcExpr( bb, stmt, sg->addr, gWordTy );
4464          tcExpr( bb, stmt, sg->data, gWordTy );
4465          tcExpr( bb, stmt, sg->guard, gWordTy );
4466          if (typeOfIRExpr(tyenv, sg->addr) != gWordTy)
4467             sanityCheckFail(bb,stmt,"IRStmtG...addr: not :: guest word type");
4468          if (typeOfIRExpr(tyenv, sg->data) == Ity_I1)
4469             sanityCheckFail(bb,stmt,"IRStmtG...data: cannot Store :: Ity_I1");
4470          if (typeOfIRExpr(tyenv, sg->guard) != Ity_I1)
4471             sanityCheckFail(bb,stmt,"IRStmtG...guard: not :: Ity_I1");
4472          if (sg->end != Iend_LE && sg->end != Iend_BE)
4473             sanityCheckFail(bb,stmt,"IRStmtG...end: bogus endianness");
4474          break;
4475       }
4476       case Ist_LoadG: {
4477          const IRLoadG* lg = stmt->Ist.LoadG.details;
4478          tcExpr( bb, stmt, lg->addr, gWordTy );
4479          tcExpr( bb, stmt, lg->alt, gWordTy );
4480          tcExpr( bb, stmt, lg->guard, gWordTy );
4481          if (typeOfIRExpr(tyenv, lg->guard) != Ity_I1)
4482             sanityCheckFail(bb,stmt,"IRStmt.LoadG.guard: not :: Ity_I1");
4483          if (typeOfIRExpr(tyenv, lg->addr) != gWordTy)
4484               sanityCheckFail(bb,stmt,"IRStmt.LoadG.addr: not "
4485                                       ":: guest word type");
4486          if (typeOfIRExpr(tyenv, lg->alt) != typeOfIRTemp(tyenv, lg->dst))
4487              sanityCheckFail(bb,stmt,"IRStmt.LoadG: dst/alt type mismatch");
4488          IRType cvtRes = Ity_INVALID, cvtArg = Ity_INVALID;
4489          typeOfIRLoadGOp(lg->cvt, &cvtRes, &cvtArg);
4490          if (cvtRes != typeOfIRTemp(tyenv, lg->dst))
4491             sanityCheckFail(bb,stmt,"IRStmt.LoadG: dst/loaded type mismatch");
4492          break;
4493       }
4494       case Ist_CAS: {
4495          const IRCAS* cas = stmt->Ist.CAS.details;
4496          /* make sure it's definitely either a CAS or a DCAS */
4497          if (cas->oldHi == IRTemp_INVALID
4498              && cas->expdHi == NULL && cas->dataHi == NULL) {
4499             /* fine; it's a single cas */
4500          }
4501          else
4502          if (cas->oldHi != IRTemp_INVALID
4503              && cas->expdHi != NULL && cas->dataHi != NULL) {
4504             /* fine; it's a double cas */
4505          }
4506          else {
4507             /* it's some el-mutanto hybrid */
4508             goto bad_cas;
4509          }
4510          /* check the address type */
4511          tcExpr( bb, stmt, cas->addr, gWordTy );
4512          if (typeOfIRExpr(tyenv, cas->addr) != gWordTy) goto bad_cas;
4513          /* check types on the {old,expd,data}Lo components agree */
4514          tyExpd = typeOfIRExpr(tyenv, cas->expdLo);
4515          tyData = typeOfIRExpr(tyenv, cas->dataLo);
4516          if (tyExpd != tyData) goto bad_cas;
4517          if (tyExpd != typeOfIRTemp(tyenv, cas->oldLo))
4518             goto bad_cas;
4519          /* check the base element type is sane */
4520          if (tyExpd == Ity_I8 || tyExpd == Ity_I16 || tyExpd == Ity_I32
4521              || (gWordTy == Ity_I64 && tyExpd == Ity_I64)) {
4522             /* fine */
4523          } else {
4524             goto bad_cas;
4525          }
4526          /* If it's a DCAS, check types on the {old,expd,data}Hi
4527             components too */
4528          if (cas->oldHi != IRTemp_INVALID) {
4529             tyExpd = typeOfIRExpr(tyenv, cas->expdHi);
4530             tyData = typeOfIRExpr(tyenv, cas->dataHi);
4531             if (tyExpd != tyData) goto bad_cas;
4532             if (tyExpd != typeOfIRTemp(tyenv, cas->oldHi))
4533                goto bad_cas;
4534             /* and finally check that oldLo and oldHi have the same
4535                type.  This forces equivalence amongst all 6 types. */
4536             if (typeOfIRTemp(tyenv, cas->oldHi)
4537                 != typeOfIRTemp(tyenv, cas->oldLo))
4538                goto bad_cas;
4539          }
4540          break;
4541          bad_cas:
4542          sanityCheckFail(bb,stmt,"IRStmt.CAS: ill-formed");
4543          break;
4544       }
4545       case Ist_LLSC: {
4546          IRType tyRes;
4547          if (typeOfIRExpr(tyenv, stmt->Ist.LLSC.addr) != gWordTy)
4548             sanityCheckFail(bb,stmt,"IRStmt.LLSC.addr: not :: guest word type");
4549          if (stmt->Ist.LLSC.end != Iend_LE && stmt->Ist.LLSC.end != Iend_BE)
4550             sanityCheckFail(bb,stmt,"Ist.LLSC.end: bogus endianness");
4551          tyRes = typeOfIRTemp(tyenv, stmt->Ist.LLSC.result);
4552          if (stmt->Ist.LLSC.storedata == NULL) {
4553             /* it's a LL */
4554             if (tyRes != Ity_I64 && tyRes != Ity_I32
4555                 && tyRes != Ity_I16 && tyRes != Ity_I8)
4556                sanityCheckFail(bb,stmt,"Ist.LLSC(LL).result :: bogus");
4557          } else {
4558             /* it's a SC */
4559             if (tyRes != Ity_I1)
4560                sanityCheckFail(bb,stmt,"Ist.LLSC(SC).result: not :: Ity_I1");
4561             tyData = typeOfIRExpr(tyenv, stmt->Ist.LLSC.storedata);
4562             if (tyData != Ity_I64 && tyData != Ity_I32
4563                 && tyData != Ity_I16 && tyData != Ity_I8)
4564                sanityCheckFail(bb,stmt,
4565                                "Ist.LLSC(SC).result :: storedata bogus");
4566          }
4567          break;
4568       }
4569       case Ist_Dirty: {
4570          /* Mostly check for various kinds of ill-formed dirty calls. */
4571          const IRDirty* d = stmt->Ist.Dirty.details;
4572          if (d->cee == NULL) goto bad_dirty;
4573          if (!saneIRCallee(d->cee)) goto bad_dirty;
4574          if (d->cee->regparms > countArgs(d->args)) goto bad_dirty;
4575          if (d->mFx == Ifx_None) {
4576             if (d->mAddr != NULL || d->mSize != 0)
4577                goto bad_dirty;
4578          } else {
4579             if (d->mAddr == NULL || d->mSize == 0)
4580                goto bad_dirty;
4581          }
4582          if (d->nFxState < 0 || d->nFxState > VEX_N_FXSTATE)
4583             goto bad_dirty;
4584          for (i = 0; i < d->nFxState; i++) {
4585             if (d->fxState[i].fx == Ifx_None) goto bad_dirty;
4586             if (d->fxState[i].size <= 0) goto bad_dirty;
4587             if (d->fxState[i].nRepeats == 0) {
4588                if (d->fxState[i].repeatLen != 0) goto bad_dirty;
4589             } else {
4590                if (d->fxState[i].repeatLen <= d->fxState[i].size)
4591                   goto bad_dirty;
4592                /* the % is safe because of the .size check above */
4593                if ((d->fxState[i].repeatLen % d->fxState[i].size) != 0)
4594                   goto bad_dirty;
4595             }
4596          }
4597          /* check guard */
4598          if (d->guard == NULL) goto bad_dirty;
4599          tcExpr( bb, stmt, d->guard, gWordTy );
4600          if (typeOfIRExpr(tyenv, d->guard) != Ity_I1)
4601             sanityCheckFail(bb,stmt,"IRStmt.Dirty.guard not :: Ity_I1");
4602          /* check types, minimally */
4603          IRType retTy = Ity_INVALID;
4604          if (d->tmp != IRTemp_INVALID) {
4605             retTy = typeOfIRTemp(tyenv, d->tmp);
4606             if (retTy == Ity_I1)
4607                sanityCheckFail(bb,stmt,"IRStmt.Dirty.dst :: Ity_I1");
4608          }
4609          UInt nVECRETs = 0, nGSPTRs = 0;
4610          for (i = 0; d->args[i] != NULL; i++) {
4611             if (i >= 32)
4612                sanityCheckFail(bb,stmt,"IRStmt.Dirty: > 32 args");
4613             const IRExpr* arg = d->args[i];
4614             if (UNLIKELY(arg->tag == Iex_VECRET)) {
4615                nVECRETs++;
4616             } else if (UNLIKELY(arg->tag == Iex_GSPTR)) {
4617                nGSPTRs++;
4618             } else {
4619                if (typeOfIRExpr(tyenv, arg) == Ity_I1)
4620                   sanityCheckFail(bb,stmt,"IRStmt.Dirty.arg[i] :: Ity_I1");
4621             }
4622             if (nGSPTRs > 1) {
4623                sanityCheckFail(bb,stmt,"IRStmt.Dirty.args: > 1 GSPTR arg");
4624             }
4625             if (nVECRETs == 1) {
4626                /* Fn must return V128 or V256. */
4627                if (retTy != Ity_V128 && retTy != Ity_V256)
4628                   sanityCheckFail(bb,stmt,
4629                                   "IRStmt.Dirty.args: VECRET present, "
4630                                   "but fn does not return V128 or V256");
4631             } else if (nVECRETs == 0) {
4632                /* Fn must not return V128 or V256 */
4633                if (retTy == Ity_V128 || retTy == Ity_V256)
4634                   sanityCheckFail(bb,stmt,
4635                                   "IRStmt.Dirty.args: VECRET not present, "
4636                                   "but fn returns V128 or V256");
4637             } else {
4638                sanityCheckFail(bb,stmt,
4639                                "IRStmt.Dirty.args: > 1 VECRET present");
4640             }
4641          }
4642          if (nGSPTRs > 1) {
4643             sanityCheckFail(bb,stmt,
4644                             "IRStmt.Dirty.args: > 1 GSPTR present");
4645          }
4646          /* If you ask for the baseblock pointer, you have to make
4647             some declaration about access to the guest state too. */
4648          if (d->nFxState == 0 && nGSPTRs != 0) {
4649             sanityCheckFail(bb,stmt,
4650                             "IRStmt.Dirty.args: GSPTR requested, "
4651                             "but no fxState declared");
4652          }
4653         break;
4654          bad_dirty:
4655          sanityCheckFail(bb,stmt,"IRStmt.Dirty: ill-formed");
4656          break;
4657       }
4658       case Ist_NoOp:
4659          break;
4660       case Ist_MBE:
4661          switch (stmt->Ist.MBE.event) {
4662             case Imbe_Fence: case Imbe_CancelReservation:
4663                break;
4664             default: sanityCheckFail(bb,stmt,"IRStmt.MBE.event: unknown");
4665                break;
4666          }
4667          break;
4668       case Ist_Exit:
4669          tcExpr( bb, stmt, stmt->Ist.Exit.guard, gWordTy );
4670          if (typeOfIRExpr(tyenv,stmt->Ist.Exit.guard) != Ity_I1)
4671             sanityCheckFail(bb,stmt,"IRStmt.Exit.guard: not :: Ity_I1");
4672          if (!saneIRConst(stmt->Ist.Exit.dst))
4673             sanityCheckFail(bb,stmt,"IRStmt.Exit.dst: bad dst");
4674          if (typeOfIRConst(stmt->Ist.Exit.dst) != gWordTy)
4675             sanityCheckFail(bb,stmt,"IRStmt.Exit.dst: not :: guest word type");
4676          /* because it would intersect with host_EvC_* */
4677          if (stmt->Ist.Exit.offsIP < 16)
4678             sanityCheckFail(bb,stmt,"IRStmt.Exit.offsIP: too low");
4679          break;
4680       default:
4681          vpanic("tcStmt");
4682    }
4683 }
4684
4685 void sanityCheckIRSB ( const IRSB* bb, const HChar* caller,
4686                        Bool require_flat, IRType guest_word_size )
4687 {
4688    Int     i;
4689    Int     n_temps    = bb->tyenv->types_used;
4690    Int*    def_counts = LibVEX_Alloc_inline(n_temps * sizeof(Int));
4691
4692    if (0)
4693       vex_printf("sanityCheck: %s\n", caller);
4694
4695    vassert(guest_word_size == Ity_I32
4696            || guest_word_size == Ity_I64);
4697
4698    if (bb->stmts_used < 0 || bb->stmts_size < 8
4699        || bb->stmts_used > bb->stmts_size)
4700       /* this BB is so strange we can't even print it */
4701       vpanic("sanityCheckIRSB: stmts array limits wierd");
4702
4703    /* Ensure each temp has a plausible type. */
4704    for (i = 0; i < n_temps; i++) {
4705       IRType ty = typeOfIRTemp(bb->tyenv,(IRTemp)i);
4706       if (!isPlausibleIRType(ty)) {
4707          vex_printf("Temp t%d declared with implausible type 0x%x\n",
4708                     i, (UInt)ty);
4709          sanityCheckFail(bb,NULL,"Temp declared with implausible type");
4710       }
4711    }
4712
4713    const IRStmt* stmt;
4714
4715    /* Check for flatness, if required. */
4716    if (require_flat) {
4717       for (i = 0; i < bb->stmts_used; i++) {
4718          stmt = bb->stmts[i];
4719          if (!stmt)
4720             sanityCheckFail(bb, stmt, "IRStmt: is NULL");
4721          if (!isFlatIRStmt(stmt))
4722             sanityCheckFail(bb, stmt, "IRStmt: is not flat");
4723       }
4724       if (!isIRAtom(bb->next))
4725          sanityCheckFail(bb, NULL, "bb->next is not an atom");
4726    }
4727
4728    /* Count the defs of each temp.  Only one def is allowed.
4729       Also, check that each used temp has already been defd. */
4730
4731    for (i = 0; i < n_temps; i++)
4732       def_counts[i] = 0;
4733
4734    for (i = 0; i < bb->stmts_used; i++) {
4735       stmt = bb->stmts[i];
4736       /* Check any temps used by this statement. */
4737       useBeforeDef_Stmt(bb,stmt,def_counts);
4738
4739       /* Now make note of any temps defd by this statement. */
4740       assignedOnce_Stmt(bb, stmt, def_counts, n_temps);
4741    }
4742
4743    /* Typecheck everything. */
4744    for (i = 0; i < bb->stmts_used; i++)
4745       tcStmt(bb, bb->stmts[i], guest_word_size);
4746    if (typeOfIRExpr(bb->tyenv,bb->next) != guest_word_size)
4747       sanityCheckFail(bb, NULL, "bb->next field has wrong type");
4748    /* because it would intersect with host_EvC_* */
4749    if (bb->offsIP < 16)
4750       sanityCheckFail(bb, NULL, "bb->offsIP: too low");
4751 }
4752
4753 /*---------------------------------------------------------------*/
4754 /*--- Misc helper functions                                   ---*/
4755 /*---------------------------------------------------------------*/
4756
4757 Bool eqIRConst ( const IRConst* c1, const IRConst* c2 )
4758 {
4759    if (c1->tag != c2->tag)
4760       return False;
4761
4762    switch (c1->tag) {
4763       case Ico_U1:  return toBool( (1 & c1->Ico.U1) == (1 & c2->Ico.U1) );
4764       case Ico_U8:  return toBool( c1->Ico.U8  == c2->Ico.U8 );
4765       case Ico_U16: return toBool( c1->Ico.U16 == c2->Ico.U16 );
4766       case Ico_U32: return toBool( c1->Ico.U32 == c2->Ico.U32 );
4767       case Ico_U64: return toBool( c1->Ico.U64 == c2->Ico.U64 );
4768       case Ico_F32: return toBool( c1->Ico.F32 == c2->Ico.F32 );
4769       case Ico_F32i: return toBool( c1->Ico.F32i == c2->Ico.F32i );
4770       case Ico_F64: return toBool( c1->Ico.F64 == c2->Ico.F64 );
4771       case Ico_F64i: return toBool( c1->Ico.F64i == c2->Ico.F64i );
4772       case Ico_V128: return toBool( c1->Ico.V128 == c2->Ico.V128 );
4773       case Ico_V256: return toBool( c1->Ico.V256 == c2->Ico.V256 );
4774       default: vpanic("eqIRConst");
4775    }
4776 }
4777
4778 Bool eqIRRegArray ( const IRRegArray* descr1, const IRRegArray* descr2 )
4779 {
4780    return toBool( descr1->base == descr2->base
4781                   && descr1->elemTy == descr2->elemTy
4782                   && descr1->nElems == descr2->nElems );
4783 }
4784
4785 Int sizeofIRType ( IRType ty )
4786 {
4787    switch (ty) {
4788       case Ity_I8:   return 1;
4789       case Ity_I16:  return 2;
4790       case Ity_I32:  return 4;
4791       case Ity_I64:  return 8;
4792       case Ity_I128: return 16;
4793       case Ity_F16:  return 2;
4794       case Ity_F32:  return 4;
4795       case Ity_F64:  return 8;
4796       case Ity_F128: return 16;
4797       case Ity_D32:  return 4;
4798       case Ity_D64:  return 8;
4799       case Ity_D128: return 16;
4800       case Ity_V128: return 16;
4801       case Ity_V256: return 32;
4802       default: vex_printf("\n"); ppIRType(ty); vex_printf("\n");
4803                vpanic("sizeofIRType");
4804    }
4805 }
4806
4807 IRType integerIRTypeOfSize ( Int szB )
4808 {
4809    switch (szB) {
4810       case 8: return Ity_I64;
4811       case 4: return Ity_I32;
4812       case 2: return Ity_I16;
4813       case 1: return Ity_I8;
4814       default: vpanic("integerIRTypeOfSize");
4815    }
4816 }
4817
4818 IRExpr* mkIRExpr_HWord ( HWord hw )
4819 {
4820    vassert(sizeof(void*) == sizeof(HWord));
4821    if (sizeof(RegWord) == 4)
4822       return IRExpr_Const(IRConst_U32((UInt)hw));
4823    if (sizeof(RegWord) == 8)
4824       return IRExpr_Const(IRConst_U64((ULong)hw));
4825    vpanic("mkIRExpr_HWord");
4826 }
4827
4828 IRDirty* unsafeIRDirty_0_N ( Int regparms, const HChar* name, void* addr,
4829                              IRExpr** args )
4830 {
4831    IRDirty* d = emptyIRDirty();
4832    d->cee   = mkIRCallee ( regparms, name, addr );
4833    d->guard = IRExpr_Const(IRConst_U1(True));
4834    d->args  = args;
4835    return d;
4836 }
4837
4838 IRDirty* unsafeIRDirty_1_N ( IRTemp dst,
4839                              Int regparms, const HChar* name, void* addr,
4840                              IRExpr** args )
4841 {
4842    IRDirty* d = emptyIRDirty();
4843    d->cee   = mkIRCallee ( regparms, name, addr );
4844    d->guard = IRExpr_Const(IRConst_U1(True));
4845    d->args  = args;
4846    d->tmp   = dst;
4847    return d;
4848 }
4849
4850 IRExpr* mkIRExprCCall ( IRType retty,
4851                         Int regparms, const HChar* name, void* addr,
4852                         IRExpr** args )
4853 {
4854    return IRExpr_CCall ( mkIRCallee ( regparms, name, addr ),
4855                          retty, args );
4856 }
4857
4858 Bool eqIRAtom ( const IRExpr* a1, const IRExpr* a2 )
4859 {
4860    vassert(isIRAtom(a1));
4861    vassert(isIRAtom(a2));
4862    if (a1->tag == Iex_RdTmp && a2->tag == Iex_RdTmp)
4863       return toBool(a1->Iex.RdTmp.tmp == a2->Iex.RdTmp.tmp);
4864    if (a1->tag == Iex_Const && a2->tag == Iex_Const)
4865       return eqIRConst(a1->Iex.Const.con, a2->Iex.Const.con);
4866    return False;
4867 }
4868
4869 /*---------------------------------------------------------------*/
4870 /*--- end                                           ir_defs.c ---*/
4871 /*---------------------------------------------------------------*/