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(parent: 046e26e) | patch
add counter, crc and sync
commitf90d8e6ce970f2668163f6bd4a27f592b17adf7d
authormilesdig <mil@norb.it>
Sun, 14 Mar 2010 14:56:47 +0000 (14 15:56 +0100)
committermilesdig <mil@norb.it>
Sun, 14 Mar 2010 14:56:47 +0000 (14 15:56 +0100)
tree92a6733bceeaf7530e6f5694d386766373aff8d0tree | snapshot (tar.gz zip)
parent046e26ec855729031d80679d424796111560e761commit | diff
add counter, crc and sync
bit_synchronizer.vhd [new file with mode: 0644] blob
counter.vhd [new file with mode: 0644] blob
crc16_data32.vhd [new file with mode: 0644] blob
VHDL Snippets from my digital design class