2 " Language: Verilog-AMS
3 " Maintainer: S. Myles Prather <smprather@gmail.com>
4 " Last Update: Sun Aug 14 03:58:00 CST 2003
6 " For version 5.x: Clear all syntax items
7 " For version 6.x: Quit when a syntax file was already loaded
10 elseif exists("b:current_syntax")
14 " Set the local value of the 'iskeyword' option
16 setlocal iskeyword=@,48-57,_,192-255
18 set iskeyword=@,48-57,_,192-255
21 " Annex B.1 'All keywords'
22 syn keyword verilogamsStatement above abs absdelay acos acosh ac_stim
23 syn keyword verilogamsStatement always analog analysis and asin
24 syn keyword verilogamsStatement asinh assign atan atan2 atanh branch
25 syn keyword verilogamsStatement buf bufif1 ceil cmos
26 syn keyword verilogamsStatement connectrules cos cosh cross ddt ddx deassign
27 syn keyword verilogamsStatement defparam disable discipline
28 syn keyword verilogamsStatement driver_update edge enddiscipline
29 syn keyword verilogamsStatement endconnectrules endmodule endfunction
30 syn keyword verilogamsStatement endnature endparamset endprimitive endspecify
31 syn keyword verilogamsStatement endtable endtask event exp final_step
32 syn keyword verilogamsStatement flicker_noise floor flow force fork
33 syn keyword verilogamsStatement function generate genvar highz0
34 syn keyword verilogamsStatement highz1 hypot idt idtmod if ifnone initial
35 syn keyword verilogamsStatement initial_step inout input join
36 syn keyword verilogamsStatement laplace_nd laplace_np laplace_zd laplace_zp
37 syn keyword verilogamsStatement large last_crossing limexp ln localparam log
38 syn keyword verilogamsStatement macromodule max medium min module nand nature
39 syn keyword verilogamsStatement negedge net_resolution nmos noise_table nor not
40 syn keyword verilogamsStatement notif0 notif1 or output paramset pmos
41 syn keyword verilogamsType parameter real integer electrical input output
42 syn keyword verilogamsType inout reg tri tri0 tri1 triand trior trireg
43 syn keyword verilogamsType string from exclude aliasparam ground
44 syn keyword verilogamsStatement posedge potential pow primitive pull0 pull1
45 syn keyword verilogamsStatement pullup pulldown rcmos release
46 syn keyword verilogamsStatement rnmos rpmos rtran rtranif0 rtranif1
47 syn keyword verilogamsStatement scalared sin sinh slew small specify specparam
48 syn keyword verilogamsStatement sqrt strong0 strong1 supply0 supply1
49 syn keyword verilogamsStatement table tan tanh task time timer tran tranif0
50 syn keyword verilogamsStatement tranif1 transition
51 syn keyword verilogamsStatement vectored wait wand weak0 weak1
52 syn keyword verilogamsStatement white_noise wire wor wreal xnor xor zi_nd
53 syn keyword verilogamsStatement zi_np zi_zd
54 syn keyword verilogamsRepeat forever repeat while for
55 syn keyword verilogamsLabel begin end
56 syn keyword verilogamsConditional if else case casex casez default endcase
57 syn match verilogamsConstant ":inf"lc=1
58 syn match verilogamsConstant "-inf"lc=1
59 " Annex B.2 Discipline/nature
60 syn keyword verilogamsStatement abstol access continuous ddt_nature discrete
61 syn keyword verilogamsStatement domain idt_nature units
62 " Annex B.3 Connect Rules
63 syn keyword verilogamsStatement connect merged resolveto split
65 syn match verilogamsOperator "[&|~><!)(*#%@+/=?:;}{,.\^\-\[\]]"
66 syn match verilogamsOperator "<+"
67 syn match verilogamsStatement "[vV]("me=e-1
68 syn match verilogamsStatement "[iI]("me=e-1
70 syn keyword verilogamsTodo contained TODO
71 syn region verilogamsComment start="/\*" end="\*/" contains=verilogamsTodo
72 syn match verilogamsComment "//.*" contains=verilogamsTodo
74 syn match verilogamsGlobal "`celldefine"
75 syn match verilogamsGlobal "`default_nettype"
76 syn match verilogamsGlobal "`define"
77 syn match verilogamsGlobal "`else"
78 syn match verilogamsGlobal "`elsif"
79 syn match verilogamsGlobal "`endcelldefine"
80 syn match verilogamsGlobal "`endif"
81 syn match verilogamsGlobal "`ifdef"
82 syn match verilogamsGlobal "`ifndef"
83 syn match verilogamsGlobal "`include"
84 syn match verilogamsGlobal "`line"
85 syn match verilogamsGlobal "`nounconnected_drive"
86 syn match verilogamsGlobal "`resetall"
87 syn match verilogamsGlobal "`timescale"
88 syn match verilogamsGlobal "`unconnected_drive"
89 syn match verilogamsGlobal "`undef"
90 syn match verilogamsSystask "$[a-zA-Z0-9_]\+\>"
92 syn match verilogamsConstant "\<[A-Z][A-Z0-9_]\+\>"
94 syn match verilogamsNumber "\(\<\d\+\|\)'[bB]\s*[0-1_xXzZ?]\+\>"
95 syn match verilogamsNumber "\(\<\d\+\|\)'[oO]\s*[0-7_xXzZ?]\+\>"
96 syn match verilogamsNumber "\(\<\d\+\|\)'[dD]\s*[0-9_xXzZ?]\+\>"
97 syn match verilogamsNumber "\(\<\d\+\|\)'[hH]\s*[0-9a-fA-F_xXzZ?]\+\>"
98 syn match verilogamsNumber "\<[+-]\=[0-9_]\+\(\.[0-9_]*\|\)\(e[0-9_]*\|\)\>"
100 syn region verilogamsString start=+"+ skip=+\\"+ end=+"+ contains=verilogamsEscape
101 syn match verilogamsEscape +\\[nt"\\]+ contained
102 syn match verilogamsEscape "\\\o\o\=\o\=" contained
104 "Modify the following as needed. The trade-off is performance versus
108 " Define the default highlighting.
109 " For version 5.7 and earlier: only when not done already
110 " For version 5.8 and later: only when an item doesn't have highlighting yet
111 if version >= 508 || !exists("did_verilogams_syn_inits")
113 let did_verilogams_syn_inits = 1
114 command -nargs=+ HiLink hi link <args>
116 command -nargs=+ HiLink hi def link <args>
119 " The default highlighting.
120 HiLink verilogamsCharacter Character
121 HiLink verilogamsConditional Conditional
122 HiLink verilogamsRepeat Repeat
123 HiLink verilogamsString String
124 HiLink verilogamsTodo Todo
125 HiLink verilogamsComment Comment
126 HiLink verilogamsConstant Constant
127 HiLink verilogamsLabel Label
128 HiLink verilogamsNumber Number
129 HiLink verilogamsOperator Special
130 HiLink verilogamsStatement Statement
131 HiLink verilogamsGlobal Define
132 HiLink verilogamsDirective SpecialComment
133 HiLink verilogamsEscape Special
134 HiLink verilogamsType Type
135 HiLink verilogamsSystask Function
140 let b:current_syntax = "verilogams"