3 @The skeleton was generated by VUTGenerator@
4 =======================================
5 module_name: vut_fulladder_1bit
6 ---------------------------------------
9 ---------------------------------------
10 Description: <description>
11 =======================================
14 module vut_fulladder_1bit();
34 reg mem_overflow
[0:3];
47 initial $readmemh("i_a.mem",mem_a
);
48 initial $readmemh("i_b.mem",mem_b
);
49 initial $readmemh("o_result.mem",mem_result
);
50 initial $readmemh("o_overflow.mem",mem_overflow
);
53 $dumpfile ("waveform.vcd");
67 tmp_result
= mem_result
[k
];
68 tmp_overflow
= mem_overflow
[k
];
70 $display("|VUT_OK| > All the signals are right-right!\n\n By Rodrigo Peixoto\n");
78 if (result
!== tmp_result
) begin
79 $display("|VUT_FAIL|> Error in result value at time %0dns!!!",$time);
82 if (overflow
!== tmp_overflow
) begin
83 $display("|VUT_FAIL|> Error in overflow value at time %0dns!!!",$time);