teste
[vutg.git] / src / vut.dtd
blob73ec6baeadf1dcc58aaa47e3aa72508d452cb5e0
1 <?xml version="1.0" encoding="UTF-8"?>
2 <!ELEMENT vut (time_scale, waveform?, gen_with?)>
3 <!ATTLIST vut
4 module_name #PCDATA #REQUIRED>
5 <!ELEMENT time_scale EMPTY>
6 <!ATTLIST time_scale
7 t_div CDATA #REQUIRED
8 unit (s|ms|us|ns|ps) "us" #REQUIRED>
9 <!ELEMENT waveform (#PCDATA)>
10 <!ELEMENT gen_with (python_code*,#PCDATA)>
12 <!ELEMENT python_code (#PCDATA)>
13 <!ATTLIST python_code
14 var CDATA #REQUIRED>
16 --always @ * {overflow,result} = a+b;
18 always @ (posedge clk) begin
19 if (enable)
20 data_out = data_in;
21 if (reset) data_out = 0;
22 end
25 $monitor ("clk=‰b,data_in=‰b,enable=‰b,reset=‰b,data_out=%b at %d", clk,data_in,enable,reset,data_out, $time);