wireless/shared_mbss_mac/mhi_dut.h

   1 /******************************************************************************
   2
   3                                Copyright (c) 2012
   4                             Lantiq Deutschland GmbH
   5
   6   For licensing information, see the file 'LICENSE' in the root folder of
   7   this software module.
   8
   9 ******************************************************************************/
  10 /***************************************************************
  11  File:  mhi_dut.h
  12  Module:        Dut
  13  Purpose:
  14  Description:
  15 ***************************************************************/
  16 #ifndef __MHI_DUT_INCLUDED_H
  17 #define __MHI_DUT_INCLUDED_H
  18 //---------------------------------------------------------------------------------
  19 //                                              Includes
  20 //---------------------------------------------------------------------------------
  21 #include "mhi_ieee_address.h"
  22 #include "mhi_mib_id.h"
  23
  24 #define   MTLK_PACK_ON
  25 #include "mtlkpack.h"
  26
  27 //---------------------------------------------------------------------------------
  28 //                                              Defines
  29 //---------------------------------------------------------------------------------
  30 #define TPC_ARRAY_SIZE                                  (3)
  31 #define DUT_ANT_VALUES_ARRAY_SIZE               (3)
  32
  33 #define BIST_RESULTS_ARRAY_SIZE                 (7)
  34
  35 #define UMI_DEBUG_BLOCK_SIZE            (384)
  36 #define UMI_C100_DATA_SIZE   (UMI_DEBUG_BLOCK_SIZE - (sizeof(uint16) + sizeof(uint16) + sizeof(C100_MSG_HEADER)))
  37 #define UMI_DEBUG_DATA_SIZE  (UMI_DEBUG_BLOCK_SIZE - (sizeof(uint16) + sizeof(uint16)))
  38
  39 #define DUT_MSG_DATA_LENGTH                             (376)
  40 #define MAX_DUT_EEPROM_ACCESS_SIZE (DUT_MSG_DATA_LENGTH-16)
  41
  42 typedef enum dutChipModule
  43 {
  44         DUT_CHIP_MODULE_UMAC_MEM        = 1,
  45         DUT_CHIP_MODULE_LMAC_MEM,
  46         DUT_CHIP_MODULE_PHY,
  47         DUT_CHIP_MODULE_RF,
  48         DUT_CHIP_MODULE_AFE,
  49 } dutChipModule_e;
  50
  51 typedef enum dutNvMemoryType
  52 {
  53         DUT_NV_MEMORY_EEPROM            = 1,
  54         DUT_NV_MEMORY_FLASH                     = 2,
  55         DUT_NV_MEMORY_EFUSE                     = 3,
  56 } dutNvMemoryType_e;
  57
  58 typedef enum dutChipVar
  59 {
  60         DUT_CHIP_VAR_TPC_FREQ           = 31,
  61
  62 } dutChipVar_e;
  63
  64 typedef enum dutRiscMode
  65 {
  66         DUT_RISC_STOP  = 0,
  67         DUT_RISC_START
  68 } dutRiscMode_e;
  69
  70 //---------------------------------------------
  71 //              Dut Message Definition
  72 //---------------------------------------------
  73 typedef enum{
  74         // Dut Mngmnt Module Messages
  75         DUT_HW_DEPENDENT_CONFIG_REQ = 2,
  76         DUT_HW_DEPENDENT_CONFIG_CFM,
  77         DUT_CONFIGURE_REQ,
  78         DUT_CONFIGURE_CFM,
  79         DUT_SET_CAHNNEL_REQ,
  80         DUT_SET_CAHNNEL_CFM,
  81         DUT_READ_EEPROM_REQ,
  82         DUT_READ_EEPROM_CFM,
  83         DUT_WRITE_EEPROM_REQ,
  84         DUT_WRITE_EEPROM_CFM,
  85         DUT_READ_BIST_RESULTS_REQ,
  86         DUT_READ_BIST_RESULTS_CFM,
  87         DUT_READ_MEMORY_REQ,
  88         DUT_READ_MEMORY_CFM,
  89         DUT_WRITE_MEMORY_REQ,
  90         DUT_WRITE_MEMORY_CFM,
  91         DUT_WRITE_SECURED_REGISTER_REQ,
  92         DUT_WRITE_SECURED_REGISTER_CFM,
  93         DUT_READ_FREQ_TPC_STRUCTS_REQ,
  94         DUT_READ_FREQ_TPC_STRUCTS_CFM,
  95         DUT_RUN_CALIBRATION_REQ,
  96         DUT_RUN_CALIBRATION_CFM,
  97         DUT_STOP_FW_REQ,
  98         DUT_STOP_FW_CFM,
  99         DUT_READ_CALIBRATION_RESULTS_REQ, //New - Optional
 100         DUT_READ_CALIBRATION_RESULTS_CFM, //New - Optional
 101
 102         // Dut Hw Acces Module Messages
 103         DUT_READ_CHIP_VERSION_REQ = 0x100,
 104         DUT_READ_CHIP_VERSION_CFM,
 105         DUT_READ_GENRISC_VERSION_REQ ,
 106         DUT_READ_GENRISC_VERSION_CFM,
 107         DUT_ENABLE_TX_ANTENNA_REQ,
 108         DUT_ENABLE_TX_ANTENNA_CFM,
 109         DUT_ENABLE_RX_ANTENNA_REQ,
 110         DUT_ENABLE_RX_ANTENNA_CFM,
 111         DUT_SET_DEFAULT_ANTENNA_SET_REQ,
 112         DUT_SET_DEFAULT_ANTENNA_SET_CFM,
 113         DUT_TX_TONE_REQ,
 114         DUT_TX_TONE_CFM,
 115         DUT_TX_SPACELESS_REQ,
 116         DUT_TX_SPACELESS_CFM,
 117         DUT_SET_SCRAMBLER_MODE_REQ,
 118         DUT_SET_SCRAMBLER_MODE_CFM,
 119         DUT_SET_IFS_REQ,
 120         DUT_SET_IFS_CFM,
 121         DUT_SET_TPC_REQ,
 122         DUT_SET_TPC_CFM,
 123         DUT_READ_PACKET_COUNTERS_REQ,
 124         DUT_READ_PACKET_COUNTERS_CFM,
 125     DUT_SET_TX_POWER_LIMIT_REQ,
 126     DUT_SET_TX_POWER_LIMIT_CFM,
 127         DUT_SET_RISC_MODE_REQ,
 128         DUT_SET_RISC_MODE_CFM,
 129         //RFIC
 130         DUT_GET_TX_POWER_FEEDBACK_REQ,
 131         DUT_GET_TX_POWER_FEEDBACK_CFM,
 132         DUT_SET_TX_GAINS_REQ,
 133         DUT_SET_TX_GAINS_CFM,
 134         DUT_GET_TX_GAINS_REQ,
 135         DUT_GET_TX_GAINS_CFM,
 136         DUT_GET_RX_GAINS_REQ,
 137         DUT_GET_RX_GAINS_CFM,
 138         DUT_GET_XTAL_VALUE_REQ,
 139         DUT_GET_XTAL_VALUE_CFM,
 140         DUT_SET_XTAL_VALUE_REQ,
 141         DUT_SET_XTAL_VALUE_CFM,
 142         DUT_GET_RSSI_REQ,
 143         DUT_GET_RSSI_CFM,
 144         DUT_GET_TEMEPERATUE_SENSOR_REQ,//New
 145         DUT_GET_TEMEPERATUE_SENSOR_CFM,//New
 146         DUT_SET_RFM_MODE_REQ,//New
 147         DUT_SET_RFM_MODE_CFM,//New
 148         DUT_SET_RF_LOOPBACK_REQ,//New
 149         DUT_SET_RF_LOOPBACK_CFM,//New
 150         DUT_SET_GIPO_OUTPUT_LEVEL_REQ,//New
 151         DUT_SET_GIPO_OUTPUT_LEVEL_CFM,//New
 152         DUT_CANCEL_TX_PHASE_REQ,
 153         DUT_CANCEL_TX_PHASE_CFM,
 154         DUT_SET_CDD_SET_REQ,
 155         DUT_SET_CDD_SET_CFM,
 156         DUT_SET_QBF_REQ,
 157         DUT_SET_QBF_CFM,
 158         DUT_GET_LNA_PARAMS_REQ,
 159         DUT_GET_LNA_PARAMS_CFM,
 160         DUT_SET_LNA_PARAMS_REQ,
 161         DUT_SET_LNA_PARAMS_CFM,
 162
 163         // Dut Tx Module Messages
 164         DUT_START_TX_REQ        = 0x200,
 165         DUT_START_TX_CFM,
 166         DUT_STOP_TX_REQ,
 167         DUT_STOP_TX_CFM,
 168         DUT_UNKNOWN_MSG_CFM = 0x300,
 169 } dutMessagesId_e;
 170
 171
 172
 173 typedef enum dutDriverMessagesIdEnum_t
 174 {
 175         DUT_SERVER_MSG_RESET_MAC                        = 0x01,
 176         DUT_SERVER_MSG_UPLOAD_PROGMODEL         = 0x02,
 177         DUT_SERVER_MSG_MAC_C100                         = 0x03,
 178         DUT_SERVER_MSG_RESEND_NOT_IN_USE        = 0x04,
 179         DUT_SERVER_MSG_DRIVER_GENERAL           = 0x05,
 180         DUT_SERVER_MSG_CNT                                      = 0x06
 181 } dutDriverMessagesId_e;
 182
 183 typedef enum
 184 {
 185         // DGM - driver general message
 186         DUT_DGM_READ_NV_MEMORY_REQ = 0x2,
 187         DUT_DGM_READ_NV_MEMORY_CFM,
 188         DUT_DGM_WRITE_NV_MEMORY_REQ,
 189         DUT_DGM_WRITE_NV_MEMORY_CFM,
 190         DUT_DGM_FLUSH_NV_MEMORY_REQ,
 191         DUT_DGM_FLUSH_NV_MEMORY_CFM,
 192         DUT_DGM_GET_NV_FLASH_NAME_REQ,
 193         DUT_DGM_GET_NV_FLASH_NAME_CFM
 194 } dutDriverGeneralMsgId_e;
 195
 196
 197 typedef enum dutStatus
 198 {
 199         DUT_STATUS_PASS         = 1,
 200         DUT_STATUS_FAIL     = 2,
 201 } dutStatus ;
 202
 203 //---------------------------------------------------------------------------------
 204 //                                              Data Type Definition
 205 //---------------------------------------------------------------------------------
 206 typedef struct dutMessage
 207 {
 208         uint16 msgLength;
 209         uint16 status;
 210         uint8 reserved[2];
 211         uint16 msgId;
 212         uint8 data[MTLK_PAD4(DUT_MSG_DATA_LENGTH)];
 213 } __MTLK_PACKED dutMessage_t;
 214
 215 #define dutDriverMessageHeaderLength 8
 216
 217 typedef struct _C100_MSG_HEADER
 218 {
 219         uint8   u8Task;
 220         uint8   u8Instance;
 221         uint16  u16MsgId;
 222 } __MTLK_PACKED C100_MSG_HEADER;
 223
 224 typedef struct _UMI_C100
 225 {
 226         uint16 u16Length;
 227         uint16 u16stream;
 228         C100_MSG_HEADER sC100hdr;
 229         uint8  au8Data[MTLK_PAD4(UMI_C100_DATA_SIZE)];
 230 } __MTLK_PACKED UMI_C100;
 231
 232 // To Align with mhi_umi convention
 233 typedef  dutMessage_t UMI_DUT;
 234 //----- Hw Dependent Params----------//
 235 typedef struct dutHwDependentConfParams
 236 {
 237         uint32 xtalValue;
 238         int8   extLNAbypass;
 239         int8   extLNAhigh;
 240 } dutHwDependentConfParams_t;
 241
 242 //----- FW Configure Params----------//
 243 typedef struct dutConfigureParams
 244 {
 245         EEPROM_VERSION_TYPE sEepromInfo;
 246         uint32          txLifeTime;
 247         uint32          tpcTimerValue;
 248         uint16          erpRates11g;
 249         uint16          regDomain;
 250         uint16          calibrationAlgoMask;
 251         IEEE_ADDR       sIEEE_ADDR;
 252         uint8           phyType;
 253         uint8           numOfTxChains;
 254         uint8           numOfRxChains;
 255         uint8           spectrumMode; //20M, Half Band, FULL.
 256         uint8           secondaryChannel;
 257         uint8           band;
 258         uint8           rfOscilFreq;
 259         uint8           afeClock;
 260         uint8           txPower;
 261         int8            forceTpc[TPC_ARRAY_SIZE];
 262         uint8           tpcModeIsInClosedLoop; //  1 - Close loop\ 0 - Open Loop
 263         uint8       tpcDebugMode;
 264         uint8           tpcDebugTxPower;
 265         int8        tpcPowerBoost;
 266
 267 } dutConfigureParams_t;
 268
 269 //----- FW SetChannel Params----------//
 270 typedef struct dutSetChannelParams
 271 {
 272         IEEE_ADDR       sIEEE_ADDR;
 273         EEPROM_VERSION_TYPE sEepromInfo;
 274         TPC_FREQ        TPC_Freqs[TPC_ARRAY_SIZE][TPC_FREQ_STR_NUM]; // for each ant, 2 CB and 2 nCB structures
 275         uint16          channel;
 276         uint16          calibrationAlgoMask;
 277         uint8           tpcModeIsInClosedLoop; //  1 - Close loop\ 0 - Open Loop
 278         uint8           txPower;
 279         uint8       tpcDebugMode;
 280         uint8           secondaryChannel;
 281 } dutSetChannelParams_t;
 282
 283 //----- Eeprom Params----------//
 284
 285
 286 typedef struct dutEepromParams
 287 {
 288         uint32 address;
 289         uint32 eepromSize;
 290         uint32 length;
 291         uint8  data[MTLK_PAD4(MAX_DUT_EEPROM_ACCESS_SIZE)];
 292 } dutEepromParams_t;
 293
 294 //----- NV memory Acces Params (Dut Driver Structure)----------//
 295 typedef struct dutNvMemoryAccessParams
 296 {
 297         uint32 nvMemoryType;
 298         uint32 address;
 299         uint32 eepromSize;
 300         uint32 length;
 301         uint8  data[MTLK_PAD4(MAX_DUT_EEPROM_ACCESS_SIZE)];
 302 } __MTLK_PACKED dutNvMemoryAccessParams_t;
 303
 304
 305 typedef struct dutNvMemoryFlushParams
 306 {
 307         uint32 nvMemoryType;
 308         uint8 verifyNvmData;
 309     int8 verifyResult;
 310 } __MTLK_PACKED dutNvMemoryFlushParams_t;
 311
 312 typedef struct dutResetParams
 313 {
 314   uint32 nvMemoryType;
 315   uint32 eepromSize;
 316   uint8  doReset; // 0 - Enable DUT mode on the fly, 1 - EnableDUT mode via acripts (using rmmode/insmode dut=1)
 317   uint8  reserved[3];
 318 } __MTLK_PACKED dutResetParams_t;
 319
 320
 321
 322 //----- Memory access Params DUT_READ_MEMORY_REQ\CFM----------//
 323 //----- Memory access Params DUT_WRITE_MEMORY_REQ\CFM----------//
 324 //----- Memory access Params DUT_WRITE_SECURED_REGISTER_REQ\CFM----------//
 325 #define MAX_DUT_MEMORY_ACCESS_SIZE (DUT_MSG_DATA_LENGTH-8)
 326
 327 typedef struct dutMemoryAccessParams
 328 {
 329         uint16 module;
 330         uint16 length;
 331         uint32 address;
 332         uint8  data[MAX_DUT_MEMORY_ACCESS_SIZE];
 333 } dutMemoryAccessParams_t;
 334
 335 typedef struct dutSecuredWriteParams
 336 {
 337         /* modify secured register: */
 338         /* (*address) = (*address) & ~mask | data */
 339         uint32  address;
 340         uint32  mask;
 341         uint32  data;
 342 } dutSecuredWriteParams_t;
 343
 344 //----- Frequency TPC Params DUT_READ_FREQ_TPC_STRUCTS_REQ\CFM----------//,
 345 typedef struct dutFreqTpcParams
 346 {
 347         TPC_FREQ tpcFreq[DUT_ANT_VALUES_ARRAY_SIZE*TPC_FREQ_STR_NUM];
 348 } dutFreqTpcParams_t;
 349
 350 //----- Frequency TPC Params DUT_RUN_CALIBRATION_REQ\CFM----------//,
 351 typedef struct dutCalibrationParams
 352 {
 353         uint16 channel;
 354         uint16 calibrationMask;
 355         uint8           tpcModeIsInClosedLoop; //  1 - Close loop\ 0 - Open Loop
 356 } dutCalibrationParams_t;
 357
 358 //----- Frequency TPC Params DUT_STOP_FW_REQ\CFM----------//,
 359 typedef struct dutStopFwParams
 360 {
 361         uint32 dummy;
 362 } dutStopFwParams_t;
 363
 364
 365 //----- Bist Results----------//
 366 typedef struct dutBistResults
 367 {
 368         int8 bistResults[BIST_RESULTS_ARRAY_SIZE];
 369 } dutBistResults_t;
 370
 371 //----- Chip Version----------//
 372 typedef struct dutChipVersion
 373 {
 374         uint32 bbChip;
 375         uint32 rfChipVersion;
 376 } dutChipVersion_t;
 377
 378 //--------------------------------------//
 379 //      Tx Data Types                                           //
 380 //--------------------------------------//
 381 typedef struct dutTxParams
 382 {
 383         IEEE_ADDR       addr1;
 384         IEEE_ADDR       addr2;
 385         IEEE_ADDR       addr3;
 386         IEEE_ADDR       addr4;
 387         uint16          repeats;
 388         uint16          packetLength;// 0xffff - Random size,other - data size.
 389         uint16          packetType;// 0xffff - Random Type,0x00XX - data fixed 0xXX.
 390         uint16          seqControl;
 391         uint16          qosCtrlField;
 392         uint16          frameCtrlField;
 393         uint16          txRate;
 394         uint8           packetSubType;
 395         uint8           priority;
 396         uint8           txExtendedRate;
 397         uint8           txPower;
 398         uint8           isTxEndless;
 399 } dutTxParams_t;
 400
 401 //--------------------------------------//
 402 //      Hw Configuration Data Types                     //
 403 //--------------------------------------//
 404 //-----  Read Hw Params DUT_READ_HW_VERSION_REQ\CFM----------//
 405 typedef struct dutHwParams
 406 {
 407         uint32  revision;
 408         uint32  minor;
 409         uint8   branchId;
 410         uint8   released;
 411         uint8   modified;
 412         uint8   Tx3Enabled;
 413 } dutHwParams_t;
 414
 415 //-----  Set Tpc Table Params (DUT_SET_TPC_REQ\CFM)----------//
 416 typedef struct dutTpcParams
 417 {
 418         uint8   powerTableIndex;                                                        // The location in the TPC table
 419         uint8   powerGainIndex[DUT_ANT_VALUES_ARRAY_SIZE];  // requested TPC Index
 420 } dutTpcParams_t;
 421
 422 //-----  Rfic Rssi Params DUT_GET_RSSI_REQ\CFM----------//
 423 typedef struct dutRssiParams
 424 {
 425         uint8 rssi[DUT_ANT_VALUES_ARRAY_SIZE];
 426         uint8 N;
 427 } dutRssiParams_t;
 428
 429 //-----  Tpc Feedback params Params(DUT_GET_TPC_FEEDBACK_REQ\CFM) ----------//
 430 typedef struct dutTpcFeedbackparams
 431 {
 432         uint32  numOfSamples;
 433         uint32  actualNumOfSamples;
 434         uint32  valueSum[DUT_ANT_VALUES_ARRAY_SIZE];
 435 } dutTpcFeedbackparams_t;
 436 //-----  Tx Tone Params (DUT_SET_TX_TONE_REQ\CFM) ----------//
 437 typedef struct dutTxToneParams
 438 {
 439         uint8 onOff;
 440         uint8 amplitude;
 441         int8 power;
 442         uint8 binNum;
 443 } dutTxToneParams_t;
 444
 445 //-----  Tx Spaceless Params (DUT_SET_SPACELESS_TX_REQ\CFM) ----------//
 446 typedef struct dutTxSpacelessParams
 447 {
 448         uint8 dummy;
 449 } dutTxSpacelessParams_t;
 450
 451 //-----  Scrambler Mode Params (DUT_TX_SPACELESS_REQ\CFM) ----------//
 452 typedef struct dutScramblerParams
 453 {
 454         uint8 mode;
 455 } dutScramblerParams_t;
 456
 457 //-----  Set IFS Params (DUT_SET_IFS_REQ\CFM) ----------//
 458 typedef struct dutIfsParams
 459 {
 460         uint32 ifsValue;
 461 } dutIfsParams_t;
 462
 463 //-----  Counters Params DUT_READ_PACKET_COUNTERS_REQ\CFM----------//
 464 typedef struct packetCountersParams
 465 {
 466         uint32 phyRxPacketCounter;
 467         uint32 phyRxCrcErrorCounter;
 468         uint32 fwPacketCounter;
 469         uint8  doReset;
 470 } packetCountersParams_t;
 471
 472 //-----  Set Tx Power Limit  Params (DUT_SET_TX_POWER_LIMIT_REQ\CFM)----------//
 473 typedef struct powerLimitParams
 474 {
 475     uint8 powerLimit;
 476 } powerLimitParams_t;
 477
 478 //-----  Counters Params DUT_SET_RISC_MODE_REQ\CFM----------//
 479 typedef struct riscModeParams
 480 {
 481         dutRiscMode_e riscMode; // 0- Off 1 - On
 482 } riscModeParams_t;
 483
 484 //-----  Set Antenna Params Params DUT_ENABLE_TX_ANTENNA_REQ\CFM----------//
 485 //-----  Set Antenna Params Params DUT_ENABLE_RX_ANTENNA_REQ\CFM----------//
 486 typedef struct dutSetAntennaParams
 487 {
 488         uint8 enabledAntMask; // bit 0-2: Ants 0-2 ON (3 - ants 0,1 ON, 7 - ants 0,1,2 ON, 0 - all off)
 489 } dutSetAntennaParams_t;
 490
 491 //-----  Set Antenna Params Params (DUT_SET_DEFAULT_ANTENNA_SET_REQ\CFM) ----------//
 492 typedef struct antSelectionParams
 493 {
 494         uint8   antSet;
 495 } antSelectionParams_t;
 496 //-----  Rfic Gains Params DUT_SET_TX_GAINS_REQ\CFM ----------//
 497 //-----  Rfic Gains Params DUT_GET_TX_GAINS_REQ\CFM ----------//
 498 typedef struct dutAntTxGains
 499 {
 500         uint8   bbGain;
 501         uint8   paDriverGain;           // 3bit 0-High 1- Medium 2-Low
 502 } dutAntTxGains_t;
 503
 504 typedef struct dutRficTxGainsParams
 505 {
 506         dutAntTxGains_t antTxGains[DUT_ANT_VALUES_ARRAY_SIZE];
 507 } dutRficTxGainsParams_t;
 508
 509 //-----  Rfic Gains Params DUT_GET_RX_GAINS_REQ\CFM ----------//
 510 typedef struct dutAntRxGains
 511 {
 512         int16   bbGain;
 513         int8    lnaGain;                // 3bit 0-High 1- Medium 2-Low
 514         uint8   reserved;
 515 } dutAntRxGains_t;
 516
 517 typedef struct dutRficRxGainsParams
 518 {
 519         dutAntRxGains_t antRxGains[DUT_ANT_VALUES_ARRAY_SIZE];
 520 } dutRficRxGainsParams_t;
 521
 522 //-----  Xtal Params DUT_GET_XTAL_VALUE_REQ\CFM----------//
 523 typedef struct dutXtalParams
 524 {
 525         uint32 xtalValue;
 526 } dutXtalParams_t;
 527
 528 typedef struct dutLnaParams
 529 {
 530         int8    extLNAbypass;
 531         int8    extLNAhigh;
 532 } dutLnaParam_t;
 533
 534 typedef struct dutTxPhaseParams
 535 {
 536         uint32 TxPhaseValue;
 537 } dutTxPhaseParams_t;
 538
 539 typedef struct dutCddParams
 540 {
 541         uint32 CDDvalue;
 542 } dutCddParams_t;
 543
 544 typedef struct dutQbfParams
 545 {
 546         uint32 QBFvalue;
 547 } dutQbfParams_t;
 548
 549
 550
 551 #define MTLK_PACK_OFF
 552 #include "mtlkpack.h"
 553
 554 #endif
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