kernel/traps.c

   1 /*
   2  * mahatma - a simple kernel framework
   3  * Copyright (c) 2008, 2009 Daniel Mack <daniel@caiaq.de>
   4  *
   5  * This program is free software: you can redistribute it and/or modify
   6  * it under the terms of the GNU General Public License as published by
   7  * the Free Software Foundation, either version 3 of the License, or
   8  * (at your option) any later version.
   9  *
  10  * This program is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  *
  15  * You should have received a copy of the GNU General Public License
  16  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  17  */
  18
  19 #include <wikilib.h>
  20 #include <input.h>
  21
  22 #include "regs.h"
  23 #include "traps.h"
  24 #include "serial.h"
  25 #include "irq.h"
  26 #include "gpio.h"
  27 #include "touchscreen.h"
  28
  29 #if 0
  30 #define CLEAR_IRQ(reg,val) (reg) = (val)
  31 #elif 1
  32 #define CLEAR_IRQ(reg,val)                      \
  33         asm volatile("ld.w %%r12, %0" :: "r"((val)));   \
  34         asm volatile("xld.w %%r13, %0" :: "g"(&(reg)));         \
  35         asm volatile("ld.b [%r13], %r12");
  36 #else
  37 #define CLEAR_IRQ(reg,val)                      \
  38         asm("pushn %r12");                      \
  39         asm("pushn %r13");                      \
  40         asm("ld.w %%r12, %0" :: "r"((val)));    \
  41         asm("xld.w %%r13, %0" :: "g"(&(reg)));  \
  42         asm("ld.b [%r13], %r12");               \
  43         asm("popn %r13");                       \
  44         asm("popn %r12");
  45 #endif
  46
  47
  48 static void undef_irq_handler(void) __attribute__((interrupt_handler));
  49 static void illegal_instruction(void) __attribute__((interrupt_handler));
  50 static void serial0_err_irq(void) __attribute__((interrupt_handler));
  51 static void serial0_in_irq(void) __attribute__((interrupt_handler));
  52 static void serial0_out_irq(void) __attribute__((interrupt_handler));
  53 static void serial1_err_irq(void) __attribute__((interrupt_handler));
  54 static void serial1_in_irq(void) __attribute__((interrupt_handler));
  55 static void serial1_out_irq(void) __attribute__((interrupt_handler));
  56 static void kint_irq(void) __attribute__((interrupt_handler));
  57 static void unaligned_data_access(void) __attribute__((interrupt_handler));
  58
  59
  60 static void undef_irq_handler(void)
  61 {
  62 }
  63
  64 static void illegal_instruction(void)
  65 {
  66   //serial_out(0, '?');
  67 }
  68
  69 static void serial0_err_irq(void)
  70 {
  71         CLEAR_IRQ(REG_INT_FSIF01, 1 << 0);
  72 }
  73
  74 static void serial0_in_irq(void)
  75 {
  76         serial_filled_0();
  77         CLEAR_IRQ(REG_INT_FSIF01, 1 << 1);
  78 }
  79
  80 static void serial0_out_irq(void)
  81 {
  82         serial_drained_0();
  83 }
  84
  85 static void serial1_err_irq(void)
  86 {
  87         CLEAR_IRQ(REG_INT_FSIF01, 1 << 3);
  88 }
  89
  90 static void serial1_in_irq(void)
  91 {
  92         touchscreen_parsing_packets();
  93         CLEAR_IRQ(REG_INT_FSIF01, 1 << 4);
  94 }
  95
  96 static void serial1_out_irq(void)
  97 {
  98         CLEAR_IRQ(REG_INT_FSIF01, 1 << 5);
  99 }
 100
 101 static void kint_irq(void)
 102 {
 103         gpio_irq();
 104         CLEAR_IRQ(REG_INT_FK01_FP03, 0x3f);
 105 }
 106
 107 static void unaligned_data_access(void)
 108 {
 109   //serial_out(0, '!');
 110 }
 111
 112 #define N_TRAPS 108
 113 typedef void (*irq_callback)(void);
 114
 115 irq_callback trap_table[N_TRAPS] = {
 116         undef_irq_handler,      //   0 Reset
 117         undef_irq_handler,      //   1 *reserved*
 118         undef_irq_handler,      //   2 ext exception
 119         illegal_instruction,    //   3 Undefined instruction exception
 120         undef_irq_handler,      //   4 *reserved*
 121         undef_irq_handler,      //   5 *reserved*
 122         unaligned_data_access,  //   6 Address misaligned exception
 123         undef_irq_handler,      //   7 NMI
 124         undef_irq_handler,      //   8 *reserved*
 125         undef_irq_handler,      //   9 *reserved*
 126         undef_irq_handler,      //  10 *reserved*
 127         undef_irq_handler,      //  11 Illegal interrupt exception
 128         undef_irq_handler,      //  12 Software exception 0
 129         undef_irq_handler,      //  13 Software exception 1
 130         undef_irq_handler,      //  14 Software exception 2
 131         undef_irq_handler,      //  15 Software exception 3
 132         undef_irq_handler,      //  16 Port input interrupt 0
 133         undef_irq_handler,      //  17 Port input interrupt 1
 134         undef_irq_handler,      //  18 Port input interrupt 2
 135         undef_irq_handler,      //  19 Port input interrupt 3
 136         kint_irq,               //  20 Key input interrupt 0
 137         kint_irq,               //  21 Key input interrupt 1
 138         undef_irq_handler,      //  22 High-speed DMA Ch.0
 139         undef_irq_handler,      //  23 High-speed DMA Ch.1
 140         undef_irq_handler,      //  24 High-speed DMA Ch.2
 141         undef_irq_handler,      //  25 High-speed DMA Ch.3
 142         undef_irq_handler,      //  26 Intelligent DMA
 143         undef_irq_handler,      //  27 *reserved*
 144         undef_irq_handler,      //  28 *reserved*
 145         undef_irq_handler,      //  29 *reserved*
 146         undef_irq_handler,      //  30 16-bit timer 0 - compare-match B
 147         undef_irq_handler,      //  31 16-bit timer 0 - compare-match A
 148         undef_irq_handler,      //  32 *reserved*
 149         undef_irq_handler,      //  33 *reserved*
 150         undef_irq_handler,      //  34 16-bit timer 1 - compare-match B
 151         undef_irq_handler,      //  35 16-bit timer 1 - compare-match A
 152         undef_irq_handler,      //  36 *reserved*
 153         undef_irq_handler,      //  37 *reserved*
 154         undef_irq_handler,      //  38 16-bit timer 2 - compare-match B
 155         undef_irq_handler,      //  39 16-bit timer 2 - compare-match A
 156         undef_irq_handler,      //  40 *reserved*
 157         undef_irq_handler,      //  41 *reserved*
 158         undef_irq_handler,      //  42 16-bit timer 3 - compare-match B
 159         undef_irq_handler,      //  43 16-bit timer 3 - compare-match A
 160         undef_irq_handler,      //  44 *reserved*
 161         undef_irq_handler,      //  45 *reserved*
 162         undef_irq_handler,      //  46 16-bit timer 4 - compare-match B
 163         undef_irq_handler,      //  47 16-bit timer 4 - compare-match A
 164         undef_irq_handler,      //  48 *reserved*
 165         undef_irq_handler,      //  49 *reserved*
 166         undef_irq_handler,      //  50 16-bit timer 5 - compare-match B
 167         undef_irq_handler,      //  51 16-bit timer 5 - compare-match A
 168         undef_irq_handler,      //  52 *reserved*
 169         undef_irq_handler,      //  53 *reserved*
 170         undef_irq_handler,      //  54 *reserved*
 171         undef_irq_handler,      //  55 *reserved*
 172         serial0_err_irq,        //  56 Serial interface Ch.0 - Receive error
 173         serial0_in_irq,         //  57 Serial interface Ch.0 - Receive buffer full
 174         serial0_out_irq,        //  58 Serial interface Ch.0 - Transmit buffer empty
 175         undef_irq_handler,      //  59 *reserved*
 176         serial1_err_irq,        //  60 Serial interface Ch.1 - Receive error
 177         serial1_in_irq,         //  61 Serial interface Ch.1 - Receive buffer full
 178         serial1_out_irq,        //  62 Serial interface Ch.1 - Transmit buffer empty
 179         undef_irq_handler,      //  63 A/D converter - Result out of range
 180         undef_irq_handler,      //  64 A/D converter - End of conversion
 181         undef_irq_handler,      //  65 RTC
 182         undef_irq_handler,      //  66 *reserved*
 183         undef_irq_handler,      //  67 *reserved*
 184         undef_irq_handler,      //  68 Port input interrupt 4
 185         undef_irq_handler,      //  69 Port input interrupt 5
 186         undef_irq_handler,      //  70 Port input interrupt 6
 187         undef_irq_handler,      //  71 Port input interrupt 7
 188         undef_irq_handler,      //  72 *reserved*
 189         undef_irq_handler,      //  73 LCDC
 190         undef_irq_handler,      //  74 *reserved*
 191         undef_irq_handler,      //  75 *reserved*
 192         undef_irq_handler,      //  76 Serial interface Ch.2 - Receive error
 193         undef_irq_handler,      //  77 Serial interface Ch.2 - Receive buffer full
 194         undef_irq_handler,      //  78 Serial interface Ch.2 - Transmit buffer empty
 195         undef_irq_handler,      //  79 *reserved*
 196         undef_irq_handler,      //  80 *reserved*
 197         undef_irq_handler,      //  81 SPI - Receive DMA request
 198         undef_irq_handler,      //  82 SPI - Transmit DMA request
 199         undef_irq_handler,      //  83 *reserved*
 200         undef_irq_handler,      //  84 Port input interrupt 8  / SPI       - SPI interrupt
 201         undef_irq_handler,      //  85 Port input interrupt 9  / USB PDREQ - USB DMA request
 202         undef_irq_handler,      //  86 Port input interrupt 10 / USB       - USBinterrupt
 203         undef_irq_handler,      //  87 Port input interrupt 11 / DCSIO     - DCSIO interrupt
 204         undef_irq_handler,      //  88 Port input interrupt 12
 205         undef_irq_handler,      //  89 Port input interrupt 13
 206         undef_irq_handler,      //  90 Port input interrupt 14
 207         undef_irq_handler,      //  91 Port input interrupt 15
 208         undef_irq_handler,      //  92 *reserved*
 209         undef_irq_handler,      //  93 *reserved*
 210         undef_irq_handler,      //  94 I2S interface - I2S FIFO empty
 211         undef_irq_handler,      //  95 *reserved*
 212         undef_irq_handler,      //  96 *reserved*
 213         undef_irq_handler,      //  97 *reserved*
 214         undef_irq_handler,      //  98 *reserved*
 215         undef_irq_handler,      //  99 *reserved*
 216         undef_irq_handler,      // 100 *reserved*
 217         undef_irq_handler,      // 101 *reserved*
 218         undef_irq_handler,      // 102 *reserved*
 219         undef_irq_handler,      // 103 *reserved*
 220         undef_irq_handler,      // 104 *reserved*
 221         undef_irq_handler,      // 105 *reserved*
 222         undef_irq_handler,      // 106 *reserved*
 223         undef_irq_handler,      // 107 *reserved*
 224 };
 225
 226 void traps_init(void)
 227 {
 228         /* WAKEUP=1 */
 229         REG_CMU_PROTECT = CMU_PROTECT_OFF;
 230         REG_CMU_OPT |= 0x1;
 231         REG_CMU_PROTECT = CMU_PROTECT_ON;
 232
 233         /* relocate the trap table */
 234         asm("ld.w %%ttbr, %0" :: "r"(0x84000));
 235         ENABLE_IRQ();
 236 }