common/lcd.c

   1 /*
   2     e07 bootloader suite
   3     Copyright (c) 2008 Daniel Mack <daniel@caiaq.de>
   4
   5     This program is free software: you can redistribute it and/or modify
   6     it under the terms of the GNU General Public License as published by
   7     the Free Software Foundation, either version 3 of the License, or
   8     (at your option) any later version.
   9
  10     This program is distributed in the hope that it will be useful,
  11     but WITHOUT ANY WARRANTY; without even the implied warranty of
  12     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13     GNU General Public License for more details.
  14
  15     You should have received a copy of the GNU General Public License
  16     along with this program.  If not, see <http://www.gnu.org/licenses/>.
  17 */
  18
  19 #include "types.h"
  20 #include "misc.h"
  21 #include "regs.h"
  22 #include "wikireader.h"
  23 #include "lcd.h"
  24
  25
  26 #if LCD_USES_SPI
  27 u8 spi_transmit_lcd(u8 out)
  28 {
  29         REG_SPI_TXD = out;
  30         do {} while (REG_SPI_STAT & (1 << 6));
  31         return REG_SPI_RXD;
  32 }
  33 #endif
  34
  35 void init_lcd(void)
  36 {
  37         LCD_DISPLAY_OFF();
  38
  39         // set up LCD clocks
  40         REG_CMU_PROTECT = CMU_PROTECT_OFF;
  41         REG_CMU_GATEDCLK0 |=
  42                 LCDCAHBIF_CKE |
  43                 LCDCSAPB_CKE |
  44                 LCDC_CKE |
  45                 0;
  46 #if 0
  47         REG_CMU_CLKCNTL = (REG_CMU_CLKCNTL & ~LCDCDIV_MASK) | LCDCDIV_16;
  48 #endif
  49         REG_CMU_PROTECT = CMU_PROTECT_ON;
  50
  51
  52 #if LCD_USES_SPI
  53         LCD_CS_LO();
  54
  55         /* SPI setup - should move somewhere else */
  56         REG_SPI_WAIT = 0x00000000;
  57         REG_SPI_RXMK = 0x00000000;
  58         REG_SPI_INT = 0x00000014;
  59         REG_SPI_CTL1 = 0x00001C73;
  60
  61         LCD_CS_HI();
  62         delay(10);
  63         LCD_CS_LO();
  64 #endif
  65
  66         /* power down LCDC */
  67         REG_LCDC_PS =
  68                 //INTF |
  69                 //VNDPF |
  70                 //PSAVE_NORMAL |
  71                 //PSAVE_DOZE |
  72                 PSAVE_POWER_SAVE |
  73                 0;
  74
  75         /* HT = (47+1) * 8 = 384 characters, HDP = (39+1) * 8 = 320 characters */
  76 #define HDP (LCD_VRAM_WIDTH_BYTES - 1)
  77 #define HT (HDP + 8)
  78
  79         REG_LCDC_HD =
  80                 (HT << HTCNT_SHIFT) |
  81                 (HDP << HDPCNT_SHIFT) |
  82                 0;
  83
  84         /* VT = 244 + 1 = 255 lines, VDP = 239 + 1 = 480 lines */
  85 #define VDP (LCD_VRAM_HEIGHT_LINES - 1)
  86
  87         REG_LCDC_VD =
  88                 ((VDP + 1) << VTCNT_SHIFT) |
  89                 (VDP << VDPCNT_SHIFT) |
  90                 0;
  91
  92         /* wf counter = 0 */
  93         REG_LCDC_MR = 0;
  94
  95         /* LCDC Display Mode Register, grayscale */
  96 #if LCD_MONOCHROME
  97         REG_LCDC_DMD =
  98                 //TFTSEL |
  99                 //COLOR |
 100                 FPSMASK |
 101
 102                 //DWD_8_BIT_2 |
 103                 //DWD_8_BIT_1 |
 104                 DWD_4_BIT |
 105
 106                 //SWINV |
 107                 //BLANK |
 108                 //FRMRPT |
 109                 //DITHEN |
 110                 LUTPASS |
 111
 112                 //BPP_16 |
 113                 //BPP_12 |
 114                 //BPP_8 |
 115                 //BPP_4 |
 116                 //BPP_2 |
 117                 BPP_1 |
 118                 0;
 119
 120 #else
 121         REG_LCDC_DMD =
 122                 //TFTSEL |
 123                 //COLOR |
 124                 FPSMASK |
 125
 126                 //DWD_8_BIT_2 |
 127                 //DWD_8_BIT_1 |
 128                 DWD_4_BIT |
 129
 130                 //SWINV |
 131                 //BLANK |
 132                 //FRMRPT |
 133                 //DITHEN |
 134                 LUTPASS |
 135
 136                 //BPP_16 |
 137                 //BPP_12 |
 138                 //BPP_8 |
 139                 BPP_4 |
 140                 //BPP_2 |
 141                 //BPP_1 |
 142                 0;
 143 #endif
 144
 145         /* relocate the frame buffer RAM */
 146         REG_LCDC_MADD = LCD_VRAM;
 147
 148 #if LCD_USES_SPI
 149         /* LCDC on */
 150         spi_transmit_lcd(0xa8);
 151
 152         LCD_CS_HI();
 153         delay(10);
 154         LCD_CS_LO();
 155 #endif
 156
 157         /* set reg_power_save = 11b (normal mode) */
 158         REG_LCDC_PS =
 159                 //INTF |
 160                 //VNDPF |
 161                 PSAVE_NORMAL |
 162                 //PSAVE_DOZE |
 163                 //PSAVE_POWER_SAVE |
 164                 0;
 165
 166         delay_us(1000);
 167
 168         LCD_DISPLAY_ON();
 169 }