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Add AppDefaults app selection to control panel
[wine/gsoc-2012-control.git] / programs / winedbg / be_i386.c
blob5dc00ed58758ed0f1a33dae4ca8a85cf448e037d
1 /*
2 * Debugger i386 specific functions
3 *
4 * Copyright 2004 Eric Pouech
5 *
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2.1 of the License, or (at your option) any later version.
10 *
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
15 *
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA
19 */
20
21 #include "debugger.h"
22 #include "wine/debug.h"
23
24 WINE_DEFAULT_DEBUG_CHANNEL(winedbg);
25
26 #ifdef __i386__
27
28 /* db_disasm.c */
29 extern void be_i386_disasm_one_insn(ADDRESS64* addr, int display);
30
31 #define STEP_FLAG 0x00000100 /* single step flag */
32 #define V86_FLAG 0x00020000
33
34 #define IS_VM86_MODE(ctx) (ctx->EFlags & V86_FLAG)
35
36 static ADDRESS_MODE get_selector_type(HANDLE hThread, const CONTEXT* ctx, WORD sel)
37 {
38 LDT_ENTRY le;
39
40 if (IS_VM86_MODE(ctx)) return AddrModeReal;
41 /* null or system selector */
42 if (!(sel & 4) || ((sel >> 3) < 17)) return AddrModeFlat;
43 if (dbg_curr_process->process_io->get_selector(hThread, sel, &le))
44 return le.HighWord.Bits.Default_Big ? AddrMode1632 : AddrMode1616;
45 /* selector doesn't exist */
46 return -1;
47 }
48
49 static void* be_i386_linearize(HANDLE hThread, const ADDRESS64* addr)
50 {
51 LDT_ENTRY le;
52
53 switch (addr->Mode)
54 {
55 case AddrModeReal:
56 return (void*)((DWORD)(LOWORD(addr->Segment) << 4) + (DWORD)addr->Offset);
57 case AddrMode1632:
58 if (!(addr->Segment & 4) || ((addr->Segment >> 3) < 17))
59 return (void*)(DWORD)addr->Offset;
60 /* fall through */
61 case AddrMode1616:
62 if (!dbg_curr_process->process_io->get_selector(hThread, addr->Segment, &le)) return NULL;
63 return (void*)((le.HighWord.Bits.BaseHi << 24) +
64 (le.HighWord.Bits.BaseMid << 16) + le.BaseLow +
65 (DWORD)addr->Offset);
66 case AddrModeFlat:
67 return (void*)(DWORD)addr->Offset;
68 }
69 return NULL;
70 }
71
72 static unsigned be_i386_build_addr(HANDLE hThread, const CONTEXT* ctx, ADDRESS64* addr,
73 unsigned seg, unsigned long offset)
74 {
75 addr->Mode = AddrModeFlat;
76 addr->Segment = seg;
77 addr->Offset = offset;
78 if (seg)
79 {
80 addr->Mode = get_selector_type(hThread, ctx, seg);
81 switch (addr->Mode)
82 {
83 case AddrModeReal:
84 case AddrMode1616:
85 addr->Offset &= 0xffff;
86 break;
87 case AddrModeFlat:
88 case AddrMode1632:
89 break;
90 default:
91 addr->Mode = -1;
92 return FALSE;
93 }
94 }
95 return TRUE;
96 }
97
98 static unsigned be_i386_get_addr(HANDLE hThread, const CONTEXT* ctx,
99 enum be_cpu_addr bca, ADDRESS64* addr)
100 {
101 switch (bca)
102 {
103 case be_cpu_addr_pc:
104 return be_i386_build_addr(hThread, ctx, addr, ctx->SegCs, ctx->Eip);
105 case be_cpu_addr_stack:
106 return be_i386_build_addr(hThread, ctx, addr, ctx->SegSs, ctx->Esp);
107 case be_cpu_addr_frame:
108 return be_i386_build_addr(hThread, ctx, addr, ctx->SegSs, ctx->Ebp);
109 }
110 return FALSE;
111 }
112
113 static unsigned be_i386_get_register_info(int regno, enum be_cpu_addr* kind)
114 {
115 switch (regno)
116 {
117 case CV_REG_EIP: *kind = be_cpu_addr_pc; return TRUE;
118 case CV_REG_EBP: *kind = be_cpu_addr_frame; return TRUE;
119 case CV_REG_ESP: *kind = be_cpu_addr_stack; return TRUE;
120 }
121 return FALSE;
122 }
123
124 static void be_i386_single_step(CONTEXT* ctx, unsigned enable)
125 {
126 if (enable) ctx->EFlags |= STEP_FLAG;
127 else ctx->EFlags &= ~STEP_FLAG;
128 }
129
130 static void be_i386_all_print_context(HANDLE hThread, const CONTEXT* ctx)
131 {
132 long double ST[8]; /* These are for floating regs */
133 int cnt;
134
135 /* Break out the FPU state and the floating point registers */
136 dbg_printf("Floating Point Unit status:\n");
137 dbg_printf(" FLCW:%04x ", LOWORD(ctx->FloatSave.ControlWord));
138 dbg_printf(" FLTW:%04x ", LOWORD(ctx->FloatSave.TagWord));
139 dbg_printf(" FLEO:%08x ", (unsigned int) ctx->FloatSave.ErrorOffset);
140 dbg_printf(" FLSW:%04x", LOWORD(ctx->FloatSave.StatusWord));
141
142 /* Isolate the condition code bits - note they are not contiguous */
143 dbg_printf("(CC:%d%d%d%d", (ctx->FloatSave.StatusWord & 0x00004000) >> 14,
144 (ctx->FloatSave.StatusWord & 0x00000400) >> 10,
145 (ctx->FloatSave.StatusWord & 0x00000200) >> 9,
146 (ctx->FloatSave.StatusWord & 0x00000100) >> 8);
147
148 /* Now pull out the 3 bit of the TOP stack pointer */
149 dbg_printf(" TOP:%01x", (unsigned int) (ctx->FloatSave.StatusWord & 0x00003800) >> 11);
150
151 /* Lets analyse the error bits and indicate the status
152 * the Invalid Op flag has sub status which is tested as follows */
153 if (ctx->FloatSave.StatusWord & 0x00000001) { /* Invalid Fl OP */
154 if (ctx->FloatSave.StatusWord & 0x00000040) { /* Stack Fault */
155 if (ctx->FloatSave.StatusWord & 0x00000200) /* C1 says Overflow */
156 dbg_printf(" #IE(Stack Overflow)");
157 else
158 dbg_printf(" #IE(Stack Underflow)"); /* Underflow */
159 }
160 else dbg_printf(" #IE(Arthimetic error)"); /* Invalid Fl OP */
161 }
162
163 if (ctx->FloatSave.StatusWord & 0x00000002) dbg_printf(" #DE"); /* Denormalised OP */
164 if (ctx->FloatSave.StatusWord & 0x00000004) dbg_printf(" #ZE"); /* Zero Divide */
165 if (ctx->FloatSave.StatusWord & 0x00000008) dbg_printf(" #OE"); /* Overflow */
166 if (ctx->FloatSave.StatusWord & 0x00000010) dbg_printf(" #UE"); /* Underflow */
167 if (ctx->FloatSave.StatusWord & 0x00000020) dbg_printf(" #PE"); /* Precision error */
168 if (ctx->FloatSave.StatusWord & 0x00000040)
169 if (!(ctx->FloatSave.StatusWord & 0x00000001))
170 dbg_printf(" #SE"); /* Stack Fault (don't think this can occur) */
171 if (ctx->FloatSave.StatusWord & 0x00000080) dbg_printf(" #ES"); /* Error Summary */
172 if (ctx->FloatSave.StatusWord & 0x00008000) dbg_printf(" #FB"); /* FPU Busy */
173 dbg_printf(")\n");
174
175 /* Here are the rest of the registers */
176 dbg_printf(" FLES:%08x FLDO:%08x FLDS:%08x FLCNS:%08x\n",
177 ctx->FloatSave.ErrorSelector,
178 ctx->FloatSave.DataOffset,
179 ctx->FloatSave.DataSelector,
180 ctx->FloatSave.Cr0NpxState);
181
182 /* Now for the floating point registers */
183 dbg_printf("Floating Point Registers:\n");
184 for (cnt = 0; cnt < 4; cnt++)
185 {
186 memcpy(&ST[cnt], &ctx->FloatSave.RegisterArea[cnt * 10], 10);
187 dbg_printf(" ST%d:%Lf ", cnt, ST[cnt]);
188 }
189 dbg_printf("\n");
190 for (cnt = 4; cnt < 8; cnt++)
191 {
192 memcpy(&ST[cnt], &ctx->FloatSave.RegisterArea[cnt * 10], 10);
193 dbg_printf(" ST%d:%Lf ", cnt, ST[cnt]);
194 }
195 dbg_printf("\n");
196 }
197
198 static void be_i386_print_context(HANDLE hThread, const CONTEXT* ctx, int all_regs)
199 {
200 static const char flags[] = "aVR-N--ODITSZ-A-P-C";
201 int i;
202 char buf[33];
203
204 dbg_printf("Register dump:\n");
205
206 /* First get the segment registers out of the way */
207 dbg_printf(" CS:%04x SS:%04x DS:%04x ES:%04x FS:%04x GS:%04x",
208 (WORD)ctx->SegCs, (WORD)ctx->SegSs,
209 (WORD)ctx->SegDs, (WORD)ctx->SegEs,
210 (WORD)ctx->SegFs, (WORD)ctx->SegGs);
211
212 strcpy(buf, flags);
213 for (i = 0; buf[i]; i++)
214 if (buf[i] != '-' && !(ctx->EFlags & (1 << (sizeof(flags) - 2 - i))))
215 buf[i] = ' ';
216
217 switch (get_selector_type(hThread, ctx, ctx->SegCs))
218 {
219 case AddrMode1616:
220 case AddrModeReal:
221 dbg_printf("\n IP:%04x SP:%04x BP:%04x FLAGS:%04x(%s)\n",
222 LOWORD(ctx->Eip), LOWORD(ctx->Esp),
223 LOWORD(ctx->Ebp), LOWORD(ctx->EFlags), buf);
224 dbg_printf(" AX:%04x BX:%04x CX:%04x DX:%04x SI:%04x DI:%04x\n",
225 LOWORD(ctx->Eax), LOWORD(ctx->Ebx),
226 LOWORD(ctx->Ecx), LOWORD(ctx->Edx),
227 LOWORD(ctx->Esi), LOWORD(ctx->Edi));
228 break;
229 case AddrModeFlat:
230 case AddrMode1632:
231 dbg_printf("\n EIP:%08x ESP:%08x EBP:%08x EFLAGS:%08x(%s)\n",
232 ctx->Eip, ctx->Esp, ctx->Ebp, ctx->EFlags, buf);
233 dbg_printf(" EAX:%08x EBX:%08x ECX:%08x EDX:%08x\n",
234 ctx->Eax, ctx->Ebx, ctx->Ecx, ctx->Edx);
235 dbg_printf(" ESI:%08x EDI:%08x\n",
236 ctx->Esi, ctx->Edi);
237 break;
238 }
239
240 if (all_regs) be_i386_all_print_context(hThread, ctx); /* print floating regs */
241
242 }
243
244 static void be_i386_print_segment_info(HANDLE hThread, const CONTEXT* ctx)
245 {
246 if (get_selector_type(hThread, ctx, ctx->SegCs) == AddrMode1616)
247 {
248 info_win32_segments(ctx->SegDs >> 3, 1);
249 if (ctx->SegEs != ctx->SegDs) info_win32_segments(ctx->SegEs >> 3, 1);
250 }
251 info_win32_segments(ctx->SegFs >> 3, 1);
252 }
253
254 static struct dbg_internal_var be_i386_ctx[] =
255 {
256 {CV_REG_AL, "AL", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, Eax), dbg_itype_unsigned_char_int},
257 {CV_REG_CL, "CL", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, Ecx), dbg_itype_unsigned_char_int},
258 {CV_REG_DL, "DL", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, Edx), dbg_itype_unsigned_char_int},
259 {CV_REG_BL, "BL", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, Ebx), dbg_itype_unsigned_char_int},
260 {CV_REG_AH, "AH", (DWORD_PTR*)(FIELD_OFFSET(CONTEXT, Eax)+1), dbg_itype_unsigned_char_int},
261 {CV_REG_CH, "CH", (DWORD_PTR*)(FIELD_OFFSET(CONTEXT, Ecx)+1), dbg_itype_unsigned_char_int},
262 {CV_REG_DH, "DH", (DWORD_PTR*)(FIELD_OFFSET(CONTEXT, Edx)+1), dbg_itype_unsigned_char_int},
263 {CV_REG_BH, "BH", (DWORD_PTR*)(FIELD_OFFSET(CONTEXT, Ebx)+1), dbg_itype_unsigned_char_int},
264 {CV_REG_AX, "AX", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, Eax), dbg_itype_unsigned_short_int},
265 {CV_REG_CX, "CX", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, Ecx), dbg_itype_unsigned_short_int},
266 {CV_REG_DX, "DX", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, Edx), dbg_itype_unsigned_short_int},
267 {CV_REG_BX, "BX", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, Ebx), dbg_itype_unsigned_short_int},
268 {CV_REG_SP, "SP", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, Esp), dbg_itype_unsigned_short_int},
269 {CV_REG_BP, "BP", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, Ebp), dbg_itype_unsigned_short_int},
270 {CV_REG_SI, "SI", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, Esi), dbg_itype_unsigned_short_int},
271 {CV_REG_DI, "DI", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, Edi), dbg_itype_unsigned_short_int},
272 {CV_REG_EAX, "EAX", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, Eax), dbg_itype_unsigned_int},
273 {CV_REG_ECX, "ECX", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, Ecx), dbg_itype_unsigned_int},
274 {CV_REG_EDX, "EDX", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, Edx), dbg_itype_unsigned_int},
275 {CV_REG_EBX, "EBX", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, Ebx), dbg_itype_unsigned_int},
276 {CV_REG_ESP, "ESP", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, Esp), dbg_itype_unsigned_int},
277 {CV_REG_EBP, "EBP", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, Ebp), dbg_itype_unsigned_int},
278 {CV_REG_ESI, "ESI", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, Esi), dbg_itype_unsigned_int},
279 {CV_REG_EDI, "EDI", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, Edi), dbg_itype_unsigned_int},
280 {CV_REG_ES, "ES", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, SegEs), dbg_itype_unsigned_short_int},
281 {CV_REG_CS, "CS", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, SegCs), dbg_itype_unsigned_short_int},
282 {CV_REG_SS, "SS", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, SegSs), dbg_itype_unsigned_short_int},
283 {CV_REG_DS, "DS", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, SegDs), dbg_itype_unsigned_short_int},
284 {CV_REG_FS, "FS", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, SegFs), dbg_itype_unsigned_short_int},
285 {CV_REG_GS, "GS", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, SegGs), dbg_itype_unsigned_short_int},
286 {CV_REG_IP, "IP", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, Eip), dbg_itype_unsigned_short_int},
287 {CV_REG_FLAGS, "FLAGS", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, EFlags), dbg_itype_unsigned_short_int},
288 {CV_REG_EIP, "EIP", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, Eip), dbg_itype_unsigned_int},
289 {CV_REG_EFLAGS, "EFLAGS", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, EFlags), dbg_itype_unsigned_int},
290 {0, NULL, 0, dbg_itype_none}
291 };
292
293 static unsigned be_i386_is_step_over_insn(const void* insn)
294 {
295 BYTE ch;
296
297 for (;;)
298 {
299 if (!dbg_read_memory(insn, &ch, sizeof(ch))) return FALSE;
300
301 switch (ch)
302 {
303 /* Skip all prefixes */
304 case 0x2e: /* cs: */
305 case 0x36: /* ss: */
306 case 0x3e: /* ds: */
307 case 0x26: /* es: */
308 case 0x64: /* fs: */
309 case 0x65: /* gs: */
310 case 0x66: /* opcode size prefix */
311 case 0x67: /* addr size prefix */
312 case 0xf0: /* lock */
313 case 0xf2: /* repne */
314 case 0xf3: /* repe */
315 insn = (const char*)insn + 1;
316 continue;
317
318 /* Handle call instructions */
319 case 0xcd: /* int <intno> */
320 case 0xe8: /* call <offset> */
321 case 0x9a: /* lcall <seg>:<off> */
322 return TRUE;
323
324 case 0xff: /* call <regmodrm> */
325 if (!dbg_read_memory((const char*)insn + 1, &ch, sizeof(ch)))
326 return FALSE;
327 return (((ch & 0x38) == 0x10) || ((ch & 0x38) == 0x18));
328
329 /* Handle string instructions */
330 case 0x6c: /* insb */
331 case 0x6d: /* insw */
332 case 0x6e: /* outsb */
333 case 0x6f: /* outsw */
334 case 0xa4: /* movsb */
335 case 0xa5: /* movsw */
336 case 0xa6: /* cmpsb */
337 case 0xa7: /* cmpsw */
338 case 0xaa: /* stosb */
339 case 0xab: /* stosw */
340 case 0xac: /* lodsb */
341 case 0xad: /* lodsw */
342 case 0xae: /* scasb */
343 case 0xaf: /* scasw */
344 return TRUE;
345
346 default:
347 return FALSE;
348 }
349 }
350 }
351
352 static unsigned be_i386_is_function_return(const void* insn)
353 {
354 BYTE ch;
355
356 if (!dbg_read_memory(insn, &ch, sizeof(ch))) return FALSE;
357 if (ch == 0xF3) /* REP */
358 {
359 insn = (const char*)insn + 1;
360 if (!dbg_read_memory(insn, &ch, sizeof(ch))) return FALSE;
361 }
362 return (ch == 0xC2) || (ch == 0xC3);
363 }
364
365 static unsigned be_i386_is_break_insn(const void* insn)
366 {
367 BYTE c;
368
369 if (!dbg_read_memory(insn, &c, sizeof(c))) return FALSE;
370 return c == 0xCC;
371 }
372
373 static unsigned get_size(ADDRESS_MODE am)
374 {
375 if (am == AddrModeReal || am == AddrMode1616) return 16;
376 return 32;
377 }
378
379 static BOOL fetch_value(const char* addr, unsigned sz, int* value)
380 {
381 char value8;
382 short value16;
383
384 switch (sz)
385 {
386 case 8:
387 if (!dbg_read_memory(addr, &value8, sizeof(value8)))
388 return FALSE;
389 *value = value8;
390 break;
391 case 16:
392 if (!dbg_read_memory(addr, &value16, sizeof(value16)))
393 return FALSE;
394 *value = value16;
395 break;
396 case 32:
397 if (!dbg_read_memory(addr, value, sizeof(*value)))
398 return FALSE;
399 break;
400 default: return FALSE;
401 }
402 return TRUE;
403 }
404
405 static unsigned be_i386_is_func_call(const void* insn, ADDRESS64* callee)
406 {
407 BYTE ch;
408 int delta;
409 short segment;
410 unsigned dst = 0;
411 unsigned operand_size;
412 ADDRESS_MODE cs_addr_mode;
413
414 cs_addr_mode = get_selector_type(dbg_curr_thread->handle, &dbg_context,
415 dbg_context.SegCs);
416 operand_size = get_size(cs_addr_mode);
417
418 /* get operand_size (also getting rid of the various prefixes */
419 do
420 {
421 if (!dbg_read_memory(insn, &ch, sizeof(ch))) return FALSE;
422 if (ch == 0x66)
423 {
424 operand_size = 48 - operand_size; /* 16 => 32, 32 => 16 */
425 insn = (const char*)insn + 1;
426 }
427 } while (ch == 0x66 || ch == 0x67);
428
429 switch (ch)
430 {
431 case 0xe8: /* relative near call */
432 callee->Mode = cs_addr_mode;
433 if (!fetch_value((const char*)insn + 1, operand_size, &delta))
434 return FALSE;
435 callee->Segment = dbg_context.SegCs;
436 callee->Offset = (DWORD)insn + 1 + (operand_size / 8) + delta;
437 return TRUE;
438
439 case 0x9a: /* absolute far call */
440 if (!dbg_read_memory((const char*)insn + 1 + operand_size / 8,
441 &segment, sizeof(segment)))
442 return FALSE;
443 callee->Mode = get_selector_type(dbg_curr_thread->handle, &dbg_context,
444 segment);
445 if (!fetch_value((const char*)insn + 1, operand_size, &delta))
446 return FALSE;
447 callee->Segment = segment;
448 callee->Offset = delta;
449 return TRUE;
450
451 case 0xff:
452 if (!dbg_read_memory((const char*)insn + 1, &ch, sizeof(ch)))
453 return FALSE;
454 /* keep only the CALL and LCALL insn:s */
455 switch ((ch >> 3) & 0x07)
456 {
457 case 0x02:
458 segment = dbg_context.SegCs;
459 break;
460 case 0x03:
461 if (!dbg_read_memory((const char*)insn + 1 + operand_size / 8,
462 &segment, sizeof(segment)))
463 return FALSE;
464 break;
465 default: return FALSE;
466 }
467 /* FIXME: we only support the 32 bit far calls for now */
468 if (operand_size != 32)
469 {
470 WINE_FIXME("Unsupported yet call insn (0xFF 0x%02x) with 16 bit operand-size at %p\n", ch, insn);
471 return FALSE;
472 }
473 switch (ch & 0xC7) /* keep Mod R/M only (skip reg) */
474 {
475 case 0x04:
476 case 0x44:
477 case 0x84:
478 WINE_FIXME("Unsupported yet call insn (0xFF 0x%02x) (SIB bytes) at %p\n", ch, insn);
479 return FALSE;
480 case 0x05: /* addr32 */
481 if ((ch & 0x38) == 0x10 || /* call */
482 (ch & 0x38) == 0x18) /* lcall */
483 {
484 void *addr;
485 if (!dbg_read_memory((const char *)insn + 2, &addr, sizeof(addr)))
486 return FALSE;
487 if ((ch & 0x38) == 0x18) /* lcall */
488 {
489 if (!dbg_read_memory((const char*)addr + operand_size, &segment, sizeof(segment)))
490 return FALSE;
491 }
492 else segment = dbg_context.SegCs;
493 if (!dbg_read_memory((const char*)addr, &dst, sizeof(dst)))
494 return FALSE;
495 callee->Mode = get_selector_type(dbg_curr_thread->handle, &dbg_context, segment);
496 callee->Segment = segment;
497 callee->Offset = dst;
498 return TRUE;
499 }
500 return FALSE;
501 default:
502 switch (ch & 0x07)
503 {
504 case 0x00: dst = dbg_context.Eax; break;
505 case 0x01: dst = dbg_context.Ecx; break;
506 case 0x02: dst = dbg_context.Edx; break;
507 case 0x03: dst = dbg_context.Ebx; break;
508 case 0x04: dst = dbg_context.Esp; break;
509 case 0x05: dst = dbg_context.Ebp; break;
510 case 0x06: dst = dbg_context.Esi; break;
511 case 0x07: dst = dbg_context.Edi; break;
512 }
513 if ((ch >> 6) != 0x03) /* indirect address */
514 {
515 if (ch >> 6) /* we got a displacement */
516 {
517 if (!fetch_value((const char*)insn + 2, (ch >> 6) == 0x01 ? 8 : 32, &delta))
518 return FALSE;
519 dst += delta;
520 }
521 if (((ch >> 3) & 0x07) == 0x03) /* LCALL */
522 {
523 if (!dbg_read_memory((const char*)dst + operand_size, &segment, sizeof(segment)))
524 return FALSE;
525 }
526 else segment = dbg_context.SegCs;
527 if (!dbg_read_memory((const char*)dst, &delta, sizeof(delta)))
528 return FALSE;
529 callee->Mode = get_selector_type(dbg_curr_thread->handle, &dbg_context,
530 segment);
531 callee->Segment = segment;
532 callee->Offset = delta;
533 }
534 else
535 {
536 callee->Mode = cs_addr_mode;
537 callee->Segment = dbg_context.SegCs;
538 callee->Offset = dst;
539 }
540 }
541 return TRUE;
542
543 default:
544 return FALSE;
545 }
546 }
547
548 static unsigned be_i386_is_jump(const void* insn, ADDRESS64* jumpee)
549 {
550 BYTE ch;
551 int delta;
552 unsigned operand_size;
553 ADDRESS_MODE cs_addr_mode;
554
555 cs_addr_mode = get_selector_type(dbg_curr_thread->handle, &dbg_context,
556 dbg_context.SegCs);
557 operand_size = get_size(cs_addr_mode);
558
559 /* get operand_size (also getting rid of the various prefixes */
560 do
561 {
562 if (!dbg_read_memory(insn, &ch, sizeof(ch))) return FALSE;
563 if (ch == 0x66)
564 {
565 operand_size = 48 - operand_size; /* 16 => 32, 32 => 16 */
566 insn = (const char*)insn + 1;
567 }
568 } while (ch == 0x66 || ch == 0x67);
569
570 switch (ch)
571 {
572 case 0xe9: /* jmp near */
573 jumpee->Mode = cs_addr_mode;
574 if (!fetch_value((const char*)insn + 1, operand_size, &delta))
575 return FALSE;
576 jumpee->Segment = dbg_context.SegCs;
577 jumpee->Offset = (DWORD)insn + 1 + (operand_size / 8) + delta;
578 return TRUE;
579 default: WINE_FIXME("unknown %x\n", ch); return FALSE;
580 }
581 return FALSE;
582 }
583
584 #define DR7_CONTROL_SHIFT 16
585 #define DR7_CONTROL_SIZE 4
586
587 #define DR7_RW_EXECUTE (0x0)
588 #define DR7_RW_WRITE (0x1)
589 #define DR7_RW_READ (0x3)
590
591 #define DR7_LEN_1 (0x0)
592 #define DR7_LEN_2 (0x4)
593 #define DR7_LEN_4 (0xC)
594
595 #define DR7_LOCAL_ENABLE_SHIFT 0
596 #define DR7_GLOBAL_ENABLE_SHIFT 1
597 #define DR7_ENABLE_SIZE 2
598
599 #define DR7_LOCAL_ENABLE_MASK (0x55)
600 #define DR7_GLOBAL_ENABLE_MASK (0xAA)
601
602 #define DR7_CONTROL_RESERVED (0xFC00)
603 #define DR7_LOCAL_SLOWDOWN (0x100)
604 #define DR7_GLOBAL_SLOWDOWN (0x200)
605
606 #define DR7_ENABLE_MASK(dr) (1<<(DR7_LOCAL_ENABLE_SHIFT+DR7_ENABLE_SIZE*(dr)))
607 #define IS_DR7_SET(ctrl,dr) ((ctrl)&DR7_ENABLE_MASK(dr))
608
609 static inline int be_i386_get_unused_DR(CONTEXT* ctx, DWORD** r)
610 {
611 if (!IS_DR7_SET(ctx->Dr7, 0))
612 {
613 *r = &ctx->Dr0;
614 return 0;
615 }
616 if (!IS_DR7_SET(ctx->Dr7, 1))
617 {
618 *r = &ctx->Dr1;
619 return 1;
620 }
621 if (!IS_DR7_SET(ctx->Dr7, 2))
622 {
623 *r = &ctx->Dr2;
624 return 2;
625 }
626 if (!IS_DR7_SET(ctx->Dr7, 3))
627 {
628 *r = &ctx->Dr3;
629 return 3;
630 }
631 dbg_printf("All hardware registers have been used\n");
632
633 return -1;
634 }
635
636 static unsigned be_i386_insert_Xpoint(HANDLE hProcess, const struct be_process_io* pio,
637 CONTEXT* ctx, enum be_xpoint_type type,
638 void* addr, unsigned long* val, unsigned size)
639 {
640 unsigned char ch;
641 SIZE_T sz;
642 DWORD *pr;
643 int reg;
644 unsigned long bits;
645
646 switch (type)
647 {
648 case be_xpoint_break:
649 if (size != 0) return 0;
650 if (!pio->read(hProcess, addr, &ch, 1, &sz) || sz != 1) return 0;
651 *val = ch;
652 ch = 0xcc;
653 if (!pio->write(hProcess, addr, &ch, 1, &sz) || sz != 1) return 0;
654 break;
655 case be_xpoint_watch_exec:
656 bits = DR7_RW_EXECUTE;
657 goto hw_bp;
658 case be_xpoint_watch_read:
659 bits = DR7_RW_READ;
660 goto hw_bp;
661 case be_xpoint_watch_write:
662 bits = DR7_RW_WRITE;
663 hw_bp:
664 if ((reg = be_i386_get_unused_DR(ctx, &pr)) == -1) return 0;
665 *pr = (DWORD)addr;
666 if (type != be_xpoint_watch_exec) switch (size)
667 {
668 case 4: bits |= DR7_LEN_4; break;
669 case 2: bits |= DR7_LEN_2; break;
670 case 1: bits |= DR7_LEN_1; break;
671 default: return 0;
672 }
673 *val = reg;
674 /* clear old values */
675 ctx->Dr7 &= ~(0x0F << (DR7_CONTROL_SHIFT + DR7_CONTROL_SIZE * reg));
676 /* set the correct ones */
677 ctx->Dr7 |= bits << (DR7_CONTROL_SHIFT + DR7_CONTROL_SIZE * reg);
678 ctx->Dr7 |= DR7_ENABLE_MASK(reg) | DR7_LOCAL_SLOWDOWN;
679 break;
680 default:
681 dbg_printf("Unknown bp type %c\n", type);
682 return 0;
683 }
684 return 1;
685 }
686
687 static unsigned be_i386_remove_Xpoint(HANDLE hProcess, const struct be_process_io* pio,
688 CONTEXT* ctx, enum be_xpoint_type type,
689 void* addr, unsigned long val, unsigned size)
690 {
691 SIZE_T sz;
692 unsigned char ch;
693
694 switch (type)
695 {
696 case be_xpoint_break:
697 if (size != 0) return 0;
698 if (!pio->read(hProcess, addr, &ch, 1, &sz) || sz != 1) return 0;
699 if (ch != (unsigned char)0xCC)
700 WINE_FIXME("Cannot get back %02x instead of 0xCC at %08lx\n",
701 ch, (unsigned long)addr);
702 ch = (unsigned char)val;
703 if (!pio->write(hProcess, addr, &ch, 1, &sz) || sz != 1) return 0;
704 break;
705 case be_xpoint_watch_exec:
706 case be_xpoint_watch_read:
707 case be_xpoint_watch_write:
708 /* simply disable the entry */
709 ctx->Dr7 &= ~DR7_ENABLE_MASK(val);
710 break;
711 default:
712 dbg_printf("Unknown bp type %c\n", type);
713 return 0;
714 }
715 return 1;
716 }
717
718 static unsigned be_i386_is_watchpoint_set(const CONTEXT* ctx, unsigned idx)
719 {
720 return ctx->Dr6 & (1 << idx);
721 }
722
723 static void be_i386_clear_watchpoint(CONTEXT* ctx, unsigned idx)
724 {
725 ctx->Dr6 &= ~(1 << idx);
726 }
727
728 static int be_i386_adjust_pc_for_break(CONTEXT* ctx, BOOL way)
729 {
730 if (way)
731 {
732 ctx->Eip--;
733 return -1;
734 }
735 ctx->Eip++;
736 return 1;
737 }
738
739 static int be_i386_fetch_integer(const struct dbg_lvalue* lvalue, unsigned size,
740 unsigned ext_sign, LONGLONG* ret)
741 {
742 if (size != 1 && size != 2 && size != 4 && size != 8) return FALSE;
743
744 memset(ret, 0, sizeof(*ret)); /* clear unread bytes */
745 /* FIXME: this assumes that debuggee and debugger use the same
746 * integral representation
747 */
748 if (!memory_read_value(lvalue, size, ret)) return FALSE;
749
750 /* propagate sign information */
751 if (ext_sign && size < 8 && (*ret >> (size * 8 - 1)) != 0)
752 {
753 ULONGLONG neg = -1;
754 *ret |= neg << (size * 8);
755 }
756 return TRUE;
757 }
758
759 static int be_i386_fetch_float(const struct dbg_lvalue* lvalue, unsigned size,
760 long double* ret)
761 {
762 char tmp[sizeof(long double)];
763
764 /* FIXME: this assumes that debuggee and debugger use the same
765 * representation for reals
766 */
767 if (!memory_read_value(lvalue, size, tmp)) return FALSE;
768
769 /* float & double types have to be promoted to a long double */
770 switch (size)
771 {
772 case sizeof(float): *ret = *(float*)tmp; break;
773 case sizeof(double): *ret = *(double*)tmp; break;
774 case sizeof(long double): *ret = *(long double*)tmp; break;
775 default: return FALSE;
776 }
777 return TRUE;
778 }
779
780 static int be_i386_store_integer(const struct dbg_lvalue* lvalue, unsigned size,
781 unsigned is_signed, LONGLONG val)
782 {
783 /* this is simple as we're on a little endian CPU */
784 return memory_write_value(lvalue, size, &val);
785 }
786
787 struct backend_cpu be_i386 =
788 {
789 IMAGE_FILE_MACHINE_I386,
790 4,
791 be_i386_linearize,
792 be_i386_build_addr,
793 be_i386_get_addr,
794 be_i386_get_register_info,
795 be_i386_single_step,
796 be_i386_print_context,
797 be_i386_print_segment_info,
798 be_i386_ctx,
799 be_i386_is_step_over_insn,
800 be_i386_is_function_return,
801 be_i386_is_break_insn,
802 be_i386_is_func_call,
803 be_i386_is_jump,
804 be_i386_disasm_one_insn,
805 be_i386_insert_Xpoint,
806 be_i386_remove_Xpoint,
807 be_i386_is_watchpoint_set,
808 be_i386_clear_watchpoint,
809 be_i386_adjust_pc_for_break,
810 be_i386_fetch_integer,
811 be_i386_fetch_float,
812 be_i386_store_integer,
813 };
814 #endif
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