miscemu/instr.c

   1 /*
   2  * Emulation of priviledged instructions
   3  *
   4  * Copyright 1995 Alexandre Julliard
   5  */
   6
   7 #include "windows.h"
   8 #include "ldt.h"
   9 #include "global.h"
  10 #include "module.h"
  11 #include "dosexe.h"
  12 #include "miscemu.h"
  13 #include "sig_context.h"
  14 #include "debug.h"
  15
  16
  17 #define IS_V86(context) (EFL_sig(context)&V86_FLAG)
  18 #define IS_SEL_32(context,seg) \
  19    (IS_V86(context) ? FALSE : IS_SELECTOR_32BIT(seg))
  20
  21 #define STACK_sig(context) \
  22    (IS_SEL_32(context,SS_sig(context)) ? ESP_sig(context) : SP_sig(context))
  23
  24 #define MAKE_PTR(seg,off) \
  25    (IS_SELECTOR_SYSTEM(seg) ? (void *)(off) : PTR_SEG_OFF_TO_LIN(seg,off))
  26
  27 #define MK_PTR(context,seg,off) \
  28    (IS_V86(context) ? DOSMEM_MapRealToLinear(MAKELONG(off,seg)) \
  29                     : MAKE_PTR(seg,off))
  30
  31 #define STACK_PTR(context) \
  32    (IS_V86(context) ? DOSMEM_MapRealToLinear(MAKELONG(SP_sig(context),SS_sig(context))) : \
  33     (IS_SELECTOR_SYSTEM(SS_sig(context)) ? (void *)ESP_sig(context) : \
  34      (PTR_SEG_OFF_TO_LIN(SS_sig(context),STACK_sig(context)))))
  35
  36
  37 /***********************************************************************
  38  *           INSTR_ReplaceSelector
  39  *
  40  * Try to replace an invalid selector by a valid one.
  41  * The only selector where it is allowed to do "mov ax,40;mov es,ax"
  42  * is the so called 'bimodal' selector 0x40, which points to the BIOS
  43  * data segment. Used by (at least) Borland products (and programs compiled
  44  * using Borland products).
  45  *
  46  * See Undocumented Windows, Chapter 5, __0040.
  47  */
  48 static WORD INSTR_ReplaceSelector( SIGCONTEXT *context, WORD sel)
  49 {
  50     if (sel == 0x40)
  51     {
  52         static WORD sys_timer = 0;
  53         if (!sys_timer)
  54             sys_timer = CreateSystemTimer( 55, (FARPROC16)DOSMEM_Tick );
  55         return DOSMEM_BiosSeg;
  56     }
  57     return 0;  /* Can't replace selector, crashdump */
  58 }
  59
  60
  61 /***********************************************************************
  62  *           INSTR_GetOperandAddr
  63  *
  64  * Return the address of an instruction operand (from the mod/rm byte).
  65  */
  66 static BYTE *INSTR_GetOperandAddr( SIGCONTEXT *context, BYTE *instr,
  67                                    int long_addr, int segprefix, int *len )
  68 {
  69     int mod, rm, base, index = 0, ss = 0, seg = 0, off;
  70
  71 #define GET_VAL(val,type) \
  72     { *val = *(type *)instr; instr += sizeof(type); *len += sizeof(type); }
  73
  74     *len = 0;
  75     GET_VAL( &mod, BYTE );
  76     rm = mod & 7;
  77     mod >>= 6;
  78
  79     if (mod == 3)
  80     {
  81         switch(rm)
  82         {
  83         case 0: return (BYTE *)&EAX_sig(context);
  84         case 1: return (BYTE *)&ECX_sig(context);
  85         case 2: return (BYTE *)&EDX_sig(context);
  86         case 3: return (BYTE *)&EBX_sig(context);
  87         case 4: return (BYTE *)&ESP_sig(context);
  88         case 5: return (BYTE *)&EBP_sig(context);
  89         case 6: return (BYTE *)&ESI_sig(context);
  90         case 7: return (BYTE *)&EDI_sig(context);
  91         }
  92     }
  93
  94     if (long_addr)
  95     {
  96         if (rm == 4)
  97         {
  98             BYTE sib;
  99             GET_VAL( &sib, BYTE );
 100             rm = sib & 7;
 101             ss = sib >> 6;
 102             switch(sib >> 3)
 103             {
 104             case 0: index = EAX_sig(context); break;
 105             case 1: index = ECX_sig(context); break;
 106             case 2: index = EDX_sig(context); break;
 107             case 3: index = EBX_sig(context); break;
 108             case 4: index = 0; break;
 109             case 5: index = EBP_sig(context); break;
 110             case 6: index = ESI_sig(context); break;
 111             case 7: index = EDI_sig(context); break;
 112             }
 113         }
 114
 115         switch(rm)
 116         {
 117         case 0: base = EAX_sig(context); seg = DS_sig(context); break;
 118         case 1: base = ECX_sig(context); seg = DS_sig(context); break;
 119         case 2: base = EDX_sig(context); seg = DS_sig(context); break;
 120         case 3: base = EBX_sig(context); seg = DS_sig(context); break;
 121         case 4: base = ESP_sig(context); seg = SS_sig(context); break;
 122         case 5: base = EBP_sig(context); seg = SS_sig(context); break;
 123         case 6: base = ESI_sig(context); seg = DS_sig(context); break;
 124         case 7: base = EDI_sig(context); seg = DS_sig(context); break;
 125         }
 126         switch (mod)
 127         {
 128         case 0:
 129             if (rm == 5)  /* special case: ds:(disp32) */
 130             {
 131                 GET_VAL( &base, DWORD );
 132                 seg = DS_sig(context);
 133             }
 134             break;
 135
 136         case 1:  /* 8-bit disp */
 137             GET_VAL( &off, BYTE );
 138             base += (signed char)off;
 139             break;
 140
 141         case 2:  /* 32-bit disp */
 142             GET_VAL( &off, DWORD );
 143             base += (signed long)off;
 144             break;
 145         }
 146     }
 147     else  /* short address */
 148     {
 149         switch(rm)
 150         {
 151         case 0:  /* ds:(bx,si) */
 152             base = BX_sig(context) + SI_sig(context);
 153             seg  = DS_sig(context);
 154             break;
 155         case 1:  /* ds:(bx,di) */
 156             base = BX_sig(context) + DI_sig(context);
 157             seg  = DS_sig(context);
 158             break;
 159         case 2:  /* ss:(bp,si) */
 160             base = BP_sig(context) + SI_sig(context);
 161             seg  = SS_sig(context);
 162             break;
 163         case 3:  /* ss:(bp,di) */
 164             base = BP_sig(context) + DI_sig(context);
 165             seg  = SS_sig(context);
 166             break;
 167         case 4:  /* ds:(si) */
 168             base = SI_sig(context);
 169             seg  = DS_sig(context);
 170             break;
 171         case 5:  /* ds:(di) */
 172             base = DI_sig(context);
 173             seg  = DS_sig(context);
 174             break;
 175         case 6:  /* ss:(bp) */
 176             base = BP_sig(context);
 177             seg  = SS_sig(context);
 178             break;
 179         case 7:  /* ds:(bx) */
 180             base = BX_sig(context);
 181             seg  = DS_sig(context);
 182             break;
 183         }
 184
 185         switch(mod)
 186         {
 187         case 0:
 188             if (rm == 6)  /* special case: ds:(disp16) */
 189             {
 190                 GET_VAL( &base, WORD );
 191                 seg  = DS_sig(context);
 192             }
 193             break;
 194
 195         case 1:  /* 8-bit disp */
 196             GET_VAL( &off, BYTE );
 197             base += (signed char)off;
 198             break;
 199
 200         case 2:  /* 16-bit disp */
 201             GET_VAL( &off, WORD );
 202             base += (signed short)off;
 203             break;
 204         }
 205         base &= 0xffff;
 206     }
 207     if (segprefix != -1) seg = segprefix;
 208
 209     /* Make sure the segment and offset are valid */
 210     if (IS_SELECTOR_SYSTEM(seg)) return (BYTE *)(base + (index << ss));
 211     if (((seg & 7) != 7) || IS_SELECTOR_FREE(seg)) return NULL;
 212     if (GET_SEL_LIMIT(seg) < (base + (index << ss))) return NULL;
 213     return (BYTE *)PTR_SEG_OFF_TO_LIN( seg, (base + (index << ss)) );
 214 #undef GET_VAL
 215 }
 216
 217
 218 /***********************************************************************
 219  *           INSTR_EmulateLDS
 220  *
 221  * Emulate the LDS (and LES,LFS,etc.) instruction.
 222  */
 223 static BOOL32 INSTR_EmulateLDS( SIGCONTEXT *context, BYTE *instr, int long_op,
 224                                 int long_addr, int segprefix, int *len )
 225 {
 226     WORD seg;
 227     BYTE *regmodrm = instr + 1 + (*instr == 0x0f);
 228     BYTE *addr = INSTR_GetOperandAddr( context, regmodrm,
 229                                        long_addr, segprefix, len );
 230     if (!addr)
 231         return FALSE;  /* Unable to emulate it */
 232     seg = *(WORD *)(addr + (long_op ? 4 : 2));
 233
 234     if (!(seg = INSTR_ReplaceSelector( context, seg )))
 235         return FALSE;  /* Unable to emulate it */
 236
 237     /* Now store the offset in the correct register */
 238
 239     switch((*regmodrm >> 3) & 7)
 240     {
 241     case 0:
 242         if (long_op) EAX_sig(context) = *(DWORD *)addr;
 243         else AX_sig(context) = *(WORD *)addr;
 244         break;
 245     case 1:
 246         if (long_op) ECX_sig(context) = *(DWORD *)addr;
 247         else CX_sig(context) = *(WORD *)addr;
 248         break;
 249     case 2:
 250         if (long_op) EDX_sig(context) = *(DWORD *)addr;
 251         else DX_sig(context) = *(WORD *)addr;
 252         break;
 253     case 3:
 254         if (long_op) EBX_sig(context) = *(DWORD *)addr;
 255         else BX_sig(context) = *(WORD *)addr;
 256         break;
 257     case 4:
 258         if (long_op) ESP_sig(context) = *(DWORD *)addr;
 259         else SP_sig(context) = *(WORD *)addr;
 260         break;
 261     case 5:
 262         if (long_op) EBP_sig(context) = *(DWORD *)addr;
 263         else BP_sig(context) = *(WORD *)addr;
 264         break;
 265     case 6:
 266         if (long_op) ESI_sig(context) = *(DWORD *)addr;
 267         else SI_sig(context) = *(WORD *)addr;
 268         break;
 269     case 7:
 270         if (long_op) EDI_sig(context) = *(DWORD *)addr;
 271         else DI_sig(context) = *(WORD *)addr;
 272         break;
 273     }
 274
 275     /* Store the correct segment in the segment register */
 276
 277     switch(*instr)
 278     {
 279     case 0xc4: ES_sig(context) = seg; break;  /* les */
 280     case 0xc5: DS_sig(context) = seg; break;  /* lds */
 281     case 0x0f: switch(instr[1])
 282                {
 283                case 0xb2: SS_sig(context) = seg; break;  /* lss */
 284 #ifdef FS_sig
 285                case 0xb4: FS_sig(context) = seg; break;  /* lfs */
 286 #endif
 287 #ifdef GS_sig
 288                case 0xb5: GS_sig(context) = seg; break;  /* lgs */
 289 #endif
 290                }
 291                break;
 292     }
 293
 294     /* Add the opcode size to the total length */
 295
 296     *len += 1 + (*instr == 0x0f);
 297     return TRUE;
 298 }
 299
 300
 301 /***********************************************************************
 302  *           INSTR_EmulateInstruction
 303  *
 304  * Emulate a priviledged instruction. Returns TRUE if emulation successful.
 305  */
 306 BOOL32 INSTR_EmulateInstruction( SIGCONTEXT *context )
 307 {
 308     int prefix, segprefix, prefixlen, len, repX, long_op, long_addr;
 309     SEGPTR gpHandler;
 310     BYTE *instr;
 311
 312     /* Check for page-fault */
 313
 314 #if defined(TRAP_sig) && defined(CR2_sig)
 315     if (TRAP_sig(context) == 0x0e
 316         && VIRTUAL_HandleFault( (LPVOID)CR2_sig(context) )) return TRUE;
 317 #endif
 318
 319     long_op = long_addr = IS_SEL_32(context,CS_sig(context));
 320     instr = (BYTE *)MK_PTR(context,CS_sig(context),EIP_sig(context));
 321     if (!instr) return FALSE;
 322
 323     /* First handle any possible prefix */
 324
 325     segprefix = -1;  /* no prefix */
 326     prefix = 1;
 327     repX = 0;
 328     prefixlen = 0;
 329     while(prefix)
 330     {
 331         switch(*instr)
 332         {
 333         case 0x2e:
 334             segprefix = CS_sig(context);
 335             break;
 336         case 0x36:
 337             segprefix = SS_sig(context);
 338             break;
 339         case 0x3e:
 340             segprefix = DS_sig(context);
 341             break;
 342         case 0x26:
 343             segprefix = ES_sig(context);
 344             break;
 345 #ifdef FS_sig
 346         case 0x64:
 347             segprefix = FS_sig(context);
 348             break;
 349 #endif
 350 #ifdef GS_sig
 351         case 0x65:
 352             segprefix = GS_sig(context);
 353             break;
 354 #endif
 355         case 0x66:
 356             long_op = !long_op;  /* opcode size prefix */
 357             break;
 358         case 0x67:
 359             long_addr = !long_addr;  /* addr size prefix */
 360             break;
 361         case 0xf0:  /* lock */
 362             break;
 363         case 0xf2:  /* repne */
 364             repX = 1;
 365             break;
 366         case 0xf3:  /* repe */
 367             repX = 2;
 368             break;
 369         default:
 370             prefix = 0;  /* no more prefixes */
 371             break;
 372         }
 373         if (prefix)
 374         {
 375             instr++;
 376             prefixlen++;
 377         }
 378     }
 379
 380     /* Now look at the actual instruction */
 381
 382     switch(*instr)
 383     {
 384         case 0x07: /* pop es */
 385         case 0x17: /* pop ss */
 386         case 0x1f: /* pop ds */
 387             {
 388                 WORD seg = *(WORD *)STACK_PTR( context );
 389                 if ((seg = INSTR_ReplaceSelector( context, seg )) != 0)
 390                 {
 391                     switch(*instr)
 392                     {
 393                     case 0x07: ES_sig(context) = seg; break;
 394                     case 0x17: SS_sig(context) = seg; break;
 395                     case 0x1f: DS_sig(context) = seg; break;
 396                     }
 397                     STACK_sig(context) += long_op ? 4 : 2;
 398                     EIP_sig(context) += prefixlen + 1;
 399                     return TRUE;
 400                 }
 401             }
 402             break;  /* Unable to emulate it */
 403
 404         case 0x0f: /* extended instruction */
 405             switch(instr[1])
 406             {
 407             case 0x20: /* mov cr4, eax */
 408                 if (instr[2]!=0xe0)
 409                         break;
 410                 /* CR4 register . See linux/arch/i386/mm/init.c, X86_CR4_ defs
 411                  * bit 0: VME   Virtual Mode Exception ?
 412                  * bit 1: PVI   Protected mode Virtual Interrupt
 413                  * bit 2: TSD   Timestamp disable
 414                  * bit 3: DE    Debugging extensions
 415                  * bit 4: PSE   Page size extensions
 416                  * bit 5: PAE   Physical address extension
 417                  * bit 6: MCE   Machine check enable
 418                  * bit 7: PGE   Enable global pages
 419                  * bit 8: PCE   Enable performance counters at IPL3
 420                  */
 421                 fprintf(stderr,"mov cr4,eax at 0x%08lx\n",EIP_sig(context));
 422                 EAX_sig(context) = 0;
 423                 EIP_sig(context) += prefixlen+3;
 424                 return TRUE;
 425 #ifdef FS_sig
 426             case 0xa1: /* pop fs */
 427                 {
 428                     WORD seg = *(WORD *)STACK_PTR( context );
 429                     if ((seg = INSTR_ReplaceSelector( context, seg )) != 0)
 430                     {
 431                         FS_sig(context) = seg;
 432                         STACK_sig(context) += long_op ? 4 : 2;
 433                         EIP_sig(context) += prefixlen + 2;
 434                         return TRUE;
 435                     }
 436                 }
 437                 break;
 438 #endif  /* FS_sig */
 439
 440 #ifdef GS_sig
 441             case 0xa9: /* pop gs */
 442                 {
 443                     WORD seg = *(WORD *)STACK_PTR( context );
 444                     if ((seg = INSTR_ReplaceSelector( context, seg )) != 0)
 445                     {
 446                         GS_sig(context) = seg;
 447                         STACK_sig(context) += long_op ? 4 : 2;
 448                         EIP_sig(context) += prefixlen + 2;
 449                         return TRUE;
 450                     }
 451                 }
 452                 break;
 453 #endif  /* GS_sig */
 454
 455             case 0xb2: /* lss addr,reg */
 456 #ifdef FS_sig
 457             case 0xb4: /* lfs addr,reg */
 458 #endif
 459 #ifdef GS_sig
 460             case 0xb5: /* lgs addr,reg */
 461 #endif
 462                 if (INSTR_EmulateLDS( context, instr, long_op,
 463                                       long_addr, segprefix, &len ))
 464                 {
 465                     EIP_sig(context) += prefixlen + len;
 466                     return TRUE;
 467                 }
 468                 break;
 469             }
 470             break;  /* Unable to emulate it */
 471
 472         case 0x6c: /* insb     */
 473         case 0x6d: /* insw/d   */
 474         case 0x6e: /* outsb    */
 475         case 0x6f: /* outsw/d  */
 476             {
 477               int typ = *instr;  /* Just in case it's overwritten.  */
 478               int outp = (typ >= 0x6e);
 479               unsigned long count = repX ?
 480                           (long_addr ? ECX_sig(context) : CX_sig(context)) : 1;
 481               int opsize = (typ & 1) ? (long_op ? 4 : 2) : 1;
 482               int step = (EFL_sig(context) & 0x400) ? -opsize : +opsize;
 483               int seg = outp ? DS_sig(context) : ES_sig(context);  /* FIXME: is this right? */
 484
 485               if (outp)
 486                 /* FIXME: Check segment readable.  */
 487                 (void)0;
 488               else
 489                 /* FIXME: Check segment writeable.  */
 490                 (void)0;
 491
 492               if (repX)
 493               {
 494                 if (long_addr)
 495                   ECX_sig(context) = 0;
 496                 else
 497                   CX_sig(context) = 0;
 498               }
 499
 500               while (count-- > 0)
 501                 {
 502                   void *data;
 503                   if (outp)
 504                   {
 505                       data = MAKE_PTR(seg,
 506                                long_addr ? ESI_sig(context) : SI_sig(context));
 507                       if (long_addr) ESI_sig(context) += step;
 508                       else SI_sig(context) += step;
 509                   }
 510                   else
 511                   {
 512                       data = MAKE_PTR(seg,
 513                                long_addr ? EDI_sig(context) : DI_sig(context));
 514                       if (long_addr) EDI_sig(context) += step;
 515                       else DI_sig(context) += step;
 516                   }
 517
 518                   switch (typ)
 519                   {
 520                     case 0x6c:
 521                       *((BYTE *)data) = IO_inport( DX_sig(context), 1);
 522                       TRACE(io, "0x%x < %02x @ %04x:%04x\n", DX_sig(context),
 523                         *((BYTE *)data), CS_sig(context), IP_sig(context));
 524                       break;
 525                     case 0x6d:
 526                       if (long_op)
 527                       {
 528                         *((DWORD *)data) = IO_inport( DX_sig(context), 4);
 529                         TRACE(io, "0x%x < %08lx @ %04x:%04x\n", DX_sig(context),
 530                           *((DWORD *)data), CS_sig(context), IP_sig(context));
 531                       }
 532                       else
 533                       {
 534                         *((WORD *)data) = IO_inport( DX_sig(context), 2);
 535                         TRACE(io, "0x%x < %04x @ %04x:%04x\n", DX_sig(context),
 536                           *((WORD *)data), CS_sig(context), IP_sig(context));
 537                       }
 538                       break;
 539                     case 0x6e:
 540                         IO_outport( DX_sig(context), 1, *((BYTE *)data));
 541                         TRACE(io, "0x%x > %02x @ %04x:%04x\n", DX_sig(context),
 542                           *((BYTE *)data), CS_sig(context), IP_sig(context));
 543                         break;
 544                     case 0x6f:
 545                         if (long_op)
 546                         {
 547                             IO_outport( DX_sig(context), 4, *((DWORD *)data));
 548                             TRACE(io, "0x%x > %08lx @ %04x:%04x\n", DX_sig(context),
 549                               *((DWORD *)data), CS_sig(context), IP_sig(context));
 550                         }
 551                         else
 552                         {
 553                             IO_outport( DX_sig(context), 2, *((WORD *)data));
 554                             TRACE(io, "0x%x > %04x @ %04x:%04x\n", DX_sig(context),
 555                               *((WORD *)data), CS_sig(context), IP_sig(context));
 556                         }
 557                         break;
 558                     }
 559                 }
 560               EIP_sig(context) += prefixlen + 1;
 561             }
 562             return TRUE;
 563
 564         case 0x8e: /* mov XX,segment_reg */
 565             {
 566                 WORD seg;
 567                 BYTE *addr = INSTR_GetOperandAddr(context, instr + 1,
 568                                                   long_addr, segprefix, &len );
 569                 if (!addr)
 570                     break;  /* Unable to emulate it */
 571                 seg = *(WORD *)addr;
 572                 if (!(seg = INSTR_ReplaceSelector( context, seg )))
 573                     break;  /* Unable to emulate it */
 574
 575                 switch((instr[1] >> 3) & 7)
 576                 {
 577                 case 0:
 578                     ES_sig(context) = seg;
 579                     EIP_sig(context) += prefixlen + len + 1;
 580                     return TRUE;
 581                 case 1:  /* cs */
 582                     break;
 583                 case 2:
 584                     SS_sig(context) = seg;
 585                     EIP_sig(context) += prefixlen + len + 1;
 586                     return TRUE;
 587                 case 3:
 588                     DS_sig(context) = seg;
 589                     EIP_sig(context) += prefixlen + len + 1;
 590                     return TRUE;
 591                 case 4:
 592 #ifdef FS_sig
 593                     FS_sig(context) = seg;
 594                     EIP_sig(context) += prefixlen + len + 1;
 595                     return TRUE;
 596 #endif
 597                 case 5:
 598 #ifdef GS_sig
 599                     GS_sig(context) = seg;
 600                     EIP_sig(context) += prefixlen + len + 1;
 601                     return TRUE;
 602 #endif
 603                 case 6:  /* unused */
 604                 case 7:  /* unused */
 605                     break;
 606                 }
 607             }
 608             break;  /* Unable to emulate it */
 609
 610         case 0xc4: /* les addr,reg */
 611         case 0xc5: /* lds addr,reg */
 612             if (INSTR_EmulateLDS( context, instr, long_op,
 613                                   long_addr, segprefix, &len ))
 614             {
 615                 EIP_sig(context) += prefixlen + len;
 616                 return TRUE;
 617             }
 618             break;  /* Unable to emulate it */
 619
 620         case 0xcd: /* int <XX> */
 621             if (long_op)
 622             {
 623                 ERR(int, "int xx from 32-bit code is not supported.\n");
 624                 break;  /* Unable to emulate it */
 625             }
 626             else
 627             {
 628                 FARPROC16 addr = INT_GetPMHandler( instr[1] );
 629                 WORD *stack = (WORD *)STACK_PTR( context );
 630                 /* Push the flags and return address on the stack */
 631                 *(--stack) = FL_sig(context);
 632                 *(--stack) = CS_sig(context);
 633                 *(--stack) = IP_sig(context) + prefixlen + 2;
 634                 STACK_sig(context) -= 3 * sizeof(WORD);
 635                 /* Jump to the interrupt handler */
 636                 CS_sig(context)  = HIWORD(addr);
 637                 EIP_sig(context) = LOWORD(addr);
 638             }
 639             return TRUE;
 640
 641         case 0xcf: /* iret */
 642             if (long_op)
 643             {
 644                 DWORD *stack = (DWORD *)STACK_PTR( context );
 645                 EIP_sig(context) = *stack++;
 646                 CS_sig(context)  = *stack++;
 647                 EFL_sig(context) = *stack;
 648                 STACK_sig(context) += 3*sizeof(DWORD);  /* Pop the return address and flags */
 649             }
 650             else
 651             {
 652                 WORD *stack = (WORD *)STACK_PTR( context );
 653                 EIP_sig(context) = *stack++;
 654                 CS_sig(context)  = *stack++;
 655                 FL_sig(context)  = *stack;
 656                 STACK_sig(context) += 3*sizeof(WORD);  /* Pop the return address and flags */
 657             }
 658             return TRUE;
 659
 660         case 0xe4: /* inb al,XX */
 661             AL_sig(context) = IO_inport( instr[1], 1 );
 662             TRACE(io, "0x%x < %02x @ %04x:%04x\n", instr[1],
 663                 AL_sig(context), CS_sig(context), IP_sig(context));
 664             EIP_sig(context) += prefixlen + 2;
 665             return TRUE;
 666
 667         case 0xe5: /* in (e)ax,XX */
 668             if (long_op)
 669             {
 670                 EAX_sig(context) = IO_inport( instr[1], 4 );
 671                 TRACE(io, "0x%x < %08lx @ %04x:%04x\n", instr[1],
 672                     EAX_sig(context), CS_sig(context), IP_sig(context));
 673             }
 674             else
 675             {
 676                 AX_sig(context) = IO_inport( instr[1], 2 );
 677                 TRACE(io, "0x%x < %04x @ %04x:%04x\n", instr[1],
 678                     AX_sig(context), CS_sig(context), IP_sig(context));
 679             }
 680             EIP_sig(context) += prefixlen + 2;
 681             return TRUE;
 682
 683         case 0xe6: /* outb XX,al */
 684             IO_outport( instr[1], 1, AL_sig(context) );
 685             TRACE(io, "0x%x > %02x @ %04x:%04x\n", instr[1],
 686                 AL_sig(context), CS_sig(context), IP_sig(context));
 687             EIP_sig(context) += prefixlen + 2;
 688             return TRUE;
 689
 690         case 0xe7: /* out XX,(e)ax */
 691             if (long_op)
 692             {
 693                 IO_outport( instr[1], 4, EAX_sig(context) );
 694                 TRACE(io, "0x%x > %08lx @ %04x:%04x\n", instr[1],
 695                     EAX_sig(context), CS_sig(context), IP_sig(context));
 696             }
 697             else
 698             {
 699                 IO_outport( instr[1], 2, AX_sig(context) );
 700                 TRACE(io, "0x%x > %04x @ %04x:%04x\n", instr[1],
 701                     AX_sig(context), CS_sig(context), IP_sig(context));
 702             }
 703             EIP_sig(context) += prefixlen + 2;
 704             return TRUE;
 705
 706         case 0xec: /* inb al,dx */
 707             AL_sig(context) = IO_inport( DX_sig(context), 1 );
 708             TRACE(io, "0x%x < %02x @ %04x:%04x\n", DX_sig(context),
 709                 AL_sig(context), CS_sig(context), IP_sig(context));
 710             EIP_sig(context) += prefixlen + 1;
 711             return TRUE;
 712
 713         case 0xed: /* in (e)ax,dx */
 714             if (long_op)
 715             {
 716                 EAX_sig(context) = IO_inport( DX_sig(context), 4 );
 717                 TRACE(io, "0x%x < %08lx @ %04x:%04x\n", DX_sig(context),
 718                     EAX_sig(context), CS_sig(context), IP_sig(context));
 719             }
 720             else
 721             {
 722                 AX_sig(context) = IO_inport( DX_sig(context), 2 );
 723                 TRACE(io, "0x%x < %04x @ %04x:%04x\n", DX_sig(context),
 724                     AX_sig(context), CS_sig(context), IP_sig(context));
 725             }
 726             EIP_sig(context) += prefixlen + 1;
 727             return TRUE;
 728
 729         case 0xee: /* outb dx,al */
 730             IO_outport( DX_sig(context), 1, AL_sig(context) );
 731             TRACE(io, "0x%x > %02x @ %04x:%04x\n", DX_sig(context),
 732                 AL_sig(context), CS_sig(context), IP_sig(context));
 733             EIP_sig(context) += prefixlen + 1;
 734             return TRUE;
 735
 736         case 0xef: /* out dx,(e)ax */
 737             if (long_op)
 738             {
 739                 IO_outport( DX_sig(context), 4, EAX_sig(context) );
 740                 TRACE(io, "0x%x > %08lx @ %04x:%04x\n", DX_sig(context),
 741                     EAX_sig(context), CS_sig(context), IP_sig(context));
 742             }
 743             else
 744             {
 745                 IO_outport( DX_sig(context), 2, AX_sig(context) );
 746                 TRACE(io, "0x%x > %04x @ %04x:%04x\n", DX_sig(context),
 747                     AX_sig(context), CS_sig(context), IP_sig(context));
 748             }
 749             EIP_sig(context) += prefixlen + 1;
 750             return TRUE;
 751
 752         case 0xfa: /* cli, ignored */
 753             EIP_sig(context) += prefixlen + 1;
 754             return TRUE;
 755
 756         case 0xfb: /* sti, ignored */
 757             EIP_sig(context) += prefixlen + 1;
 758             return TRUE;
 759     }
 760
 761
 762     /* Check for Win16 __GP handler */
 763     gpHandler = HasGPHandler( PTR_SEG_OFF_TO_SEGPTR( CS_sig(context),
 764                                                      EIP_sig(context) ) );
 765     if (gpHandler)
 766     {
 767         WORD *stack = (WORD *)STACK_PTR( context );
 768         *--stack = CS_sig(context);
 769         *--stack = EIP_sig(context);
 770         STACK_sig(context) -= 2*sizeof(WORD);
 771
 772         CS_sig(context) = SELECTOROF( gpHandler );
 773         EIP_sig(context) = OFFSETOF( gpHandler );
 774         return TRUE;
 775     }
 776
 777     MSG("Unexpected Windows program segfault"
 778                     " - opcode = %x\n", *instr);
 779     return FALSE;  /* Unable to emulate it */
 780 }