2 * Emulation of priviledged instructions
4 * Copyright 1995 Alexandre Julliard
13 #include "sig_context.h"
14 #include "selectors.h"
18 #define IS_V86(context) (EFL_sig(context)&V86_FLAG)
19 #define IS_SEL_32(context,seg) \
20 (IS_V86(context) ? FALSE : IS_SELECTOR_32BIT(seg))
22 #define STACK_sig(context) \
23 (IS_SEL_32(context,SS_sig(context)) ? ESP_sig(context) : SP_sig(context))
25 #define MAKE_PTR(seg,off) \
26 (IS_SELECTOR_SYSTEM(seg) ? (void *)(off) : PTR_SEG_OFF_TO_LIN(seg,off))
28 #define MK_PTR(context,seg,off) \
29 (IS_V86(context) ? DOSMEM_MapRealToLinear(MAKELONG(off,seg)) \
32 #define STACK_PTR(context) \
33 (IS_V86(context) ? DOSMEM_MapRealToLinear(MAKELONG(SP_sig(context),SS_sig(context))) : \
34 (IS_SELECTOR_SYSTEM(SS_sig(context)) ? (void *)ESP_sig(context) : \
35 (PTR_SEG_OFF_TO_LIN(SS_sig(context),STACK_sig(context)))))
37 /* For invalid registers fixup */
38 extern DWORD CallFrom16_Start
,CallFrom16_End
;
41 /***********************************************************************
42 * INSTR_ReplaceSelector
44 * Try to replace an invalid selector by a valid one.
45 * The only selector where it is allowed to do "mov ax,40;mov es,ax"
46 * is the so called 'bimodal' selector 0x40, which points to the BIOS
47 * data segment. Used by (at least) Borland products (and programs compiled
48 * using Borland products).
50 * See Undocumented Windows, Chapter 5, __0040.
52 static BOOL32
INSTR_ReplaceSelector( SIGCONTEXT
*context
, WORD
*sel
)
54 if (IS_SELECTOR_SYSTEM(CS_sig(context
)) &&
55 (EIP_sig(context
) >= (DWORD
)&CallFrom16_Start
) &&
56 (EIP_sig(context
) < (DWORD
)&CallFrom16_End
))
58 /* Saved selector may have become invalid when the relay code */
59 /* tries to restore it. We simply clear it. */
65 static WORD sys_timer
= 0;
67 sys_timer
= CreateSystemTimer( 55, DOSMEM_Tick
);
68 *sel
= DOSMEM_BiosDataSeg
;
71 return FALSE
; /* Can't replace selector, crashdump */
75 /***********************************************************************
76 * INSTR_GetOperandAddr
78 * Return the address of an instruction operand (from the mod/rm byte).
80 static BYTE
*INSTR_GetOperandAddr( SIGCONTEXT
*context
, BYTE
*instr
,
81 int long_addr
, int segprefix
, int *len
)
83 int mod
, rm
, base
, index
= 0, ss
= 0, seg
= 0, off
;
85 #define GET_VAL(val,type) \
86 { *val = *(type *)instr; instr += sizeof(type); *len += sizeof(type); }
89 GET_VAL( &mod
, BYTE
);
97 case 0: return (BYTE
*)&EAX_sig(context
);
98 case 1: return (BYTE
*)&ECX_sig(context
);
99 case 2: return (BYTE
*)&EDX_sig(context
);
100 case 3: return (BYTE
*)&EBX_sig(context
);
101 case 4: return (BYTE
*)&ESP_sig(context
);
102 case 5: return (BYTE
*)&EBP_sig(context
);
103 case 6: return (BYTE
*)&ESI_sig(context
);
104 case 7: return (BYTE
*)&EDI_sig(context
);
113 GET_VAL( &sib
, BYTE
);
118 case 0: index
= EAX_sig(context
); break;
119 case 1: index
= ECX_sig(context
); break;
120 case 2: index
= EDX_sig(context
); break;
121 case 3: index
= EBX_sig(context
); break;
122 case 4: index
= 0; break;
123 case 5: index
= EBP_sig(context
); break;
124 case 6: index
= ESI_sig(context
); break;
125 case 7: index
= EDI_sig(context
); break;
131 case 0: base
= EAX_sig(context
); seg
= DS_sig(context
); break;
132 case 1: base
= ECX_sig(context
); seg
= DS_sig(context
); break;
133 case 2: base
= EDX_sig(context
); seg
= DS_sig(context
); break;
134 case 3: base
= EBX_sig(context
); seg
= DS_sig(context
); break;
135 case 4: base
= ESP_sig(context
); seg
= SS_sig(context
); break;
136 case 5: base
= EBP_sig(context
); seg
= SS_sig(context
); break;
137 case 6: base
= ESI_sig(context
); seg
= DS_sig(context
); break;
138 case 7: base
= EDI_sig(context
); seg
= DS_sig(context
); break;
143 if (rm
== 5) /* special case: ds:(disp32) */
145 GET_VAL( &base
, DWORD
);
146 seg
= DS_sig(context
);
150 case 1: /* 8-bit disp */
151 GET_VAL( &off
, BYTE
);
152 base
+= (signed char)off
;
155 case 2: /* 32-bit disp */
156 GET_VAL( &off
, DWORD
);
157 base
+= (signed long)off
;
161 else /* short address */
165 case 0: /* ds:(bx,si) */
166 base
= BX_sig(context
) + SI_sig(context
);
167 seg
= DS_sig(context
);
169 case 1: /* ds:(bx,di) */
170 base
= BX_sig(context
) + DI_sig(context
);
171 seg
= DS_sig(context
);
173 case 2: /* ss:(bp,si) */
174 base
= BP_sig(context
) + SI_sig(context
);
175 seg
= SS_sig(context
);
177 case 3: /* ss:(bp,di) */
178 base
= BP_sig(context
) + DI_sig(context
);
179 seg
= SS_sig(context
);
181 case 4: /* ds:(si) */
182 base
= SI_sig(context
);
183 seg
= DS_sig(context
);
185 case 5: /* ds:(di) */
186 base
= DI_sig(context
);
187 seg
= DS_sig(context
);
189 case 6: /* ss:(bp) */
190 base
= BP_sig(context
);
191 seg
= SS_sig(context
);
193 case 7: /* ds:(bx) */
194 base
= BX_sig(context
);
195 seg
= DS_sig(context
);
202 if (rm
== 6) /* special case: ds:(disp16) */
204 GET_VAL( &base
, WORD
);
205 seg
= DS_sig(context
);
209 case 1: /* 8-bit disp */
210 GET_VAL( &off
, BYTE
);
211 base
+= (signed char)off
;
214 case 2: /* 16-bit disp */
215 GET_VAL( &off
, WORD
);
216 base
+= (signed short)off
;
221 if (segprefix
!= -1) seg
= segprefix
;
223 /* Make sure the segment and offset are valid */
224 if (IS_SELECTOR_SYSTEM(seg
)) return (BYTE
*)(base
+ (index
<< ss
));
225 if (((seg
& 7) != 7) || IS_SELECTOR_FREE(seg
)) return NULL
;
226 if (GET_SEL_LIMIT(seg
) < (base
+ (index
<< ss
))) return NULL
;
227 return (BYTE
*)PTR_SEG_OFF_TO_LIN( seg
, (base
+ (index
<< ss
)) );
232 /***********************************************************************
235 * Emulate the LDS (and LES,LFS,etc.) instruction.
237 static BOOL32
INSTR_EmulateLDS( SIGCONTEXT
*context
, BYTE
*instr
, int long_op
,
238 int long_addr
, int segprefix
, int *len
)
241 BYTE
*regmodrm
= instr
+ 1 + (*instr
== 0x0f);
242 BYTE
*addr
= INSTR_GetOperandAddr( context
, regmodrm
,
243 long_addr
, segprefix
, len
);
245 return FALSE
; /* Unable to emulate it */
246 seg
= *(WORD
*)(addr
+ (long_op
? 4 : 2));
248 if (!INSTR_ReplaceSelector( context
, &seg
))
249 return FALSE
; /* Unable to emulate it */
251 /* Now store the offset in the correct register */
253 switch((*regmodrm
>> 3) & 7)
256 if (long_op
) EAX_sig(context
) = *(DWORD
*)addr
;
257 else AX_sig(context
) = *(WORD
*)addr
;
260 if (long_op
) ECX_sig(context
) = *(DWORD
*)addr
;
261 else CX_sig(context
) = *(WORD
*)addr
;
264 if (long_op
) EDX_sig(context
) = *(DWORD
*)addr
;
265 else DX_sig(context
) = *(WORD
*)addr
;
268 if (long_op
) EBX_sig(context
) = *(DWORD
*)addr
;
269 else BX_sig(context
) = *(WORD
*)addr
;
272 if (long_op
) ESP_sig(context
) = *(DWORD
*)addr
;
273 else SP_sig(context
) = *(WORD
*)addr
;
276 if (long_op
) EBP_sig(context
) = *(DWORD
*)addr
;
277 else BP_sig(context
) = *(WORD
*)addr
;
280 if (long_op
) ESI_sig(context
) = *(DWORD
*)addr
;
281 else SI_sig(context
) = *(WORD
*)addr
;
284 if (long_op
) EDI_sig(context
) = *(DWORD
*)addr
;
285 else DI_sig(context
) = *(WORD
*)addr
;
289 /* Store the correct segment in the segment register */
293 case 0xc4: ES_sig(context
) = seg
; break; /* les */
294 case 0xc5: DS_sig(context
) = seg
; break; /* lds */
295 case 0x0f: switch(instr
[1])
297 case 0xb2: SS_sig(context
) = seg
; break; /* lss */
299 case 0xb4: FS_sig(context
) = seg
; break; /* lfs */
302 case 0xb5: GS_sig(context
) = seg
; break; /* lgs */
308 /* Add the opcode size to the total length */
310 *len
+= 1 + (*instr
== 0x0f);
315 /***********************************************************************
316 * INSTR_EmulateInstruction
318 * Emulate a priviledged instruction. Returns TRUE if emulation successful.
320 BOOL32
INSTR_EmulateInstruction( SIGCONTEXT
*context
)
322 int prefix
, segprefix
, prefixlen
, len
, repX
, long_op
, long_addr
;
326 long_op
= long_addr
= IS_SEL_32(context
,CS_sig(context
));
327 instr
= (BYTE
*)MK_PTR(context
,CS_sig(context
),EIP_sig(context
));
328 if (!instr
) return FALSE
;
330 /* First handle any possible prefix */
332 segprefix
= -1; /* no prefix */
341 segprefix
= CS_sig(context
);
344 segprefix
= SS_sig(context
);
347 segprefix
= DS_sig(context
);
350 segprefix
= ES_sig(context
);
354 segprefix
= FS_sig(context
);
359 segprefix
= GS_sig(context
);
363 long_op
= !long_op
; /* opcode size prefix */
366 long_addr
= !long_addr
; /* addr size prefix */
368 case 0xf0: /* lock */
370 case 0xf2: /* repne */
373 case 0xf3: /* repe */
377 prefix
= 0; /* no more prefixes */
387 /* Now look at the actual instruction */
391 case 0x07: /* pop es */
392 case 0x17: /* pop ss */
393 case 0x1f: /* pop ds */
395 WORD seg
= *(WORD
*)STACK_PTR( context
);
396 if (INSTR_ReplaceSelector( context
, &seg
))
400 case 0x07: ES_sig(context
) = seg
; break;
401 case 0x17: SS_sig(context
) = seg
; break;
402 case 0x1f: DS_sig(context
) = seg
; break;
404 STACK_sig(context
) += long_op
? 4 : 2;
405 EIP_sig(context
) += prefixlen
+ 1;
409 break; /* Unable to emulate it */
411 case 0x0f: /* extended instruction */
414 case 0x20: /* mov cr4, eax */
417 /* CR4 register . See linux/arch/i386/mm/init.c, X86_CR4_ defs
418 * bit 0: VME Virtual Mode Exception ?
419 * bit 1: PVI Protected mode Virtual Interrupt
420 * bit 2: TSD Timestamp disable
421 * bit 3: DE Debugging extensions
422 * bit 4: PSE Page size extensions
423 * bit 5: PAE Physical address extension
424 * bit 6: MCE Machine check enable
425 * bit 7: PGE Enable global pages
426 * bit 8: PCE Enable performance counters at IPL3
428 fprintf(stderr
,"mov cr4,eax at 0x%08lx\n",EIP_sig(context
));
429 EAX_sig(context
) = 0;
430 EIP_sig(context
) += prefixlen
+3;
433 case 0xa1: /* pop fs */
435 WORD seg
= *(WORD
*)STACK_PTR( context
);
436 if (INSTR_ReplaceSelector( context
, &seg
))
438 FS_sig(context
) = seg
;
439 STACK_sig(context
) += long_op
? 4 : 2;
440 EIP_sig(context
) += prefixlen
+ 2;
448 case 0xa9: /* pop gs */
450 WORD seg
= *(WORD
*)STACK_PTR( context
);
451 if (INSTR_ReplaceSelector( context
, &seg
))
453 GS_sig(context
) = seg
;
454 STACK_sig(context
) += long_op
? 4 : 2;
455 EIP_sig(context
) += prefixlen
+ 2;
462 case 0xb2: /* lss addr,reg */
464 case 0xb4: /* lfs addr,reg */
467 case 0xb5: /* lgs addr,reg */
469 if (INSTR_EmulateLDS( context
, instr
, long_op
,
470 long_addr
, segprefix
, &len
))
472 EIP_sig(context
) += prefixlen
+ len
;
477 break; /* Unable to emulate it */
479 case 0x6c: /* insb */
480 case 0x6d: /* insw/d */
481 case 0x6e: /* outsb */
482 case 0x6f: /* outsw/d */
484 int typ
= *instr
; /* Just in case it's overwritten. */
485 int outp
= (typ
>= 0x6e);
486 unsigned long count
= repX
?
487 (long_addr
? ECX_sig(context
) : CX_sig(context
)) : 1;
488 int opsize
= (typ
& 1) ? (long_op
? 4 : 2) : 1;
489 int step
= (EFL_sig(context
) & 0x400) ? -opsize
: +opsize
;
490 int seg
= outp
? DS_sig(context
) : ES_sig(context
); /* FIXME: is this right? */
493 /* FIXME: Check segment readable. */
496 /* FIXME: Check segment writeable. */
502 ECX_sig(context
) = 0;
512 data
= MK_PTR(context
, seg
,
513 long_addr
? ESI_sig(context
) : SI_sig(context
));
514 if (long_addr
) ESI_sig(context
) += step
;
515 else SI_sig(context
) += step
;
519 data
= MK_PTR(context
, seg
,
520 long_addr
? EDI_sig(context
) : DI_sig(context
));
521 if (long_addr
) EDI_sig(context
) += step
;
522 else DI_sig(context
) += step
;
528 *((BYTE
*)data
) = IO_inport( DX_sig(context
), 1);
529 TRACE(io
, "0x%x < %02x @ %04x:%04x\n", DX_sig(context
),
530 *((BYTE
*)data
), CS_sig(context
), IP_sig(context
));
535 *((DWORD
*)data
) = IO_inport( DX_sig(context
), 4);
536 TRACE(io
, "0x%x < %08lx @ %04x:%04x\n", DX_sig(context
),
537 *((DWORD
*)data
), CS_sig(context
), IP_sig(context
));
541 *((WORD
*)data
) = IO_inport( DX_sig(context
), 2);
542 TRACE(io
, "0x%x < %04x @ %04x:%04x\n", DX_sig(context
),
543 *((WORD
*)data
), CS_sig(context
), IP_sig(context
));
547 IO_outport( DX_sig(context
), 1, *((BYTE
*)data
));
548 TRACE(io
, "0x%x > %02x @ %04x:%04x\n", DX_sig(context
),
549 *((BYTE
*)data
), CS_sig(context
), IP_sig(context
));
554 IO_outport( DX_sig(context
), 4, *((DWORD
*)data
));
555 TRACE(io
, "0x%x > %08lx @ %04x:%04x\n", DX_sig(context
),
556 *((DWORD
*)data
), CS_sig(context
), IP_sig(context
));
560 IO_outport( DX_sig(context
), 2, *((WORD
*)data
));
561 TRACE(io
, "0x%x > %04x @ %04x:%04x\n", DX_sig(context
),
562 *((WORD
*)data
), CS_sig(context
), IP_sig(context
));
567 EIP_sig(context
) += prefixlen
+ 1;
571 case 0x8e: /* mov XX,segment_reg */
574 BYTE
*addr
= INSTR_GetOperandAddr(context
, instr
+ 1,
575 long_addr
, segprefix
, &len
);
577 break; /* Unable to emulate it */
579 if (!INSTR_ReplaceSelector( context
, &seg
))
580 break; /* Unable to emulate it */
582 switch((instr
[1] >> 3) & 7)
585 ES_sig(context
) = seg
;
586 EIP_sig(context
) += prefixlen
+ len
+ 1;
591 SS_sig(context
) = seg
;
592 EIP_sig(context
) += prefixlen
+ len
+ 1;
595 DS_sig(context
) = seg
;
596 EIP_sig(context
) += prefixlen
+ len
+ 1;
600 FS_sig(context
) = seg
;
601 EIP_sig(context
) += prefixlen
+ len
+ 1;
606 GS_sig(context
) = seg
;
607 EIP_sig(context
) += prefixlen
+ len
+ 1;
615 break; /* Unable to emulate it */
617 case 0xc4: /* les addr,reg */
618 case 0xc5: /* lds addr,reg */
619 if (INSTR_EmulateLDS( context
, instr
, long_op
,
620 long_addr
, segprefix
, &len
))
622 EIP_sig(context
) += prefixlen
+ len
;
625 break; /* Unable to emulate it */
627 case 0xcd: /* int <XX> */
630 ERR(int, "int xx from 32-bit code is not supported.\n");
631 break; /* Unable to emulate it */
635 FARPROC16 addr
= INT_GetPMHandler( instr
[1] );
636 WORD
*stack
= (WORD
*)STACK_PTR( context
);
637 /* Push the flags and return address on the stack */
638 *(--stack
) = FL_sig(context
);
639 *(--stack
) = CS_sig(context
);
640 *(--stack
) = IP_sig(context
) + prefixlen
+ 2;
641 STACK_sig(context
) -= 3 * sizeof(WORD
);
642 /* Jump to the interrupt handler */
643 CS_sig(context
) = HIWORD(addr
);
644 EIP_sig(context
) = LOWORD(addr
);
648 case 0xcf: /* iret */
651 DWORD
*stack
= (DWORD
*)STACK_PTR( context
);
652 EIP_sig(context
) = *stack
++;
653 CS_sig(context
) = *stack
++;
654 EFL_sig(context
) = *stack
;
655 STACK_sig(context
) += 3*sizeof(DWORD
); /* Pop the return address and flags */
659 WORD
*stack
= (WORD
*)STACK_PTR( context
);
660 EIP_sig(context
) = *stack
++;
661 CS_sig(context
) = *stack
++;
662 FL_sig(context
) = *stack
;
663 STACK_sig(context
) += 3*sizeof(WORD
); /* Pop the return address and flags */
667 case 0xe4: /* inb al,XX */
668 AL_sig(context
) = IO_inport( instr
[1], 1 );
669 TRACE(io
, "0x%x < %02x @ %04x:%04x\n", instr
[1],
670 AL_sig(context
), CS_sig(context
), IP_sig(context
));
671 EIP_sig(context
) += prefixlen
+ 2;
674 case 0xe5: /* in (e)ax,XX */
677 EAX_sig(context
) = IO_inport( instr
[1], 4 );
678 TRACE(io
, "0x%x < %08lx @ %04x:%04x\n", instr
[1],
679 EAX_sig(context
), CS_sig(context
), IP_sig(context
));
683 AX_sig(context
) = IO_inport( instr
[1], 2 );
684 TRACE(io
, "0x%x < %04x @ %04x:%04x\n", instr
[1],
685 AX_sig(context
), CS_sig(context
), IP_sig(context
));
687 EIP_sig(context
) += prefixlen
+ 2;
690 case 0xe6: /* outb XX,al */
691 IO_outport( instr
[1], 1, AL_sig(context
) );
692 TRACE(io
, "0x%x > %02x @ %04x:%04x\n", instr
[1],
693 AL_sig(context
), CS_sig(context
), IP_sig(context
));
694 EIP_sig(context
) += prefixlen
+ 2;
697 case 0xe7: /* out XX,(e)ax */
700 IO_outport( instr
[1], 4, EAX_sig(context
) );
701 TRACE(io
, "0x%x > %08lx @ %04x:%04x\n", instr
[1],
702 EAX_sig(context
), CS_sig(context
), IP_sig(context
));
706 IO_outport( instr
[1], 2, AX_sig(context
) );
707 TRACE(io
, "0x%x > %04x @ %04x:%04x\n", instr
[1],
708 AX_sig(context
), CS_sig(context
), IP_sig(context
));
710 EIP_sig(context
) += prefixlen
+ 2;
713 case 0xec: /* inb al,dx */
714 AL_sig(context
) = IO_inport( DX_sig(context
), 1 );
715 TRACE(io
, "0x%x < %02x @ %04x:%04x\n", DX_sig(context
),
716 AL_sig(context
), CS_sig(context
), IP_sig(context
));
717 EIP_sig(context
) += prefixlen
+ 1;
720 case 0xed: /* in (e)ax,dx */
723 EAX_sig(context
) = IO_inport( DX_sig(context
), 4 );
724 TRACE(io
, "0x%x < %08lx @ %04x:%04x\n", DX_sig(context
),
725 EAX_sig(context
), CS_sig(context
), IP_sig(context
));
729 AX_sig(context
) = IO_inport( DX_sig(context
), 2 );
730 TRACE(io
, "0x%x < %04x @ %04x:%04x\n", DX_sig(context
),
731 AX_sig(context
), CS_sig(context
), IP_sig(context
));
733 EIP_sig(context
) += prefixlen
+ 1;
736 case 0xee: /* outb dx,al */
737 IO_outport( DX_sig(context
), 1, AL_sig(context
) );
738 TRACE(io
, "0x%x > %02x @ %04x:%04x\n", DX_sig(context
),
739 AL_sig(context
), CS_sig(context
), IP_sig(context
));
740 EIP_sig(context
) += prefixlen
+ 1;
743 case 0xef: /* out dx,(e)ax */
746 IO_outport( DX_sig(context
), 4, EAX_sig(context
) );
747 TRACE(io
, "0x%x > %08lx @ %04x:%04x\n", DX_sig(context
),
748 EAX_sig(context
), CS_sig(context
), IP_sig(context
));
752 IO_outport( DX_sig(context
), 2, AX_sig(context
) );
753 TRACE(io
, "0x%x > %04x @ %04x:%04x\n", DX_sig(context
),
754 AX_sig(context
), CS_sig(context
), IP_sig(context
));
756 EIP_sig(context
) += prefixlen
+ 1;
759 case 0xfa: /* cli, ignored */
760 EIP_sig(context
) += prefixlen
+ 1;
763 case 0xfb: /* sti, ignored */
764 EIP_sig(context
) += prefixlen
+ 1;
769 /* Check for Win16 __GP handler */
770 gpHandler
= HasGPHandler( PTR_SEG_OFF_TO_SEGPTR( CS_sig(context
),
771 EIP_sig(context
) ) );
774 WORD
*stack
= (WORD
*)STACK_PTR( context
);
775 *--stack
= CS_sig(context
);
776 *--stack
= EIP_sig(context
);
777 STACK_sig(context
) -= 2*sizeof(WORD
);
779 CS_sig(context
) = SELECTOROF( gpHandler
);
780 EIP_sig(context
) = OFFSETOF( gpHandler
);
784 MSG("Unexpected Windows program segfault"
785 " - opcode = %x\n", *instr
);
786 return FALSE
; /* Unable to emulate it */