Revert "TODO epan/dissectors/asn1/kerberos/packet-kerberos-template.c new GSS flags"
[wireshark-sm.git] / epan / dissectors / packet-ipmi-picmg.c
blob38984c2b811da269b0fda33a21f582509cecc537
1 /* packet-ipmi-picmg.c
2 * Sub-dissectors for IPMI messages (netFn=Group, defining body = PICMG)
3 * Copyright 2007-2008, Alexey Neyman, Pigeon Point Systems <avn@pigeonpoint.com>
5 * Wireshark - Network traffic analyzer
6 * By Gerald Combs <gerald@wireshark.org>
7 * Copyright 1998 Gerald Combs
9 * SPDX-License-Identifier: GPL-2.0-or-later
12 #include "config.h"
14 #include <epan/packet.h>
15 #include <epan/tfs.h>
16 #include <wsutil/array.h>
18 #include "packet-ipmi.h"
20 void proto_register_ipmi_picmg(void);
22 static int ett_ipmi_picmg_led_color;
23 static int ett_ipmi_picmg_05_byte1;
24 static int ett_ipmi_picmg_06_byte1;
25 static int ett_ipmi_picmg_06_byte2;
26 static int ett_ipmi_picmg_06_byte3;
27 static int ett_ipmi_picmg_link_info;
28 static int ett_ipmi_picmg_08_byte1;
29 static int ett_ipmi_picmg_09_ipmba;
30 static int ett_ipmi_picmg_09_ipmbb;
31 static int ett_ipmi_picmg_0a_byte2;
32 static int ett_ipmi_picmg_0a_byte3;
33 static int ett_ipmi_picmg_0b_byte1;
34 static int ett_ipmi_picmg_0f_chan;
35 static int ett_ipmi_picmg_12_byte1;
36 static int ett_ipmi_picmg_14_prop;
37 static int ett_ipmi_picmg_1e_byte1;
38 static int ett_ipmi_picmg_21_byte9;
39 static int ett_ipmi_picmg_XX_compbits;
40 static int ett_ipmi_picmg_2e_byte2;
41 static int ett_ipmi_picmg_prop00_byte1;
42 static int ett_ipmi_picmg_prop01_byte1;
43 static int ett_ipmi_picmg_34_byte3;
44 static int ett_ipmi_picmg_36_byte2;
45 static int ett_ipmi_picmg_37_byte2;
46 static int ett_ipmi_picmg_link_state;
47 static int ett_ipmi_picmg_link_dev;
49 static int ett_ipmi_picmg_clock_setting;
50 static int ett_ipmi_picmg_clock_res;
52 static int ett_ipmi_picmg_hpm_caps;
54 static int ett_ipmi_picmg_47_byte1;
56 static int ett_ipmi_picmg_23_rq_byte2;
57 static int ett_ipmi_picmg_23_rs_byte5;
58 static int ett_ipmi_picmg_25_rs_byte4;
59 static int ett_ipmi_picmg_25_rs_byte5;
60 static int ett_ipmi_picmg_27_rs_byte3;
61 static int ett_ipmi_picmg_28_rq_byte3;
62 static int ett_ipmi_picmg_29_rs_byte3;
64 static int hf_ipmi_picmg_led_function;
65 static int hf_ipmi_picmg_led_on_duration;
66 static int hf_ipmi_picmg_led_color;
68 static int hf_ipmi_picmg_linkinfo_grpid;
69 static int hf_ipmi_picmg_linkinfo_type_ext;
70 static int hf_ipmi_picmg_linkinfo_type;
71 static int hf_ipmi_picmg_linkinfo_ports;
72 static int hf_ipmi_picmg_linkinfo_iface;
73 static int hf_ipmi_picmg_linkinfo_chan;
74 static int hf_ipmi_picmg_linkinfo_state;
75 static int hf_ipmi_picmg_linkinfo;
76 static int hf_ipmi_picmg_linkinfo_amc_chan;
77 static int hf_ipmi_picmg_linkinfo_amc_ports;
78 static int hf_ipmi_picmg_linkinfo_amc_type;
79 static int hf_ipmi_picmg_linkinfo_amc_type_ext;
80 static int hf_ipmi_picmg_linkinfo_amc_grpid;
81 static int hf_ipmi_picmg_linkinfo_state_0;
82 static int hf_ipmi_picmg_linkinfo_state_1;
83 static int hf_ipmi_picmg_linkinfo_dev;
84 static int hf_ipmi_picmg_linkinfo_dev_type;
85 static int hf_ipmi_picmg_linkinfo_dev_id;
87 static int hf_ipmi_picmg_clock_id;
88 static int hf_ipmi_picmg_clock_cfg;
89 static int hf_ipmi_picmg_clock_setting;
90 static int hf_ipmi_picmg_clock_state;
91 static int hf_ipmi_picmg_clock_dir;
92 static int hf_ipmi_picmg_clock_pll;
93 static int hf_ipmi_picmg_clock_family;
94 static int hf_ipmi_picmg_clock_accuracy;
95 static int hf_ipmi_picmg_clock_frequency;
96 static int hf_ipmi_picmg_clock_resource;
97 static int hf_ipmi_picmg_clock_resource_type;
98 static int hf_ipmi_picmg_clock_resource_dev;
100 static int hf_ipmi_picmg_00_version;
101 static int hf_ipmi_picmg_00_max_fruid;
102 static int hf_ipmi_picmg_00_ipmc_fruid;
104 static int hf_ipmi_picmg_01_rq_fruid;
105 static int hf_ipmi_picmg_01_rq_addr_key_type;
106 static int hf_ipmi_picmg_01_rq_addr_key;
107 static int hf_ipmi_picmg_01_rq_site_type;
108 static int hf_ipmi_picmg_01_rs_hwaddr;
109 static int hf_ipmi_picmg_01_rs_ipmbaddr;
110 static int hf_ipmi_picmg_01_rs_rsrv;
111 static int hf_ipmi_picmg_01_rs_fruid;
112 static int hf_ipmi_picmg_01_rs_site_num;
113 static int hf_ipmi_picmg_01_rs_site_type;
115 static int hf_ipmi_picmg_02_shelf_address;
116 static int hf_ipmi_picmg_02_shelf_type;
117 static int hf_ipmi_picmg_02_shelf_length;
119 static int hf_ipmi_picmg_03_shelf_address;
120 static int hf_ipmi_picmg_03_shelf_type;
121 static int hf_ipmi_picmg_03_shelf_length;
123 static int hf_ipmi_picmg_04_fruid;
124 static int hf_ipmi_picmg_04_cmd;
126 static int hf_ipmi_picmg_05_fruid;
127 static int hf_ipmi_picmg_05_led3;
128 static int hf_ipmi_picmg_05_led2;
129 static int hf_ipmi_picmg_05_led1;
130 static int hf_ipmi_picmg_05_blue_led;
131 static int hf_ipmi_picmg_05_app_leds;
133 static int hf_ipmi_picmg_06_fruid;
134 static int hf_ipmi_picmg_06_ledid;
135 static int hf_ipmi_picmg_06_cap_white;
136 static int hf_ipmi_picmg_06_cap_orange;
137 static int hf_ipmi_picmg_06_cap_amber;
138 static int hf_ipmi_picmg_06_cap_green;
139 static int hf_ipmi_picmg_06_cap_red;
140 static int hf_ipmi_picmg_06_cap_blue;
141 static int hf_ipmi_picmg_06_default_local_color;
142 static int hf_ipmi_picmg_06_default_override_color;
144 static int hf_ipmi_picmg_07_fruid;
145 static int hf_ipmi_picmg_07_ledid;
147 static int hf_ipmi_picmg_08_fruid;
148 static int hf_ipmi_picmg_08_ledid;
149 static int hf_ipmi_picmg_08_state_lamptest;
150 static int hf_ipmi_picmg_08_state_override;
151 static int hf_ipmi_picmg_08_state_local;
152 static int hf_ipmi_picmg_08_lamptest_duration;
154 static int hf_ipmi_picmg_09_ipmba;
155 static int hf_ipmi_picmg_09_ipmba_link;
156 static int hf_ipmi_picmg_09_ipmba_state;
157 static int hf_ipmi_picmg_09_ipmbb;
158 static int hf_ipmi_picmg_09_ipmbb_link;
159 static int hf_ipmi_picmg_09_ipmbb_state;
161 static int hf_ipmi_picmg_0a_fruid;
162 static int hf_ipmi_picmg_0a_msk_d_locked;
163 static int hf_ipmi_picmg_0a_msk_locked;
164 static int hf_ipmi_picmg_0a_d_locked;
165 static int hf_ipmi_picmg_0a_locked;
167 static int hf_ipmi_picmg_0b_fruid;
168 static int hf_ipmi_picmg_0b_d_locked;
169 static int hf_ipmi_picmg_0b_locked;
171 static int hf_ipmi_picmg_0c_fruid;
172 static int hf_ipmi_picmg_0c_cmd;
174 static int hf_ipmi_picmg_0d_fruid;
175 static int hf_ipmi_picmg_0d_start;
176 static int hf_ipmi_picmg_0d_recordid;
178 static int hf_ipmi_picmg_0f_iface;
179 static int hf_ipmi_picmg_0f_chan;
181 static int hf_ipmi_picmg_10_fruid;
182 static int hf_ipmi_picmg_10_nslots;
183 static int hf_ipmi_picmg_10_ipmc_loc;
185 static int hf_ipmi_picmg_11_fruid;
186 static int hf_ipmi_picmg_11_power_level;
187 static int hf_ipmi_picmg_11_set_to_desired;
189 static int hf_ipmi_picmg_12_fruid;
190 static int hf_ipmi_picmg_12_pwr_type;
191 static int hf_ipmi_picmg_12_dynamic;
192 static int hf_ipmi_picmg_12_pwr_lvl;
193 static int hf_ipmi_picmg_12_delay;
194 static int hf_ipmi_picmg_12_pwr_mult;
195 static int hf_ipmi_picmg_12_pwr_draw;
197 static int hf_ipmi_picmg_13_fruid;
199 static int hf_ipmi_picmg_14_fruid;
200 static int hf_ipmi_picmg_14_speed_min;
201 static int hf_ipmi_picmg_14_speed_max;
202 static int hf_ipmi_picmg_14_speed_norm;
203 static int hf_ipmi_picmg_14_local_control;
205 static int hf_ipmi_picmg_15_fruid;
206 static int hf_ipmi_picmg_15_fan_level;
207 static int hf_ipmi_picmg_15_local_enable;
209 static int hf_ipmi_picmg_16_fruid;
210 static int hf_ipmi_picmg_16_override_level;
211 static int hf_ipmi_picmg_16_local_level;
212 static int hf_ipmi_picmg_16_local_enable;
214 static int hf_ipmi_picmg_17_cmd;
215 static int hf_ipmi_picmg_17_resid;
216 static int hf_ipmi_picmg_17_status;
218 static int hf_ipmi_picmg_18_li_key_type;
219 static int hf_ipmi_picmg_18_li_key;
220 static int hf_ipmi_picmg_18_link_num;
221 static int hf_ipmi_picmg_18_sensor_num;
223 static int hf_ipmi_picmg_1a_flags;
225 static int hf_ipmi_picmg_1b_addr_active;
226 static int hf_ipmi_picmg_1b_addr_backup;
228 static int hf_ipmi_picmg_1c_fan_site_number;
229 static int hf_ipmi_picmg_1c_fan_enable_state;
230 static int hf_ipmi_picmg_1c_fan_policy_timeout;
231 static int hf_ipmi_picmg_1c_site_number;
232 static int hf_ipmi_picmg_1c_site_type;
234 static int hf_ipmi_picmg_1d_fan_site_number;
235 static int hf_ipmi_picmg_1d_site_number;
236 static int hf_ipmi_picmg_1d_site_type;
237 static int hf_ipmi_picmg_1d_policy;
238 static int hf_ipmi_picmg_1d_coverage;
240 static int hf_ipmi_picmg_1e_fruid;
241 static int hf_ipmi_picmg_1e_cap_diagintr;
242 static int hf_ipmi_picmg_1e_cap_graceful_reboot;
243 static int hf_ipmi_picmg_1e_cap_warm_reset;
245 static int hf_ipmi_picmg_1f_rq_fruid;
246 static int hf_ipmi_picmg_1f_rq_op;
247 static int hf_ipmi_picmg_1f_rq_lockid;
248 static int hf_ipmi_picmg_1f_rs_lockid;
249 static int hf_ipmi_picmg_1f_rs_tstamp;
251 static int hf_ipmi_picmg_20_fruid;
252 static int hf_ipmi_picmg_20_lockid;
253 static int hf_ipmi_picmg_20_offset;
254 static int hf_ipmi_picmg_20_data;
255 static int hf_ipmi_picmg_20_count;
257 static int hf_ipmi_picmg_21_addr_num;
258 static int hf_ipmi_picmg_21_tstamp;
259 static int hf_ipmi_picmg_21_addr_count;
260 static int hf_ipmi_picmg_21_site_type;
261 static int hf_ipmi_picmg_21_site_num;
262 static int hf_ipmi_picmg_21_max_unavail;
263 static int hf_ipmi_picmg_21_is_shm;
264 static int hf_ipmi_picmg_21_addr_type;
265 static int hf_ipmi_picmg_21_ipaddr;
266 static int hf_ipmi_picmg_21_rmcpport;
268 static int hf_ipmi_picmg_22_feed_idx;
269 static int hf_ipmi_picmg_22_update_cnt;
270 static int hf_ipmi_picmg_22_pwr_alloc;
272 static int hf_ipmi_picmg_XX_comp7;
273 static int hf_ipmi_picmg_XX_comp6;
274 static int hf_ipmi_picmg_XX_comp5;
275 static int hf_ipmi_picmg_XX_comp4;
276 static int hf_ipmi_picmg_XX_comp3;
277 static int hf_ipmi_picmg_XX_comp2;
278 static int hf_ipmi_picmg_XX_comp1;
279 static int hf_ipmi_picmg_XX_comp0;
281 static int hf_ipmi_picmg_2e_version;
282 static int hf_ipmi_picmg_2e_upgrade_undesirable;
283 static int hf_ipmi_picmg_2e_auto_rollback_override;
284 static int hf_ipmi_picmg_2e_ipmc_degraded;
285 static int hf_ipmi_picmg_2e_deferred_activate;
286 static int hf_ipmi_picmg_2e_services_affected;
287 static int hf_ipmi_picmg_2e_manual_rollback;
288 static int hf_ipmi_picmg_2e_auto_rollback;
289 static int hf_ipmi_picmg_2e_self_test;
290 static int hf_ipmi_picmg_2e_upgrade_tout;
291 static int hf_ipmi_picmg_2e_selftest_tout;
292 static int hf_ipmi_picmg_2e_rollback_tout;
293 static int hf_ipmi_picmg_2e_inaccessibility_tout;
295 static int hf_ipmi_picmg_prop00_cold_reset;
296 static int hf_ipmi_picmg_prop00_deferred_activation;
297 static int hf_ipmi_picmg_prop00_comparison;
298 static int hf_ipmi_picmg_prop00_preparation;
299 static int hf_ipmi_picmg_prop00_rollback;
300 static int hf_ipmi_picmg_prop01_fw_major;
301 static int hf_ipmi_picmg_prop01_fw_minor;
302 static int hf_ipmi_picmg_prop01_fw_aux;
303 static int hf_ipmi_picmg_prop02_desc;
305 static int hf_ipmi_picmg_2f_comp_id;
306 static int hf_ipmi_picmg_2f_comp_prop;
307 static int hf_ipmi_picmg_2f_prop_data;
309 static int hf_ipmi_picmg_31_action;
311 static int hf_ipmi_picmg_32_block;
312 static int hf_ipmi_picmg_32_data;
313 static int hf_ipmi_picmg_32_sec_offs;
314 static int hf_ipmi_picmg_32_sec_len;
316 static int hf_ipmi_picmg_33_comp_id;
317 static int hf_ipmi_picmg_33_img_len;
319 static int hf_ipmi_picmg_34_cmd;
320 static int hf_ipmi_picmg_34_ccode;
321 static int hf_ipmi_picmg_34_percentage;
323 static int hf_ipmi_picmg_35_rollback_override;
325 static int hf_ipmi_picmg_36_result;
326 static int hf_ipmi_picmg_36_fail;
327 static int hf_ipmi_picmg_36_fail_sel;
328 static int hf_ipmi_picmg_36_fail_sdr;
329 static int hf_ipmi_picmg_36_fail_bmc_fru;
330 static int hf_ipmi_picmg_36_fail_ipmb_sig;
331 static int hf_ipmi_picmg_36_fail_sdr_empty;
332 static int hf_ipmi_picmg_36_fail_iua;
333 static int hf_ipmi_picmg_36_fail_bb_fw;
334 static int hf_ipmi_picmg_36_fail_oper_fw;
336 static int hf_ipmi_picmg_37_percent;
338 static int hf_ipmi_picmg_hpm_id;
339 static int hf_ipmi_picmg_hpm_rev;
340 static int hf_ipmi_picmg_hpm2_mask;
341 static int hf_ipmi_picmg_hpm2_caps;
342 static int hf_ipmi_picmg_hpm2_dyn_ssn;
343 static int hf_ipmi_picmg_hpm2_ver_chg;
344 static int hf_ipmi_picmg_hpm2_ext_mgt;
345 static int hf_ipmi_picmg_hpm2_pkt_trc;
346 static int hf_ipmi_picmg_hpm2_sol_ext;
347 static int hf_ipmi_picmg_hpm_oem_start;
348 static int hf_ipmi_picmg_hpm_oem_rev;
349 static int hf_ipmi_picmg_hpm2_sol_oem_start;
350 static int hf_ipmi_picmg_hpm2_sol_oem_rev;
351 static int hf_ipmi_picmg_hpm_cred_hnd;
352 static int hf_ipmi_picmg_hpm_func_sel;
353 static int hf_ipmi_picmg_hpm_ipmi_rev;
354 static int hf_ipmi_picmg_hpm_cipher_id;
355 static int hf_ipmi_picmg_hpm_auth_type;
356 static int hf_ipmi_picmg_hpm_priv_level;
357 static int hf_ipmi_picmg_hpm_chn_num;
358 static int hf_ipmi_picmg_hpm_avail_time;
359 static int hf_ipmi_picmg_hpm_user_name;
360 static int hf_ipmi_picmg_hpm_user_pwd;
361 static int hf_ipmi_picmg_hpm_bmc_key;
362 static int hf_ipmi_picmg_hpm_operation;
363 static int hf_ipmi_picmg_hpm_ssn_hnd;
365 static int hf_ipmi_picmg_hpm_power_draw;
366 static int hf_ipmi_picmg_hpm_base_channels;
367 static int hf_ipmi_picmg_hpm_fabric_channels;
368 static int hf_ipmi_picmg_hpm_update_channels;
369 static int hf_ipmi_picmg_hpm_cross_channels;
370 static int hf_ipmi_picmg_hpm_num_chn_desc;
371 static int hf_ipmi_picmg_hpm_chn_mask;
373 static int hf_ipmi_picmg_hpm_ext_mgmt_state;
374 static int hf_ipmi_picmg_hpm_polling_period;
375 static int hf_ipmi_picmg_hpm_auth_pwr_state;
376 static int hf_ipmi_picmg_hpm_amc_pwr_state;
378 static int hf_ipmi_picmg47_port;
379 static int hf_ipmi_picmg47_flags;
380 static int hf_ipmi_picmg47_assignment;
381 static int hf_ipmi_picmg47_state;
382 static int hf_ipmi_picmg47_instance;
384 static int hf_ipmi_picmg48_sub_fru_type;
385 static int hf_ipmi_picmg48_sub_fru_id;
386 static int hf_ipmi_picmg48_ip_source;
388 static int hf_ipmi_picmg_23_rq_byte2;
389 static int hf_ipmi_picmg_23_slot_sel;
390 static int hf_ipmi_picmg_23_carrier_num;
391 static int hf_ipmi_picmg_23_slot_num;
392 static int hf_ipmi_picmg_23_tier_num;
393 static int hf_ipmi_picmg_23_rs_byte5;
394 static int hf_ipmi_picmg_23_slot_base;
395 static int hf_ipmi_picmg_23_tier_base;
396 static int hf_ipmi_picmg_23_orientation;
397 static int hf_ipmi_picmg_23_origin_x;
398 static int hf_ipmi_picmg_23_origin_y;
400 static int hf_ipmi_picmg_24_channel;
401 static int hf_ipmi_picmg_24_control;
402 static int hf_ipmi_picmg_24_current;
403 static int hf_ipmi_picmg_24_primary_pm;
404 static int hf_ipmi_picmg_24_backup_pm;
406 static int hf_ipmi_picmg_25_start;
407 static int hf_ipmi_picmg_25_count;
408 static int hf_ipmi_picmg_25_max;
409 static int hf_ipmi_picmg_25_gstatus;
410 static int hf_ipmi_picmg_25_fault;
411 static int hf_ipmi_picmg_25_pwr_good;
412 static int hf_ipmi_picmg_25_mp_good;
413 static int hf_ipmi_picmg_25_role;
414 static int hf_ipmi_picmg_25_cstatus;
415 static int hf_ipmi_picmg_25_pwr_on;
416 static int hf_ipmi_picmg_25_pwr_ovr;
417 static int hf_ipmi_picmg_25_pwr;
418 static int hf_ipmi_picmg_25_enable;
419 static int hf_ipmi_picmg_25_mp_ovr;
420 static int hf_ipmi_picmg_25_mp;
421 static int hf_ipmi_picmg_25_ps1;
423 static int hf_ipmi_picmg_26_pm_site;
424 static int hf_ipmi_picmg_27_rs_byte3;
425 static int hf_ipmi_picmg_27_pm_healthy;
426 static int hf_ipmi_picmg_28_timeout;
427 static int hf_ipmi_picmg_28_rq_byte3;
428 static int hf_ipmi_picmg_28_mch2;
429 static int hf_ipmi_picmg_28_mch1;
431 static int hf_ipmi_picmg_29_rs_byte3;
432 static int hf_ipmi_picmg_29_maj_rst;
433 static int hf_ipmi_picmg_29_min_rst;
434 static int hf_ipmi_picmg_29_alarm_cut;
435 static int hf_ipmi_picmg_29_test_mode;
436 static int hf_ipmi_picmg_29_pwr_alarm;
437 static int hf_ipmi_picmg_29_minor_alarm;
438 static int hf_ipmi_picmg_29_major_alarm;
439 static int hf_ipmi_picmg_29_crit_alarm;
441 static int hf_ipmi_picmg_2a_alarm_id;
442 static int hf_ipmi_picmg_2a_alarm_ctrl;
444 static int hf_ipmi_picmg_2b_alarm_state;
446 static const value_string site_type_vals[] = {
447 { 0x00, "PICMG board" },
448 { 0x01, "Power Entry" },
449 { 0x02, "Shelf FRU Information" },
450 { 0x03, "Dedicated ShMC" },
451 { 0x04, "Fan Tray / Cooling Unit" },
452 { 0x05, "Fan Filter Tray" },
453 { 0x06, "Alarm" },
454 { 0x07, "AdvancedMC module" },
455 { 0x08, "PMC" },
456 { 0x09, "Rear Transition Module" },
457 { 0x0A, "MicroTCA Carrier Hub" },
458 { 0x0B, "Power Module" },
459 { 0xC0, "OEM" },
460 { 0xC1, "OEM" },
461 { 0xC2, "OEM" },
462 { 0xC3, "OEM" },
463 { 0xC4, "OEM" },
464 { 0xC5, "OEM" },
465 { 0xC6, "OEM" },
466 { 0xC7, "OEM" },
467 { 0xC8, "OEM" },
468 { 0xC9, "OEM" },
469 { 0xCA, "OEM" },
470 { 0xCB, "OEM" },
471 { 0xCC, "OEM" },
472 { 0xCD, "OEM" },
473 { 0xCE, "OEM" },
474 { 0xCF, "OEM" },
475 { 0, NULL }
478 static const value_string addr_key_type_vals[] = {
479 { 0x00, "Hardware Address" },
480 { 0x01, "IPMB-0 Address" },
481 { 0x03, "Physical Address" },
482 { 0, NULL }
485 static const struct true_false_string set_clear_tfs = {
486 "Set", "Clear"
489 static const value_string led_color_vals[] = {
490 { 0x00, "Reserved (Control not supported)" },
491 { 0x01, "Blue" },
492 { 0x02, "Red" },
493 { 0x03, "Green" },
494 { 0x04, "Amber" },
495 { 0x05, "Orange" },
496 { 0x06, "White" },
497 { 0x0E, "Do not change" },
498 { 0x0F, "Use default" },
499 { 0, NULL }
502 static const value_string linkinfo_type_vals[] = {
503 { 0x01, "PICMG3.0 Base Interface 10/100/1000 BASE-T" },
504 { 0x02, "PICMG3.1 Ethernet Fabric Interface" },
505 { 0x03, "PICMG3.2 Infiniband Fabric Interface" },
506 { 0x04, "PICMG3.3 StarFabric Fabric Interface" },
507 { 0x05, "PICMG3.4 PCI Express Fabric Interface" },
508 { 0xf0, "OEM" }, { 0xf1, "OEM" }, { 0xf2, "OEM" }, { 0xf3, "OEM" },
509 { 0xf4, "OEM" }, { 0xf5, "OEM" }, { 0xf6, "OEM" }, { 0xf7, "OEM" },
510 { 0xf8, "OEM" }, { 0xf9, "OEM" }, { 0xfa, "OEM" }, { 0xfb, "OEM" },
511 { 0xfc, "OEM" }, { 0xfd, "OEM" }, { 0xfe, "OEM" },
513 { 0, NULL }
516 static const value_string linkinfo_amc_type_vals[] = {
517 { 0x02, "AMC.1 PCI Express" },
518 { 0x03, "AMC.1 PCI Express Advanced Switching" },
519 { 0x04, "AMC.1 PCI Express Advanced Switching" },
520 { 0x05, "AMC.2 Ethernet" },
521 { 0x06, "AMC.3 Serial RapidIO" },
522 { 0x07, "AMC.3 Storage" },
523 { 0xf0, "OEM" }, { 0xf1, "OEM" }, { 0xf2, "OEM" }, { 0xf3, "OEM" },
524 { 0xf4, "OEM" }, { 0xf5, "OEM" }, { 0xf6, "OEM" }, { 0xf7, "OEM" },
525 { 0xf8, "OEM" }, { 0xf9, "OEM" }, { 0xfa, "OEM" }, { 0xfb, "OEM" },
526 { 0xfc, "OEM" }, { 0xfd, "OEM" }, { 0xfe, "OEM" },
528 { 0, NULL }
531 static const value_string linkinfo_ports_vals[] = {
532 { 0x00, "None" },
533 { 0x01, "0" },
534 { 0x02, "1" },
535 { 0x03, "0,1" },
536 { 0x04, "2" },
537 { 0x05, "0,2" },
538 { 0x06, "1,2" },
539 { 0x07, "0,1,2" },
540 { 0x08, "3" },
541 { 0x09, "0,3" },
542 { 0x0a, "1,3" },
543 { 0x0b, "0,1,3" },
544 { 0x0c, "2,3" },
545 { 0x0d, "0,2,3" },
546 { 0x0e, "1,2,3" },
547 { 0x0f, "0,1,2,3" },
549 { 0, NULL }
552 static const value_string linkinfo_iface_vals[] = {
553 { 0x00, "Base Interface" },
554 { 0x01, "Fabric Interface" },
555 { 0x02, "Update Channel Interface" },
557 { 0, NULL }
560 static const value_string busresid_vals[] = {
561 { 0x00, "Metallic Test Bus #1" },
562 { 0x01, "Metallic Test Bus #2" },
563 { 0x02, "Synch clock group #1" },
564 { 0x03, "Synch clock group #2" },
565 { 0x04, "Synch clock group #3" },
566 { 0, NULL }
569 static const value_string fan_level_vals[] = {
570 { 0xFE, "Shut down" },
571 { 0xFF, "Local control" },
572 { 0, NULL }
575 static const value_string enable_vals[] = {
576 { 0x00, "Disable" },
577 { 0x01, "Enable" },
578 { 0, NULL }
581 static const value_string enabled_vals[] = {
582 { 0x00, "Disabled" },
583 { 0x01, "Enabled" },
584 { 0, NULL }
587 static const value_string vals_04_cmd[] = {
588 { 0x00, "Cold Reset" },
589 { 0x01, "Warm Reset" },
590 { 0x02, "Graceful Reboot" },
591 { 0x03, "Issue Diagnostic Interrupt" },
592 { 0x04, "Quiesce" },
593 { 0, NULL }
596 static const value_string vals_0c_cmd[] = {
597 { 0x00, "Deactivate FRU" },
598 { 0x01, "Activate FRU" },
599 { 0, NULL }
602 static const value_string vals_11_set[] = {
603 { 0x00, "Do not change present levels" },
604 { 0x01, "Copy desired levels to present levels" },
605 { 0, NULL }
608 static const value_string vals_12_pwr_type[] = {
609 { 0x00, "Steady state power draw levels" },
610 { 0x01, "Desired steady state draw levels" },
611 { 0x02, "Early power draw levels" },
612 { 0x03, "Desired early levels" },
613 { 0, NULL }
616 static const value_string vals_18_keytype[] = {
617 { 0x00, "Link Info Key contains Link Number" },
618 { 0x01, "Link Info Key contains Sensor Number" },
619 { 0, NULL }
622 static const value_string vals_1d_policy[] = {
623 { 0x00, "Disabled" },
624 { 0x01, "Enabled" },
625 { 0xFF, "Indeterminate" },
626 { 0, NULL }
629 static const value_string vals_1d_coverage[] = {
630 { 0x00, "Not Covered" },
631 { 0x01, "Covered" },
632 { 0, NULL }
635 static const value_string vals_1f_op[] = {
636 { 0x00, "Get Last Commit Timestamp" },
637 { 0x01, "Lock" },
638 { 0x02, "Unlock and Discard" },
639 { 0x03, "Unlock and Commit" },
640 { 0, NULL }
643 #if 0
644 static const value_string vals_21_addr_type[] = {
645 { 0x01, "IPv4" },
646 { 0x60, "OEM" }, { 0x61, "OEM" }, { 0x62, "OEM" }, { 0x63, "OEM" },
647 { 0x64, "OEM" }, { 0x65, "OEM" }, { 0x66, "OEM" }, { 0x67, "OEM" },
648 { 0x68, "OEM" }, { 0x69, "OEM" }, { 0x6a, "OEM" }, { 0x6b, "OEM" },
649 { 0x6c, "OEM" }, { 0x6d, "OEM" }, { 0x6e, "OEM" }, { 0x6f, "OEM" },
650 { 0x70, "OEM" }, { 0x71, "OEM" }, { 0x72, "OEM" }, { 0x73, "OEM" },
651 { 0x74, "OEM" }, { 0x75, "OEM" }, { 0x76, "OEM" }, { 0x77, "OEM" },
652 { 0x78, "OEM" }, { 0x79, "OEM" }, { 0x7a, "OEM" }, { 0x7b, "OEM" },
653 { 0x7c, "OEM" }, { 0x7d, "OEM" }, { 0x7e, "OEM" }, { 0x7f, "OEM" },
654 { 0, NULL }
656 #endif
658 static const value_string vals_prop00_rollback[] = {
659 { 0x00, "Not supported" },
660 { 0x01, "Rollback supported, Backup required" },
661 { 0x02, "Rollback supported, Backup not required" },
662 { 0, NULL }
665 static const value_string vals_31_action[] = {
666 { 0x00, "Backup components" },
667 { 0x01, "Prepare components" },
668 { 0x02, "Upload for upgrade" },
669 { 0x03, "Upload for compare" },
670 { 0, NULL }
673 static const value_string vals_35_override[] = {
674 { 0x00, "Automatic Rollback allowed" },
675 { 0x01, "Automatic Rollback override" },
676 { 0, NULL }
679 static const value_string vals_36_result[] = {
680 { 0x55, "No error. All Self Tests Passed" },
681 { 0x56, "Reserved, cannot be used" },
682 { 0x57, "Corrupted or inaccessible data or devices" },
683 { 0x58, "Fatal hardware error" },
684 { 0x60, "Component failure" },
685 { 0xff, "Reserved" },
686 { 0, NULL }
689 static const struct true_false_string tfs_36_fail_unknown = {
690 "Test failed",
691 "Unknown"
694 /* Get PICMG Properties.
696 static void
697 rs00(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
699 proto_tree_add_item(tree, hf_ipmi_picmg_00_version, tvb, 0, 1, ENC_LITTLE_ENDIAN);
700 proto_tree_add_item(tree, hf_ipmi_picmg_00_max_fruid, tvb, 1, 1, ENC_LITTLE_ENDIAN);
701 proto_tree_add_item(tree, hf_ipmi_picmg_00_ipmc_fruid, tvb, 2, 1, ENC_LITTLE_ENDIAN);
704 /* Get Address Info Command.
706 static void
707 rq01(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
709 if (tvb_captured_length(tvb) > 0) {
710 proto_tree_add_item(tree, hf_ipmi_picmg_01_rq_fruid, tvb, 0, 1, ENC_LITTLE_ENDIAN);
712 if (tvb_captured_length(tvb) > 1) {
713 proto_tree_add_item(tree, hf_ipmi_picmg_01_rq_addr_key_type, tvb, 1, 1, ENC_LITTLE_ENDIAN);
715 if (tvb_captured_length(tvb) > 2) {
716 proto_tree_add_item(tree, hf_ipmi_picmg_01_rq_addr_key, tvb, 2, 1, ENC_LITTLE_ENDIAN);
718 if (tvb_captured_length(tvb) > 3) {
719 proto_tree_add_item(tree, hf_ipmi_picmg_01_rq_site_type, tvb, 3, 1, ENC_LITTLE_ENDIAN);
723 static void
724 rs01(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
726 proto_tree_add_item(tree, hf_ipmi_picmg_01_rs_hwaddr, tvb, 0, 1, ENC_LITTLE_ENDIAN);
727 proto_tree_add_item(tree, hf_ipmi_picmg_01_rs_ipmbaddr, tvb, 1, 1, ENC_LITTLE_ENDIAN);
728 proto_tree_add_item(tree, hf_ipmi_picmg_01_rs_rsrv, tvb, 2, 1, ENC_LITTLE_ENDIAN);
729 proto_tree_add_item(tree, hf_ipmi_picmg_01_rs_fruid, tvb, 3, 1, ENC_LITTLE_ENDIAN);
730 proto_tree_add_item(tree, hf_ipmi_picmg_01_rs_site_num, tvb, 4, 1, ENC_LITTLE_ENDIAN);
731 proto_tree_add_item(tree, hf_ipmi_picmg_01_rs_site_type, tvb, 5, 1, ENC_LITTLE_ENDIAN);
732 /* TBD Next byte is carrier number in MTCA */
735 /* Get Shelf Address Info
737 static void
738 rs02(tvbuff_t *tvb, packet_info *pinfo, proto_tree *tree)
740 ipmi_add_typelen(pinfo, tree, hf_ipmi_picmg_02_shelf_address, hf_ipmi_picmg_02_shelf_type, hf_ipmi_picmg_02_shelf_length, tvb, 0, true);
743 /* Set Shelf Address Info
745 static void
746 rq03(tvbuff_t *tvb, packet_info *pinfo, proto_tree *tree)
748 ipmi_add_typelen(pinfo, tree, hf_ipmi_picmg_03_shelf_address, hf_ipmi_picmg_03_shelf_type, hf_ipmi_picmg_03_shelf_length, tvb, 0, true);
751 /* FRU Control.
753 static void
754 rq04(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
756 proto_tree_add_item(tree, hf_ipmi_picmg_04_fruid, tvb, 0, 1, ENC_LITTLE_ENDIAN);
757 proto_tree_add_item(tree, hf_ipmi_picmg_04_cmd, tvb, 1, 1, ENC_LITTLE_ENDIAN);
760 /* Get FRU LED Properties
762 static void
763 rq05(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
765 proto_tree_add_item(tree, hf_ipmi_picmg_05_fruid, tvb, 0, 1, ENC_LITTLE_ENDIAN);
768 static void
769 rs05(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
771 static int * const byte1[] = { &hf_ipmi_picmg_05_led3, &hf_ipmi_picmg_05_led2,
772 &hf_ipmi_picmg_05_led1, &hf_ipmi_picmg_05_blue_led, NULL };
774 proto_tree_add_bitmask_text(tree, tvb, 0, 1, "General Status LEDs: ", "None",
775 ett_ipmi_picmg_05_byte1, byte1, ENC_LITTLE_ENDIAN, 0);
776 proto_tree_add_item(tree, hf_ipmi_picmg_05_app_leds, tvb, 1, 1, ENC_LITTLE_ENDIAN);
779 /* Get LED Color Capabilities
781 static void
782 rq06(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
784 proto_tree_add_item(tree, hf_ipmi_picmg_06_fruid, tvb, 0, 1, ENC_LITTLE_ENDIAN);
785 proto_tree_add_item(tree, hf_ipmi_picmg_06_ledid, tvb, 1, 1, ENC_LITTLE_ENDIAN);
788 static void
789 rs06(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
791 static int * const byte1[] = { &hf_ipmi_picmg_06_cap_white, &hf_ipmi_picmg_06_cap_orange,
792 &hf_ipmi_picmg_06_cap_amber, &hf_ipmi_picmg_06_cap_green, &hf_ipmi_picmg_06_cap_red,
793 &hf_ipmi_picmg_06_cap_blue, NULL };
794 static int * const byte2[] = { &hf_ipmi_picmg_06_default_local_color, NULL };
795 static int * const byte3[] = { &hf_ipmi_picmg_06_default_override_color, NULL };
797 proto_tree_add_bitmask_text(tree, tvb, 0, 1, "Color capabilities: ", "None",
798 ett_ipmi_picmg_06_byte1, byte1, ENC_LITTLE_ENDIAN, 0);
799 proto_tree_add_bitmask_text(tree, tvb, 1, 1, NULL, NULL,
800 ett_ipmi_picmg_06_byte2, byte2, ENC_LITTLE_ENDIAN, 0);
801 proto_tree_add_bitmask_text(tree, tvb, 2, 1, NULL, NULL,
802 ett_ipmi_picmg_06_byte3, byte3, ENC_LITTLE_ENDIAN, 0);
805 static void
806 parse_led_state(proto_tree *tree, tvbuff_t *tvb, unsigned offs, const char *desc)
808 static int * const color[] = { &hf_ipmi_picmg_led_color, NULL };
809 static const value_string funcs[] = {
810 { 0x00, "LED Off override" },
811 { 0xfb, "Lamp Test state" },
812 { 0xfc, "Restore Local Control" },
813 { 0xfd, "Reserved" },
814 { 0xfe, "Reserved" },
815 { 0xff, "LED On override" },
816 { 0, NULL }
818 proto_item *ti;
819 uint8_t v;
821 v = tvb_get_uint8(tvb, offs);
822 proto_tree_add_uint_format(tree, hf_ipmi_picmg_led_function, tvb, offs, 1,
823 v, "%sFunction: %s (0x%02x)", desc,
824 val_to_str(v, funcs, "LED Blinking override, off-duration %d0ms"),
826 v = tvb_get_uint8(tvb, offs + 1);
827 proto_tree_add_uint_format(tree, hf_ipmi_picmg_led_on_duration, tvb, offs + 1, 1,
828 v, "%sOn-duration: %d0ms", desc, v);
829 v = tvb_get_uint8(tvb, offs + 2) & 0x0f;
830 ti = proto_tree_add_bitmask_text(tree, tvb, offs + 2, 1,
831 NULL, NULL, ett_ipmi_picmg_led_color, color, ENC_LITTLE_ENDIAN, 0);
832 proto_item_set_text(ti, "%sColor: %s", desc, val_to_str_const(v, led_color_vals, "Reserved"));
835 /* Set FRU LED State
837 static void
838 rq07(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
840 proto_tree_add_item(tree, hf_ipmi_picmg_07_fruid, tvb, 0, 1, ENC_LITTLE_ENDIAN);
841 proto_tree_add_item(tree, hf_ipmi_picmg_07_ledid, tvb, 1, 1, ENC_LITTLE_ENDIAN);
842 parse_led_state(tree, tvb, 2, "");
845 /* Get FRU LED State
847 static void
848 rq08(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
850 proto_tree_add_item(tree, hf_ipmi_picmg_08_fruid, tvb, 0, 1, ENC_LITTLE_ENDIAN);
851 proto_tree_add_item(tree, hf_ipmi_picmg_08_ledid, tvb, 1, 1, ENC_LITTLE_ENDIAN);
854 static void
855 rs08(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
857 static int * const byte1[] = { &hf_ipmi_picmg_08_state_lamptest, &hf_ipmi_picmg_08_state_override,
858 &hf_ipmi_picmg_08_state_local, NULL };
860 proto_tree_add_bitmask_text(tree, tvb, 0, 1, "LED States: ", "None",
861 ett_ipmi_picmg_08_byte1, byte1, ENC_LITTLE_ENDIAN, 0);
862 parse_led_state(tree, tvb, 1, "Local Control ");
863 if (tvb_captured_length(tvb) > 4) {
864 parse_led_state(tree, tvb, 4, "Override ");
866 if (tvb_captured_length(tvb) > 7) {
867 proto_tree_add_item(tree, hf_ipmi_picmg_08_lamptest_duration, tvb, 7, 1, ENC_LITTLE_ENDIAN);
871 /* Set IPMB State
873 static const true_false_string tfs_local_control_override = { "Local Control State", "Override State (Isolate)" };
875 static void
876 parse_ipmb_state(proto_tree *tree, tvbuff_t *tvb, unsigned offs, int hf, int hf_link, int hf_state, int ett)
878 char buf[32];
879 const char *desc;
880 proto_tree *s_tree;
881 proto_item *ti;
882 uint8_t v, num;
884 v = tvb_get_uint8(tvb, offs);
885 if (v == 0xff) {
886 proto_tree_add_uint_format_value(tree, hf, tvb, 0, 1,
887 v, "Don't change (0xff)");
888 } else {
889 num = v >> 1;
890 if (!num) {
891 desc = "All Links";
892 } else if (num < 0x60) {
893 snprintf(buf, sizeof(buf), "Link #%d", num);
894 desc = buf;
895 } else {
896 desc = "Reserved";
898 ti = proto_tree_add_uint_format_value(tree, hf, tvb, 0, 1,
899 v, "%s, %s", desc, (v & 1) ? "Local Control" : "Override");
900 s_tree = proto_item_add_subtree(ti, ett);
901 proto_tree_add_uint_format_value(s_tree, hf_link, tvb, 0, 1, v, "%s (0x%02x)",
902 desc, num);
903 proto_tree_add_item(s_tree, hf_state, tvb, 0, 1, ENC_NA);
907 static void
908 rq09(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
910 parse_ipmb_state(tree, tvb, 0, hf_ipmi_picmg_09_ipmba, hf_ipmi_picmg_09_ipmba_link, hf_ipmi_picmg_09_ipmba_state, ett_ipmi_picmg_09_ipmba);
911 parse_ipmb_state(tree, tvb, 1, hf_ipmi_picmg_09_ipmbb, hf_ipmi_picmg_09_ipmbb_link, hf_ipmi_picmg_09_ipmbb_state, ett_ipmi_picmg_09_ipmbb);
914 /* Set FRU Activation Policy
916 static void
917 rq0a(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
919 static int * const byte2[] = { &hf_ipmi_picmg_0a_msk_d_locked, &hf_ipmi_picmg_0a_msk_locked, NULL };
920 static int * const byte3[] = { &hf_ipmi_picmg_0a_d_locked, &hf_ipmi_picmg_0a_locked, NULL };
922 proto_tree_add_item(tree, hf_ipmi_picmg_0a_fruid, tvb, 0, 1, ENC_LITTLE_ENDIAN);
923 proto_tree_add_bitmask_text(tree, tvb, 1, 1, "Will affect bits: ", "None",
924 ett_ipmi_picmg_0a_byte2, byte2, ENC_LITTLE_ENDIAN, BMT_NO_TFS);
925 proto_tree_add_bitmask_text(tree, tvb, 2, 1, "Activation Policy Set Bits: ", NULL,
926 ett_ipmi_picmg_0a_byte3, byte3, ENC_LITTLE_ENDIAN, 0);
929 /* Get FRU Activation Policy
931 static void
932 rq0b(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
934 proto_tree_add_item(tree, hf_ipmi_picmg_0b_fruid, tvb, 0, 1, ENC_LITTLE_ENDIAN);
937 static void
938 rs0b(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
940 static int * const byte1[] = { &hf_ipmi_picmg_0b_d_locked, &hf_ipmi_picmg_0b_locked, NULL };
942 proto_tree_add_bitmask_text(tree, tvb, 0, 1, "Activation Policy Bits: ", NULL,
943 ett_ipmi_picmg_0b_byte1, byte1, ENC_LITTLE_ENDIAN, 0);
947 /* Set FRU Activation
949 static void
950 rq0c(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
952 proto_tree_add_item(tree, hf_ipmi_picmg_0c_fruid, tvb, 0, 1, ENC_LITTLE_ENDIAN);
953 proto_tree_add_item(tree, hf_ipmi_picmg_0c_cmd, tvb, 1, 1, ENC_LITTLE_ENDIAN);
956 /* Get Device Locator Record ID
958 static void
959 rq0d(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
961 proto_tree_add_item(tree, hf_ipmi_picmg_0d_fruid, tvb, 0, 1, ENC_LITTLE_ENDIAN);
962 if (tvb_captured_length(tvb) > 1) {
963 proto_tree_add_item(tree, hf_ipmi_picmg_0d_start, tvb, 1, 2, ENC_LITTLE_ENDIAN);
967 static void
968 rs0d(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
970 proto_tree_add_item(tree, hf_ipmi_picmg_0d_recordid, tvb, 0, 2, ENC_LITTLE_ENDIAN);
973 static void
974 parse_link_info_state(proto_tree *tree, tvbuff_t *tvb, unsigned offs, const char *num, const value_string *vs)
976 static int * const link_info[] = { &hf_ipmi_picmg_linkinfo_grpid, &hf_ipmi_picmg_linkinfo_type_ext,
977 &hf_ipmi_picmg_linkinfo_type, &hf_ipmi_picmg_linkinfo_ports, &hf_ipmi_picmg_linkinfo_iface,
978 &hf_ipmi_picmg_linkinfo_chan, NULL };
979 uint8_t v = tvb_get_uint8(tvb, offs + 4);
980 char buf[32];
982 snprintf(buf, sizeof(buf), "Link info%s: ", num);
983 proto_tree_add_bitmask_text(tree, tvb, offs, 4, buf, NULL,
984 ett_ipmi_picmg_link_info, link_info, ENC_LITTLE_ENDIAN, 0);
985 proto_tree_add_uint_format(tree, hf_ipmi_picmg_linkinfo_state, tvb, offs + 4, 1,
986 v, "State%s: %s (0x%02x)", num, val_to_str_const(v, vs, "Reserved"), v);
989 /* Set Port State
991 static void
992 rq0e(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
994 static const value_string state_vals[] = {
995 { 0x00, "Disable" },
996 { 0x01, "Enable" },
997 { 0, NULL }
1000 parse_link_info_state(tree, tvb, 0, "", state_vals);
1003 /* Get Port State
1005 static void
1006 rq0f(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
1008 static int * const chan[] = { &hf_ipmi_picmg_0f_iface, &hf_ipmi_picmg_0f_chan, NULL };
1010 proto_tree_add_bitmask_text(tree, tvb, 0, 1, NULL, NULL, ett_ipmi_picmg_0f_chan, chan, ENC_LITTLE_ENDIAN, 0);
1011 if (tvb_captured_length(tvb) > 1) {
1012 proto_tree_add_item(tree, hf_ipmi_picmg_1a_flags, tvb, 1, 1, ENC_LITTLE_ENDIAN);
1016 static void
1017 rs0f(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
1019 static const value_string state_vals[] = {
1020 { 0x00, "Disabled" },
1021 { 0x01, "Enabled" },
1022 { 0x02, "Disabled, Extended Inactive State Link" },
1023 { 0x03, "Enabled, Extended Inactive State Link" },
1024 { 0, NULL }
1027 if (tvb_captured_length(tvb) > 0) {
1028 parse_link_info_state(tree, tvb, 0, " 1", state_vals);
1030 if (tvb_captured_length(tvb) > 5) {
1031 parse_link_info_state(tree, tvb, 5, " 2", state_vals);
1033 if (tvb_captured_length(tvb) > 10) {
1034 parse_link_info_state(tree, tvb, 10, " 3", state_vals);
1036 if (tvb_captured_length(tvb) > 15) {
1037 parse_link_info_state(tree, tvb, 15, " 4", state_vals);
1041 /* Compute Power Properties
1043 static void
1044 rq10(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
1046 proto_tree_add_item(tree, hf_ipmi_picmg_10_fruid, tvb, 0, 1, ENC_LITTLE_ENDIAN);
1049 static void
1050 rs10(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
1052 proto_tree_add_item(tree, hf_ipmi_picmg_10_nslots, tvb, 0, 1, ENC_LITTLE_ENDIAN);
1053 proto_tree_add_item(tree, hf_ipmi_picmg_10_ipmc_loc, tvb, 1, 1, ENC_LITTLE_ENDIAN);
1056 /* Set Power Level
1058 static void
1059 rq11(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
1061 static const value_string plvl_vals[] = {
1062 { 0x00, "Power Off" },
1063 { 0xff, "Do not change" },
1064 { 0, NULL }
1066 uint8_t v = tvb_get_uint8(tvb, 1);
1068 proto_tree_add_item(tree, hf_ipmi_picmg_11_fruid, tvb, 0, 1, ENC_LITTLE_ENDIAN);
1069 proto_tree_add_uint_format_value(tree, hf_ipmi_picmg_11_power_level, tvb, 1, 1,
1070 v, "%s", val_to_str(v, plvl_vals, "Power Level %d"));
1071 proto_tree_add_item(tree, hf_ipmi_picmg_11_set_to_desired, tvb, 2, 1, ENC_LITTLE_ENDIAN);
1074 /* Get Power Level
1076 static void
1077 rq12(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
1079 proto_tree_add_item(tree, hf_ipmi_picmg_12_fruid, tvb, 0, 1, ENC_LITTLE_ENDIAN);
1080 proto_tree_add_item(tree, hf_ipmi_picmg_12_pwr_type, tvb, 1, 1, ENC_LITTLE_ENDIAN);
1083 static void
1084 rs12(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
1086 static int * const byte1[] = { &hf_ipmi_picmg_12_dynamic, &hf_ipmi_picmg_12_pwr_lvl, NULL };
1087 uint8_t v, v2, i;
1088 uint32_t tmp, max;
1090 proto_tree_add_bitmask_text(tree, tvb, 0, 1, NULL, NULL, ett_ipmi_picmg_12_byte1, byte1, ENC_LITTLE_ENDIAN, BMT_NO_FALSE);
1091 proto_tree_add_item(tree, hf_ipmi_picmg_12_delay, tvb, 1, 1, ENC_LITTLE_ENDIAN);
1092 v = tvb_get_uint8(tvb, 2);
1093 proto_tree_add_uint_format_value(tree, hf_ipmi_picmg_12_pwr_mult, tvb, 2, 1,
1094 v, "%d.%dW", v / 10, v % 10);
1095 max = tvb_captured_length(tvb) - 3;
1096 if (max == 0) {
1097 max = 1; /* One byte is mandatory */
1098 } else if (max > 20) {
1099 max = 20; /* 20 levels at most */
1101 for (i = 1; i <= max; i++) {
1102 v2 = tvb_get_uint8(tvb, 2 + i);
1103 tmp = (unsigned)v2 * v;
1104 proto_tree_add_uint_format(tree, hf_ipmi_picmg_12_pwr_draw, tvb, 2 + i, 1,
1105 v2, "Power Draw [%d]: %d.%dW (0x%02x)", i,
1106 tmp / 10, tmp % 10, v2);
1111 /* Renegotiate Power
1113 static void
1114 rq13(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
1116 if (tvb_captured_length(tvb) > 0) {
1117 proto_tree_add_item(tree, hf_ipmi_picmg_13_fruid, tvb, 0, 1, ENC_LITTLE_ENDIAN);
1121 /* Get Fan Speed Properties
1123 static void
1124 rq14(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
1126 proto_tree_add_item(tree, hf_ipmi_picmg_14_fruid, tvb, 0, 1, ENC_LITTLE_ENDIAN);
1129 static void
1130 rs14(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
1132 static int * const prop[] = { &hf_ipmi_picmg_14_local_control, NULL };
1134 proto_tree_add_item(tree, hf_ipmi_picmg_14_speed_min, tvb, 0, 1, ENC_LITTLE_ENDIAN);
1135 proto_tree_add_item(tree, hf_ipmi_picmg_14_speed_max, tvb, 1, 1, ENC_LITTLE_ENDIAN);
1136 proto_tree_add_item(tree, hf_ipmi_picmg_14_speed_norm, tvb, 2, 1, ENC_LITTLE_ENDIAN);
1137 proto_tree_add_bitmask_text(tree, tvb, 3, 1, "Fan Tray Properties: ", "None",
1138 ett_ipmi_picmg_14_prop, prop, ENC_LITTLE_ENDIAN, 0);
1141 /* Set Fan Level
1143 static void
1144 rq15(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
1146 uint8_t v = tvb_get_uint8(tvb, 1);
1148 proto_tree_add_item(tree, hf_ipmi_picmg_15_fruid, tvb, 0, 1, ENC_LITTLE_ENDIAN);
1149 proto_tree_add_uint_format_value(tree, hf_ipmi_picmg_15_fan_level, tvb, 1, 1,
1150 v, "%s", val_to_str(v, fan_level_vals, "%d"));
1151 if (tvb_captured_length(tvb) > 2) {
1152 proto_tree_add_item(tree, hf_ipmi_picmg_15_local_enable, tvb, 2, 1, ENC_LITTLE_ENDIAN);
1156 /* Get Fan Level
1158 static void
1159 rq16(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
1161 proto_tree_add_item(tree, hf_ipmi_picmg_16_fruid, tvb, 0, 1, ENC_LITTLE_ENDIAN);
1164 static void
1165 rs16(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
1167 uint8_t v;
1169 v = tvb_get_uint8(tvb, 0);
1170 proto_tree_add_uint_format_value(tree, hf_ipmi_picmg_16_override_level, tvb, 0, 1,
1171 v, "%s", val_to_str(v, fan_level_vals, "%d"));
1172 if (tvb_captured_length(tvb) > 1) {
1173 proto_tree_add_item(tree, hf_ipmi_picmg_16_local_level, tvb, 1, 1, ENC_LITTLE_ENDIAN);
1175 if (tvb_captured_length(tvb) > 2) {
1176 proto_tree_add_item(tree, hf_ipmi_picmg_16_local_enable, tvb, 2, 1, ENC_LITTLE_ENDIAN);
1180 /* Bused Resource Control
1182 static void
1183 rq17(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
1185 static const value_string vals_17_cmd_fromshmm[] = {
1186 { 0x00, "Query" },
1187 { 0x01, "Release" },
1188 { 0x02, "Force" },
1189 { 0x03, "Bus Free" },
1190 { 0, NULL }
1192 static const value_string vals_17_cmd_toshmm[] = {
1193 { 0x00, "Request" },
1194 { 0x01, "Relinquish" },
1195 { 0x02, "Notify" },
1196 { 0, NULL }
1198 unsigned cmd = tvb_get_uint8(tvb, 0);
1199 const ipmi_header_t *header = ipmi_get_hdr(pinfo);
1200 if (header == NULL)
1201 return;
1203 unsigned to_shmm = header->rs_sa == 0x20;
1205 ipmi_set_data(pinfo, 0, (to_shmm << 8) | cmd);
1207 if (!tree) {
1208 return;
1211 proto_tree_add_uint_format_value(tree, hf_ipmi_picmg_17_cmd, tvb, 0, 1,
1212 cmd, "%s (0x%02x)",
1213 val_to_str_const(cmd,
1214 to_shmm ? vals_17_cmd_toshmm : vals_17_cmd_fromshmm,
1215 "Reserved"),
1216 cmd);
1217 proto_tree_add_item(tree, hf_ipmi_picmg_17_resid, tvb, 1, 1, ENC_LITTLE_ENDIAN);
1220 static void
1221 rs17(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
1223 /* Key is 3 bytes: direction, command, status */
1224 static const value_string response_vals[] = {
1225 { 0x000000, "In Control" },
1226 { 0x000001, "No Control" },
1227 { 0x000100, "Ack" },
1228 { 0x000101, "Refused" },
1229 { 0x000102, "No Control" },
1230 { 0x000200, "Ack" },
1231 { 0x000201, "No Control" },
1232 { 0x000300, "Accept" },
1233 { 0x000301, "Not Needed" },
1234 { 0x010000, "Grant" },
1235 { 0x010001, "Busy" },
1236 { 0x010002, "Defer" },
1237 { 0x010003, "Deny" },
1238 { 0x010100, "Ack" },
1239 { 0x010101, "Error" },
1240 { 0x010200, "Ack" },
1241 { 0x010201, "Error" },
1242 { 0x010202, "Deny" },
1243 { 0, NULL }
1245 uint32_t val;
1246 uint8_t status;
1248 if (!ipmi_get_data(pinfo, 0, &val)) {
1249 /* Without knowing the command, we cannot decipher the response */
1250 proto_tree_add_item(tree, hf_ipmi_picmg_17_status, tvb, 0, 1, ENC_LITTLE_ENDIAN);
1251 return;
1254 status = tvb_get_uint8(tvb, 0);
1255 val = (val << 8) | status;
1256 proto_tree_add_uint_format_value(tree, hf_ipmi_picmg_17_status, tvb, 0, 1,
1257 status, "%s (0x%02x)", val_to_str_const(val, response_vals, "Reserved"), status);
1260 /* Get IPMB Link Info
1262 static void
1263 rq18(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
1265 proto_tree_add_item(tree, hf_ipmi_picmg_18_li_key_type, tvb, 0, 1, ENC_LITTLE_ENDIAN);
1266 proto_tree_add_item(tree, hf_ipmi_picmg_18_li_key, tvb, 1, 1, ENC_LITTLE_ENDIAN);
1269 static void
1270 rs18(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
1272 proto_tree_add_item(tree, hf_ipmi_picmg_18_link_num, tvb, 0, 1, ENC_LITTLE_ENDIAN);
1273 proto_tree_add_item(tree, hf_ipmi_picmg_18_sensor_num, tvb, 1, 1, ENC_LITTLE_ENDIAN);
1276 static void
1277 parse_amc_link_info_state(proto_tree *tree, tvbuff_t *tvb, unsigned offs)
1279 static int * const amc_link_info[] = {
1280 &hf_ipmi_picmg_linkinfo_amc_ports,
1281 &hf_ipmi_picmg_linkinfo_amc_type,
1282 &hf_ipmi_picmg_linkinfo_amc_type_ext,
1283 &hf_ipmi_picmg_linkinfo_amc_grpid,
1284 NULL };
1285 static int * const amc_link_state[] = {
1286 &hf_ipmi_picmg_linkinfo_state_0,
1287 &hf_ipmi_picmg_linkinfo_state_1,
1288 NULL };
1290 proto_tree_add_bitmask(tree, tvb, offs, hf_ipmi_picmg_linkinfo,
1291 ett_ipmi_picmg_link_info, amc_link_info, ENC_LITTLE_ENDIAN);
1292 proto_tree_add_bitmask(tree, tvb, offs + 3, hf_ipmi_picmg_linkinfo_state,
1293 ett_ipmi_picmg_link_state, amc_link_state, ENC_LITTLE_ENDIAN);
1296 static int * const amc_link_dev[] = {
1297 &hf_ipmi_picmg_linkinfo_dev_id,
1298 NULL };
1300 /* Set AMC Port State
1302 static void
1303 rq19(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
1305 proto_tree_add_item(tree, hf_ipmi_picmg_linkinfo_amc_chan, tvb, 0, 1,
1306 ENC_LITTLE_ENDIAN);
1307 parse_amc_link_info_state(tree, tvb, 1);
1308 if (tvb_captured_length(tvb) > 5) {
1309 proto_tree_add_bitmask(tree, tvb, 5, hf_ipmi_picmg_linkinfo_dev,
1310 ett_ipmi_picmg_link_dev, amc_link_dev, ENC_LITTLE_ENDIAN);
1314 /* Get AMC Port State
1316 static void
1317 rq1a(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
1319 proto_tree_add_item(tree, hf_ipmi_picmg_linkinfo_amc_chan, tvb, 0, 1,
1320 ENC_LITTLE_ENDIAN);
1321 if (tvb_captured_length(tvb) > 1) {
1322 proto_tree_add_bitmask(tree, tvb, 1, hf_ipmi_picmg_linkinfo_dev,
1323 ett_ipmi_picmg_link_state, amc_link_dev, ENC_LITTLE_ENDIAN);
1325 if (tvb_captured_length(tvb) > 2) {
1326 proto_tree_add_item(tree, hf_ipmi_picmg_1a_flags, tvb, 2, 1, ENC_LITTLE_ENDIAN);
1330 static void
1331 rs1a(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
1333 unsigned len = tvb_captured_length(tvb);
1334 if (len > 0) {
1335 parse_amc_link_info_state(tree, tvb, 0);
1337 if (len > 4) {
1338 parse_amc_link_info_state(tree, tvb, 4);
1340 if (len > 8) {
1341 parse_amc_link_info_state(tree, tvb, 8);
1343 if (len > 12) {
1344 parse_amc_link_info_state(tree, tvb, 12);
1348 /* Get Shelf Manager IPMB Address
1350 static void
1351 rs1b(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
1353 proto_tree_add_item(tree, hf_ipmi_picmg_1b_addr_active, tvb, 0, 1, ENC_LITTLE_ENDIAN);
1354 proto_tree_add_item(tree, hf_ipmi_picmg_1b_addr_backup, tvb, 0, 1, ENC_LITTLE_ENDIAN);
1357 /* Set Fan Policy
1359 static void
1360 rq1c(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
1362 proto_tree_add_item(tree, hf_ipmi_picmg_1c_fan_site_number, tvb, 0, 1, ENC_LITTLE_ENDIAN);
1363 proto_tree_add_item(tree, hf_ipmi_picmg_1c_fan_enable_state, tvb, 1, 1, ENC_LITTLE_ENDIAN);
1364 proto_tree_add_item(tree, hf_ipmi_picmg_1c_fan_policy_timeout, tvb, 2, 1, ENC_LITTLE_ENDIAN);
1365 if (tvb_captured_length(tvb) > 3) {
1366 proto_tree_add_item(tree, hf_ipmi_picmg_1c_site_number, tvb, 3, 1, ENC_LITTLE_ENDIAN);
1367 proto_tree_add_item(tree, hf_ipmi_picmg_1c_site_type, tvb, 4, 1, ENC_LITTLE_ENDIAN);
1371 /* Get Fan Policy
1373 static void
1374 rq1d(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
1376 proto_tree_add_item(tree, hf_ipmi_picmg_1d_fan_site_number, tvb, 0, 1, ENC_LITTLE_ENDIAN);
1377 if (tvb_captured_length(tvb) > 1) {
1378 proto_tree_add_item(tree, hf_ipmi_picmg_1d_site_number, tvb, 1, 1, ENC_LITTLE_ENDIAN);
1379 proto_tree_add_item(tree, hf_ipmi_picmg_1d_site_type, tvb, 2, 1, ENC_LITTLE_ENDIAN);
1383 static void
1384 rs1d(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
1386 proto_tree_add_item(tree, hf_ipmi_picmg_1d_policy, tvb, 0, 1, ENC_LITTLE_ENDIAN);
1387 if (tvb_captured_length(tvb) > 1) {
1388 proto_tree_add_item(tree, hf_ipmi_picmg_1d_coverage, tvb, 1, 1, ENC_LITTLE_ENDIAN);
1392 /* FRU Control Capabilities
1394 static void
1395 rq1e(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
1397 proto_tree_add_item(tree, hf_ipmi_picmg_1e_fruid, tvb, 0, 1, ENC_LITTLE_ENDIAN);
1400 static void
1401 rs1e(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
1403 static int * const byte1[] = { &hf_ipmi_picmg_1e_cap_diagintr,
1404 &hf_ipmi_picmg_1e_cap_graceful_reboot, &hf_ipmi_picmg_1e_cap_warm_reset, NULL };
1406 proto_tree_add_bitmask_text(tree, tvb, 0, 1, "FRU Control Capabilities: ", "None",
1407 ett_ipmi_picmg_1e_byte1, byte1, ENC_LITTLE_ENDIAN, 0);
1410 /* FRU Inventory Device Lock Control
1412 static void
1413 rq1f(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
1415 proto_tree_add_item(tree, hf_ipmi_picmg_1f_rq_fruid, tvb, 0, 1, ENC_LITTLE_ENDIAN);
1416 proto_tree_add_item(tree, hf_ipmi_picmg_1f_rq_op, tvb, 1, 1, ENC_LITTLE_ENDIAN);
1417 proto_tree_add_item(tree, hf_ipmi_picmg_1f_rq_lockid, tvb, 2, 2, ENC_LITTLE_ENDIAN);
1420 static void
1421 rs1f(tvbuff_t *tvb, packet_info *pinfo, proto_tree *tree)
1423 proto_tree_add_item(tree, hf_ipmi_picmg_1f_rs_lockid, tvb, 0, 2, ENC_LITTLE_ENDIAN);
1424 ipmi_add_timestamp(pinfo, tree, hf_ipmi_picmg_1f_rs_tstamp, tvb, 2);
1427 static const value_string cc1f[] = {
1428 { 0x80, "Invalid FRU Information" },
1429 { 0x81, "Lock Failed" },
1430 { 0, NULL }
1433 /* FRU Inventory Device Write
1435 static void
1436 rq20(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
1438 proto_tree_add_item(tree, hf_ipmi_picmg_20_fruid, tvb, 0, 1, ENC_LITTLE_ENDIAN);
1439 proto_tree_add_item(tree, hf_ipmi_picmg_20_lockid, tvb, 1, 2, ENC_LITTLE_ENDIAN);
1440 proto_tree_add_item(tree, hf_ipmi_picmg_20_offset, tvb, 3, 2, ENC_LITTLE_ENDIAN);
1441 proto_tree_add_item(tree, hf_ipmi_picmg_20_data, tvb, 5, -1, ENC_NA);
1444 static void
1445 rs20(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
1447 proto_tree_add_item(tree, hf_ipmi_picmg_20_count, tvb, 0, 1, ENC_NA);
1450 static const value_string cc20[] = {
1451 { 0x80, "Invalid Lock ID" },
1452 { 0, NULL }
1455 /* Get Shelf Manager IP Address
1457 static void
1458 rq21(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
1460 proto_tree_add_item(tree, hf_ipmi_picmg_21_addr_num, tvb, 0, 1, ENC_LITTLE_ENDIAN);
1463 static void
1464 rs21(tvbuff_t *tvb, packet_info *pinfo, proto_tree *tree)
1466 static int * const byte9[] = { &hf_ipmi_picmg_21_is_shm, &hf_ipmi_picmg_21_addr_type, NULL };
1467 uint8_t addrtype;
1469 ipmi_add_timestamp(pinfo, tree, hf_ipmi_picmg_21_tstamp, tvb, 0);
1470 proto_tree_add_item(tree, hf_ipmi_picmg_21_addr_count, tvb, 4, 1, ENC_LITTLE_ENDIAN);
1471 proto_tree_add_item(tree, hf_ipmi_picmg_21_site_type, tvb, 5, 1, ENC_LITTLE_ENDIAN);
1472 proto_tree_add_item(tree, hf_ipmi_picmg_21_site_num, tvb, 6, 1, ENC_LITTLE_ENDIAN);
1473 proto_tree_add_item(tree, hf_ipmi_picmg_21_max_unavail, tvb, 7, 1, ENC_LITTLE_ENDIAN);
1474 proto_tree_add_bitmask_text(tree, tvb, 8, 1, NULL, NULL, ett_ipmi_picmg_21_byte9, byte9, ENC_LITTLE_ENDIAN, 0);
1476 addrtype = tvb_get_uint8(tvb, 8) & 0x7f;
1477 if (addrtype == 0x01) {
1478 /* IP address and RMCP port are in network byte order! */
1479 proto_tree_add_item(tree, hf_ipmi_picmg_21_ipaddr, tvb, 9, 4, ENC_BIG_ENDIAN);
1480 proto_tree_add_item(tree, hf_ipmi_picmg_21_rmcpport, tvb, 13, 2, ENC_BIG_ENDIAN);
1484 /* Get Shelf Power Allocation
1486 static void
1487 rq22(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
1489 ipmi_set_data(pinfo, 0, tvb_get_uint8(tvb, 0));
1490 if (!tree) {
1491 return;
1493 proto_tree_add_item(tree, hf_ipmi_picmg_22_feed_idx, tvb, 0, 1, ENC_LITTLE_ENDIAN);
1496 static void
1497 rs22(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
1499 uint32_t offs = 0;
1500 uint16_t v;
1501 unsigned i, max;
1503 proto_tree_add_item(tree, hf_ipmi_picmg_22_update_cnt, tvb, 0, 2, ENC_LITTLE_ENDIAN);
1505 max = tvb_captured_length(tvb) / 2 - 1;
1506 if (!max) {
1507 /* At least one shall be present */
1508 max = 1;
1510 ipmi_get_data(pinfo, 0, &offs);
1511 for (i = 0; i < max; i++) {
1512 v = tvb_get_letohs(tvb, 2 + 2 * i);
1513 proto_tree_add_uint_format(tree, hf_ipmi_picmg_22_pwr_alloc, tvb, 2 + 2 * i, 2,
1514 v, "Power Feed [%d] Allocation: %d Watts", offs + i, v);
1518 static const value_string picmg_23_slot_selectors[] = {
1519 { 0, "MicroTCA Shelf within a Frame" },
1520 { 1, "MicroTCA Carrier within a Shelf" },
1521 { 2, "Slot within a MicroTCA Carrier" },
1522 { 0, NULL }
1525 static const value_string picmg_23_num_bases[] = {
1526 { 0, "Zero-based" },
1527 { 1, "One-based" },
1528 { 0, NULL }
1531 static const value_string picmg_23_orientations[] = {
1532 { 0, "Vertical" },
1533 { 1, "Horizontal" },
1534 { 0, NULL }
1537 /* Get Location Info
1539 static void
1540 rq23(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
1542 static int * const picmg_23_rq_byte2[] = {
1543 &hf_ipmi_picmg_23_slot_sel,
1544 &hf_ipmi_picmg_23_carrier_num,
1545 NULL
1548 proto_tree_add_bitmask(tree, tvb, 0, hf_ipmi_picmg_23_rq_byte2,
1549 ett_ipmi_picmg_23_rq_byte2, picmg_23_rq_byte2,
1550 ENC_LITTLE_ENDIAN);
1551 if ((tvb_get_uint8(tvb, 0) & 0xC0) == 0x80) {
1552 proto_tree_add_item(tree, hf_ipmi_picmg_01_rs_site_num,
1553 tvb, 1, 1, ENC_LITTLE_ENDIAN);
1554 proto_tree_add_item(tree, hf_ipmi_picmg_01_rs_site_type,
1555 tvb, 2, 1, ENC_LITTLE_ENDIAN);
1559 static void
1560 rs23(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
1562 static int * const picmg_23_rs_byte5[] = {
1563 &hf_ipmi_picmg_23_slot_base,
1564 &hf_ipmi_picmg_23_tier_base,
1565 &hf_ipmi_picmg_23_orientation,
1566 NULL
1569 proto_tree_add_item(tree, hf_ipmi_picmg_23_slot_num,
1570 tvb, 0, 1, ENC_LITTLE_ENDIAN);
1571 proto_tree_add_item(tree, hf_ipmi_picmg_23_tier_num,
1572 tvb, 1, 1, ENC_LITTLE_ENDIAN);
1573 proto_tree_add_bitmask(tree, tvb, 2, hf_ipmi_picmg_23_rs_byte5,
1574 ett_ipmi_picmg_23_rs_byte5, picmg_23_rs_byte5,
1575 ENC_LITTLE_ENDIAN);
1576 proto_tree_add_item(tree, hf_ipmi_picmg_23_origin_x,
1577 tvb, 3, 2, ENC_LITTLE_ENDIAN);
1578 proto_tree_add_item(tree, hf_ipmi_picmg_23_origin_y,
1579 tvb, 5, 2, ENC_LITTLE_ENDIAN);
1582 static const value_string picmg_24_controls[] = {
1583 { 0, "Disable MP" },
1584 { 1, "Enable MP" },
1585 { 2, "De-assert ENABLE#" },
1586 { 3, "Assert ENABLE#" },
1587 { 4, "Disable PWR" },
1588 { 5, "Enable PWR" },
1589 { 0, NULL }
1592 static void
1593 fmt_power_amps(char *s, uint32_t v)
1595 snprintf(s, ITEM_LABEL_LENGTH, "%d.%dA", v / 10, v % 10);
1598 /* Power Channel Control
1600 static void
1601 rq24(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
1603 proto_tree_add_item(tree, hf_ipmi_picmg_24_channel,
1604 tvb, 0, 1, ENC_LITTLE_ENDIAN);
1605 proto_tree_add_item(tree, hf_ipmi_picmg_24_control,
1606 tvb, 1, 1, ENC_LITTLE_ENDIAN);
1607 proto_tree_add_item(tree, hf_ipmi_picmg_24_current,
1608 tvb, 2, 1, ENC_LITTLE_ENDIAN);
1609 proto_tree_add_item(tree, hf_ipmi_picmg_24_primary_pm,
1610 tvb, 3, 1, ENC_LITTLE_ENDIAN);
1611 proto_tree_add_item(tree, hf_ipmi_picmg_24_backup_pm,
1612 tvb, 4, 1, ENC_LITTLE_ENDIAN);
1615 static const value_string picmg_25_fault_vals[] = {
1616 { 0, "Redundant PM is not providing Payload Power current" },
1617 { 1, "Redundant PM is providing Payload Power current" },
1618 { 0, NULL }
1621 static const true_false_string picmg_25_roles = {
1622 "Primary", "Redundant"
1625 /* Get Power Channel Status
1627 static void
1628 rq25(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
1630 proto_tree_add_item(tree, hf_ipmi_picmg_25_start,
1631 tvb, 0, 1, ENC_LITTLE_ENDIAN);
1632 proto_tree_add_item(tree, hf_ipmi_picmg_25_count,
1633 tvb, 1, 1, ENC_LITTLE_ENDIAN);
1636 static void
1637 rs25(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
1639 static int * const picmg_25_gstatus[] = {
1640 &hf_ipmi_picmg_25_fault,
1641 &hf_ipmi_picmg_25_pwr_good,
1642 &hf_ipmi_picmg_25_mp_good,
1643 &hf_ipmi_picmg_25_role,
1644 NULL
1646 static int * const picmg_25_cstatus[] = {
1647 &hf_ipmi_picmg_25_pwr_on,
1648 &hf_ipmi_picmg_25_pwr_ovr,
1649 &hf_ipmi_picmg_25_pwr,
1650 &hf_ipmi_picmg_25_enable,
1651 &hf_ipmi_picmg_25_mp_ovr,
1652 &hf_ipmi_picmg_25_mp,
1653 &hf_ipmi_picmg_25_ps1,
1654 NULL
1657 unsigned i, len = tvb_captured_length(tvb);
1659 proto_tree_add_item(tree, hf_ipmi_picmg_25_max,
1660 tvb, 0, 1, ENC_LITTLE_ENDIAN);
1661 proto_tree_add_bitmask(tree, tvb, 1, hf_ipmi_picmg_25_gstatus,
1662 ett_ipmi_picmg_25_rs_byte4, picmg_25_gstatus,
1663 ENC_LITTLE_ENDIAN);
1665 for (i = 2; i < len; i++) {
1666 proto_tree_add_bitmask(tree, tvb, i, hf_ipmi_picmg_25_cstatus,
1667 ett_ipmi_picmg_25_rs_byte5, picmg_25_cstatus,
1668 ENC_LITTLE_ENDIAN);
1672 /* PM Reset
1674 static void
1675 rq26(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
1677 proto_tree_add_item(tree, hf_ipmi_picmg_26_pm_site,
1678 tvb, 0, 1, ENC_LITTLE_ENDIAN);
1681 /* Get PM Status
1683 static void
1684 rs27(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
1686 static int * const picmg_27_status[] = {
1687 &hf_ipmi_picmg_27_pm_healthy,
1688 NULL
1690 proto_tree_add_bitmask(tree, tvb, 0, hf_ipmi_picmg_27_rs_byte3,
1691 ett_ipmi_picmg_27_rs_byte3, picmg_27_status,
1692 ENC_LITTLE_ENDIAN);
1695 static const value_string cc28[] = {
1696 { 0x80, "Returned from autonomous mode" },
1697 { 0, NULL }
1700 static void
1701 fmt_100ms(char *s, uint32_t v)
1703 snprintf(s, ITEM_LABEL_LENGTH, "%d.%dS", v / 10, v % 10);
1706 /* PM Heart-Beat
1708 static void
1709 rq28(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
1711 static int * const picmg_28_flags[] = {
1712 &hf_ipmi_picmg_28_mch2,
1713 &hf_ipmi_picmg_28_mch1,
1714 NULL
1716 proto_tree_add_item(tree, hf_ipmi_picmg_28_timeout,
1717 tvb, 0, 1, ENC_LITTLE_ENDIAN);
1718 proto_tree_add_bitmask(tree, tvb, 1, hf_ipmi_picmg_28_rq_byte3,
1719 ett_ipmi_picmg_28_rq_byte3, picmg_28_flags,
1720 ENC_LITTLE_ENDIAN);
1723 static const true_false_string picmg_29_alarm_actions = {
1724 "Produces(results in) an implementation-defined action",
1725 "Not implemented"
1728 static const true_false_string picmg_29_alarm_modes = {
1729 "Can be controlled/enabled by the Set Telco Alarm State command",
1730 "Can not be controlled/enabled"
1733 /* Get Telco Alarm Capabilities
1735 static void
1736 rs29(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
1738 static int * const picmg_29_caps[] = {
1739 &hf_ipmi_picmg_29_maj_rst,
1740 &hf_ipmi_picmg_29_min_rst,
1741 &hf_ipmi_picmg_29_alarm_cut,
1742 &hf_ipmi_picmg_29_test_mode,
1743 &hf_ipmi_picmg_29_pwr_alarm,
1744 &hf_ipmi_picmg_29_minor_alarm,
1745 &hf_ipmi_picmg_29_major_alarm,
1746 &hf_ipmi_picmg_29_crit_alarm,
1747 NULL
1749 proto_tree_add_bitmask(tree, tvb, 0, hf_ipmi_picmg_29_rs_byte3,
1750 ett_ipmi_picmg_29_rs_byte3, picmg_29_caps,
1751 ENC_LITTLE_ENDIAN);
1754 static const value_string picmg_2a_alarm_ids[] = {
1755 { 0, "Critical Alarm" },
1756 { 1, "Major Alarm" },
1757 { 2, "Minor Alarm" },
1758 { 3, "Power Alarm" },
1759 { 4, "Alarm Cutoff" },
1760 { 0, NULL }
1763 static const value_string picmg_2a_alarm_ctrls[] = {
1764 { 0, "off / cutoff disabled" },
1765 { 1, "on / cutoff enabled" },
1766 { 0xFF, "test mode" },
1767 { 0, NULL }
1770 /* Set Telco Alarm State
1772 static void
1773 rq2a(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
1775 proto_tree_add_item(tree, hf_ipmi_picmg_05_fruid,
1776 tvb, 0, 1, ENC_LITTLE_ENDIAN);
1777 proto_tree_add_item(tree, hf_ipmi_picmg_2a_alarm_id,
1778 tvb, 1, 1, ENC_LITTLE_ENDIAN);
1779 proto_tree_add_item(tree, hf_ipmi_picmg_2a_alarm_ctrl,
1780 tvb, 2, 1, ENC_LITTLE_ENDIAN);
1783 /* Get Telco Alarm State
1785 static void
1786 rq2b(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
1788 proto_tree_add_item(tree, hf_ipmi_picmg_05_fruid,
1789 tvb, 0, 1, ENC_LITTLE_ENDIAN);
1790 proto_tree_add_item(tree, hf_ipmi_picmg_2a_alarm_id,
1791 tvb, 1, 1, ENC_LITTLE_ENDIAN);
1794 static void
1795 rs2b(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
1797 proto_tree_add_item(tree, hf_ipmi_picmg_2b_alarm_state,
1798 tvb, 0, 1, ENC_LITTLE_ENDIAN);
1801 static const value_string amc_clock_ids[] = {
1802 { 1, "TCLKA(CLK1A)" },
1803 { 2, "TCLKB(CLK1B)" },
1804 { 3, "TCLKC(CLK1)" },
1805 { 4, "TCLKD(CLK2A)" },
1806 { 5, "FCLKA(CLK2B)" },
1807 { 6, "CLK2" },
1808 { 7, "CLK3A" },
1809 { 8, "CLK3B" },
1810 { 9, "CLK3" },
1811 { 0, NULL }
1814 static const value_string amc_clock_dirs[] = {
1815 { 0, "Clock receiver" },
1816 { 1, "Clock source" },
1817 { 0, NULL }
1820 static const value_string amc_clock_plls[] = {
1821 { 0, "Default state" },
1822 { 1, "Connect through PLL" },
1823 { 2, "Bypass PLL" },
1824 { 0, NULL }
1827 static const range_string amc_clock_families[] = {
1828 { 0, 0, "Unspecified" },
1829 { 1, 1, "SONET/SDH/PDH" },
1830 { 2, 2, "Reserved for PCI Express" },
1831 { 3, 0xC8, "Reserved" },
1832 { 0xC9, 0xFF, "Vendor defined" },
1833 { 0, 0, NULL }
1836 static const value_string amc_clock_resource_types[] = {
1837 { 0, "On-Carrier device" },
1838 { 1, "AMC module" },
1839 { 2, "Backplane" },
1840 { 3, "Reserved" },
1841 { 0, NULL }
1844 static int * const amc_clock_setting[] = {
1845 &hf_ipmi_picmg_clock_pll,
1846 &hf_ipmi_picmg_clock_dir,
1847 &hf_ipmi_picmg_clock_state,
1848 NULL
1851 static int * const amc_clock_resource[] = {
1852 &hf_ipmi_picmg_clock_resource_type,
1853 &hf_ipmi_picmg_clock_resource_dev,
1854 NULL
1857 /* Set Clock State
1859 static void
1860 rq2c(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
1862 proto_tree_add_item(tree, hf_ipmi_picmg_clock_id, tvb, 0, 1, ENC_LITTLE_ENDIAN);
1863 proto_tree_add_item(tree, hf_ipmi_picmg_clock_cfg, tvb, 1, 1, ENC_LITTLE_ENDIAN);
1864 proto_tree_add_bitmask(tree, tvb, 2, hf_ipmi_picmg_clock_setting,
1865 ett_ipmi_picmg_clock_setting, amc_clock_setting, ENC_LITTLE_ENDIAN);
1866 if (tvb_captured_length(tvb) > 3) {
1867 proto_tree_add_item(tree, hf_ipmi_picmg_clock_family, tvb, 3, 1, ENC_LITTLE_ENDIAN);
1868 proto_tree_add_item(tree, hf_ipmi_picmg_clock_accuracy, tvb, 4, 1, ENC_LITTLE_ENDIAN);
1869 proto_tree_add_item(tree, hf_ipmi_picmg_clock_frequency, tvb, 5, 4, ENC_LITTLE_ENDIAN);
1871 if (tvb_captured_length(tvb) > 9) {
1872 proto_tree_add_bitmask(tree, tvb, 9, hf_ipmi_picmg_clock_resource,
1873 ett_ipmi_picmg_clock_res, amc_clock_resource, ENC_LITTLE_ENDIAN);
1877 /* Get Clock State (request)
1879 static void
1880 rq2d(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
1882 proto_tree_add_item(tree, hf_ipmi_picmg_clock_id, tvb, 0, 1, ENC_LITTLE_ENDIAN);
1883 if (tvb_captured_length(tvb) > 1) {
1884 proto_tree_add_bitmask(tree, tvb, 1, hf_ipmi_picmg_clock_resource,
1885 ett_ipmi_picmg_clock_res, amc_clock_resource, ENC_LITTLE_ENDIAN);
1889 /* Get Clock State (response)
1891 static void
1892 rs2d(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
1894 proto_tree_add_bitmask(tree, tvb, 0, hf_ipmi_picmg_clock_setting,
1895 ett_ipmi_picmg_clock_setting, amc_clock_setting, ENC_LITTLE_ENDIAN);
1896 if (tvb_captured_length(tvb) > 1) {
1897 proto_tree_add_item(tree, hf_ipmi_picmg_clock_cfg, tvb, 1, 1, ENC_LITTLE_ENDIAN);
1898 proto_tree_add_item(tree, hf_ipmi_picmg_clock_family, tvb, 2, 1, ENC_LITTLE_ENDIAN);
1899 proto_tree_add_item(tree, hf_ipmi_picmg_clock_accuracy, tvb, 3, 1, ENC_LITTLE_ENDIAN);
1900 proto_tree_add_item(tree, hf_ipmi_picmg_clock_frequency, tvb, 4, 4, ENC_LITTLE_ENDIAN);
1904 static void
1905 add_component_bits(proto_tree *tree, tvbuff_t *tvb, unsigned offs, const char *desc)
1907 static int * const compbits[] = { &hf_ipmi_picmg_XX_comp7, &hf_ipmi_picmg_XX_comp6, &hf_ipmi_picmg_XX_comp5,
1908 &hf_ipmi_picmg_XX_comp4, &hf_ipmi_picmg_XX_comp3, &hf_ipmi_picmg_XX_comp2, &hf_ipmi_picmg_XX_comp1, &hf_ipmi_picmg_XX_comp0, NULL };
1910 proto_tree_add_bitmask_text(tree, tvb, offs, 1, desc, "None",
1911 ett_ipmi_picmg_XX_compbits, compbits, ENC_LITTLE_ENDIAN, 0);
1914 /* Get Target Upgrade Capabilities
1916 static void
1917 rs2e(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
1919 static int * const byte2[] = { &hf_ipmi_picmg_2e_upgrade_undesirable, &hf_ipmi_picmg_2e_auto_rollback_override,
1920 &hf_ipmi_picmg_2e_ipmc_degraded, &hf_ipmi_picmg_2e_deferred_activate, &hf_ipmi_picmg_2e_services_affected,
1921 &hf_ipmi_picmg_2e_manual_rollback, &hf_ipmi_picmg_2e_auto_rollback, &hf_ipmi_picmg_2e_self_test, NULL };
1923 proto_tree_add_item(tree, hf_ipmi_picmg_2e_version, tvb, 0, 1, ENC_LITTLE_ENDIAN);
1924 proto_tree_add_bitmask_text(tree, tvb, 1, 1, "Capabilities: ", "None",
1925 ett_ipmi_picmg_2e_byte2, byte2, ENC_LITTLE_ENDIAN, 0);
1926 proto_tree_add_item(tree, hf_ipmi_picmg_2e_upgrade_tout, tvb, 2, 1, ENC_LITTLE_ENDIAN);
1927 proto_tree_add_item(tree, hf_ipmi_picmg_2e_selftest_tout, tvb, 3, 1, ENC_LITTLE_ENDIAN);
1928 proto_tree_add_item(tree, hf_ipmi_picmg_2e_rollback_tout, tvb, 4, 1, ENC_LITTLE_ENDIAN);
1929 proto_tree_add_item(tree, hf_ipmi_picmg_2e_inaccessibility_tout, tvb, 5, 1, ENC_LITTLE_ENDIAN);
1930 add_component_bits(tree, tvb, 6, "Components present: ");
1933 static const value_string cc2e[] = {
1934 { 0x81, "Firmware Upgrade is not supported over this interface" },
1935 { 0, NULL }
1938 /* Get Component Properties
1940 static void
1941 prop_00(tvbuff_t *tvb, proto_tree *tree)
1943 static int * const byte1[] = { &hf_ipmi_picmg_prop00_cold_reset, &hf_ipmi_picmg_prop00_deferred_activation,
1944 &hf_ipmi_picmg_prop00_comparison, &hf_ipmi_picmg_prop00_preparation, &hf_ipmi_picmg_prop00_rollback, NULL };
1946 proto_tree_add_bitmask_text(tree, tvb, 0, 1, "General Component Properties: ", "None",
1947 ett_ipmi_picmg_prop00_byte1, byte1, ENC_LITTLE_ENDIAN, 0);
1950 static void
1951 parse_version(tvbuff_t *tvb, proto_tree *tree)
1953 static int * const byte1[] = { &hf_ipmi_picmg_prop01_fw_major, NULL };
1955 proto_tree_add_bitmask_text(tree, tvb, 0, 1, NULL, NULL,
1956 ett_ipmi_picmg_prop01_byte1, byte1, ENC_LITTLE_ENDIAN, 0);
1957 proto_tree_add_item(tree, hf_ipmi_picmg_prop01_fw_minor, tvb, 1, 1, ENC_LITTLE_ENDIAN);
1958 proto_tree_add_item(tree, hf_ipmi_picmg_prop01_fw_aux, tvb, 2, 4, ENC_NA);
1961 static void
1962 prop_02(tvbuff_t *tvb, proto_tree *tree)
1964 unsigned len = tvb_captured_length(tvb);
1966 if (len > 12) {
1967 len = 12;
1969 proto_tree_add_item(tree, hf_ipmi_picmg_prop02_desc, tvb, 0, len, ENC_ASCII);
1972 static const struct {
1973 void (*intrp)(tvbuff_t *tvb, proto_tree *tree);
1974 const char *name;
1975 } compprops[] = {
1976 { prop_00, "General Component Properties" },
1977 { parse_version, "Current Version" },
1978 { prop_02, "Description String" },
1979 { parse_version, "Rollback firmware version" },
1980 { parse_version, "Deferred upgrade firmware version" }
1983 static void
1984 rq2f(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
1986 uint8_t pno = tvb_get_uint8(tvb, 1);
1987 const char *desc;
1989 ipmi_set_data(pinfo, 0, pno);
1990 if (!tree) {
1991 return;
1994 if (pno < array_length(compprops)) {
1995 desc = compprops[pno].name;
1996 } else if (pno >= 0xC0) {
1997 desc = "OEM";
1998 } else {
1999 desc = "Reserved";
2002 proto_tree_add_item(tree, hf_ipmi_picmg_2f_comp_id, tvb, 0, 1, ENC_LITTLE_ENDIAN);
2003 proto_tree_add_uint_format_value(tree, hf_ipmi_picmg_2f_comp_prop, tvb, 1, 1, pno,
2004 "%s (0x%02x)", desc, pno);
2007 static void
2008 rs2f(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
2010 uint32_t pno;
2011 const char *desc;
2012 proto_item *ti;
2014 if (!ipmi_get_data(pinfo, 0, &pno)) {
2015 /* Can't parse further if property selector is not known */
2016 proto_tree_add_item(tree, hf_ipmi_picmg_2f_prop_data, tvb, 0, -1, ENC_NA);
2017 return;
2020 if (pno < array_length(compprops)) {
2021 desc = compprops[pno].name;
2022 } else if (pno >= 0xC0) {
2023 desc = "OEM";
2024 } else {
2025 desc = "Reserved";
2028 ti = proto_tree_add_uint_format_value(tree, hf_ipmi_picmg_2f_comp_prop, tvb, 0, 0, pno, "%s (0x%02x)", desc, pno);
2029 proto_item_set_generated(ti);
2030 if (pno < array_length(compprops)) {
2031 compprops[pno].intrp(tvb, tree);
2032 } else {
2033 proto_tree_add_item(tree, hf_ipmi_picmg_2f_prop_data, tvb, 0, -1, ENC_NA);
2037 static const value_string cc2f[] = {
2038 { 0x81, "Firmware Upgrade is not supported over this interface" },
2039 { 0x82, "Invalid Component ID" },
2040 { 0x83, "Invalid Component property selector" },
2041 { 0, NULL }
2044 /* Abort Firmware Upgrade
2046 static const value_string cc30[] = {
2047 { 0x80, "Firmware Upgrade cannot be aborted at this moment" },
2048 { 0x81, "Firmware Upgrade aborted, IPMC cannot resume normal operation" },
2049 { 0, NULL }
2052 /* Initiate upgrade action
2054 static void
2055 rq31(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
2057 add_component_bits(tree, tvb, 0, "Components: ");
2058 proto_tree_add_item(tree, hf_ipmi_picmg_31_action, tvb, 1, 1, ENC_LITTLE_ENDIAN);
2061 static const value_string cc31[] = {
2062 { 0x80, "Command in progress" },
2063 { 0x81, "Invalid component" },
2064 { 0, NULL }
2067 /* Upload Firmware Block
2069 static void
2070 rq32(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
2072 proto_tree_add_item(tree, hf_ipmi_picmg_32_block, tvb, 0, 1, ENC_LITTLE_ENDIAN);
2073 proto_tree_add_item(tree, hf_ipmi_picmg_32_data, tvb, 1, -1, ENC_NA);
2076 static void
2077 rs32(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
2079 if (tvb_captured_length(tvb) > 0) {
2080 proto_tree_add_item(tree, hf_ipmi_picmg_32_sec_offs, tvb, 0, 4, ENC_LITTLE_ENDIAN);
2081 proto_tree_add_item(tree, hf_ipmi_picmg_32_sec_len, tvb, 4, 4, ENC_LITTLE_ENDIAN);
2085 static const value_string cc32[] = {
2086 { 0x80, "Command in progress" },
2087 { 0x81, "Invalid component" },
2088 { 0x82, "Internal checksum error detected in the received blocks" },
2089 { 0, NULL }
2092 /* Finish Firmware Upgrade
2094 static void
2095 rq33(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
2097 proto_tree_add_item(tree, hf_ipmi_picmg_33_comp_id, tvb, 0, 1, ENC_LITTLE_ENDIAN);
2098 proto_tree_add_item(tree, hf_ipmi_picmg_33_img_len, tvb, 1, 4, ENC_LITTLE_ENDIAN);
2101 static const value_string cc33[] = {
2102 { 0x80, "Command in progress" },
2103 { 0x81, "Number of bytes received does not match size in the request" },
2104 { 0x82, "Internal checksum error detected in the received image" },
2105 { 0x83, "Uploaded firmware does not match current" },
2106 { 0, NULL }
2109 /* Get Upgrade Status
2111 static void
2112 rs34(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
2114 static const uint8_t sig = 0;
2115 static int * const byte3[] = { &hf_ipmi_picmg_34_percentage, NULL };
2116 uint8_t v;
2117 const ipmi_cmd_t *c;
2119 v = tvb_get_uint8(tvb, 0);
2120 c = ipmi_getcmd(ipmi_getnetfn(IPMI_GROUP_REQ, &sig), v);
2121 proto_tree_add_uint_format_value(tree, hf_ipmi_picmg_34_cmd, tvb, 0, 1, v,
2122 "%s (0x%02x)", c->desc, v);
2123 v = tvb_get_uint8(tvb, 1);
2124 proto_tree_add_uint_format_value(tree, hf_ipmi_picmg_34_ccode, tvb, 1, 1, v,
2125 "%s (0x%02x)", ipmi_get_completion_code(v, c), v);
2126 if (tvb_captured_length(tvb) > 2) {
2127 proto_tree_add_bitmask_text(tree, tvb, 2, 1, NULL, NULL,
2128 ett_ipmi_picmg_34_byte3, byte3, ENC_LITTLE_ENDIAN, 0);
2132 static const value_string cc34[] = {
2133 { 0x80, "Command in progress" },
2134 { 0, NULL }
2137 /* Activate Firmware
2139 static void
2140 rq35(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
2142 if (tvb_captured_length(tvb) > 0) {
2143 proto_tree_add_item(tree, hf_ipmi_picmg_35_rollback_override, tvb, 0, 1, ENC_LITTLE_ENDIAN);
2147 static const value_string cc35[] = {
2148 { 0x80, "Command in progress" },
2149 { 0, NULL }
2152 /* Query Self-test Results
2154 static void
2155 rs36(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
2157 static int * const byte2[] = { &hf_ipmi_picmg_36_fail_sel, &hf_ipmi_picmg_36_fail_sdr,
2158 &hf_ipmi_picmg_36_fail_bmc_fru, &hf_ipmi_picmg_36_fail_ipmb_sig, &hf_ipmi_picmg_36_fail_sdr_empty,
2159 &hf_ipmi_picmg_36_fail_iua, &hf_ipmi_picmg_36_fail_bb_fw, &hf_ipmi_picmg_36_fail_oper_fw, NULL };
2160 int res, fail;
2162 res = tvb_get_uint8(tvb, 0);
2163 fail = tvb_get_uint8(tvb, 1);
2165 proto_tree_add_uint_format_value(tree, hf_ipmi_picmg_36_result, tvb, 0, 1,
2166 res, "%s (0x%02x)",
2167 val_to_str_const(res, vals_36_result, "Device-specific internal failure"),
2168 res);
2170 if (res == 0x55 || res == 0xff) {
2171 proto_tree_add_uint_format_value(tree, hf_ipmi_picmg_36_fail, tvb, 1, 1,
2172 fail, "0x%02x (must be 0x00)",
2173 fail);
2174 } else if (res == 0x57) {
2175 proto_tree_add_bitmask(tree, tvb, 1, hf_ipmi_picmg_36_fail, ett_ipmi_picmg_36_byte2, byte2, ENC_LITTLE_ENDIAN);
2176 } else if (res == 0x60) {
2177 add_component_bits(tree, tvb, 1, "Failed components: ");
2178 } else {
2179 proto_tree_add_uint_format_value(tree, hf_ipmi_picmg_36_fail, tvb, 1, 1,
2180 fail, "0x%02x (device-specific)", fail);
2184 static const value_string cc36[] = {
2185 { 0x80, "Self-test in progress" },
2186 { 0x81, "Firmware upgrade not supported over this interface" },
2187 { 0, NULL }
2190 /* Query Rollback Results
2192 static void
2193 rs37(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
2195 static int * const byte2[] = { &hf_ipmi_picmg_37_percent, NULL };
2196 const char *desc;
2198 switch (ipmi_get_ccode(pinfo)) {
2199 case 0x00: desc = "Components completed rollback: "; break;
2200 case 0x80: desc = "Components (should be None): "; break;
2201 case 0x81: desc = "Components failed to rollback: "; break;
2202 default: desc = "Components (ignored): "; break;
2205 add_component_bits(tree, tvb, 0, desc);
2206 if (tvb_captured_length(tvb) > 1) {
2207 proto_tree_add_bitmask_text(tree, tvb, 1, 1, NULL, NULL,
2208 ett_ipmi_picmg_37_byte2, byte2, ENC_LITTLE_ENDIAN, 0);
2212 /* Get HPM.x Capabilities
2214 static void
2215 rq3e(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
2217 proto_tree_add_item(tree, hf_ipmi_picmg_hpm_id, tvb, 0, 1, ENC_LITTLE_ENDIAN);
2220 static void
2221 rs3e(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
2223 static int * const hpm2_caps[] = {
2224 &hf_ipmi_picmg_hpm2_dyn_ssn,
2225 &hf_ipmi_picmg_hpm2_ver_chg,
2226 &hf_ipmi_picmg_hpm2_ext_mgt,
2227 &hf_ipmi_picmg_hpm2_pkt_trc,
2228 &hf_ipmi_picmg_hpm2_sol_ext,
2229 NULL };
2230 uint8_t hpm_x;
2232 proto_tree_add_item(tree, hf_ipmi_picmg_hpm_id, tvb, 0, 1, ENC_LITTLE_ENDIAN);
2233 proto_tree_add_item(tree, hf_ipmi_picmg_hpm_rev, tvb, 1, 1, ENC_LITTLE_ENDIAN);
2235 hpm_x = tvb_get_uint8(tvb, 0);
2237 if (hpm_x == 2) {
2238 proto_tree_add_item(tree, hf_ipmi_picmg_hpm2_mask, tvb, 2, 2, ENC_LITTLE_ENDIAN);
2239 if (tvb_captured_length(tvb) > 4) {
2240 proto_tree_add_bitmask(tree, tvb, 4, hf_ipmi_picmg_hpm2_caps,
2241 ett_ipmi_picmg_hpm_caps, hpm2_caps, ENC_LITTLE_ENDIAN);
2243 if (tvb_captured_length(tvb) > 5) {
2244 proto_tree_add_item(tree, hf_ipmi_picmg_hpm_oem_start,
2245 tvb, 5, 1, ENC_LITTLE_ENDIAN);
2246 proto_tree_add_item(tree, hf_ipmi_picmg_hpm_oem_rev,
2247 tvb, 6, 1, ENC_LITTLE_ENDIAN);
2249 if (tvb_captured_length(tvb) > 7) {
2250 proto_tree_add_item(tree, hf_ipmi_picmg_hpm2_sol_oem_start,
2251 tvb, 7, 1, ENC_LITTLE_ENDIAN);
2252 proto_tree_add_item(tree, hf_ipmi_picmg_hpm2_sol_oem_rev,
2253 tvb, 8, 1, ENC_LITTLE_ENDIAN);
2255 } else if (hpm_x == 3) {
2256 proto_tree_add_item(tree, hf_ipmi_picmg_hpm_oem_start,
2257 tvb, 2, 1, ENC_LITTLE_ENDIAN);
2258 proto_tree_add_item(tree, hf_ipmi_picmg_hpm_oem_rev,
2259 tvb, 3, 1, ENC_LITTLE_ENDIAN);
2263 static const value_string hpm2_func_selectors[] = {
2264 { 0x0, "Create Credentials" },
2265 { 0x1, "Get Session Info" },
2266 { 0x2, "Get User Name, least significant bytes" },
2267 { 0x3, "Get User Name, most significant bytes" },
2268 { 0x4, "Get Password, least significant bytes" },
2269 { 0x5, "Get Password, most significant bytes" },
2270 { 0x6, "Get BMC Key, least significant bytes" },
2271 { 0x7, "Get BMC Key, most significant bytes" },
2272 { 0, NULL }
2275 static const value_string hpm2_ipmi_revs[] = {
2276 { 0x0, "IPMI 1.5 session" },
2277 { 0x1, "IPMI 2.0 session" },
2278 { 0, NULL }
2281 static const value_string hpm2_auth_types[] = {
2282 { 0x0, "None" },
2283 { 0x1, "MD2" },
2284 { 0x2, "MD5" },
2285 { 0x4, "Straight password" },
2286 { 0x5, "OEM" },
2287 { 0, NULL }
2290 /* Get Dynamic Credentials
2292 static void
2293 rq3f(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
2295 proto_tree_add_item(tree, hf_ipmi_picmg_hpm_cred_hnd,
2296 tvb, 0, 1, ENC_LITTLE_ENDIAN);
2297 proto_tree_add_item(tree, hf_ipmi_picmg_hpm_func_sel,
2298 tvb, 1, 1, ENC_LITTLE_ENDIAN);
2299 if (!tvb_get_uint8(tvb, 1)) {
2300 proto_tree_add_item(tree, hf_ipmi_picmg_hpm_ipmi_rev,
2301 tvb, 2, 1, ENC_LITTLE_ENDIAN);
2302 if (tvb_get_uint8(tvb, 2)) {
2303 proto_tree_add_item(tree, hf_ipmi_picmg_hpm_cipher_id,
2304 tvb, 3, 1, ENC_LITTLE_ENDIAN);
2305 } else {
2306 proto_tree_add_item(tree, hf_ipmi_picmg_hpm_auth_type,
2307 tvb, 3, 1, ENC_LITTLE_ENDIAN);
2309 proto_tree_add_item(tree, hf_ipmi_picmg_hpm_priv_level,
2310 tvb, 4, 1, ENC_LITTLE_ENDIAN);
2311 proto_tree_add_item(tree, hf_ipmi_picmg_hpm_chn_num,
2312 tvb, 5, 1, ENC_LITTLE_ENDIAN);
2313 proto_tree_add_item(tree, hf_ipmi_picmg_hpm_avail_time,
2314 tvb, 6, 4, ENC_LITTLE_ENDIAN);
2315 proto_tree_add_item(tree, hf_ipmi_picmg_21_ipaddr,
2316 tvb, 10, 4, ENC_BIG_ENDIAN);
2320 static void
2321 rs3f(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
2323 uint8_t func;
2325 proto_tree_add_item(tree, hf_ipmi_picmg_hpm_cred_hnd,
2326 tvb, 0, 1, ENC_LITTLE_ENDIAN);
2327 proto_tree_add_item(tree, hf_ipmi_picmg_hpm_func_sel,
2328 tvb, 1, 1, ENC_LITTLE_ENDIAN);
2330 func = tvb_get_uint8(tvb, 1);
2332 switch (func) {
2333 case 0:
2334 case 1:
2335 proto_tree_add_item(tree, hf_ipmi_picmg_hpm_avail_time,
2336 tvb, 2, 4, ENC_LITTLE_ENDIAN);
2337 break;
2338 case 2:
2339 case 3:
2340 proto_tree_add_item(tree, hf_ipmi_picmg_hpm_user_name,
2341 tvb, 2, 8, ENC_NA);
2342 break;
2343 case 4:
2344 case 5:
2345 proto_tree_add_item(tree, hf_ipmi_picmg_hpm_user_pwd,
2346 tvb, 2, 10, ENC_NA);
2347 break;
2348 case 6:
2349 case 7:
2350 proto_tree_add_item(tree, hf_ipmi_picmg_hpm_bmc_key,
2351 tvb, 2, 10, ENC_NA);
2352 break;
2356 static const value_string picmg40_operations[] = {
2357 { 0x0, "Initiate new operation" },
2358 { 0x1, "Poll for completion status" },
2359 { 0, NULL }
2362 static const value_string cc40[] = {
2363 { 0x80, "In progress" },
2364 { 0x81, "No previous establishment request" },
2365 { 0x82, "LAN sessions are not supported" },
2366 { 0x83, "Error trying to establish a session" },
2367 { 0, NULL }
2370 /* Get Session Handle for Explicit LAN Bridging
2372 static void
2373 rq40(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
2375 proto_tree_add_item(tree, hf_ipmi_picmg_01_rs_ipmbaddr,
2376 tvb, 0, 1, ENC_LITTLE_ENDIAN);
2377 proto_tree_add_item(tree, hf_ipmi_picmg_01_rs_fruid,
2378 tvb, 1, 1, ENC_LITTLE_ENDIAN);
2379 if (tvb_captured_length(tvb) > 2) {
2380 proto_tree_add_item(tree, hf_ipmi_picmg_hpm_operation,
2381 tvb, 2, 1, ENC_LITTLE_ENDIAN);
2385 static void
2386 rs40(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
2388 proto_tree_add_item(tree, hf_ipmi_picmg_hpm_chn_num,
2389 tvb, 0, 1, ENC_LITTLE_ENDIAN);
2390 proto_tree_add_item(tree, hf_ipmi_picmg_hpm_ssn_hnd,
2391 tvb, 1, 1, ENC_LITTLE_ENDIAN);
2392 proto_tree_add_item(tree, hf_ipmi_picmg_hpm_ssn_hnd,
2393 tvb, 2, 1, ENC_LITTLE_ENDIAN);
2394 proto_tree_add_item(tree, hf_ipmi_picmg_hpm_ssn_hnd,
2395 tvb, 3, 1, ENC_LITTLE_ENDIAN);
2398 static const value_string cc37[] = {
2399 { 0x80, "Rollback in progress" },
2400 { 0x81, "Rollback failure" },
2401 { 0x82, "Rollback overridden" },
2402 { 0x83, "Rollback denied for integrity reasons" },
2403 { 0, NULL }
2406 /* Initiate Manual Rollback
2408 static const value_string cc38[] = {
2409 { 0x80, "Rollback in progress" },
2410 { 0, NULL }
2413 static const value_string hpm_x_ids[] = {
2414 { 0x02, "HPM.2" },
2415 { 0x03, "HPM.3" },
2416 { 0, NULL }
2419 /* Get ATCA Extended Management Resources
2421 static void
2422 rs41(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
2424 proto_tree_add_item(tree, hf_ipmi_picmg_hpm_power_draw,
2425 tvb, 0, 1, ENC_LITTLE_ENDIAN);
2426 proto_tree_add_item(tree, hf_ipmi_picmg_hpm_base_channels,
2427 tvb, 1, 2, ENC_LITTLE_ENDIAN);
2428 proto_tree_add_item(tree, hf_ipmi_picmg_hpm_fabric_channels,
2429 tvb, 3, 2, ENC_LITTLE_ENDIAN);
2430 if (tvb_captured_length(tvb) > 5) {
2431 proto_tree_add_item(tree, hf_ipmi_picmg_hpm_update_channels,
2432 tvb, 5, 1, ENC_LITTLE_ENDIAN);
2434 if (tvb_captured_length(tvb) > 6) {
2435 proto_tree_add_item(tree, hf_ipmi_picmg_hpm_cross_channels,
2436 tvb, 6, 1, ENC_LITTLE_ENDIAN);
2441 static const value_string amc_resource_types[] = {
2442 { 0, "On-Carrier device (IRTM, MCH)" },
2443 { 1, "AMC module" },
2444 { 0, NULL }
2447 /* Get AMC Extended Management Resources
2449 static void
2450 rs42(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
2452 static int * const amc_resource_type[] = {
2453 &hf_ipmi_picmg_linkinfo_dev_type,
2454 &hf_ipmi_picmg_linkinfo_dev_id,
2455 NULL };
2456 uint8_t num, i;
2458 proto_tree_add_item(tree, hf_ipmi_picmg_hpm_power_draw,
2459 tvb, 0, 1, ENC_LITTLE_ENDIAN);
2460 proto_tree_add_item(tree, hf_ipmi_picmg_hpm_num_chn_desc,
2461 tvb, 1, 1, ENC_LITTLE_ENDIAN);
2463 num = tvb_get_uint8(tvb, 1);
2465 for (i = 0; i < num; i++) {
2466 proto_tree_add_bitmask(tree, tvb, 2 + i * 5,
2467 hf_ipmi_picmg_linkinfo_dev, ett_ipmi_picmg_link_dev,
2468 amc_resource_type, ENC_LITTLE_ENDIAN);
2469 proto_tree_add_item(tree, hf_ipmi_picmg_hpm_chn_mask,
2470 tvb, 3 + i * 5, 4, ENC_LITTLE_ENDIAN);
2474 /* Set ATCA Extended Management State
2476 static void
2477 rq43(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
2479 proto_tree_add_item(tree, hf_ipmi_picmg_hpm_ext_mgmt_state,
2480 tvb, 0, 1, ENC_LITTLE_ENDIAN);
2481 proto_tree_add_item(tree, hf_ipmi_picmg_hpm_polling_period,
2482 tvb, 1, 1, ENC_LITTLE_ENDIAN);
2485 /* Get ATCA Extended Management State
2487 static void
2488 rs44(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
2490 proto_tree_add_item(tree, hf_ipmi_picmg_hpm_ext_mgmt_state,
2491 tvb, 0, 1, ENC_LITTLE_ENDIAN);
2494 static const value_string auth_pwr_states[] = {
2495 { 0, "Normal. Full Payload Power." },
2496 { 1, "Extended Management Power" },
2497 { 0, NULL }
2500 static const value_string amc_pwr_states[] = {
2501 { 0, "Standard Management Power" },
2502 { 1, "Extended Management Power" },
2503 { 2, "Full Payload Power." },
2504 { 0, NULL }
2507 /* Set AMC Power State
2509 static void
2510 rq45(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
2512 proto_tree_add_item(tree, hf_ipmi_picmg_hpm_auth_pwr_state,
2513 tvb, 0, 1, ENC_LITTLE_ENDIAN);
2516 /* Get AMC Power State
2518 static void
2519 rs46(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
2521 proto_tree_add_item(tree, hf_ipmi_picmg_hpm_auth_pwr_state,
2522 tvb, 0, 1, ENC_LITTLE_ENDIAN);
2523 proto_tree_add_item(tree, hf_ipmi_picmg_hpm_amc_pwr_state,
2524 tvb, 1, 1, ENC_LITTLE_ENDIAN);
2527 static const value_string picmg47_flags[] = {
2528 { 0, "Assign Payload Instance." },
2529 { 1, "Return Assigned Instance" },
2530 { 0, NULL }
2533 static const value_string picmg47_states[] = {
2534 { 0, "No session currently opened on this System Serial Port." },
2535 { 1, "A session already opened on this System Serial Port." },
2536 { 0, NULL }
2539 static const value_string cc47[] = {
2540 { 0x80, "Payload Instance can not be assigned at this time." },
2541 { 0, NULL }
2544 /* Assign SOL Payload Instance
2546 static void
2547 rq47(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
2549 proto_tree_add_item(tree, hf_ipmi_picmg47_port,
2550 tvb, 0, 1, ENC_LITTLE_ENDIAN);
2551 proto_tree_add_item(tree, hf_ipmi_picmg47_flags,
2552 tvb, 1, 1, ENC_LITTLE_ENDIAN);
2556 static void
2557 rs47(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
2559 static int * const byte1[] = {
2560 &hf_ipmi_picmg47_state,
2561 &hf_ipmi_picmg47_instance,
2562 NULL };
2564 proto_tree_add_bitmask(tree, tvb, 0, hf_ipmi_picmg47_assignment,
2565 ett_ipmi_picmg_47_byte1, byte1, ENC_LITTLE_ENDIAN);
2568 static const value_string picmg48_fru_types[] = {
2569 { 0, "None" },
2570 { 1, "IPMB-L address of subsidiary MMC" },
2571 { 2, "IPMB-0 address of subsidiary EMMC" },
2572 { 3, "FRU Device ID of subsidiary FRU" },
2573 { 0, NULL }
2576 static const value_string picmg48_ip_sources[] = {
2577 { 0, "Not configured for HPM.3" },
2578 { 2, "DHCP assigned" },
2579 { 4, "DHCP Proxy assigned" },
2580 { 0, NULL }
2583 /* Get IP Address Source
2585 static void
2586 rq48(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
2588 proto_tree_add_item(tree, hf_ipmi_picmg_01_rs_ipmbaddr,
2589 tvb, 0, 1, ENC_LITTLE_ENDIAN);
2590 if (tvb_captured_length(tvb) > 1) {
2591 proto_tree_add_item(tree, hf_ipmi_picmg48_sub_fru_type,
2592 tvb, 1, 1, ENC_LITTLE_ENDIAN);
2594 if (tvb_captured_length(tvb) > 2) {
2595 proto_tree_add_item(tree, hf_ipmi_picmg48_sub_fru_id,
2596 tvb, 2, 1, ENC_LITTLE_ENDIAN);
2600 static void
2601 rs48(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree)
2603 proto_tree_add_item(tree, hf_ipmi_picmg48_ip_source,
2604 tvb, 0, 1, ENC_LITTLE_ENDIAN);
2607 static const ipmi_cmd_t cmd_picmg[] = {
2608 /* AdvancedTCA Commands */
2609 { 0x00, NULL, rs00, NULL, NULL, "[ATCA] Get PICMG Properties", 0 },
2610 { 0x01, rq01, rs01, NULL, NULL, "[ATCA] Get Address Info", 0 },
2611 { 0x02, NULL, rs02, NULL, NULL, "[ATCA] Get Shelf Address Info", 0 },
2612 { 0x03, rq03, NULL, NULL, NULL, "[ATCA] Set Shelf Address Info", 0 },
2613 { 0x04, rq04, NULL, NULL, NULL, "[ATCA] FRU Control", 0 },
2614 { 0x05, rq05, rs05, NULL, NULL, "[ATCA] Get FRU LED Properties", 0 },
2615 { 0x06, rq06, rs06, NULL, NULL, "[ATCA] Get LED Color Capabilities", 0 },
2616 { 0x07, rq07, NULL, NULL, NULL, "[ATCA] Set FRU LED State", 0 },
2617 { 0x08, rq08, rs08, NULL, NULL, "[ATCA] Get FRU LED State", 0 },
2618 { 0x09, rq09, NULL, NULL, NULL, "[ATCA] Set IPMB State", 0 },
2619 { 0x0a, rq0a, NULL, NULL, NULL, "[ATCA] Set FRU Activation Policy", 0 },
2620 { 0x0b, rq0b, rs0b, NULL, NULL, "[ATCA] Get FRU Activation Policy", 0 },
2621 { 0x0c, rq0c, NULL, NULL, NULL, "[ATCA] Set FRU Activation", 0 },
2622 { 0x0d, rq0d, rs0d, NULL, NULL, "[ATCA] Get Device Locator Record ID", 0 },
2623 { 0x0e, rq0e, NULL, NULL, NULL, "[ATCA] Set Port State", 0 },
2624 { 0x0f, rq0f, rs0f, NULL, NULL, "[ATCA] Get Port State", 0 },
2625 { 0x10, rq10, rs10, NULL, NULL, "[ATCA] Compute Power Properties", 0 },
2626 { 0x11, rq11, NULL, NULL, NULL, "[ATCA] Set Power Level", 0 },
2627 { 0x12, rq12, rs12, NULL, NULL, "[ATCA] Get Power Level", 0 },
2628 { 0x13, rq13, NULL, NULL, NULL, "[ATCA] Renegotiate Power", 0 },
2629 { 0x14, rq14, rs14, NULL, NULL, "[ATCA] Get Fan Speed Properties", 0 },
2630 { 0x15, rq15, NULL, NULL, NULL, "[ATCA] Set Fan Level", 0 },
2631 { 0x16, rq16, rs16, NULL, NULL, "[ATCA] Get Fan Level", 0 },
2632 { 0x17, rq17, rs17, NULL, NULL, "[ATCA] Bused Resource Control", CMD_CALLRQ },
2633 { 0x18, rq18, rs18, NULL, NULL, "[ATCA] Get IPMB Link Info", 0 },
2634 { 0x19, rq19, NULL, NULL, NULL, "[AMC.0] Set AMC Port State", 0 },
2635 { 0x1a, rq1a, rs1a, NULL, NULL, "[AMC.0] Get AMC Port State", 0 },
2636 { 0x1b, NULL, rs1b, NULL, NULL, "[ATCA] Get Shelf Manager IPMB Address", 0 },
2637 { 0x1c, rq1c, NULL, NULL, NULL, "[ATCA] Set Fan Policy", 0 },
2638 { 0x1d, rq1d, rs1d, NULL, NULL, "[ATCA] Get Fan Policy", 0 },
2639 { 0x1e, rq1e, rs1e, NULL, NULL, "[ATCA] FRU Control Capabilities", 0 },
2640 { 0x1f, rq1f, rs1f, cc1f, NULL, "[ATCA] FRU Inventory Device Lock Control", 0 },
2641 { 0x20, rq20, rs20, cc20, NULL, "[ATCA] FRU Inventory Device Write", 0 },
2642 { 0x21, rq21, rs21, NULL, NULL, "[ATCA] Get Shelf Manager IP Addresses", 0 },
2643 { 0x22, rq22, rs22, NULL, NULL, "[ATCA] Get Shelf Power Allocation", CMD_CALLRQ },
2644 { 0x23, rq23, rs23, NULL, NULL, "[uTCA] Get Location Information", 0 },
2645 { 0x24, rq24, NULL, NULL, NULL, "[uTCA] Power Channel Control", 0 },
2646 { 0x25, rq25, rs25, NULL, NULL, "[uTCA] Get Power Channel Status", 0 },
2647 { 0x26, rq26, NULL, NULL, NULL, "[uTCA] PM Reset", 0 },
2648 { 0x27, rq26, rs27, NULL, NULL, "[uTCA] Get PM Status", 0 },
2649 { 0x28, rq28, NULL, cc28, NULL, "[uTCA] PM Heartbeat", 0 },
2650 { 0x29, rq05, rs29, NULL, NULL, "[uTCA] Get Telco Alarm Capability", 0 },
2651 { 0x2a, rq2a, NULL, NULL, NULL, "[uTCA] Set Telco Alarm State", 0 },
2652 { 0x2b, rq2b, rs2b, NULL, NULL, "[uTCA] Get Telco Alarm State", 0 },
2653 { 0x2c, rq2c, NULL, NULL, NULL, "[AMC.0] Set Clock State", 0 },
2654 { 0x2d, rq2d, rs2d, NULL, NULL, "[AMC.0] Get Clock State", 0 },
2655 { 0x2e, NULL, rs2e, cc2e, NULL, "[HPM.1] Get Target Upgrade Capabilities", 0 },
2656 { 0x2f, rq2f, rs2f, cc2f, NULL, "[HPM.1] Get Component Properties", CMD_CALLRQ },
2657 { 0x30, NULL, NULL, cc30, NULL, "[HPM.1] Abort Firmware Upgrade", 0 },
2658 { 0x31, rq31, NULL, cc31, NULL, "[HPM.1] Initiate Upgrade Action", 0 },
2659 { 0x32, rq32, rs32, cc32, NULL, "[HPM.1] Upload Firmware Block", 0 },
2660 { 0x33, rq33, NULL, cc33, NULL, "[HPM.1] Finish Firmware Upload", 0 },
2661 { 0x34, NULL, rs34, cc34, NULL, "[HPM.1] Get Upgrade Status", 0 },
2662 { 0x35, rq35, NULL, cc35, NULL, "[HPM.1] Activate Firmware", 0 },
2663 { 0x36, NULL, rs36, cc36, NULL, "[HPM.1] Query Self-test Results", 0 },
2664 { 0x37, NULL, rs37, cc37, NULL, "[HPM.1] Query Rollback Status", 0 },
2665 { 0x38, NULL, NULL, cc38, NULL, "[HPM.1] Initiate Manual Rollback", 0 },
2666 { 0x3e, rq3e, rs3e, NULL, NULL, "[HPM.2] Get HPM.x Capabilities", 0 },
2667 { 0x3f, rq3f, rs3f, NULL, NULL, "[HPM.2] Get Dynamic Credentials", 0 },
2668 { 0x40, rq40, rs40, cc40, NULL, "[HPM.2] Get Session Handle for Explicit LAN Bridging", 0 },
2669 { 0x41, NULL, rs41, NULL, NULL, "[HPM.2] Get ATCA Extended Management Resources", 0 },
2670 { 0x42, NULL, rs42, NULL, NULL, "[HPM.2] Get AMC Extended Management Resources", 0 },
2671 { 0x43, rq43, NULL, NULL, NULL, "[HPM.2] Set ATCA Extended Management State", 0 },
2672 { 0x44, NULL, rs44, NULL, NULL, "[HPM.2] Get ATCA Extended Management State", 0 },
2673 { 0x45, rq45, NULL, NULL, NULL, "[HPM.2] Set AMC Power State", 0 },
2674 { 0x46, NULL, rs46, NULL, NULL, "[HPM.2] Get AMC Power State", 0 },
2675 { 0x47, rq47, rs47, cc47, NULL, "[HPM.2] Assign SOL Payload Instance", 0 },
2676 { 0x48, rq48, rs48, NULL, NULL, "[HPM.3] Get IP Address Source", 0 }
2679 void
2680 proto_register_ipmi_picmg(void)
2682 static hf_register_info hf[] = {
2683 { &hf_ipmi_picmg_led_function,
2684 { "LED Function",
2685 "ipmi.led.function", FT_UINT8, BASE_HEX, NULL, 0, NULL, HFILL }},
2686 { &hf_ipmi_picmg_led_on_duration,
2687 { "On-duration",
2688 "ipmi.led.on_duration", FT_UINT8, BASE_HEX, NULL, 0, NULL, HFILL }},
2689 { &hf_ipmi_picmg_led_color,
2690 { "Color",
2691 "ipmi.led.color", FT_UINT8, BASE_HEX, VALS(led_color_vals), 0x0f, NULL, HFILL }},
2693 { &hf_ipmi_picmg_linkinfo_grpid,
2694 { "Grouping ID",
2695 "ipmi.linkinfo.grpid", FT_UINT32, BASE_DEC, NULL, 0xff000000, NULL, HFILL }},
2696 { &hf_ipmi_picmg_linkinfo_type_ext,
2697 { "Type extension",
2698 "ipmi.linkinfo.type_ext", FT_UINT32, BASE_HEX, NULL, 0x00f00000, NULL, HFILL }},
2699 { &hf_ipmi_picmg_linkinfo_type,
2700 { "Type",
2701 "ipmi.linkinfo.type", FT_UINT32, BASE_HEX, VALS(linkinfo_type_vals), 0x000ff000, NULL, HFILL }},
2702 { &hf_ipmi_picmg_linkinfo_ports,
2703 { "Ports",
2704 "ipmi.linkinfo.ports", FT_UINT32, BASE_HEX, VALS(linkinfo_ports_vals), 0x00000f00, NULL, HFILL }},
2705 { &hf_ipmi_picmg_linkinfo_iface,
2706 { "Interface",
2707 "ipmi.linkinfo.iface", FT_UINT32, BASE_HEX, VALS(linkinfo_iface_vals), 0x000000c0, NULL, HFILL }},
2708 { &hf_ipmi_picmg_linkinfo_chan,
2709 { "Channel",
2710 "ipmi.linkinfo.chan", FT_UINT32, BASE_DEC, NULL, 0x0000003f, NULL, HFILL }},
2711 { &hf_ipmi_picmg_linkinfo_state,
2712 { "State",
2713 "ipmi.linkinfo.state", FT_UINT8, BASE_HEX, NULL, 0, NULL, HFILL }},
2714 { &hf_ipmi_picmg_linkinfo,
2715 { "Link Info",
2716 "ipmi.linkinfo", FT_UINT32, BASE_HEX, NULL, 0, NULL, HFILL }},
2717 { &hf_ipmi_picmg_linkinfo_amc_chan,
2718 { "Channel",
2719 "ipmi.linkinfo.chan", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
2720 { &hf_ipmi_picmg_linkinfo_amc_ports,
2721 { "Ports",
2722 "ipmi.linkinfo.ports", FT_UINT24, BASE_HEX, VALS(linkinfo_ports_vals), 0x00000f, NULL, HFILL }},
2723 { &hf_ipmi_picmg_linkinfo_amc_type,
2724 { "Type",
2725 "ipmi.linkinfo.type", FT_UINT24, BASE_HEX, VALS(linkinfo_amc_type_vals), 0x000ff0, NULL, HFILL }},
2726 { &hf_ipmi_picmg_linkinfo_amc_type_ext,
2727 { "Type extension",
2728 "ipmi.linkinfo.type_ext", FT_UINT24, BASE_HEX, NULL, 0x00f000, NULL, HFILL }},
2729 { &hf_ipmi_picmg_linkinfo_amc_grpid,
2730 { "Grouping ID",
2731 "ipmi.linkinfo.grpid", FT_UINT24, BASE_DEC, NULL, 0xff0000, NULL, HFILL }},
2732 { &hf_ipmi_picmg_linkinfo_state_0,
2733 { "Enabled",
2734 "ipmi.linkinfo.state0", FT_BOOLEAN, 8, NULL, 0x1, NULL, HFILL }},
2735 { &hf_ipmi_picmg_linkinfo_state_1,
2736 { "Extended Management Link",
2737 "ipmi.linkinfo.state1", FT_BOOLEAN, 8, NULL, 0x2, NULL, HFILL }},
2738 { &hf_ipmi_picmg_linkinfo_dev,
2739 { "On-Carrier Device",
2740 "ipmi.linkinfo.dev", FT_UINT8, BASE_HEX, NULL, 0, NULL, HFILL }},
2741 { &hf_ipmi_picmg_linkinfo_dev_type,
2742 { "Device Type",
2743 "ipmi.linkinfo.dev.type", FT_UINT8, BASE_DEC, VALS(amc_resource_types), 0x80, NULL, HFILL }},
2744 { &hf_ipmi_picmg_linkinfo_dev_id,
2745 { "Device ID",
2746 "ipmi.linkinfo.dev.id", FT_UINT8, BASE_DEC_HEX, NULL, 0xF, NULL, HFILL }},
2748 { &hf_ipmi_picmg_clock_id,
2749 { "Clock ID",
2750 "ipmi.clock.id", FT_UINT8, BASE_HEX, VALS(amc_clock_ids), 0, NULL, HFILL }},
2751 { &hf_ipmi_picmg_clock_cfg,
2752 { "Clock Configuration Descriptor Index",
2753 "ipmi.clock.cfg", FT_UINT8, BASE_DEC_HEX, NULL, 0, NULL, HFILL }},
2754 { &hf_ipmi_picmg_clock_setting,
2755 { "Clock Setting",
2756 "ipmi.clock.setting", FT_UINT8, BASE_HEX, NULL, 0, NULL, HFILL }},
2757 { &hf_ipmi_picmg_clock_state,
2758 { "Clock State",
2759 "ipmi.clock.state", FT_UINT8, BASE_DEC, VALS(enable_vals), 0x8, NULL, HFILL }},
2760 { &hf_ipmi_picmg_clock_dir,
2761 { "Clock Direction",
2762 "ipmi.clock.dir", FT_UINT8, BASE_DEC, VALS(amc_clock_dirs), 0x4, NULL, HFILL }},
2763 { &hf_ipmi_picmg_clock_pll,
2764 { "PLL Control",
2765 "ipmi.clock.pll", FT_UINT8, BASE_DEC, VALS(amc_clock_plls), 0x3, NULL, HFILL }},
2766 { &hf_ipmi_picmg_clock_family,
2767 { "Clock Family",
2768 "ipmi.clock.family", FT_UINT8, BASE_HEX|BASE_RANGE_STRING, RVALS(amc_clock_families), 0, NULL, HFILL }},
2769 { &hf_ipmi_picmg_clock_accuracy,
2770 { "Clock Accuracy",
2771 "ipmi.clock.accu", FT_UINT8, BASE_HEX_DEC, NULL, 0, NULL, HFILL }},
2772 { &hf_ipmi_picmg_clock_frequency,
2773 { "Clock Frequency",
2774 "ipmi.clock.freq", FT_UINT32, BASE_DEC_HEX, NULL, 0, NULL, HFILL }},
2775 { &hf_ipmi_picmg_clock_resource,
2776 { "Clock Resource ID",
2777 "ipmi.clock.res", FT_UINT8, BASE_HEX, NULL, 0, NULL, HFILL }},
2778 { &hf_ipmi_picmg_clock_resource_type,
2779 { "Resource Type",
2780 "ipmi.clock.res.type", FT_UINT8, BASE_HEX, VALS(amc_clock_resource_types), 0xC0, NULL, HFILL }},
2781 { &hf_ipmi_picmg_clock_resource_dev,
2782 { "Device ID",
2783 "ipmi.clock.res.id", FT_UINT8, BASE_DEC, NULL, 0x0F, NULL, HFILL }},
2785 { &hf_ipmi_picmg_00_version,
2786 { "PICMG Extension Version",
2787 "ipmi.picmg00.version", FT_UINT8, BASE_CUSTOM, CF_FUNC(ipmi_fmt_version), 0, NULL, HFILL }},
2788 { &hf_ipmi_picmg_00_max_fruid,
2789 { "Max FRU Device ID",
2790 "ipmi.picmg00.max_fruid", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
2791 { &hf_ipmi_picmg_00_ipmc_fruid,
2792 { "FRU Device ID for IPMC",
2793 "ipmi.picmg00.ipmc_fruid", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
2795 { &hf_ipmi_picmg_01_rq_fruid,
2796 { "FRU ID",
2797 "ipmi.picmg01.rq_fruid", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
2798 { &hf_ipmi_picmg_01_rq_addr_key_type,
2799 { "Address Key Type",
2800 "ipmi.picmg01.rq_addr_key_type", FT_UINT8, BASE_HEX, VALS(addr_key_type_vals), 0, NULL, HFILL }},
2801 { &hf_ipmi_picmg_01_rq_addr_key,
2802 { "Address Key",
2803 "ipmi.picmg01.rq_addr_key", FT_UINT8, BASE_HEX, NULL, 0, NULL, HFILL }},
2804 { &hf_ipmi_picmg_01_rq_site_type,
2805 { "Site Type",
2806 "ipmi.picmg01.rq_site_type", FT_UINT8, BASE_HEX, VALS(site_type_vals), 0, NULL, HFILL }},
2807 { &hf_ipmi_picmg_01_rs_hwaddr,
2808 { "Hardware Address",
2809 "ipmi.picmg01.rs_hwaddr", FT_UINT8, BASE_HEX, NULL, 0, NULL, HFILL }},
2810 { &hf_ipmi_picmg_01_rs_ipmbaddr,
2811 { "IPMB Address",
2812 "ipmi.picmg01.rs_ipmbaddr", FT_UINT8, BASE_HEX, NULL, 0, NULL, HFILL }},
2813 { &hf_ipmi_picmg_01_rs_rsrv,
2814 { "Reserved (shall be 0xFF)",
2815 "ipmi.picmg01.rs_rsrv", FT_UINT8, BASE_HEX, NULL, 0, NULL, HFILL }},
2816 { &hf_ipmi_picmg_01_rs_fruid,
2817 { "FRU ID",
2818 "ipmi.picmg01.rs_fruid", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
2819 { &hf_ipmi_picmg_01_rs_site_num,
2820 { "Site Number",
2821 "ipmi.picmg01.rs_site_num", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
2822 { &hf_ipmi_picmg_01_rs_site_type,
2823 { "Site Type",
2824 "ipmi.picmg01.rs_site_type", FT_UINT8, BASE_HEX, VALS(site_type_vals), 0, NULL, HFILL }},
2826 { &hf_ipmi_picmg_02_shelf_address,
2827 { "Shelf Address",
2828 "ipmi.picmg02.shelf_address", FT_STRING, BASE_NONE, NULL, 0x0, NULL, HFILL }},
2829 { &hf_ipmi_picmg_02_shelf_type,
2830 { "Type",
2831 "ipmi.picmg02.shelf_type", FT_UINT8, BASE_DEC, NULL, 0xc0, NULL, HFILL }},
2832 { &hf_ipmi_picmg_02_shelf_length,
2833 { "Length",
2834 "ipmi.picmg02.shelf_length", FT_UINT8, BASE_DEC, NULL, 0x3f, NULL, HFILL }},
2836 { &hf_ipmi_picmg_03_shelf_address,
2837 { "Shelf Address",
2838 "ipmi.picmg03.shelf_address", FT_STRING, BASE_NONE, NULL, 0x0, NULL, HFILL }},
2839 { &hf_ipmi_picmg_03_shelf_type,
2840 { "Type",
2841 "ipmi.picmg03.shelf_type", FT_UINT8, BASE_DEC, NULL, 0xc0, NULL, HFILL }},
2842 { &hf_ipmi_picmg_03_shelf_length,
2843 { "Length",
2844 "ipmi.picmg03.shelf_length", FT_UINT8, BASE_DEC, NULL, 0x3f, NULL, HFILL }},
2846 { &hf_ipmi_picmg_04_fruid,
2847 { "FRU ID",
2848 "ipmi.picmg04.fruid", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
2849 { &hf_ipmi_picmg_04_cmd,
2850 { "Command",
2851 "ipmi.picmg04.cmd", FT_UINT8, BASE_HEX, VALS(vals_04_cmd), 0, NULL, HFILL }},
2853 { &hf_ipmi_picmg_05_fruid,
2854 { "FRU ID",
2855 "ipmi.picmg05.fruid", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
2856 { &hf_ipmi_picmg_05_led3,
2857 { "LED 3",
2858 "ipmi.picmg05.led3", FT_BOOLEAN, 8, NULL, 0x08, NULL, HFILL }},
2859 { &hf_ipmi_picmg_05_led2,
2860 { "LED 2",
2861 "ipmi.picmg05.led2", FT_BOOLEAN, 8, NULL, 0x04, NULL, HFILL }},
2862 { &hf_ipmi_picmg_05_led1,
2863 { "LED 1",
2864 "ipmi.picmg05.led1", FT_BOOLEAN, 8, NULL, 0x02, NULL, HFILL }},
2865 { &hf_ipmi_picmg_05_blue_led,
2866 { "BLUE LED",
2867 "ipmi.picmg05.blue_led", FT_BOOLEAN, 8, NULL, 0x01, NULL, HFILL }},
2868 { &hf_ipmi_picmg_05_app_leds,
2869 { "Application-specific LED Count",
2870 "ipmi.picmg05.app_leds", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
2872 { &hf_ipmi_picmg_06_fruid,
2873 { "FRU ID",
2874 "ipmi.picmg06.fruid", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
2875 { &hf_ipmi_picmg_06_ledid,
2876 { "LED ID",
2877 "ipmi.picmg06.ledid", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
2878 { &hf_ipmi_picmg_06_cap_white,
2879 { "White",
2880 "ipmi.picmg06.cap_white", FT_BOOLEAN, 8, NULL, 0x40, NULL, HFILL }},
2881 { &hf_ipmi_picmg_06_cap_orange,
2882 { "Orange",
2883 "ipmi.picmg06.cap_orange", FT_BOOLEAN, 8, NULL, 0x20, NULL, HFILL }},
2884 { &hf_ipmi_picmg_06_cap_amber,
2885 { "Amber",
2886 "ipmi.picmg06.cap_amber", FT_BOOLEAN, 8, NULL, 0x10, NULL, HFILL }},
2887 { &hf_ipmi_picmg_06_cap_green,
2888 { "Green",
2889 "ipmi.picmg06.cap_green", FT_BOOLEAN, 8, NULL, 0x08, NULL, HFILL }},
2890 { &hf_ipmi_picmg_06_cap_red,
2891 { "Red",
2892 "ipmi.picmg06.cap_red", FT_BOOLEAN, 8, NULL, 0x04, NULL, HFILL }},
2893 { &hf_ipmi_picmg_06_cap_blue,
2894 { "Blue",
2895 "ipmi.picmg06.cap_blue", FT_BOOLEAN, 8, NULL, 0x02, NULL, HFILL }},
2896 { &hf_ipmi_picmg_06_default_local_color,
2897 { "Default LED Color in Local Control state",
2898 "ipmi.picmg06.def_local", FT_UINT8, BASE_HEX, VALS(led_color_vals), 0x0f, NULL, HFILL }},
2899 { &hf_ipmi_picmg_06_default_override_color,
2900 { "Default LED Color in Override state",
2901 "ipmi.picmg06.def_override", FT_UINT8, BASE_HEX, VALS(led_color_vals), 0x0f, NULL, HFILL }},
2903 { &hf_ipmi_picmg_07_fruid,
2904 { "FRU ID",
2905 "ipmi.picmg07.fruid", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
2906 { &hf_ipmi_picmg_07_ledid,
2907 { "LED ID",
2908 "ipmi.picmg07.ledid", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
2910 { &hf_ipmi_picmg_08_fruid,
2911 { "FRU ID",
2912 "ipmi.picmg08.fruid", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
2913 { &hf_ipmi_picmg_08_ledid,
2914 { "LED ID",
2915 "ipmi.picmg08.ledid", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
2916 { &hf_ipmi_picmg_08_state_lamptest,
2917 { "Lamp Test",
2918 "ipmi.picmg08.state_lamptest", FT_BOOLEAN, 8, NULL, 0x04, NULL, HFILL }},
2919 { &hf_ipmi_picmg_08_state_override,
2920 { "Override",
2921 "ipmi.picmg08.state_override", FT_BOOLEAN, 8, NULL, 0x02, NULL, HFILL }},
2922 { &hf_ipmi_picmg_08_state_local,
2923 { "Local Control",
2924 "ipmi.picmg08.state_local", FT_BOOLEAN, 8, NULL, 0x01, NULL, HFILL }},
2925 { &hf_ipmi_picmg_08_lamptest_duration,
2926 { "Lamp test duration",
2927 "ipmi.picmg08.lamptest_duration", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
2929 { &hf_ipmi_picmg_09_ipmba,
2930 { "IPMB-A State",
2931 "ipmi.picmg09.ipmba", FT_UINT8, BASE_HEX, NULL, 0, NULL, HFILL }},
2932 { &hf_ipmi_picmg_09_ipmba_link,
2933 { "Link",
2934 "ipmi.picmg09.ipmba_link", FT_UINT8, BASE_HEX, NULL, 0xFE, NULL, HFILL }},
2935 { &hf_ipmi_picmg_09_ipmba_state,
2936 { "State",
2937 "ipmi.picmg09.ipmba_state", FT_BOOLEAN, 8, TFS(&tfs_local_control_override), 0x01, NULL, HFILL }},
2938 { &hf_ipmi_picmg_09_ipmbb,
2939 { "IPMB-B State",
2940 "ipmi.picmg09.ipmbb", FT_UINT8, BASE_HEX, NULL, 0, NULL, HFILL }},
2941 { &hf_ipmi_picmg_09_ipmbb_link,
2942 { "Link",
2943 "ipmi.picmg09.ipmbb_link", FT_UINT8, BASE_HEX, NULL, 0xFE, NULL, HFILL }},
2944 { &hf_ipmi_picmg_09_ipmbb_state,
2945 { "State",
2946 "ipmi.picmg09.ipmbb_state", FT_BOOLEAN, 8, TFS(&tfs_local_control_override), 0x01, NULL, HFILL }},
2948 { &hf_ipmi_picmg_0a_fruid,
2949 { "FRU ID",
2950 "ipmi.picmg0a.fruid", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
2951 { &hf_ipmi_picmg_0a_msk_d_locked,
2952 { "Deactivation-Locked bit",
2953 "ipmi.picmg0a.msk_deactivation", FT_BOOLEAN, 8, NULL, 0x02, NULL, HFILL }},
2954 { &hf_ipmi_picmg_0a_msk_locked,
2955 { "Locked bit",
2956 "ipmi.picmg0a.msk_locked", FT_BOOLEAN, 8, NULL, 0x01, NULL, HFILL }},
2957 { &hf_ipmi_picmg_0a_d_locked,
2958 { "Deactivation-Locked bit",
2959 "ipmi.picmg0a.deactivation", FT_BOOLEAN, 8, TFS(&set_clear_tfs), 0x02, NULL, HFILL }},
2960 { &hf_ipmi_picmg_0a_locked,
2961 { "Locked bit",
2962 "ipmi.picmg0a.locked", FT_BOOLEAN, 8, TFS(&set_clear_tfs), 0x01, NULL, HFILL }},
2964 { &hf_ipmi_picmg_0b_fruid,
2965 { "FRU ID",
2966 "ipmi.picmg0b.fruid", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
2967 { &hf_ipmi_picmg_0b_d_locked,
2968 { "Deactivation-Locked bit",
2969 "ipmi.picmg0b.deactivation", FT_BOOLEAN, 8, TFS(&set_clear_tfs), 0x02, NULL, HFILL }},
2970 { &hf_ipmi_picmg_0b_locked,
2971 { "Locked bit",
2972 "ipmi.picmg0b.locked", FT_BOOLEAN, 8, TFS(&set_clear_tfs), 0x01, NULL, HFILL }},
2974 { &hf_ipmi_picmg_0c_fruid,
2975 { "FRU ID",
2976 "ipmi.picmg0c.fruid", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
2977 { &hf_ipmi_picmg_0c_cmd,
2978 { "Command",
2979 "ipmi.picmg0c.cmd", FT_UINT8, BASE_HEX, VALS(vals_0c_cmd), 0, NULL, HFILL }},
2981 { &hf_ipmi_picmg_0d_fruid,
2982 { "FRU ID",
2983 "ipmi.picmg0d.fruid", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
2984 { &hf_ipmi_picmg_0d_start,
2985 { "Search after record ID",
2986 "ipmi.picmg0d.start", FT_UINT16, BASE_DEC, NULL, 0, NULL, HFILL }},
2987 { &hf_ipmi_picmg_0d_recordid,
2988 { "Record ID",
2989 "ipmi.picmg0d.recordid", FT_UINT16, BASE_DEC, NULL, 0, NULL, HFILL }},
2991 { &hf_ipmi_picmg_0f_iface,
2992 { "Interface",
2993 "ipmi.linkinfo.iface", FT_UINT8, BASE_HEX, VALS(linkinfo_iface_vals), 0xc0, NULL, HFILL }},
2994 { &hf_ipmi_picmg_0f_chan,
2995 { "Channel",
2996 "ipmi.linkinfo.chan", FT_UINT8, BASE_DEC, NULL, 0x3f, NULL, HFILL }},
2998 { &hf_ipmi_picmg_10_fruid,
2999 { "FRU ID",
3000 "ipmi.picmg10.fruid", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
3001 { &hf_ipmi_picmg_10_nslots,
3002 { "Number of spanned slots",
3003 "ipmi.picmg10.nslots", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
3004 { &hf_ipmi_picmg_10_ipmc_loc,
3005 { "IPMC Location",
3006 "ipmi.picmg10.ipmc_loc", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
3008 { &hf_ipmi_picmg_11_fruid,
3009 { "FRU ID",
3010 "ipmi.picmg11.fruid", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
3011 { &hf_ipmi_picmg_11_power_level,
3012 { "Power Level",
3013 "ipmi.picmg11.power_level", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
3014 { &hf_ipmi_picmg_11_set_to_desired,
3015 { "Set Present Levels to Desired",
3016 "ipmi.picmg11.set_to_desired", FT_UINT8, BASE_HEX, VALS(vals_11_set), 0, NULL, HFILL }},
3018 { &hf_ipmi_picmg_12_fruid,
3019 { "FRU ID",
3020 "ipmi.picmg12.fruid", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
3021 { &hf_ipmi_picmg_12_pwr_type,
3022 { "Power Type",
3023 "ipmi.picmg12.pwr_type", FT_UINT8, BASE_HEX, VALS(vals_12_pwr_type), 0, NULL, HFILL }},
3024 { &hf_ipmi_picmg_12_dynamic,
3025 { "Dynamic Power Configuration",
3026 "ipmi.picmg12.dynamic", FT_BOOLEAN, 8, NULL, 0x80, NULL, HFILL }},
3027 { &hf_ipmi_picmg_12_pwr_lvl,
3028 { "Power Level",
3029 "ipmi.picmg12.pwd_lvl", FT_UINT8, BASE_DEC, NULL, 0x0f, NULL, HFILL }},
3030 { &hf_ipmi_picmg_12_delay,
3031 { "Delay to stable power",
3032 "ipmi.picmg12.delay", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
3033 { &hf_ipmi_picmg_12_pwr_mult,
3034 { "Power multiplier",
3035 "ipmi.picmg12.pwr_mult", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
3036 { &hf_ipmi_picmg_12_pwr_draw,
3037 { "Power draw",
3038 "ipmi.picmg12.pwr_draw", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
3040 { &hf_ipmi_picmg_13_fruid,
3041 { "FRU ID",
3042 "ipmi.picmg13.fruid", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
3044 { &hf_ipmi_picmg_14_fruid,
3045 { "FRU ID",
3046 "ipmi.picmg14.fruid", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
3047 { &hf_ipmi_picmg_14_speed_min,
3048 { "Minimum Speed Level",
3049 "ipmi.picmg14.speed_min", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
3050 { &hf_ipmi_picmg_14_speed_max,
3051 { "Maximum Speed Level",
3052 "ipmi.picmg14.speed_max", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
3053 { &hf_ipmi_picmg_14_speed_norm,
3054 { "Normal Operating Level",
3055 "ipmi.picmg14.speed_norm", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
3056 { &hf_ipmi_picmg_14_local_control,
3057 { "Local Control Mode Supported",
3058 "ipmi.picmg14.local_control", FT_BOOLEAN, 8, NULL, 0x80, NULL, HFILL }},
3060 { &hf_ipmi_picmg_15_fruid,
3061 { "FRU ID",
3062 "ipmi.picmg15.fruid", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
3063 { &hf_ipmi_picmg_15_fan_level,
3064 { "Fan Level",
3065 "ipmi.picmg15.fan_level", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
3066 { &hf_ipmi_picmg_15_local_enable,
3067 { "Local Control Enable State",
3068 "ipmi.picmg15.local_enable", FT_UINT8, BASE_HEX, VALS(enable_vals), 0, NULL, HFILL }},
3070 { &hf_ipmi_picmg_16_fruid,
3071 { "FRU ID",
3072 "ipmi.picmg16.fruid", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
3073 { &hf_ipmi_picmg_16_override_level,
3074 { "Override Fan Level",
3075 "ipmi.picmg16.override_level", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
3076 { &hf_ipmi_picmg_16_local_level,
3077 { "Local Control Fan Level",
3078 "ipmi.picmg16.local_level", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
3079 { &hf_ipmi_picmg_16_local_enable,
3080 { "Local Control Enable State",
3081 "ipmi.picmg16.local_enable", FT_UINT8, BASE_HEX, VALS(enabled_vals), 0, NULL, HFILL }},
3083 { &hf_ipmi_picmg_17_cmd,
3084 { "Command",
3085 "ipmi.picmg17.cmd", FT_UINT8, BASE_HEX, NULL, 0, NULL, HFILL }},
3086 { &hf_ipmi_picmg_17_resid,
3087 { "Bused Resource ID",
3088 "ipmi.picmg17.resid", FT_UINT8, BASE_HEX, VALS(busresid_vals), 0, NULL, HFILL }},
3089 { &hf_ipmi_picmg_17_status,
3090 { "Status",
3091 "ipmi.picmg17.status", FT_UINT8, BASE_HEX, NULL, 0, NULL, HFILL }},
3093 { &hf_ipmi_picmg_18_li_key_type,
3094 { "Link Info Key Type",
3095 "ipmi.picmg18.li_key_type", FT_UINT8, BASE_HEX, VALS(vals_18_keytype), 0, NULL, HFILL }},
3096 { &hf_ipmi_picmg_18_li_key,
3097 { "Link Info Key",
3098 "ipmi.picmg18.li_key", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
3099 { &hf_ipmi_picmg_18_link_num,
3100 { "Link Number",
3101 "ipmi.picmg18.link_num", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
3102 { &hf_ipmi_picmg_18_sensor_num,
3103 { "Sensor Number",
3104 "ipmi.picmg18.sensor_num", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
3106 { &hf_ipmi_picmg_1a_flags,
3107 { "Extended Request Flags",
3108 "ipmi.picmg1a.flags", FT_UINT8, BASE_DEC_HEX, NULL, 0, NULL, HFILL }},
3110 { &hf_ipmi_picmg_1b_addr_active,
3111 { "Active Shelf Manager IPMB Address",
3112 "ipmi.picmg1b.addr_active", FT_UINT8, BASE_HEX, NULL, 0, NULL, HFILL }},
3113 { &hf_ipmi_picmg_1b_addr_backup,
3114 { "Backup Shelf Manager IPMB Address",
3115 "ipmi.picmg1b.addr_backup", FT_UINT8, BASE_HEX, NULL, 0, NULL, HFILL }},
3117 { &hf_ipmi_picmg_1c_fan_site_number,
3118 { "Fan Tray Site Number",
3119 "ipmi.picmg1c.fan_site_number", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
3120 { &hf_ipmi_picmg_1c_fan_enable_state,
3121 { "Fan Enable state",
3122 "ipmi.picmg1c.fan_enable_state", FT_UINT8, BASE_HEX, VALS(enable_vals), 0, NULL, HFILL }},
3123 { &hf_ipmi_picmg_1c_fan_policy_timeout,
3124 { "Fan Policy Timeout",
3125 "ipmi.picmg1c.fan_policy_timeout", FT_UINT8, BASE_CUSTOM, CF_FUNC(ipmi_fmt_5s_1based), 0, NULL, HFILL }},
3126 { &hf_ipmi_picmg_1c_site_number,
3127 { "Site Number",
3128 "ipmi.picmg1c.site_number", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
3129 { &hf_ipmi_picmg_1c_site_type,
3130 { "Site Type",
3131 "ipmi.picmg1c.site_type", FT_UINT8, BASE_HEX, VALS(site_type_vals), 0, NULL, HFILL }},
3133 { &hf_ipmi_picmg_1d_fan_site_number,
3134 { "Fan Tray Site Number",
3135 "ipmi.picmg1d.fan_site_number", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
3136 { &hf_ipmi_picmg_1d_site_number,
3137 { "Site Number",
3138 "ipmi.picmg1d.site_number", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
3139 { &hf_ipmi_picmg_1d_site_type,
3140 { "Site Type",
3141 "ipmi.picmg1d.site_type", FT_UINT8, BASE_HEX, VALS(site_type_vals), 0, NULL, HFILL }},
3142 { &hf_ipmi_picmg_1d_policy,
3143 { "Policy",
3144 "ipmi.picmg1d.fan_enable_state", FT_UINT8, BASE_HEX, VALS(vals_1d_policy), 0, NULL, HFILL }},
3145 { &hf_ipmi_picmg_1d_coverage,
3146 { "Coverage",
3147 "ipmi.picmg1d.coverage", FT_UINT8, BASE_HEX, VALS(vals_1d_coverage), 0, NULL, HFILL }},
3149 { &hf_ipmi_picmg_1e_fruid,
3150 { "FRU ID",
3151 "ipmi.picmg1e.fruid", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
3152 { &hf_ipmi_picmg_1e_cap_diagintr,
3153 { "Diagnostic interrupt",
3154 "ipmi.picmg1e.cap_diagintr", FT_BOOLEAN, 8, NULL, 0x08, NULL, HFILL }},
3155 { &hf_ipmi_picmg_1e_cap_graceful_reboot,
3156 { "Graceful reboot",
3157 "ipmi.picmg1e.cap_reboot", FT_BOOLEAN, 8, NULL, 0x04, NULL, HFILL }},
3158 { &hf_ipmi_picmg_1e_cap_warm_reset,
3159 { "Warm Reset",
3160 "ipmi.picmg1e.cap_warmreset", FT_BOOLEAN, 8, NULL, 0x02, NULL, HFILL }},
3162 { &hf_ipmi_picmg_1f_rq_fruid,
3163 { "FRU ID",
3164 "ipmi.picmg1f.rq_fruid", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
3165 { &hf_ipmi_picmg_1f_rq_op,
3166 { "Operation",
3167 "ipmi.picmg1f.rq_op", FT_UINT8, BASE_HEX, VALS(vals_1f_op), 0, NULL, HFILL }},
3168 { &hf_ipmi_picmg_1f_rq_lockid,
3169 { "Lock ID",
3170 "ipmi.picmg1f.rq_lockid", FT_UINT16, BASE_HEX, NULL, 0, NULL, HFILL }},
3171 { &hf_ipmi_picmg_1f_rs_lockid,
3172 { "Lock ID",
3173 "ipmi.picmg1f.rs_lockid", FT_UINT16, BASE_HEX, NULL, 0, NULL, HFILL }},
3174 { &hf_ipmi_picmg_1f_rs_tstamp,
3175 { "Last Commit Timestamp",
3176 "ipmi.picmg1f.rs_tstamp", FT_UINT32, BASE_DEC, NULL, 0, NULL, HFILL }},
3178 { &hf_ipmi_picmg_20_fruid,
3179 { "FRU ID",
3180 "ipmi.picmg20.fruid", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
3181 { &hf_ipmi_picmg_20_lockid,
3182 { "Lock ID",
3183 "ipmi.picmg20.lockid", FT_UINT16, BASE_HEX, NULL, 0, NULL, HFILL }},
3184 { &hf_ipmi_picmg_20_offset,
3185 { "Offset to write",
3186 "ipmi.picmg20.offset", FT_UINT16, BASE_DEC, NULL, 0, NULL, HFILL }},
3187 { &hf_ipmi_picmg_20_data,
3188 { "Data to write",
3189 "ipmi.picmg20.data", FT_BYTES, BASE_NONE, NULL, 0, NULL, HFILL }},
3190 { &hf_ipmi_picmg_20_count,
3191 { "Count written",
3192 "ipmi.picmg20.count", FT_BYTES, BASE_NONE, NULL, 0, NULL, HFILL }},
3194 { &hf_ipmi_picmg_21_addr_num,
3195 { "Address Number",
3196 "ipmi.picmg21.addr_num", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
3197 { &hf_ipmi_picmg_21_tstamp,
3198 { "Shelf IP Address Last Change Timestamp",
3199 "ipmi.picmg21.tstamp", FT_UINT32, BASE_DEC, NULL, 0, NULL, HFILL }},
3200 { &hf_ipmi_picmg_21_addr_count,
3201 { "Address Count",
3202 "ipmi.picmg21.addr_count", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
3203 { &hf_ipmi_picmg_21_site_type,
3204 { "Site Type",
3205 "ipmi.picmg21.site_type", FT_UINT8, BASE_HEX, VALS(site_type_vals), 0, NULL, HFILL }},
3206 { &hf_ipmi_picmg_21_site_num,
3207 { "Site Number",
3208 "ipmi.picmg21.site_num", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
3209 { &hf_ipmi_picmg_21_max_unavail,
3210 { "Maximum Unavailable Time",
3211 "ipmi.picmg21.max_unavail", FT_UINT8, BASE_CUSTOM, CF_FUNC(ipmi_fmt_1s_1based), 0, NULL, HFILL }},
3212 { &hf_ipmi_picmg_21_is_shm,
3213 { "Shelf Manager IP Address",
3214 "ipmi.picmg21.is_shm", FT_BOOLEAN, 8, NULL, 0x80, NULL, HFILL }},
3215 { &hf_ipmi_picmg_21_addr_type,
3216 { "Address Type",
3217 "ipmi.picmg21.addr_type", FT_UINT8, BASE_HEX, NULL, 0x7f, NULL, HFILL }},
3218 { &hf_ipmi_picmg_21_ipaddr,
3219 { "IP Address",
3220 "ipmi.picmg21.ip_addr", FT_IPv4, BASE_NONE, NULL, 0, NULL, HFILL }},
3221 { &hf_ipmi_picmg_21_rmcpport,
3222 { "RMCP Port",
3223 "ipmi.picmg21.rmcp_port", FT_UINT16, BASE_DEC, NULL, 0, NULL, HFILL }},
3225 { &hf_ipmi_picmg_22_feed_idx,
3226 { "Power Feed Index",
3227 "ipmi.picmg22.feed_idx", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
3228 { &hf_ipmi_picmg_22_update_cnt,
3229 { "Update Counter",
3230 "ipmi.picmg22.update_cnt", FT_UINT16, BASE_DEC, NULL, 0, NULL, HFILL }},
3231 { &hf_ipmi_picmg_22_pwr_alloc,
3232 { "Power Feed Allocation",
3233 "ipmi.picmg22.pwr_alloc", FT_UINT16, BASE_DEC, NULL, 0, NULL, HFILL }},
3235 { &hf_ipmi_picmg_XX_comp7,
3236 { "Component 7",
3237 "ipmi.hpm1.comp7", FT_BOOLEAN, 8, NULL, 0x80, NULL, HFILL }},
3238 { &hf_ipmi_picmg_XX_comp6,
3239 { "Component 6",
3240 "ipmi.hpm1.comp6", FT_BOOLEAN, 8, NULL, 0x40, NULL, HFILL }},
3241 { &hf_ipmi_picmg_XX_comp5,
3242 { "Component 5",
3243 "ipmi.hpm1.comp5", FT_BOOLEAN, 8, NULL, 0x20, NULL, HFILL }},
3244 { &hf_ipmi_picmg_XX_comp4,
3245 { "Component 4",
3246 "ipmi.hpm1.comp4", FT_BOOLEAN, 8, NULL, 0x10, NULL, HFILL }},
3247 { &hf_ipmi_picmg_XX_comp3,
3248 { "Component 3",
3249 "ipmi.hpm1.comp3", FT_BOOLEAN, 8, NULL, 0x08, NULL, HFILL }},
3250 { &hf_ipmi_picmg_XX_comp2,
3251 { "Component 2",
3252 "ipmi.hpm1.comp2", FT_BOOLEAN, 8, NULL, 0x04, NULL, HFILL }},
3253 { &hf_ipmi_picmg_XX_comp1,
3254 { "Component 1",
3255 "ipmi.hpm1.comp1", FT_BOOLEAN, 8, NULL, 0x02, NULL, HFILL }},
3256 { &hf_ipmi_picmg_XX_comp0,
3257 { "Component 0",
3258 "ipmi.hpm1.comp0", FT_BOOLEAN, 8, NULL, 0x01, NULL, HFILL }},
3260 { &hf_ipmi_picmg_2e_version,
3261 { "HPM.1 version",
3262 "ipmi.picmg2e.hpm1_version", FT_UINT8, BASE_HEX, NULL, 0, NULL, HFILL }},
3263 { &hf_ipmi_picmg_2e_upgrade_undesirable,
3264 { "Firmware Upgrade Undesirable",
3265 "ipmi.picmg2e.upgrade_undesirable", FT_BOOLEAN, 8, NULL, 0x80, NULL, HFILL }},
3266 { &hf_ipmi_picmg_2e_auto_rollback_override,
3267 { "Automatic Rollback Overridden",
3268 "ipmi.picmg2e.auto_rollback_override", FT_BOOLEAN, 8, NULL, 0x40, NULL, HFILL }},
3269 { &hf_ipmi_picmg_2e_ipmc_degraded,
3270 { "IPMC degraded during upgrade",
3271 "ipmi.picmg2e.ipmc_degraded", FT_BOOLEAN, 8, NULL, 0x20, NULL, HFILL }},
3272 { &hf_ipmi_picmg_2e_deferred_activate,
3273 { "Deferred Activation supported",
3274 "ipmi.picmg2e.deferred_activate", FT_BOOLEAN, 8, NULL, 0x10, NULL, HFILL }},
3275 { &hf_ipmi_picmg_2e_services_affected,
3276 { "Services affected by upgrade",
3277 "ipmi.picmg2e.services_affected", FT_BOOLEAN, 8, NULL, 0x08, NULL, HFILL }},
3278 { &hf_ipmi_picmg_2e_manual_rollback,
3279 { "Manual Rollback supported",
3280 "ipmi.picmg2e.manual_rollback", FT_BOOLEAN, 8, NULL, 0x04, NULL, HFILL }},
3281 { &hf_ipmi_picmg_2e_auto_rollback,
3282 { "Automatic Rollback supported",
3283 "ipmi.picmg2e.auto_rollback", FT_BOOLEAN, 8, NULL, 0x02, NULL, HFILL }},
3284 { &hf_ipmi_picmg_2e_self_test,
3285 { "Self-Test supported",
3286 "ipmi.picmg2e.self_test", FT_BOOLEAN, 8, NULL, 0x01, NULL, HFILL }},
3287 { &hf_ipmi_picmg_2e_upgrade_tout,
3288 { "Upgrade timeout",
3289 "ipmi.picmg2e.upgrade_tout", FT_UINT8, BASE_CUSTOM, CF_FUNC(ipmi_fmt_5s_1based), 0, NULL, HFILL }},
3290 { &hf_ipmi_picmg_2e_selftest_tout,
3291 { "Self-test timeout",
3292 "ipmi.picmg2e.selftest_tout", FT_UINT8, BASE_CUSTOM, CF_FUNC(ipmi_fmt_5s_1based), 0, NULL, HFILL }},
3293 { &hf_ipmi_picmg_2e_rollback_tout,
3294 { "Rollback timeout",
3295 "ipmi.picmg2e.rollback_tout", FT_UINT8, BASE_CUSTOM, CF_FUNC(ipmi_fmt_5s_1based), 0, NULL, HFILL }},
3296 { &hf_ipmi_picmg_2e_inaccessibility_tout,
3297 { "Inaccessibility timeout",
3298 "ipmi.picmg2e.inaccessibility_tout", FT_UINT8, BASE_CUSTOM, CF_FUNC(ipmi_fmt_5s_1based), 0, NULL, HFILL }},
3300 { &hf_ipmi_picmg_prop00_cold_reset,
3301 { "Payload cold reset required",
3302 "ipmi.prop00.cold_reset", FT_BOOLEAN, 8, NULL, 0x20, NULL, HFILL }},
3303 { &hf_ipmi_picmg_prop00_deferred_activation,
3304 { "Deferred firmware activation supported",
3305 "ipmi.prop00.deferred_activation", FT_BOOLEAN, 8, NULL, 0x10, NULL, HFILL }},
3306 { &hf_ipmi_picmg_prop00_comparison,
3307 { "Firmware comparison supported",
3308 "ipmi.prop00.firmware_comparison", FT_BOOLEAN, 8, NULL, 0x08, NULL, HFILL }},
3309 { &hf_ipmi_picmg_prop00_preparation,
3310 { "Prepare Components action required",
3311 "ipmi.prop00.preparation", FT_BOOLEAN, 8, NULL, 0x04, NULL, HFILL }},
3312 { &hf_ipmi_picmg_prop00_rollback,
3313 { "Rollback/Backup support",
3314 "ipmi.prop00.rollback", FT_UINT8, BASE_HEX, VALS(vals_prop00_rollback), 0x03, NULL, HFILL }},
3315 { &hf_ipmi_picmg_prop01_fw_major,
3316 { "Major Firmware Revision (binary encoded)",
3317 "ipmi.prop01.fw_major", FT_UINT8, BASE_HEX, NULL, 0x7f, NULL, HFILL }},
3318 { &hf_ipmi_picmg_prop01_fw_minor,
3319 { "Minor Firmware Revision (BCD encoded)",
3320 "ipmi.prop01.fw_minor", FT_UINT8, BASE_HEX, NULL, 0, NULL, HFILL }},
3321 { &hf_ipmi_picmg_prop01_fw_aux,
3322 { "Auxiliary Firmware Revision Information",
3323 "ipmi.prop01.fw_aux", FT_BYTES, BASE_NONE, NULL, 0, NULL, HFILL }},
3324 { &hf_ipmi_picmg_prop02_desc,
3325 { "Description string",
3326 "ipmi.prop02.desc", FT_STRING, BASE_NONE, NULL, 0, NULL, HFILL }},
3328 { &hf_ipmi_picmg_2f_comp_id,
3329 { "Component ID",
3330 "ipmi.picmg2f.comp_id", FT_UINT8, BASE_HEX, NULL, 0, NULL, HFILL }},
3331 { &hf_ipmi_picmg_2f_comp_prop,
3332 { "Component property selector",
3333 "ipmi.picmg2f.comp_prop", FT_UINT8, BASE_HEX, NULL, 0, NULL, HFILL }},
3334 { &hf_ipmi_picmg_2f_prop_data,
3335 { "Unknown property data",
3336 "ipmi.picmg2f.prop_data", FT_BYTES, BASE_NONE, NULL, 0, NULL, HFILL }},
3338 { &hf_ipmi_picmg_31_action,
3339 { "Upgrade action",
3340 "ipmi.picmg31.action", FT_UINT8, BASE_HEX, VALS(vals_31_action), 0, NULL, HFILL }},
3342 { &hf_ipmi_picmg_32_block,
3343 { "Block Number",
3344 "ipmi.picmg32.block", FT_UINT8, BASE_HEX, NULL, 0, NULL, HFILL }},
3345 { &hf_ipmi_picmg_32_data,
3346 { "Data",
3347 "ipmi.picmg32.data", FT_BYTES, BASE_NONE, NULL, 0, NULL, HFILL }},
3348 { &hf_ipmi_picmg_32_sec_offs,
3349 { "Section Offset",
3350 "ipmi.picmg32.sec_offs", FT_UINT32, BASE_HEX, NULL, 0, NULL, HFILL }},
3351 { &hf_ipmi_picmg_32_sec_len,
3352 { "Section Length",
3353 "ipmi.picmg32.sec_len", FT_UINT32, BASE_HEX, NULL, 0, NULL, HFILL }},
3355 { &hf_ipmi_picmg_33_comp_id,
3356 { "Component ID",
3357 "ipmi.picmg33.comp_id", FT_UINT8, BASE_HEX, NULL, 0, NULL, HFILL }},
3358 { &hf_ipmi_picmg_33_img_len,
3359 { "Image Length",
3360 "ipmi.picmg33.img_len", FT_UINT32, BASE_HEX, NULL, 0, NULL, HFILL }},
3362 { &hf_ipmi_picmg_34_cmd,
3363 { "Command in progress",
3364 "ipmi.picmg34.cmd", FT_UINT8, BASE_HEX, NULL, 0, NULL, HFILL }},
3365 { &hf_ipmi_picmg_34_ccode,
3366 { "Last command completion code",
3367 "ipmi.picmg34.ccode", FT_UINT8, BASE_HEX, NULL, 0, NULL, HFILL }},
3368 { &hf_ipmi_picmg_34_percentage,
3369 { "Completion estimate",
3370 "ipmi.picmg34.percent", FT_UINT8, BASE_CUSTOM, CF_FUNC(ipmi_fmt_percent), 0x7f, NULL, HFILL }},
3372 { &hf_ipmi_picmg_35_rollback_override,
3373 { "Rollback Override Policy",
3374 "ipmi.picmg35.rollback_override", FT_UINT8, BASE_HEX, VALS(vals_35_override), 0, NULL, HFILL }},
3376 { &hf_ipmi_picmg_36_result,
3377 { "Self test result",
3378 "ipmi.picmg36.self_test_result", FT_UINT8, BASE_HEX, VALS(vals_36_result), 0, NULL, HFILL }},
3379 { &hf_ipmi_picmg_36_fail,
3380 { "Self-test error bitfield",
3381 "ipmi.picmg36.fail", FT_UINT8, BASE_HEX, NULL, 0, NULL, HFILL }},
3382 { &hf_ipmi_picmg_36_fail_sel,
3383 { "Cannot access SEL device",
3384 "ipmi.picmg36.fail.sel", FT_BOOLEAN, 8, TFS(&tfs_36_fail_unknown), 0x80, NULL, HFILL }},
3385 { &hf_ipmi_picmg_36_fail_sdr,
3386 { "Cannot access SDR Repository",
3387 "ipmi.picmg36.fail.sdr", FT_BOOLEAN, 8, TFS(&tfs_36_fail_unknown), 0x40, NULL, HFILL }},
3388 { &hf_ipmi_picmg_36_fail_bmc_fru,
3389 { "Cannot access BMC FRU device",
3390 "ipmi.picmg36.fail.bmc_fru", FT_BOOLEAN, 8, TFS(&tfs_36_fail_unknown), 0x20, NULL, HFILL }},
3391 { &hf_ipmi_picmg_36_fail_ipmb_sig,
3392 { "IPMB signal lines do not respond",
3393 "ipmi.picmg36.fail.ipmb_sig", FT_BOOLEAN, 8, TFS(&tfs_36_fail_unknown), 0x10, NULL, HFILL }},
3394 { &hf_ipmi_picmg_36_fail_sdr_empty,
3395 { "SDR Repository is empty",
3396 "ipmi.picmg36.fail.sdr_empty", FT_BOOLEAN, 8, TFS(&tfs_36_fail_unknown), 0x08, NULL, HFILL }},
3397 { &hf_ipmi_picmg_36_fail_iua,
3398 { "Internal Use Area of BMC FRU corrupted",
3399 "ipmi.picmg36.fail.iua", FT_BOOLEAN, 8, TFS(&tfs_36_fail_unknown), 0x04, NULL, HFILL }},
3400 { &hf_ipmi_picmg_36_fail_bb_fw,
3401 { "Controller update boot block firmware corrupted",
3402 "ipmi.picmg36.fail.bb_fw", FT_BOOLEAN, 8, TFS(&tfs_36_fail_unknown), 0x02, NULL, HFILL }},
3403 { &hf_ipmi_picmg_36_fail_oper_fw,
3404 { "Controller operational firmware corrupted",
3405 "ipmi.picmg36.fail.oper_fw", FT_BOOLEAN, 8, TFS(&tfs_36_fail_unknown), 0x01, NULL, HFILL }},
3407 { &hf_ipmi_picmg_37_percent,
3408 { "Estimated percentage complete",
3409 "ipmi.picmg37.percent", FT_UINT8, BASE_CUSTOM, CF_FUNC(ipmi_fmt_percent), 0x7f, NULL, HFILL }},
3411 { &hf_ipmi_picmg_hpm_id,
3412 { "HPM.x Identifier",
3413 "ipmi.picmg.hpm.id", FT_UINT8, BASE_HEX, VALS(hpm_x_ids), 0, NULL, HFILL }},
3414 { &hf_ipmi_picmg_hpm_rev,
3415 { "HPM.x Revision Identifier",
3416 "ipmi.picmg.hpm.rev", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
3417 { &hf_ipmi_picmg_hpm2_mask,
3418 { "IPMI LAN Channel Mask",
3419 "ipmi.picmg.hpm2.mask", FT_UINT16, BASE_HEX, NULL, 0, NULL, HFILL }},
3420 { &hf_ipmi_picmg_hpm2_caps,
3421 { "HPM.2 Capabilities",
3422 "ipmi.picmg.hpm2.caps", FT_UINT8, BASE_HEX, NULL, 0, NULL, HFILL }},
3423 { &hf_ipmi_picmg_hpm2_dyn_ssn,
3424 { "Dynamic Sessions",
3425 "ipmi.picmg.hpm2.dynssn", FT_BOOLEAN, 8, NULL, 0x10, NULL, HFILL }},
3426 { &hf_ipmi_picmg_hpm2_ver_chg,
3427 { "Version Change Sensor for LAN Configuration",
3428 "ipmi.picmg.hpm2.verchg", FT_BOOLEAN, 8, NULL, 0x08, NULL, HFILL }},
3429 { &hf_ipmi_picmg_hpm2_ext_mgt,
3430 { "Extended Inactive State Management",
3431 "ipmi.picmg.hpm2.extmgt", FT_BOOLEAN, 8, NULL, 0x04, NULL, HFILL }},
3432 { &hf_ipmi_picmg_hpm2_pkt_trc,
3433 { "IPMI Channel Packet Trace",
3434 "ipmi.picmg.hpm2.pkttrc", FT_BOOLEAN, 8, NULL, 0x02, NULL, HFILL }},
3435 { &hf_ipmi_picmg_hpm2_sol_ext,
3436 { "SOL Extensions",
3437 "ipmi.picmg.hpm2.solext", FT_BOOLEAN, 8, NULL, 0x01, NULL, HFILL }},
3438 { &hf_ipmi_picmg_hpm_oem_start,
3439 { "OEM LAN Parameters Start Location",
3440 "ipmi.picmg.hpm.oem.start", FT_UINT8, BASE_HEX, NULL, 0, NULL, HFILL }},
3441 { &hf_ipmi_picmg_hpm_oem_rev,
3442 { "OEM LAN Parameters Blocks Revision Number",
3443 "ipmi.picmg.hpm.oem.rev", FT_UINT8, BASE_HEX, NULL, 0, NULL, HFILL }},
3444 { &hf_ipmi_picmg_hpm2_sol_oem_start,
3445 { "OEM SOL Parameters Start Location",
3446 "ipmi.picmg.hpm2.sol.oem.start", FT_UINT8, BASE_HEX, NULL, 0, NULL, HFILL }},
3447 { &hf_ipmi_picmg_hpm2_sol_oem_rev,
3448 { "OEM SOL Parameters Blocks Revision Number",
3449 "ipmi.picmg.hpm2.sol.oem.rev", FT_UINT8, BASE_HEX, NULL, 0, NULL, HFILL }},
3450 { &hf_ipmi_picmg_hpm_cred_hnd,
3451 { "Credentials Handle",
3452 "ipmi.picmg.hpm.cred.hnd", FT_UINT8, BASE_HEX, NULL, 0, NULL, HFILL }},
3453 { &hf_ipmi_picmg_hpm_func_sel,
3454 { "Function Selector",
3455 "ipmi.picmg.hpm.func.sel", FT_UINT8, BASE_DEC, VALS(hpm2_func_selectors), 0, NULL, HFILL }},
3456 { &hf_ipmi_picmg_hpm_ipmi_rev,
3457 { "IPMI Revision",
3458 "ipmi.picmg.hpm.ipmi.rev", FT_UINT8, BASE_HEX, VALS(hpm2_ipmi_revs), 0, NULL, HFILL }},
3459 { &hf_ipmi_picmg_hpm_auth_type,
3460 { "Authentication Type",
3461 "ipmi.picmg.hpm.auth.type", FT_UINT8, BASE_HEX, VALS(hpm2_auth_types), 0, NULL, HFILL }},
3462 { &hf_ipmi_picmg_hpm_cipher_id,
3463 { "Cipher Suite ID",
3464 "ipmi.picmg.hpm.cipher", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
3465 { &hf_ipmi_picmg_hpm_priv_level,
3466 { "Maximum Privilege Level",
3467 "ipmi.picmg.hpm.priv", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
3468 { &hf_ipmi_picmg_hpm_chn_num,
3469 { "IPMI Lan Channel Number",
3470 "ipmi.picmg.hpm.chn.num", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
3471 { &hf_ipmi_picmg_hpm_avail_time,
3472 { "Availability Time",
3473 "ipmi.picmg.hpm.avail", FT_UINT32, BASE_DEC_HEX, NULL, 0, NULL, HFILL }},
3474 { &hf_ipmi_picmg_hpm_user_name,
3475 { "User Name",
3476 "ipmi.picmg.hpm.user.name", FT_BYTES, BASE_NONE, NULL, 0, NULL, HFILL }},
3477 { &hf_ipmi_picmg_hpm_user_pwd,
3478 { "User Password",
3479 "ipmi.picmg.hpm.user.pwd", FT_BYTES, BASE_NONE, NULL, 0, NULL, HFILL }},
3480 { &hf_ipmi_picmg_hpm_bmc_key,
3481 { "BMC Key",
3482 "ipmi.picmg.hpm.bmc.key", FT_BYTES, BASE_NONE, NULL, 0, NULL, HFILL }},
3483 { &hf_ipmi_picmg_hpm_operation,
3484 { "Command Operation Mode",
3485 "ipmi.picmg.hpm.operation", FT_UINT8, BASE_DEC, VALS(picmg40_operations), 0, NULL, HFILL }},
3486 { &hf_ipmi_picmg_hpm_ssn_hnd,
3487 { "Session Handle",
3488 "ipmi.picmg.hpm.ssn.hnd", FT_UINT8, BASE_HEX, NULL, 0, NULL, HFILL }},
3489 { &hf_ipmi_picmg_hpm_power_draw,
3490 { "Extended Management Power Draw",
3491 "ipmi.picmg.hpm.pwr.draw", FT_UINT8, BASE_HEX, NULL, 0, NULL, HFILL }},
3492 { &hf_ipmi_picmg_hpm_base_channels,
3493 { "Base Interface Channels",
3494 "ipmi.picmg.hpm.base.chn", FT_UINT16, BASE_HEX, NULL, 0, NULL, HFILL }},
3495 { &hf_ipmi_picmg_hpm_fabric_channels,
3496 { "Fabric Interface Channels",
3497 "ipmi.picmg.hpm.fabric.chn", FT_UINT16, BASE_HEX, NULL, 0, NULL, HFILL }},
3498 { &hf_ipmi_picmg_hpm_update_channels,
3499 { "Update Channels",
3500 "ipmi.picmg.hpm.upd.chn", FT_UINT8, BASE_HEX, NULL, 0, NULL, HFILL }},
3501 { &hf_ipmi_picmg_hpm_cross_channels,
3502 { "ShMC Cross-Connect Channels",
3503 "ipmi.picmg.hpm.cross.chn", FT_UINT8, BASE_HEX, NULL, 0, NULL, HFILL }},
3504 { &hf_ipmi_picmg_hpm_num_chn_desc,
3505 { "Number of Channel Descriptors",
3506 "ipmi.picmg.hpm.num.chn.desc", FT_UINT8, BASE_HEX, NULL, 0, NULL, HFILL }},
3507 { &hf_ipmi_picmg_hpm_chn_mask,
3508 { "Channel Bitmask",
3509 "ipmi.picmg.hpm.chn.mask", FT_UINT32, BASE_HEX, NULL, 0, NULL, HFILL }},
3510 { &hf_ipmi_picmg_hpm_ext_mgmt_state,
3511 { "Extended Management State",
3512 "ipmi.picmg.hpm.ext.mgmt.state", FT_UINT8, BASE_DEC, VALS(enable_vals), 0, NULL, HFILL }},
3513 { &hf_ipmi_picmg_hpm_polling_period,
3514 { "Polling Period",
3515 "ipmi.picmg.hpm.poll.period", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
3516 { &hf_ipmi_picmg_hpm_auth_pwr_state,
3517 { "Authorized Power State",
3518 "ipmi.picmg.hpm.auth.pwr", FT_UINT8, BASE_DEC, VALS(auth_pwr_states), 0, NULL, HFILL }},
3519 { &hf_ipmi_picmg_hpm_amc_pwr_state,
3520 { "Actual Power State",
3521 "ipmi.picmg.hpm.amc.pwr", FT_UINT8, BASE_DEC, VALS(amc_pwr_states), 0, NULL, HFILL }},
3523 { &hf_ipmi_picmg47_port,
3524 { "System Serial Port Number",
3525 "ipmi.picmg47.port", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
3526 { &hf_ipmi_picmg47_flags,
3527 { "Flags",
3528 "ipmi.picmg47.flags", FT_UINT8, BASE_DEC, VALS(picmg47_flags), 0x01, NULL, HFILL }},
3529 { &hf_ipmi_picmg47_assignment,
3530 { "Assigned Instance",
3531 "ipmi.picmg47.assign", FT_UINT8, BASE_HEX, NULL, 0, NULL, HFILL }},
3532 { &hf_ipmi_picmg47_state,
3533 { "Serial port assigned to instance state",
3534 "ipmi.picmg47.state", FT_UINT8, BASE_DEC, VALS(picmg47_states), 0x80, NULL, HFILL }},
3535 { &hf_ipmi_picmg47_instance,
3536 { "Payload instance number",
3537 "ipmi.picmg47.instance", FT_UINT8, BASE_DEC, NULL, 0x0F, NULL, HFILL }},
3539 { &hf_ipmi_picmg48_sub_fru_type,
3540 { "Subsidiary FRU Identifier Type",
3541 "ipmi.picmg48.fru.type", FT_UINT8, BASE_DEC, VALS(picmg48_fru_types), 0, NULL, HFILL }},
3542 { &hf_ipmi_picmg48_sub_fru_id,
3543 { "Subsidiary FRU Identifier",
3544 "ipmi.picmg48.fru.id", FT_UINT8, BASE_DEC_HEX, NULL, 0, NULL, HFILL }},
3545 { &hf_ipmi_picmg48_ip_source,
3546 { "IP Address Source",
3547 "ipmi.picmg48.ip.source", FT_UINT8, BASE_DEC, VALS(picmg48_ip_sources), 0, NULL, HFILL }},
3549 { &hf_ipmi_picmg_23_rq_byte2,
3550 { "Request Flags",
3551 "ipmi.picmg23.rq.flags", FT_UINT8, BASE_HEX, NULL, 0, NULL, HFILL }},
3552 { &hf_ipmi_picmg_23_slot_sel,
3553 { "MCS",
3554 "ipmi.picmg23.rq.mcs", FT_UINT8, BASE_HEX, VALS(picmg_23_slot_selectors), 0xC0, NULL, HFILL }},
3555 { &hf_ipmi_picmg_23_carrier_num,
3556 { "Carrier Number",
3557 "ipmi.picmg23.carrier.num", FT_UINT8, BASE_DEC, NULL, 0x1F, NULL, HFILL }},
3558 { &hf_ipmi_picmg_23_slot_num,
3559 { "Slot Number",
3560 "ipmi.picmg23.slot.num", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
3561 { &hf_ipmi_picmg_23_tier_num,
3562 { "Tier Number",
3563 "ipmi.picmg23.tier.num", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
3564 { &hf_ipmi_picmg_23_rs_byte5,
3565 { "Orientation Flags",
3566 "ipmi.picmg23.rs.flags", FT_UINT8, BASE_HEX, NULL, 0, NULL, HFILL }},
3567 { &hf_ipmi_picmg_23_slot_base,
3568 { "Slot Numbers",
3569 "ipmi.picmg23.slot.base", FT_UINT8, BASE_DEC, VALS(picmg_23_num_bases), 0x80, NULL, HFILL }},
3570 { &hf_ipmi_picmg_23_tier_base,
3571 { "Tier Numbers",
3572 "ipmi.picmg23.tier.base", FT_UINT8, BASE_DEC, VALS(picmg_23_num_bases), 0x40, NULL, HFILL }},
3573 { &hf_ipmi_picmg_23_orientation,
3574 { "Carrier Orientation",
3575 "ipmi.picmg23.orient", FT_UINT8, BASE_DEC, VALS(picmg_23_orientations), 0x20, NULL, HFILL }},
3576 { &hf_ipmi_picmg_23_origin_x,
3577 { "Origin X",
3578 "ipmi.picmg23.origin.x", FT_UINT16, BASE_DEC, NULL, 0, NULL, HFILL }},
3579 { &hf_ipmi_picmg_23_origin_y,
3580 { "Origin Y",
3581 "ipmi.picmg23.origin.y", FT_UINT16, BASE_DEC, NULL, 0, NULL, HFILL }},
3583 { &hf_ipmi_picmg_24_channel,
3584 { "Power Channel Number",
3585 "ipmi.picmg.pwr.channel", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
3586 { &hf_ipmi_picmg_24_control,
3587 { "Power Channel Control",
3588 "ipmi.picmg.pwr.control", FT_UINT8, BASE_DEC, VALS(picmg_24_controls), 0, NULL, HFILL }},
3589 { &hf_ipmi_picmg_24_current,
3590 { "Power Channel Current Limit",
3591 "ipmi.picmg.pwr.limit", FT_UINT8, BASE_CUSTOM, CF_FUNC(fmt_power_amps), 0, NULL, HFILL }},
3592 { &hf_ipmi_picmg_24_primary_pm,
3593 { "Primary PM",
3594 "ipmi.picmg.primary.pm", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
3595 { &hf_ipmi_picmg_24_backup_pm,
3596 { "Redundant PM",
3597 "ipmi.picmg.backup.pm", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
3599 { &hf_ipmi_picmg_25_start,
3600 { "Starting Power Channel Number",
3601 "ipmi.picmg25.start", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
3602 { &hf_ipmi_picmg_25_count,
3603 { "Power Channel Count",
3604 "ipmi.picmg25.count", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
3605 { &hf_ipmi_picmg_25_max,
3606 { "Max Power Channel Number",
3607 "ipmi.picmg25.max", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
3608 { &hf_ipmi_picmg_25_gstatus,
3609 { "Global Status",
3610 "ipmi.picmg25.gstatus", FT_UINT8, BASE_HEX, NULL, 0, NULL, HFILL }},
3611 { &hf_ipmi_picmg_25_fault,
3612 { "Unidentified Fault",
3613 "ipmi.picmg25.fault", FT_UINT8, BASE_DEC, VALS(picmg_25_fault_vals), 0x08, NULL, HFILL }},
3614 { &hf_ipmi_picmg_25_pwr_good,
3615 { "Payload Power is Good",
3616 "ipmi.picmg25.pwr.good", FT_BOOLEAN, 8, NULL, 0x04, NULL, HFILL }},
3617 { &hf_ipmi_picmg_25_mp_good,
3618 { "Management Power is Good",
3619 "ipmi.picmg25.mp.good", FT_BOOLEAN, 8, NULL, 0x02, NULL, HFILL }},
3620 { &hf_ipmi_picmg_25_role,
3621 { "Role",
3622 "ipmi.picmg25.role", FT_BOOLEAN, 8, TFS(&picmg_25_roles), 0x01, NULL, HFILL }},
3623 { &hf_ipmi_picmg_25_cstatus,
3624 { "Power Channel Status",
3625 "ipmi.picmg25.cstatus", FT_UINT8, BASE_HEX, NULL, 0, NULL, HFILL }},
3626 { &hf_ipmi_picmg_25_pwr_on,
3627 { "PWR_ON is asserted",
3628 "ipmi.picmg25.pwr.on", FT_BOOLEAN, 8, NULL, 0x40, NULL, HFILL }},
3629 { &hf_ipmi_picmg_25_pwr_ovr,
3630 { "Payload Power Overcurrent is detected",
3631 "ipmi.picmg25.pwr.ovr", FT_BOOLEAN, 8, NULL, 0x20, NULL, HFILL }},
3632 { &hf_ipmi_picmg_25_pwr,
3633 { "Payload Power is enabled",
3634 "ipmi.picmg25.pwr", FT_BOOLEAN, 8, NULL, 0x10, NULL, HFILL }},
3635 { &hf_ipmi_picmg_25_enable,
3636 { "ENABLE# is asserted",
3637 "ipmi.picmg25.enable", FT_BOOLEAN, 8, NULL, 0x08, NULL, HFILL }},
3638 { &hf_ipmi_picmg_25_mp_ovr,
3639 { "Management Power Overcurrent is detected",
3640 "ipmi.picmg25.mp.ovr", FT_BOOLEAN, 8, NULL, 0x04, NULL, HFILL }},
3641 { &hf_ipmi_picmg_25_mp,
3642 { "Management Power is enabled",
3643 "ipmi.picmg25.mp", FT_BOOLEAN, 8, NULL, 0x02, NULL, HFILL }},
3644 { &hf_ipmi_picmg_25_ps1,
3645 { "PS1# is asserted",
3646 "ipmi.picmg25.ps1", FT_BOOLEAN, 8, NULL, 0x01, NULL, HFILL }},
3648 { &hf_ipmi_picmg_26_pm_site,
3649 { "PM Site Number",
3650 "ipmi.picmg26.pm.site", FT_UINT8, BASE_DEC, NULL, 0, NULL, HFILL }},
3651 { &hf_ipmi_picmg_27_rs_byte3,
3652 { "PM Status",
3653 "ipmi.picmg26.pm.status", FT_UINT8, BASE_HEX, NULL, 0, NULL, HFILL }},
3654 { &hf_ipmi_picmg_27_pm_healthy,
3655 { "PM is present and healthy",
3656 "ipmi.picmg26.pm.hly", FT_BOOLEAN, 8, NULL, 0x01, NULL, HFILL }},
3657 { &hf_ipmi_picmg_28_timeout,
3658 { "Time-out",
3659 "ipmi.picmg28.timeout", FT_UINT8, BASE_CUSTOM, CF_FUNC(fmt_100ms), 0, NULL, HFILL }},
3660 { &hf_ipmi_picmg_28_rq_byte3,
3661 { "Flags",
3662 "ipmi.picmg28.flags", FT_UINT8, BASE_HEX, NULL, 0, NULL, HFILL }},
3663 { &hf_ipmi_picmg_28_mch2,
3664 { "Use MCH2 PS1# de-assertion to indicate Carrier Manager is extracted",
3665 "ipmi.picmg28.mch2", FT_BOOLEAN, 8, NULL, 0x02, NULL, HFILL }},
3666 { &hf_ipmi_picmg_28_mch1,
3667 { "Use MCH1 PS1# de-assertion to indicate Carrier Manager is extracted",
3668 "ipmi.picmg28.mch1", FT_BOOLEAN, 8, NULL, 0x01, NULL, HFILL }},
3670 { &hf_ipmi_picmg_29_rs_byte3,
3671 { "Alarm Capabilities",
3672 "ipmi.picmg29.caps", FT_UINT8, BASE_HEX, NULL, 0, NULL, HFILL }},
3673 { &hf_ipmi_picmg_29_maj_rst,
3674 { "Autonomous Major Reset",
3675 "ipmi.picmg29.maj.rst", FT_BOOLEAN, 8, TFS(&picmg_29_alarm_actions), 0x80, NULL, HFILL }},
3676 { &hf_ipmi_picmg_29_min_rst,
3677 { "Autonomous Minor Reset",
3678 "ipmi.picmg29.min.rst", FT_BOOLEAN, 8, TFS(&picmg_29_alarm_actions), 0x40, NULL, HFILL }},
3679 { &hf_ipmi_picmg_29_alarm_cut,
3680 { "Autonomous alarm cutoff",
3681 "ipmi.picmg29.alrm.cut", FT_BOOLEAN, 8, TFS(&picmg_29_alarm_actions), 0x20, NULL, HFILL }},
3682 { &hf_ipmi_picmg_29_test_mode,
3683 { "Test Mode",
3684 "ipmi.picmg29.test.mode", FT_BOOLEAN, 8, TFS(&picmg_29_alarm_modes), 0x10, NULL, HFILL }},
3685 { &hf_ipmi_picmg_29_pwr_alarm,
3686 { "Power Alarm",
3687 "ipmi.picmg29.pwr.alrm", FT_BOOLEAN, 8, TFS(&picmg_29_alarm_modes), 0x08, NULL, HFILL }},
3688 { &hf_ipmi_picmg_29_minor_alarm,
3689 { "Minor Alarm",
3690 "ipmi.picmg29.min.alrm", FT_BOOLEAN, 8, TFS(&picmg_29_alarm_modes), 0x04, NULL, HFILL }},
3691 { &hf_ipmi_picmg_29_major_alarm,
3692 { "Minor Alarm",
3693 "ipmi.picmg29.maj.alrm", FT_BOOLEAN, 8, TFS(&picmg_29_alarm_modes), 0x02, NULL, HFILL }},
3694 { &hf_ipmi_picmg_29_crit_alarm,
3695 { "Critical Alarm",
3696 "ipmi.picmg29.crit.alrm", FT_BOOLEAN, 8, TFS(&picmg_29_alarm_modes), 0x01, NULL, HFILL }},
3698 { &hf_ipmi_picmg_2a_alarm_id,
3699 { "Alarm ID",
3700 "ipmi.picmg29.alrm.id", FT_UINT8, BASE_HEX, VALS(picmg_2a_alarm_ids), 0, NULL, HFILL }},
3701 { &hf_ipmi_picmg_2a_alarm_ctrl,
3702 { "Alarm Control",
3703 "ipmi.picmg29.alrm.ctrl", FT_UINT8, BASE_HEX, VALS(picmg_2a_alarm_ctrls), 0, NULL, HFILL }},
3705 { &hf_ipmi_picmg_2b_alarm_state,
3706 { "Alarm State",
3707 "ipmi.picmg29.alrm.state", FT_UINT8, BASE_HEX, VALS(picmg_2a_alarm_ctrls), 0, NULL, HFILL }},
3710 static int *ett[] = {
3711 &ett_ipmi_picmg_led_color,
3712 &ett_ipmi_picmg_link_info,
3713 &ett_ipmi_picmg_link_state,
3714 &ett_ipmi_picmg_link_dev,
3715 &ett_ipmi_picmg_clock_setting,
3716 &ett_ipmi_picmg_clock_res,
3717 &ett_ipmi_picmg_05_byte1,
3718 &ett_ipmi_picmg_06_byte1,
3719 &ett_ipmi_picmg_06_byte2,
3720 &ett_ipmi_picmg_06_byte3,
3721 &ett_ipmi_picmg_08_byte1,
3722 &ett_ipmi_picmg_09_ipmba,
3723 &ett_ipmi_picmg_09_ipmbb,
3724 &ett_ipmi_picmg_0a_byte2,
3725 &ett_ipmi_picmg_0a_byte3,
3726 &ett_ipmi_picmg_0b_byte1,
3727 &ett_ipmi_picmg_0f_chan,
3728 &ett_ipmi_picmg_12_byte1,
3729 &ett_ipmi_picmg_14_prop,
3730 &ett_ipmi_picmg_1e_byte1,
3731 &ett_ipmi_picmg_21_byte9,
3732 &ett_ipmi_picmg_XX_compbits,
3733 &ett_ipmi_picmg_2e_byte2,
3734 &ett_ipmi_picmg_prop00_byte1,
3735 &ett_ipmi_picmg_prop01_byte1,
3736 &ett_ipmi_picmg_34_byte3,
3737 &ett_ipmi_picmg_36_byte2,
3738 &ett_ipmi_picmg_37_byte2,
3739 &ett_ipmi_picmg_hpm_caps,
3740 &ett_ipmi_picmg_47_byte1,
3741 &ett_ipmi_picmg_23_rq_byte2,
3742 &ett_ipmi_picmg_23_rs_byte5,
3743 &ett_ipmi_picmg_25_rs_byte4,
3744 &ett_ipmi_picmg_25_rs_byte5,
3745 &ett_ipmi_picmg_27_rs_byte3,
3746 &ett_ipmi_picmg_28_rq_byte3,
3747 &ett_ipmi_picmg_29_rs_byte3
3749 static uint8_t sig_picmg[1] = { 0 };
3751 proto_register_field_array(proto_ipmi, hf, array_length(hf));
3752 proto_register_subtree_array(ett, array_length(ett));
3753 ipmi_register_netfn_cmdtab(IPMI_GROUP_REQ, IPMI_OEM_NONE, sig_picmg, 1,
3754 "PICMG", cmd_picmg, array_length(cmd_picmg));
3759 * Editor modelines - https://www.wireshark.org/tools/modelines.html
3761 * Local variables:
3762 * c-basic-offset: 8
3763 * tab-width: 8
3764 * indent-tabs-mode: t
3765 * End:
3767 * vi: set shiftwidth=8 tabstop=8 noexpandtab:
3768 * :indentSize=8:tabSize=8:noTabs=false: