epan/dissectors/packet-pw-hdlc.c

   1 /* packet-pw-hdlc.c
   2  * Routines for HDLC PW dissection as per RFC4618.
   3  * Copyright 2009, Dmitry Trebich, Artem Tamazov <artem.tamazov@tellabs.com>
   4  *
   5  * Wireshark - Network traffic analyzer
   6  * By Gerald Combs <gerald@wireshark.org>
   7  * Copyright 1998 Gerald Combs
   8  *
   9  * SPDX-License-Identifier: GPL-2.0-or-later
  10  *
  11  * History:
  12  * ---------------------------------
  13  * 02.03.2009 Initial implementation, supports:
  14  * - HDLC mode (rfc4618 5.1), no CW, payload is PPP (PPP in HDLC-like Framing (rfc1662)).
  15  * - FR port mode (rfc4618 5.2), no CW.
  16  *
  17  * [informative: Not supported yet:
  18  * - All kinds of HDLC PW with CW.
  19  * - PPP mode (rfc4618 5.3).
  20  * - For HDLC mode, decoding payloads other than PPP.]
  21  */
  22
  23 #include "config.h"
  24
  25 #include <epan/packet.h>
  26
  27
  28 void proto_register_pw_hdlc(void);
  29 void proto_reg_handoff_pw_hdlc(void);
  30
  31 static dissector_handle_t ppp_handle;
  32 static dissector_handle_t fr_handle;
  33 static dissector_handle_t pw_hdlc_nocw_fr_handle;
  34 static dissector_handle_t pw_ppp_handle;
  35
  36 static int proto_pw_hdlc_nocw_fr;
  37 static int proto_pw_hdlc_nocw_hdlc_ppp;
  38
  39 static int ett_pw_hdlc;
  40
  41 /* static int hf_pw_hdlc; */
  42 static int hf_pw_hdlc_address_field;
  43 static int hf_pw_hdlc_address;
  44 static int hf_pw_hdlc_cr_bit;
  45 static int hf_pw_hdlc_control_field;
  46 static int hf_pw_hdlc_pf_bit;
  47 static int hf_pw_hdlc_modifier;
  48 static int hf_pw_hdlc_frame;
  49
  50 static const value_string pw_hdlc_modifier_vals[] = {
  51         {0x00, "UI - Unnumbered information" },
  52         {0x08, "UP - Unnumbered poll" },
  53         {0x10, "DISC/RD - Disconnect/Request disconnect" },
  54         {0x18, "UA - Unnumbered acknowledgment" },
  55         {0x20, "SNRM - Set normal response mode" },
  56         {0x38, "TEST - Test" },
  57         {0x01, "SIM/RIM - Set initialization mode/Request initialization mode" },
  58         {0x21, "FRMR - Frame reject" },
  59         {0x03, "SARM/DM - Set asynchronous response mode/Disconnect mode" },
  60         {0x0B, "SABM - Set asynchronous balanced mode" },
  61         {0x13, "SARME - Set asynchronous response extended mode" },
  62         {0x1B, "SABME - Set asynchronous balanced extended mode" },
  63         {0x23, "RSET - Reset" },
  64         {0x2B, "XID - Exchange identification" },
  65         {0x33, "SNRME - Set normal response extended mode" },
  66         {0, NULL }
  67 };
  68
  69 static int dissect_pw_hdlc_nocw_fr( tvbuff_t * tvb, packet_info * pinfo, proto_tree * tree, void* data _U_ )
  70 {
  71         return call_dissector( fr_handle, tvb, pinfo, tree );
  72 }
  73
  74
  75 static int dissect_pw_hdlc_nocw_hdlc_ppp( tvbuff_t * tvb, packet_info * pinfo, proto_tree * tree, void* data _U_ )
  76 {
  77         if (tvb_reported_length_remaining(tvb, 0) < 2)
  78         {
  79                 return 0;
  80         }
  81
  82         if (tree)
  83         {
  84                 proto_tree  *tr;
  85                 proto_item  *item;
  86                 proto_item  *item_address;
  87                 proto_item  *item_control;
  88                 uint8_t     addr;
  89                 uint8_t     control;
  90
  91                 addr    = tvb_get_uint8(tvb, 0);
  92                 control = tvb_get_uint8(tvb, 1);
  93
  94                 item = proto_tree_add_item( tree, proto_pw_hdlc_nocw_hdlc_ppp, tvb, 0, 2, ENC_NA );
  95
  96                 tr = proto_item_add_subtree( item, ett_pw_hdlc );
  97
  98                 item_address = proto_tree_add_item( tr, hf_pw_hdlc_address_field, tvb, 0, 1, ENC_BIG_ENDIAN );
  99                 item_control = proto_tree_add_item( tr, hf_pw_hdlc_control_field, tvb, 1, 1, ENC_BIG_ENDIAN );
 100
 101                 tr = proto_item_add_subtree( item_address, ett_pw_hdlc );
 102
 103                 if ( 0x3F == (( addr & 0xFC ) >> 2 ))
 104                         proto_tree_add_uint_format_value( tr, hf_pw_hdlc_address, tvb, 0, 1, 0xFC, "0x%x (All stations)", 0x3F );
 105                 else
 106                         proto_tree_add_uint( tr, hf_pw_hdlc_address, tvb, 0, 1, ( addr & 0xFC ) >> 2 );
 107
 108                 proto_tree_add_uint( tr, hf_pw_hdlc_cr_bit, tvb, 0, 1, ( addr & 2 ) >> 1 );
 109
 110                 tr = proto_item_add_subtree( item_control, ett_pw_hdlc );
 111
 112                 if ( control & 1 )
 113                 {
 114                         if ( control & 2 )
 115                         {
 116                                 proto_tree_add_uint_format( tr, hf_pw_hdlc_frame, tvb, 1, 1, control, "U frame" );
 117
 118                                 proto_tree_add_uint( tr, hf_pw_hdlc_pf_bit, tvb, 1, 1, ( control & 0x10 ) >> 4 );
 119                                 proto_tree_add_uint( tr, hf_pw_hdlc_modifier, tvb, 1, 1, (control & 0xEC) >> 2);
 120                         }
 121                         else
 122                         {
 123                                 proto_tree_add_uint_format( tr, hf_pw_hdlc_frame, tvb, 1, 1, control, "S frame" );
 124                         }
 125                 }
 126                 else
 127                 {
 128                         proto_tree_add_uint_format( tr, hf_pw_hdlc_frame, tvb, 1, 1, control, "I frame" );
 129                 }
 130         }
 131
 132         call_dissector( ppp_handle, tvb_new_subset_remaining(tvb, 2), pinfo, tree );
 133         return tvb_captured_length(tvb);
 134 }
 135
 136 void proto_register_pw_hdlc(void)
 137 {
 138         static hf_register_info hf[] = {
 139 #if 0
 140                 {
 141                         &hf_pw_hdlc,
 142                         {
 143                                 "PW HDLC", "pw_hdlc", FT_NONE, BASE_NONE, NULL, 0x0, NULL, HFILL
 144                         }
 145                 },
 146 #endif
 147                 {
 148                         &hf_pw_hdlc_address_field,
 149                         {
 150                                 "Address field", "pw_hdlc.address_field",
 151                                 FT_UINT8, BASE_HEX, NULL, 0x0, NULL, HFILL
 152                         }
 153                 },
 154                 {
 155                         &hf_pw_hdlc_address,
 156                         {
 157                                 "Address", "pw_hdlc.address",
 158                                 FT_UINT8, BASE_HEX, NULL, 0x0, NULL, HFILL
 159                         }
 160                 },
 161                 {
 162                         &hf_pw_hdlc_cr_bit,
 163                         {
 164                                 "C/R bit", "pw_hdlc.cr_bit",
 165                                 FT_UINT8, BASE_DEC, NULL, 0x0, NULL, HFILL
 166                         }
 167                 },
 168                 {
 169                         &hf_pw_hdlc_control_field,
 170                         {
 171                                 "Control field", "pw_hdlc.control_field",
 172                                 FT_UINT8, BASE_HEX, NULL, 0x0, NULL, HFILL
 173                         }
 174                 },
 175                 {
 176                         &hf_pw_hdlc_pf_bit,
 177                         {
 178                                 "Poll/Final bit", "pw_hdlc.pf_bit",
 179                                 FT_UINT8, BASE_DEC, NULL, 0x0, NULL, HFILL
 180                         }
 181                 },
 182                 {
 183                         &hf_pw_hdlc_modifier,
 184                         {
 185                                 "Modifier", "pw_hdlc.modifier",
 186                                 FT_UINT8, BASE_HEX, VALS(pw_hdlc_modifier_vals), 0x0, NULL, HFILL
 187                         }
 188                 },
 189                 {
 190                         &hf_pw_hdlc_frame,
 191                         {
 192                                 "Frame type", "pw_hdlc.frame",
 193                                 FT_UINT8, BASE_DEC, NULL, 0x0, NULL, HFILL
 194                         }
 195                 },
 196         };
 197
 198         static int *ett[] = {
 199                 &ett_pw_hdlc
 200         };
 201
 202         proto_pw_hdlc_nocw_fr = proto_register_protocol("HDLC PW, FR port mode (no CW)", /*not displayed*/
 203                                                         "HDLC PW, FR port mode (no CW)",
 204                                                         "pw_hdlc_nocw_fr" );
 205         proto_pw_hdlc_nocw_hdlc_ppp = proto_register_protocol("HDLC-like framing for PPP",
 206                                                               "HDLC PW with PPP payload (no CW)",
 207                                                               "pw_hdlc_nocw_hdlc_ppp" );
 208
 209         proto_register_field_array(proto_pw_hdlc_nocw_fr, hf, array_length(hf));
 210         proto_register_subtree_array(ett, array_length(ett));
 211
 212         pw_hdlc_nocw_fr_handle = register_dissector("pw_hdlc_nocw_fr", dissect_pw_hdlc_nocw_fr, proto_pw_hdlc_nocw_fr );
 213         pw_ppp_handle = register_dissector("pw_hdlc_nocw_hdlc_ppp", dissect_pw_hdlc_nocw_hdlc_ppp, proto_pw_hdlc_nocw_hdlc_ppp );
 214 }
 215
 216 void proto_reg_handoff_pw_hdlc(void)
 217 {
 218         dissector_add_for_decode_as( "mpls.label", pw_hdlc_nocw_fr_handle );
 219         dissector_add_for_decode_as( "mpls.label", pw_ppp_handle );
 220         dissector_add_for_decode_as( "mpls.pfn", pw_hdlc_nocw_fr_handle );
 221         dissector_add_for_decode_as( "mpls.pfn", pw_ppp_handle );
 222
 223         ppp_handle = find_dissector_add_dependency( "ppp", proto_pw_hdlc_nocw_hdlc_ppp );
 224         fr_handle = find_dissector_add_dependency( "fr", proto_pw_hdlc_nocw_fr );
 225 }
 226
 227 /*
 228  * Editor modelines  -  https://www.wireshark.org/tools/modelines.html
 229  *
 230  * Local variables:
 231  * c-basic-offset: 8
 232  * tab-width: 8
 233  * indent-tabs-mode: t
 234  * End:
 235  *
 236  * vi: set shiftwidth=8 tabstop=8 noexpandtab:
 237  * :indentSize=8:tabSize=8:noTabs=false:
 238  */