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MSWSP: fix dissect_mswsp_smb()
[wireshark-wip.git] / epan / dissectors / packet-erf.c
blob286124ce78a5ae51722d201e8c1d0268f90ec9df
1 /* packet-erf.c
2 * Routines for ERF encapsulation dissection
3 *
4 * $Id$
5 *
6 * Wireshark - Network traffic analyzer
7 * By Gerald Combs <gerald@wireshark.org>
8 * Copyright 1998 Gerald Combs
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License
12 * as published by the Free Software Foundation; either version 2
13 * of the License, or (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
23 */
24
25 #include "config.h"
26
27 #include <glib.h>
28 #include <epan/packet.h>
29 #include <epan/expert.h>
30 #include <epan/prefs.h>
31 #include <epan/wmem/wmem.h>
32
33 #include "packet-erf.h"
34
35 /*
36 #include "wiretap/atm.h"
37 */
38 #include "wiretap/erf.h"
39
40 #define EXT_HDR_TYPE_CLASSIFICATION 3
41 #define EXT_HDR_TYPE_INTERCEPTID 4
42 #define EXT_HDR_TYPE_RAW_LINK 5
43 #define EXT_HDR_TYPE_BFS 6
44 #define EXT_HDR_TYPE_CHANNELISED 12
45 #define EXT_HDR_TYPE_SIGNATURE 14
46
47 struct erf_mc_hdlc_hdrx {
48 guint16 byte01;
49 guint8 byte2;
50 guint8 byte3;
51 };
52
53 struct erf_mc_raw_hdrx {
54 guint8 byte0;
55 guint16 byte12;
56 guint8 byte3;
57 };
58
59 struct erf_mc_atm_hdrx {
60 guint16 byte01;
61 guint8 byte2;
62 guint8 byte3;
63 };
64
65 struct erf_mc_aal5_hdrx {
66 guint16 byte01;
67 guint8 byte2;
68 guint8 byte3;
69 };
70
71 struct erf_mc_aal2_hdrx {
72 guint16 byte01;
73 guint8 byte2;
74 guint8 byte3;
75 };
76
77 struct erf_aal2_hdrx {
78 guint8 byte0;
79 guint8 byte1;
80 guint16 byte23;
81 };
82
83 struct erf_mc_rawl_hdrx {
84 guint16 byte01;
85 guint8 byte2;
86 guint8 byte3;
87 };
88
89 struct erf_eth_hdrx {
90 guint8 byte0;
91 guint8 byte1;
92 };
93
94 #define DECHAN_MAX_LINE_RATE 5
95 #define DECHAN_MAX_VC_SIZE 5
96 #define DECHAN_MAX_AUG_INDEX 4
97
98 typedef struct sdh_g707_format_s
99 {
100 guint8 m_sdh_line_rate;
101 guint8 m_vc_size ;
102 gint8 m_vc_index_array[DECHAN_MAX_AUG_INDEX];
103 /* i = 3 --> ITU-T letter #D - index of AUG-16
104 * i = 2 --> ITU-T letter #C - index of AUG-4,
105 * i = 1 --> ITU-T letter #B - index of AUG-1
106 * i = 0 --> ITU-T letter #A - index of AU3*/
107 } sdh_g707_format_t;
108
109 /* Initialize the protocol and registered fields */
110 static int proto_erf = -1;
111
112 static int hf_erf_ts = -1;
113 static int hf_erf_rectype = -1;
114 static int hf_erf_type = -1;
115 static int hf_erf_ehdr = -1;
116 static int hf_erf_ehdr_t = -1;
117 static int hf_erf_flags = -1;
118 static int hf_erf_flags_cap = -1;
119 static int hf_erf_flags_vlen = -1;
120 static int hf_erf_flags_trunc = -1;
121 static int hf_erf_flags_rxe = -1;
122 static int hf_erf_flags_dse = -1;
123 static int hf_erf_flags_res = -1;
124
125 static int hf_erf_rlen = -1;
126 static int hf_erf_lctr = -1;
127 static int hf_erf_wlen = -1;
128
129 /* Classification extension header */
130
131 /* InterceptID extension header */
132 static int hf_erf_ehdr_int_res1 = -1;
133 static int hf_erf_ehdr_int_id = -1;
134 static int hf_erf_ehdr_int_res2 = -1;
135
136 /* Raw Link extension header */
137 static int hf_erf_ehdr_raw_link_res = -1;
138 static int hf_erf_ehdr_raw_link_seqnum = -1;
139 static int hf_erf_ehdr_raw_link_rate = -1;
140 static int hf_erf_ehdr_raw_link_type = -1;
141
142 /* Classification extension header */
143 static int hf_erf_ehdr_class_flags = -1;
144 static int hf_erf_ehdr_class_flags_sh = -1;
145 static int hf_erf_ehdr_class_flags_shm = -1;
146 static int hf_erf_ehdr_class_flags_res1 = -1;
147 static int hf_erf_ehdr_class_flags_user = -1;
148 static int hf_erf_ehdr_class_flags_res2 = -1;
149 static int hf_erf_ehdr_class_flags_drop = -1;
150 static int hf_erf_ehdr_class_flags_str = -1;
151 static int hf_erf_ehdr_class_seqnum = -1;
152
153 /* BFS extension header */
154 static int hf_erf_ehdr_bfs_hash = -1;
155 static int hf_erf_ehdr_bfs_color = -1;
156 static int hf_erf_ehdr_bfs_raw_hash = -1;
157
158 /* Channelised extension header */
159 static int hf_erf_ehdr_chan_morebits = -1;
160 static int hf_erf_ehdr_chan_morefrag = -1;
161 static int hf_erf_ehdr_chan_seqnum = -1;
162 static int hf_erf_ehdr_chan_res = -1;
163 static int hf_erf_ehdr_chan_virt_container_id = -1;
164 static int hf_erf_ehdr_chan_assoc_virt_container_size = -1;
165 static int hf_erf_ehdr_chan_rate = -1;
166 static int hf_erf_ehdr_chan_type = -1;
167
168 /* Filter Hash extension header */
169 static int hf_erf_ehdr_signature_payload_hash = -1;
170 static int hf_erf_ehdr_signature_color = -1;
171 static int hf_erf_ehdr_signature_flow_hash = -1;
172
173 /* Unknown extension header */
174 static int hf_erf_ehdr_unk = -1;
175
176 /* MC HDLC Header */
177 static int hf_erf_mc_hdlc = -1;
178 static int hf_erf_mc_hdlc_cn = -1;
179 static int hf_erf_mc_hdlc_res1 = -1;
180 static int hf_erf_mc_hdlc_res2 = -1;
181 static int hf_erf_mc_hdlc_fcse = -1;
182 static int hf_erf_mc_hdlc_sre = -1;
183 static int hf_erf_mc_hdlc_lre = -1;
184 static int hf_erf_mc_hdlc_afe = -1;
185 static int hf_erf_mc_hdlc_oe = -1;
186 static int hf_erf_mc_hdlc_lbe = -1;
187 static int hf_erf_mc_hdlc_first = -1;
188 static int hf_erf_mc_hdlc_res3 = -1;
189
190 /* MC RAW Header */
191 static int hf_erf_mc_raw = -1;
192 static int hf_erf_mc_raw_int = -1;
193 static int hf_erf_mc_raw_res1 = -1;
194 static int hf_erf_mc_raw_res2 = -1;
195 static int hf_erf_mc_raw_res3 = -1;
196 static int hf_erf_mc_raw_sre = -1;
197 static int hf_erf_mc_raw_lre = -1;
198 static int hf_erf_mc_raw_res4 = -1;
199 static int hf_erf_mc_raw_lbe = -1;
200 static int hf_erf_mc_raw_first = -1;
201 static int hf_erf_mc_raw_res5 = -1;
202
203 /* MC ATM Header */
204 static int hf_erf_mc_atm = -1;
205 static int hf_erf_mc_atm_cn = -1;
206 static int hf_erf_mc_atm_res1 = -1;
207 static int hf_erf_mc_atm_mul = -1;
208 static int hf_erf_mc_atm_port = -1;
209 static int hf_erf_mc_atm_res2 = -1;
210 static int hf_erf_mc_atm_lbe = -1;
211 static int hf_erf_mc_atm_hec = -1;
212 static int hf_erf_mc_atm_crc10 = -1;
213 static int hf_erf_mc_atm_oamcell = -1;
214 static int hf_erf_mc_atm_first = -1;
215 static int hf_erf_mc_atm_res3 = -1;
216
217 /* MC Raw link Header */
218 static int hf_erf_mc_rawl = -1;
219 static int hf_erf_mc_rawl_cn = -1;
220 static int hf_erf_mc_rawl_res2 = -1;
221 static int hf_erf_mc_rawl_lbe = -1;
222 static int hf_erf_mc_rawl_first = -1;
223 static int hf_erf_mc_rawl_res3 = -1;
224
225 /* MC AAL5 Header */
226 static int hf_erf_mc_aal5 = -1;
227 static int hf_erf_mc_aal5_cn = -1;
228 static int hf_erf_mc_aal5_res1 = -1;
229 static int hf_erf_mc_aal5_port = -1;
230 static int hf_erf_mc_aal5_crcck = -1;
231 static int hf_erf_mc_aal5_crce = -1;
232 static int hf_erf_mc_aal5_lenck = -1;
233 static int hf_erf_mc_aal5_lene = -1;
234 static int hf_erf_mc_aal5_res2 = -1;
235 static int hf_erf_mc_aal5_first = -1;
236 static int hf_erf_mc_aal5_res3 = -1;
237
238 /* MC AAL2 Header */
239 static int hf_erf_mc_aal2 = -1;
240 static int hf_erf_mc_aal2_cn = -1;
241 static int hf_erf_mc_aal2_res1 = -1;
242 static int hf_erf_mc_aal2_res2 = -1;
243 static int hf_erf_mc_aal2_port = -1;
244 static int hf_erf_mc_aal2_res3 = -1;
245 static int hf_erf_mc_aal2_first = -1;
246 static int hf_erf_mc_aal2_maale = -1;
247 static int hf_erf_mc_aal2_lene = -1;
248 static int hf_erf_mc_aal2_cid = -1;
249
250 /* AAL2 Header */
251 static int hf_erf_aal2 = -1;
252 static int hf_erf_aal2_cid = -1;
253 static int hf_erf_aal2_maale = -1;
254 static int hf_erf_aal2_maalei = -1;
255 static int hf_erf_aal2_first = -1;
256 static int hf_erf_aal2_res1 = -1;
257
258 /* ERF Ethernet header/pad */
259 static int hf_erf_eth = -1;
260 static int hf_erf_eth_off = -1;
261 static int hf_erf_eth_res1 = -1;
262
263 /* Initialize the subtree pointers */
264 static gint ett_erf = -1;
265 static gint ett_erf_pseudo_hdr = -1;
266 static gint ett_erf_rectype = -1;
267 static gint ett_erf_flags = -1;
268 static gint ett_erf_mc_hdlc = -1;
269 static gint ett_erf_mc_raw = -1;
270 static gint ett_erf_mc_atm = -1;
271 static gint ett_erf_mc_rawlink = -1;
272 static gint ett_erf_mc_aal5 = -1;
273 static gint ett_erf_mc_aal2 = -1;
274 static gint ett_erf_aal2 = -1;
275 static gint ett_erf_eth = -1;
276
277 static expert_field ei_erf_extension_headers_not_shown = EI_INIT;
278 static expert_field ei_erf_packet_loss = EI_INIT;
279 static expert_field ei_erf_checksum_error = EI_INIT;
280
281 /* Default subdissector, display raw hex data */
282 static dissector_handle_t data_handle;
283
284 /* IPv4 and IPv6 subdissectors */
285 static dissector_handle_t ipv4_handle;
286 static dissector_handle_t ipv6_handle;
287
288 static dissector_handle_t infiniband_handle;
289 static dissector_handle_t infiniband_link_handle;
290
291 typedef enum {
292 ERF_HDLC_CHDLC = 0,
293 ERF_HDLC_PPP = 1,
294 ERF_HDLC_FRELAY = 2,
295 ERF_HDLC_MTP2 = 3,
296 ERF_HDLC_GUESS = 4,
297 ERF_HDLC_MAX = 5
298 } erf_hdlc_type_vals;
299
300 static gint erf_hdlc_type = ERF_HDLC_GUESS;
301 static dissector_handle_t chdlc_handle, ppp_handle, frelay_handle, mtp2_handle;
302
303 static gboolean erf_rawcell_first = FALSE;
304
305 typedef enum {
306 ERF_AAL5_GUESS = 0,
307 ERF_AAL5_LLC = 1,
308 ERF_AAL5_UNSPEC = 2
309 } erf_aal5_type_val;
310
311 static gint erf_aal5_type = ERF_AAL5_GUESS;
312 static dissector_handle_t atm_untruncated_handle;
313
314 static gboolean erf_ethfcs = TRUE;
315 static dissector_handle_t ethwithfcs_handle, ethwithoutfcs_handle;
316
317 static dissector_handle_t sdh_handle;
318
319 /* ERF Header */
320 #define ERF_HDR_TYPE_MASK 0x7f
321 #define ERF_HDR_EHDR_MASK 0x80
322 #define ERF_HDR_FLAGS_MASK 0xff
323 #define ERF_HDR_CAP_MASK 0x03
324 #define ERF_HDR_VLEN_MASK 0x04
325 #define ERF_HDR_TRUNC_MASK 0x08
326 #define ERF_HDR_RXE_MASK 0x10
327 #define ERF_HDR_DSE_MASK 0x20
328 #define ERF_HDR_RES_MASK 0xC0
329
330 /* Classification */
331 #define EHDR_CLASS_FLAGS_MASK 0x00ffffff
332 #define EHDR_CLASS_SH_MASK 0x00800000
333 #define EHDR_CLASS_SHM_MASK 0x00400000
334 #define EHDR_CLASS_RES1_MASK 0x00300000
335 #define EHDR_CLASS_USER_MASK 0x000FFFF0
336 #define EHDR_CLASS_RES2_MASK 0x00000008
337 #define EHDR_CLASS_DROP_MASK 0x00000004
338 #define EHDR_CLASS_STER_MASK 0x00000003
339
340 /* Header for ATM traffic identification */
341 #define ATM_HDR_LENGTH 4
342
343 /* Multi Channel HDLC */
344 #define MC_HDLC_CN_MASK 0x03ff
345 #define MC_HDLC_RES1_MASK 0xfc00
346 #define MC_HDLC_RES2_MASK 0x00
347 #define MC_HDLC_FCSE_MASK 0x01
348 #define MC_HDLC_SRE_MASK 0x02
349 #define MC_HDLC_LRE_MASK 0x04
350 #define MC_HDLC_AFE_MASK 0x08
351 #define MC_HDLC_OE_MASK 0x10
352 #define MC_HDLC_LBE_MASK 0x20
353 #define MC_HDLC_FIRST_MASK 0x40
354 #define MC_HDLC_RES3_MASK 0x80
355
356 /* Multi Channel RAW */
357 #define MC_RAW_INT_MASK 0x0f
358 #define MC_RAW_RES1_MASK 0xf0
359 #define MC_RAW_RES2_MASK 0xffff
360 #define MC_RAW_RES3_MASK 0x01
361 #define MC_RAW_SRE_MASK 0x02
362 #define MC_RAW_LRE_MASK 0x04
363 #define MC_RAW_RES4_MASK 0x18
364 #define MC_RAW_LBE_MASK 0x20
365 #define MC_RAW_FIRST_MASK 0x40
366 #define MC_RAW_RES5_MASK 0x80
367
368 /* Multi Channel ATM */
369 #define MC_ATM_CN_MASK 0x03ff
370 #define MC_ATM_RES1_MASK 0x7c00
371 #define MC_ATM_MUL_MASK 0x8000
372 #define MC_ATM_PORT_MASK 0x0f
373 #define MC_ATM_RES2_MASK 0xf0
374 #define MC_ATM_LBE_MASK 0x01
375 #define MC_ATM_HEC_MASK 0x02
376 #define MC_ATM_CRC10_MASK 0x04
377 #define MC_ATM_OAMCELL_MASK 0x08
378 #define MC_ATM_FIRST_MASK 0x10
379 #define MC_ATM_RES3_MASK 0xe0
380
381 /* Multi Channel RAW Link */
382 #define MC_RAWL_CN_MASK 0x03ff
383 #define MC_RAWL_RES1_MASK 0xfffc
384 #define MC_RAWL_RES2_MASK 0x1f
385 #define MC_RAWL_LBE_MASK 0x20
386 #define MC_RAWL_FIRST_MASK 0x40
387 #define MC_RAWL_RES3_MASK 0x80
388
389 /* Multi Channel AAL5 */
390 #define MC_AAL5_CN_MASK 0x03ff
391 #define MC_AAL5_RES1_MASK 0xfc00
392 #define MC_AAL5_PORT_MASK 0x0f
393 #define MC_AAL5_CRCCK_MASK 0x10
394 #define MC_AAL5_CRCE_MASK 0x20
395 #define MC_AAL5_LENCK_MASK 0x40
396 #define MC_AAL5_LENE_MASK 0x80
397 #define MC_AAL5_RES2_MASK 0x0f
398 #define MC_AAL5_FIRST_MASK 0x10
399 #define MC_AAL5_RES3_MASK 0xe0
400
401 /* Multi Channel AAL2 */
402 #define MC_AAL2_CN_MASK 0x03ff
403 #define MC_AAL2_RES1_MASK 0x1c00
404 #define MC_AAL2_RES2_MASK 0xe000
405 #define MC_AAL2_PORT_MASK 0x0f
406 #define MC_AAL2_RES3_MASK 0x10
407 #define MC_AAL2_FIRST_MASK 0x20
408 #define MC_AAL2_MAALE_MASK 0x40
409 #define MC_AAL2_LENE_MASK 0x80
410 #define MC_AAL2_CID_MASK 0x00
411
412 /* AAL2 */
413 #define AAL2_CID_MASK 0x00
414 #define AAL2_MAALE_MASK 0x00
415 #define AAL2_MAALEI_MASK 0x0001
416 #define AAL2_FIRST_MASK 0x0002
417 #define AAL2_RES1_MASK 0xfffc
418
419 /* ETH */
420 #define ETH_OFF_MASK 0x00
421 #define ETH_RES1_MASK 0x00
422
423 /* Record type defines */
424 static const value_string erf_type_vals[] = {
425 { ERF_TYPE_LEGACY ,"LEGACY"},
426 { ERF_TYPE_HDLC_POS ,"HDLC_POS"},
427 { ERF_TYPE_ETH ,"ETH"},
428 { ERF_TYPE_ATM ,"ATM"},
429 { ERF_TYPE_AAL5 ,"AAL5"},
430 { ERF_TYPE_MC_HDLC ,"MC_HDLC"},
431 { ERF_TYPE_MC_RAW ,"MC_RAW"},
432 { ERF_TYPE_MC_ATM ,"MC_ATM"},
433 { ERF_TYPE_MC_RAW_CHANNEL ,"MC_RAW_CHANNEL"},
434 { ERF_TYPE_MC_AAL5 ,"MC_AAL5"},
435 { ERF_TYPE_COLOR_HDLC_POS ,"COLOR_HDLC_POS"},
436 { ERF_TYPE_COLOR_ETH ,"COLOR_ETH"},
437 { ERF_TYPE_MC_AAL2 ,"MC_AAL2 "},
438 { ERF_TYPE_IP_COUNTER ,"IP_COUNTER"},
439 { ERF_TYPE_TCP_FLOW_COUNTER ,"TCP_FLOW_COUNTER"},
440 { ERF_TYPE_DSM_COLOR_HDLC_POS ,"DSM_COLOR_HDLC_POS"},
441 { ERF_TYPE_DSM_COLOR_ETH ,"DSM_COLOR_ETH "},
442 { ERF_TYPE_COLOR_MC_HDLC_POS ,"COLOR_MC_HDLC_POS"},
443 { ERF_TYPE_AAL2 ,"AAL2"},
444 { ERF_TYPE_PAD ,"PAD"},
445 { ERF_TYPE_INFINIBAND , "INFINIBAND"},
446 { ERF_TYPE_IPV4 , "IPV4"},
447 { ERF_TYPE_IPV6 , "IPV6"},
448 { ERF_TYPE_RAW_LINK , "RAW_LINK"},
449 { ERF_TYPE_INFINIBAND_LINK , "INFINIBAND_LINK"},
450 {0, NULL}
451 };
452
453 /* Extended headers type defines */
454 static const value_string ehdr_type_vals[] = {
455 { EXT_HDR_TYPE_CLASSIFICATION , "Classification"},
456 { EXT_HDR_TYPE_INTERCEPTID , "InterceptID"},
457 { EXT_HDR_TYPE_RAW_LINK , "Raw Link"},
458 { EXT_HDR_TYPE_BFS , "BFS Filter/Hash"},
459 { EXT_HDR_TYPE_CHANNELISED , "Channelised"},
460 { EXT_HDR_TYPE_SIGNATURE , "Signature"},
461 { 0, NULL }
462 };
463
464
465 static const value_string raw_link_types[] = {
466 { 0x00, "raw SONET"},
467 { 0x01, "raw SDH"},
468 { 0x02, "SONET spe"},
469 { 0x03, "SDH spe"},
470 { 0x04, "ds3"},
471 { 0x05, "SONET spe w/o POH"},
472 { 0x06, "SDH spe w/o POH"},
473 { 0x07, "SONET line mode 2"},
474 { 0x08, "SHD line mode 2"},
475 { 0x09, "raw bit-level"},
476 { 0x0A, "raw 10Gbe 66b"},
477 { 0, NULL },
478 };
479
480 static const value_string raw_link_rates[] = {
481 { 0x00, "reserved"},
482 { 0x01, "oc3/stm1"},
483 { 0x02, "oc12/stm4"},
484 { 0x03, "oc48/stm16"},
485 { 0x04, "oc192/stm64"},
486 { 0, NULL },
487 };
488
489 static const value_string channelised_assoc_virt_container_size[] = {
490 { 0x00, "unused field"},
491 { 0x01, "VC-3 / STS-1"},
492 { 0x02, "VC-4 / STS-3"},
493 { 0x03, "VC-4-4c / STS-12"},
494 { 0x04, "VC-4-16c / STS-48"},
495 { 0x05, "VC-4-64c / STS-192"},
496 { 0, NULL }
497 };
498
499 static const value_string channelised_rate[] = {
500 { 0x00, "Reserved"},
501 { 0x01, "STM-0 / STS-1"},
502 { 0x02, "STM-1 / STS-3"},
503 { 0x03, "STM-4 / STS-12"},
504 { 0x04, "STM-16 / STS-48"},
505 { 0x05, "STM-64 / STS-192"},
506 { 0, NULL}
507 };
508
509 static const value_string channelised_type[] = {
510 { 0x00, "SOH / TOH"},
511 { 0x01, "POH"},
512 { 0x02, "Container"},
513 { 0x03, "POS Packet"},
514 { 0x04, "ATM Cell"},
515 { 0x05, "Positive justification bytes"},
516 { 0x06, "Raw demultiplexed channel"},
517 { 0, NULL}
518 };
519
520
521
522 /* Copy of atm_guess_traffic_type from atm.c in /wiretap */
523 static void
524 erf_atm_guess_lane_type(const guint8 *pd, guint len,
525 union wtap_pseudo_header *pseudo_header)
526 {
527 if (len >= 2) {
528 if (pd[0] == 0xff && pd[1] == 0x00) {
529 /*
530 * Looks like LE Control traffic.
531 */
532 pseudo_header->atm.subtype = TRAF_ST_LANE_LE_CTRL;
533 } else {
534 /*
535 * XXX - Ethernet, or Token Ring?
536 * Assume Ethernet for now; if we see earlier
537 * LANE traffic, we may be able to figure out
538 * the traffic type from that, but there may
539 * still be situations where the user has to
540 * tell us.
541 */
542 pseudo_header->atm.subtype = TRAF_ST_LANE_802_3;
543 }
544 }
545 }
546
547 static void
548 erf_atm_guess_traffic_type(const guint8 *pd, guint len,
549 union wtap_pseudo_header *pseudo_header)
550 {
551 /*
552 * Start out assuming nothing other than that it's AAL5.
553 */
554 pseudo_header->atm.aal = AAL_5;
555 pseudo_header->atm.type = TRAF_UNKNOWN;
556 pseudo_header->atm.subtype = TRAF_ST_UNKNOWN;
557
558 if (pseudo_header->atm.vpi == 0) {
559 /*
560 * Traffic on some PVCs with a VPI of 0 and certain
561 * VCIs is of particular types.
562 */
563 switch (pseudo_header->atm.vci) {
564
565 case 5:
566 /*
567 * Signalling AAL.
568 */
569 pseudo_header->atm.aal = AAL_SIGNALLING;
570 return;
571
572 case 16:
573 /*
574 * ILMI.
575 */
576 pseudo_header->atm.type = TRAF_ILMI;
577 return;
578 }
579 }
580
581 /*
582 * OK, we can't tell what it is based on the VPI/VCI; try
583 * guessing based on the contents, if we have enough data
584 * to guess.
585 */
586
587 if (len >= 3) {
588 if (pd[0] == 0xaa && pd[1] == 0xaa && pd[2] == 0x03) {
589 /*
590 * Looks like a SNAP header; assume it's LLC
591 * multiplexed RFC 1483 traffic.
592 */
593 pseudo_header->atm.type = TRAF_LLCMX;
594 } else if ((pseudo_header->atm.aal5t_len &&
595 pseudo_header->atm.aal5t_len < 16) || len<16) {
596 /*
597 * As this cannot be a LANE Ethernet frame (less
598 * than 2 bytes of LANE header + 14 bytes of
599 * Ethernet header) we can try it as a SSCOP frame.
600 */
601 pseudo_header->atm.aal = AAL_SIGNALLING;
602 } else if (pd[0] == 0x83 || pd[0] == 0x81) {
603 /*
604 * MTP3b headers often encapsulate
605 * a SCCP or MTN in the 3G network.
606 * This should cause 0x83 or 0x81
607 * in the first byte.
608 */
609 pseudo_header->atm.aal = AAL_SIGNALLING;
610 } else {
611 /*
612 * Assume it's LANE.
613 */
614 pseudo_header->atm.type = TRAF_LANE;
615 erf_atm_guess_lane_type(pd, len, pseudo_header);
616 }
617 } else {
618 /*
619 * Not only VCI 5 is used for signaling. It might be
620 * one of these VCIs.
621 */
622 pseudo_header->atm.aal = AAL_SIGNALLING;
623 }
624 }
625
626 static void
627 dissect_classification_ex_header(tvbuff_t *tvb, packet_info *pinfo, proto_tree *tree, int idx)
628 {
629 if (tree) {
630 proto_item *flags_item;
631 proto_tree *flags_tree;
632 guint64 hdr = pinfo->pseudo_header->erf.ehdr_list[idx].ehdr;
633 guint32 value = ((guint32)(hdr >> 32)) & EHDR_CLASS_FLAGS_MASK;
634
635 flags_item = proto_tree_add_uint(tree, hf_erf_ehdr_class_flags, tvb, 0, 0, value);
636 flags_tree = proto_item_add_subtree(flags_item, ett_erf_flags);
637
638 proto_tree_add_uint(flags_tree, hf_erf_ehdr_class_flags_sh, tvb, 0, 0, value);
639 proto_tree_add_uint(flags_tree, hf_erf_ehdr_class_flags_shm, tvb, 0, 0, value);
640 proto_tree_add_uint(flags_tree, hf_erf_ehdr_class_flags_res1, tvb, 0, 0, value);
641 proto_tree_add_uint(flags_tree, hf_erf_ehdr_class_flags_user, tvb, 0, 0, value);
642 proto_tree_add_uint(flags_tree, hf_erf_ehdr_class_flags_res2, tvb, 0, 0, value);
643 proto_tree_add_uint(flags_tree, hf_erf_ehdr_class_flags_drop, tvb, 0, 0, value);
644 proto_tree_add_uint(flags_tree, hf_erf_ehdr_class_flags_str, tvb, 0, 0, value);
645
646 proto_tree_add_uint(tree, hf_erf_ehdr_class_seqnum, tvb, 0, 0, (guint32)hdr);
647 }
648 }
649
650 static void
651 dissect_intercept_ex_header(tvbuff_t *tvb, packet_info *pinfo, proto_tree *tree, int idx)
652 {
653 if (tree) {
654 guint64 hdr = pinfo->pseudo_header->erf.ehdr_list[idx].ehdr;
655
656 proto_tree_add_uint(tree, hf_erf_ehdr_int_res1, tvb, 0, 0, (guint8)((hdr >> 48) & 0xFF));
657 proto_tree_add_uint(tree, hf_erf_ehdr_int_id, tvb, 0, 0, (guint16)((hdr >> 32 ) & 0xFFFF));
658 proto_tree_add_uint(tree, hf_erf_ehdr_int_res2, tvb, 0, 0, (guint32)hdr);
659 }
660 }
661
662 static void
663 dissect_raw_link_ex_header(tvbuff_t *tvb, packet_info *pinfo, proto_tree *tree, int idx)
664 {
665 if (tree) {
666 guint64 hdr = pinfo->pseudo_header->erf.ehdr_list[idx].ehdr;
667
668 proto_tree_add_uint(tree, hf_erf_ehdr_raw_link_res , tvb, 0, 0, (guint32)((hdr >> 32) & 0xFFFFFF));
669 proto_tree_add_uint(tree, hf_erf_ehdr_raw_link_seqnum , tvb, 0, 0, (guint32)((hdr >> 16) & 0xffff));
670 proto_tree_add_uint(tree, hf_erf_ehdr_raw_link_rate, tvb, 0, 0, (guint32)((hdr >> 8) & 0x00ff));
671 proto_tree_add_uint(tree, hf_erf_ehdr_raw_link_type, tvb, 0, 0, (guint32)(hdr & 0x00ff));
672 }
673 }
674
675 static void
676 dissect_bfs_ex_header(tvbuff_t *tvb, packet_info *pinfo, proto_tree *tree, int idx)
677 {
678 if (tree) {
679 guint64 hdr = pinfo->pseudo_header->erf.ehdr_list[idx].ehdr;
680
681 proto_tree_add_uint(tree, hf_erf_ehdr_bfs_hash, tvb, 0, 0, (guint32)((hdr >> 48) & 0xFF));
682 proto_tree_add_uint(tree, hf_erf_ehdr_bfs_color, tvb, 0, 0, (guint32)((hdr >> 32) & 0xFFFF));
683 proto_tree_add_uint(tree, hf_erf_ehdr_bfs_raw_hash, tvb, 0, 0, (guint32)(hdr & 0xFFFFFFFF));
684 }
685 }
686
687 static int
688 channelised_fill_sdh_g707_format(sdh_g707_format_t* in_fmt, guint16 bit_flds, guint8 vc_size, guint8 rate)
689 {
690 int i = 0; /* i = 3 --> ITU-T letter #D - index of AUG-16
691 * i = 2 --> ITU-T letter #C - index of AUG-4,
692 * i = 1 --> ITU-T letter #B - index of AUG-1
693 * i = 0 --> ITU-T letter #A - index of AU3*/
694
695 if ( (0 == vc_size) || (vc_size > DECHAN_MAX_VC_SIZE) || (rate > DECHAN_MAX_LINE_RATE) )
696 {
697 /* unknown / unused / invalid container size or invalid line rate */
698 in_fmt->m_vc_size = 0;
699 in_fmt->m_sdh_line_rate = 0;
700 memset(&(in_fmt->m_vc_index_array[0]), 0x00, DECHAN_MAX_AUG_INDEX);
701 return -1;
702 }
703
704 in_fmt->m_vc_size = vc_size;
705 in_fmt->m_sdh_line_rate = rate;
706 memset(&(in_fmt->m_vc_index_array[0]), 0xff, DECHAN_MAX_AUG_INDEX);
707
708 /* for STM64 traffic,from #D and so on .. */
709 for (i = (rate - 2); i >= 0; i--)
710 {
711 guint8 aug_n_index = 0;
712
713 /*if AUG-n is bigger than vc-size*/
714 if ( i >= (vc_size - 1))
715 {
716 /* check the value in bit flds */
717 aug_n_index = ((bit_flds >> (2 *i))& 0x3) +1;
718 }
719 else
720 {
721 aug_n_index = 0;
722 }
723 in_fmt->m_vc_index_array[i] = aug_n_index;
724 }
725 return 0;
726 }
727
728 static void
729 channelised_fill_vc_id_string(wmem_strbuf_t* out_string, sdh_g707_format_t* in_fmt)
730 {
731 int i;
732 gboolean is_printed = FALSE;
733
734 static const char* g_vc_size_strings[] = {
735 "unknown", /*0x0*/
736 "VC3", /*0x1*/
737 "VC4", /*0x2*/
738 "VC4-4c", /*0x3*/
739 "VC4-16c", /*0x4*/
740 "VC4-64c", /*0x5*/};
741
742 wmem_strbuf_truncate(out_string, 0);
743
744 if ( (in_fmt->m_vc_size > DECHAN_MAX_VC_SIZE) || (in_fmt->m_sdh_line_rate > DECHAN_MAX_LINE_RATE) )
745 {
746 wmem_strbuf_append_printf(out_string, "Malformed");
747 return;
748 }
749
750 wmem_strbuf_append_printf(out_string, "%s(",
751 (in_fmt->m_vc_size < array_length(g_vc_size_strings)) ?
752 g_vc_size_strings[in_fmt->m_vc_size] : g_vc_size_strings[0] );
753
754 if (in_fmt->m_sdh_line_rate <= 0 )
755 {
756 /* line rate is not given */
757 for (i = (DECHAN_MAX_AUG_INDEX -1); i >= 0; i--)
758 {
759 if ((in_fmt->m_vc_index_array[i] > 0) || (is_printed) )
760 {
761 wmem_strbuf_append_printf(out_string, "%s%d",
762 ((is_printed)?", ":""),
763 in_fmt->m_vc_index_array[i]);
764 is_printed = TRUE;
765 }
766 }
767
768 }
769 else
770 {
771 for (i = in_fmt->m_sdh_line_rate - 2; i >= 0; i--)
772 {
773 wmem_strbuf_append_printf(out_string, "%s%d",
774 ((is_printed)?", ":""),
775 in_fmt->m_vc_index_array[i]);
776 is_printed = TRUE;
777 }
778 }
779 if ( ! is_printed )
780 {
781 /* Not printed . possibly it's a ocXc packet with (0,0,0...) */
782 for ( i =0; i < in_fmt->m_vc_size - 2; i++)
783 {
784 wmem_strbuf_append_printf(out_string, "%s0",
785 ((is_printed)?", ":""));
786 is_printed = TRUE;
787 }
788 }
789 wmem_strbuf_append_c(out_string, ')');
790 return;
791 }
792
793 static void
794 dissect_channelised_ex_header(tvbuff_t *tvb, packet_info *pinfo, proto_tree *tree, int idx)
795 {
796 guint64 hdr = pinfo->pseudo_header->erf.ehdr_list[idx].ehdr;
797 guint8 vc_id = (guint8)((hdr >> 24) & 0xFF);
798 guint8 vc_size = (guint8)((hdr >> 16) & 0xFF);
799 guint8 line_rate = (guint8)((hdr >> 8) & 0xFF);
800 sdh_g707_format_t g707_format;
801 wmem_strbuf_t *vc_id_string = wmem_strbuf_new_label(wmem_packet_scope());
802
803 channelised_fill_sdh_g707_format(&g707_format, vc_id, vc_size, line_rate);
804 channelised_fill_vc_id_string(vc_id_string, &g707_format);
805
806 if (tree) {
807 proto_tree_add_boolean(tree, hf_erf_ehdr_chan_morebits, tvb, 0, 0, (guint8)((hdr >> 63) & 0x1));
808 proto_tree_add_boolean(tree, hf_erf_ehdr_chan_morefrag, tvb, 0, 0, (guint8)((hdr >> 55) & 0x1));
809 proto_tree_add_uint(tree, hf_erf_ehdr_chan_seqnum, tvb, 0, 0, (guint16)((hdr >> 40) & 0x7FFF));
810 proto_tree_add_uint(tree, hf_erf_ehdr_chan_res, tvb, 0, 0, (guint8)((hdr >> 32) & 0xFF));
811 proto_tree_add_uint_format_value(tree, hf_erf_ehdr_chan_virt_container_id, tvb, 0, 0, vc_id,
812 "0x%.2x (g.707: %s)", vc_id, wmem_strbuf_get_str(vc_id_string));
813 proto_tree_add_uint(tree, hf_erf_ehdr_chan_assoc_virt_container_size, tvb, 0, 0, vc_size);
814 proto_tree_add_uint(tree, hf_erf_ehdr_chan_rate, tvb, 0, 0, line_rate);
815 proto_tree_add_uint(tree, hf_erf_ehdr_chan_type, tvb, 0, 0, (guint8)((hdr >> 0) & 0xFF));
816 }
817 }
818
819 static void
820 dissect_signature_ex_header(tvbuff_t *tvb, packet_info *pinfo, proto_tree *tree, int idx)
821 {
822 if(tree) {
823 guint64 hdr = pinfo->pseudo_header->erf.ehdr_list[idx].ehdr;
824
825 proto_tree_add_uint(tree, hf_erf_ehdr_signature_payload_hash, tvb, 0, 0, (guint32)((hdr >> 32) & 0xFFFFFF));
826 proto_tree_add_uint(tree, hf_erf_ehdr_signature_color, tvb, 0, 0, (guint8)((hdr >> 24) & 0xFF));
827 proto_tree_add_uint(tree, hf_erf_ehdr_signature_flow_hash, tvb, 0, 0, (guint32)(hdr & 0xFFFFFF));
828 }
829 }
830
831 static void
832 dissect_unknown_ex_header(tvbuff_t *tvb, packet_info *pinfo, proto_tree *tree, int idx)
833 {
834 if (tree) {
835 guint64 hdr = pinfo->pseudo_header->erf.ehdr_list[idx].ehdr;
836
837 proto_tree_add_uint64(tree, hf_erf_ehdr_unk, tvb, 0, 0, hdr);
838 }
839 }
840
841 static void
842 dissect_mc_hdlc_header(tvbuff_t *tvb, packet_info *pinfo, proto_tree *tree)
843 {
844 if (tree) {
845 proto_item *mc_hdlc_item;
846 proto_tree *mc_hdlc_tree;
847 struct erf_mc_hdlc_hdrx *mc_hdlc;
848 proto_item *pi;
849
850 /* Multi Channel HDLC Header */
851 mc_hdlc_item = proto_tree_add_uint(tree, hf_erf_mc_hdlc, tvb, 0, 0, pinfo->pseudo_header->erf.subhdr.mc_hdr);
852 mc_hdlc_tree = proto_item_add_subtree(mc_hdlc_item, ett_erf_mc_hdlc);
853 mc_hdlc = (struct erf_mc_hdlc_hdrx *) (&pinfo->pseudo_header->erf.subhdr.mc_hdr);
854
855 proto_tree_add_uint(mc_hdlc_tree, hf_erf_mc_hdlc_cn, tvb, 0, 0, mc_hdlc->byte01);
856 proto_tree_add_uint(mc_hdlc_tree, hf_erf_mc_hdlc_res1, tvb, 0, 0, mc_hdlc->byte01);
857 proto_tree_add_uint(mc_hdlc_tree, hf_erf_mc_hdlc_res2, tvb, 0, 0, mc_hdlc->byte2);
858 pi=proto_tree_add_uint(mc_hdlc_tree, hf_erf_mc_hdlc_fcse, tvb, 0, 0, mc_hdlc->byte3);
859 if (mc_hdlc->byte3 & MC_HDLC_FCSE_MASK)
860 expert_add_info_format(pinfo, pi, &ei_erf_checksum_error, "ERF MC FCS Error");
861
862 pi=proto_tree_add_uint(mc_hdlc_tree, hf_erf_mc_hdlc_sre, tvb, 0, 0, mc_hdlc->byte3);
863 if (mc_hdlc->byte3 & MC_HDLC_SRE_MASK)
864 expert_add_info_format(pinfo, pi, &ei_erf_checksum_error, "ERF MC Short Record Error, <5 bytes");
865
866 pi=proto_tree_add_uint(mc_hdlc_tree, hf_erf_mc_hdlc_lre, tvb, 0, 0, mc_hdlc->byte3);
867 if (mc_hdlc->byte3 & MC_HDLC_LRE_MASK)
868 expert_add_info_format(pinfo, pi, &ei_erf_checksum_error, "ERF MC Long Record Error, >2047 bytes");
869
870 pi=proto_tree_add_uint(mc_hdlc_tree, hf_erf_mc_hdlc_afe, tvb, 0, 0, mc_hdlc->byte3);
871 if (mc_hdlc->byte3 & MC_HDLC_AFE_MASK)
872 expert_add_info_format(pinfo, pi, &ei_erf_checksum_error, "ERF MC Aborted Frame Error");
873
874 pi=proto_tree_add_uint(mc_hdlc_tree, hf_erf_mc_hdlc_oe, tvb, 0, 0, mc_hdlc->byte3);
875 if (mc_hdlc->byte3 & MC_HDLC_OE_MASK)
876 expert_add_info_format(pinfo, pi, &ei_erf_checksum_error, "ERF MC Octet Error, the closing flag was not octet aligned after bit unstuffing");
877
878 pi=proto_tree_add_uint(mc_hdlc_tree, hf_erf_mc_hdlc_lbe, tvb, 0, 0, mc_hdlc->byte3);
879 if (mc_hdlc->byte3 & MC_HDLC_LBE_MASK)
880 expert_add_info_format(pinfo, pi, &ei_erf_checksum_error, "ERF MC Lost Byte Error");
881
882 proto_tree_add_uint(mc_hdlc_tree, hf_erf_mc_hdlc_first, tvb, 0, 0, mc_hdlc->byte3);
883 proto_tree_add_uint(mc_hdlc_tree, hf_erf_mc_hdlc_res3, tvb, 0, 0, mc_hdlc->byte3);
884
885 }
886 }
887
888 static void
889 dissect_mc_raw_header(tvbuff_t *tvb, packet_info *pinfo, proto_tree *tree)
890 {
891 if (tree) {
892 proto_item *mc_raw_item;
893 proto_tree *mc_raw_tree;
894 struct erf_mc_raw_hdrx *mc_raw;
895
896 /* Multi Channel RAW Header */
897 mc_raw_item = proto_tree_add_uint(tree, hf_erf_mc_raw, tvb, 0, 0, pinfo->pseudo_header->erf.subhdr.mc_hdr);
898 mc_raw_tree = proto_item_add_subtree(mc_raw_item, ett_erf_mc_raw);
899 mc_raw = (struct erf_mc_raw_hdrx *) (&pinfo->pseudo_header->erf.subhdr.mc_hdr);
900
901 proto_tree_add_uint(mc_raw_tree, hf_erf_mc_raw_int, tvb, 0, 0, mc_raw->byte0);
902 proto_tree_add_uint(mc_raw_tree, hf_erf_mc_raw_res1, tvb, 0, 0, mc_raw->byte0);
903 proto_tree_add_uint(mc_raw_tree, hf_erf_mc_raw_res2, tvb, 0, 0, mc_raw->byte12);
904 proto_tree_add_uint(mc_raw_tree, hf_erf_mc_raw_res3, tvb, 0, 0, mc_raw->byte3);
905 proto_tree_add_uint(mc_raw_tree, hf_erf_mc_raw_sre, tvb, 0, 0, mc_raw->byte3);
906 proto_tree_add_uint(mc_raw_tree, hf_erf_mc_raw_lre, tvb, 0, 0, mc_raw->byte3);
907 proto_tree_add_uint(mc_raw_tree, hf_erf_mc_raw_res4, tvb, 0, 0, mc_raw->byte3);
908 proto_tree_add_uint(mc_raw_tree, hf_erf_mc_raw_lbe, tvb, 0, 0, mc_raw->byte3);
909 proto_tree_add_uint(mc_raw_tree, hf_erf_mc_raw_first, tvb, 0, 0, mc_raw->byte3);
910 proto_tree_add_uint(mc_raw_tree, hf_erf_mc_raw_res5, tvb, 0, 0, mc_raw->byte3);
911 }
912 }
913
914 static void
915 dissect_mc_atm_header(tvbuff_t *tvb, packet_info *pinfo, proto_tree *tree)
916 {
917 if (tree) {
918 proto_item *mc_atm_item;
919 proto_tree *mc_atm_tree;
920 struct erf_mc_atm_hdrx *mc_atm;
921
922 /*"Multi Channel ATM Header"*/
923 mc_atm_item = proto_tree_add_uint(tree, hf_erf_mc_atm, tvb, 0, 0, pinfo->pseudo_header->erf.subhdr.mc_hdr);
924 mc_atm_tree = proto_item_add_subtree(mc_atm_item, ett_erf_mc_atm);
925 mc_atm = (struct erf_mc_atm_hdrx *) (&pinfo->pseudo_header->erf.subhdr.mc_hdr);
926
927 proto_tree_add_uint(mc_atm_tree, hf_erf_mc_atm_cn, tvb, 0, 0, mc_atm->byte01);
928 proto_tree_add_uint(mc_atm_tree, hf_erf_mc_atm_res1, tvb, 0, 0, mc_atm->byte01);
929 proto_tree_add_uint(mc_atm_tree, hf_erf_mc_atm_mul, tvb, 0, 0, mc_atm->byte01);
930
931 proto_tree_add_uint(mc_atm_tree, hf_erf_mc_atm_port, tvb, 0, 0, mc_atm->byte2);
932 proto_tree_add_uint(mc_atm_tree, hf_erf_mc_atm_res2, tvb, 0, 0, mc_atm->byte2);
933
934 proto_tree_add_uint(mc_atm_tree, hf_erf_mc_atm_lbe, tvb, 0, 0, mc_atm->byte3);
935 proto_tree_add_uint(mc_atm_tree, hf_erf_mc_atm_hec, tvb, 0, 0, mc_atm->byte3);
936 proto_tree_add_uint(mc_atm_tree, hf_erf_mc_atm_crc10, tvb, 0, 0, mc_atm->byte3);
937 proto_tree_add_uint(mc_atm_tree, hf_erf_mc_atm_oamcell, tvb, 0, 0, mc_atm->byte3);
938 proto_tree_add_uint(mc_atm_tree, hf_erf_mc_atm_first, tvb, 0, 0, mc_atm->byte3);
939 proto_tree_add_uint(mc_atm_tree, hf_erf_mc_atm_res3, tvb, 0, 0, mc_atm->byte3);
940 }
941 }
942
943 static void
944 dissect_mc_rawlink_header(tvbuff_t *tvb, packet_info *pinfo, proto_tree *tree)
945 {
946 if (tree) {
947 proto_item *mc_rawl_item;
948 proto_tree *mc_rawl_tree;
949 struct erf_mc_rawl_hdrx *mc_rawl;
950
951 /* Multi Channel RAW Link Header */
952 mc_rawl_item = proto_tree_add_uint(tree, hf_erf_mc_rawl, tvb, 0, 0, pinfo->pseudo_header->erf.subhdr.mc_hdr);
953 mc_rawl_tree = proto_item_add_subtree(mc_rawl_item, ett_erf_mc_rawlink);
954 mc_rawl = (struct erf_mc_rawl_hdrx *) (&pinfo->pseudo_header->erf.subhdr.mc_hdr);
955
956 proto_tree_add_uint(mc_rawl_tree, hf_erf_mc_rawl_cn, tvb, 0, 0, mc_rawl->byte01);
957 proto_tree_add_uint(mc_rawl_tree, hf_erf_mc_rawl_res2, tvb, 0, 0, mc_rawl->byte3);
958 proto_tree_add_uint(mc_rawl_tree, hf_erf_mc_rawl_lbe, tvb, 0, 0, mc_rawl->byte3);
959 proto_tree_add_uint(mc_rawl_tree, hf_erf_mc_rawl_first, tvb, 0, 0, mc_rawl->byte3);
960 proto_tree_add_uint(mc_rawl_tree, hf_erf_mc_rawl_res3, tvb, 0, 0, mc_rawl->byte3);
961 }
962 }
963
964 static void
965 dissect_mc_aal5_header(tvbuff_t *tvb, packet_info *pinfo, proto_tree *tree)
966 {
967 if (tree) {
968 proto_item *mc_aal5_item;
969 proto_tree *mc_aal5_tree;
970 struct erf_mc_aal5_hdrx *mc_aal5;
971
972 /* Multi Channel AAL5 Header */
973 mc_aal5_item = proto_tree_add_uint(tree, hf_erf_mc_aal5, tvb, 0, 0, pinfo->pseudo_header->erf.subhdr.mc_hdr);
974 mc_aal5_tree = proto_item_add_subtree(mc_aal5_item, ett_erf_mc_aal5);
975 mc_aal5 = (struct erf_mc_aal5_hdrx *) (&pinfo->pseudo_header->erf.subhdr.mc_hdr);
976
977 proto_tree_add_uint(mc_aal5_tree, hf_erf_mc_aal5_cn, tvb, 0, 0, mc_aal5->byte01);
978 proto_tree_add_uint(mc_aal5_tree, hf_erf_mc_aal5_res1, tvb, 0, 0, mc_aal5->byte01);
979
980 proto_tree_add_uint(mc_aal5_tree, hf_erf_mc_aal5_port, tvb, 0, 0, mc_aal5->byte2);
981 proto_tree_add_uint(mc_aal5_tree, hf_erf_mc_aal5_crcck, tvb, 0, 0, mc_aal5->byte2);
982 proto_tree_add_uint(mc_aal5_tree, hf_erf_mc_aal5_crce, tvb, 0, 0, mc_aal5->byte2);
983 proto_tree_add_uint(mc_aal5_tree, hf_erf_mc_aal5_lenck, tvb, 0, 0, mc_aal5->byte2);
984 proto_tree_add_uint(mc_aal5_tree, hf_erf_mc_aal5_lene, tvb, 0, 0, mc_aal5->byte2);
985
986 proto_tree_add_uint(mc_aal5_tree, hf_erf_mc_aal5_res2, tvb, 0, 0, mc_aal5->byte3);
987 proto_tree_add_uint(mc_aal5_tree, hf_erf_mc_aal5_first, tvb, 0, 0, mc_aal5->byte3);
988 proto_tree_add_uint(mc_aal5_tree, hf_erf_mc_aal5_res3, tvb, 0, 0, mc_aal5->byte3);
989 }
990 }
991
992 static void
993 dissect_mc_aal2_header(tvbuff_t *tvb, packet_info *pinfo, proto_tree *tree)
994 {
995 if (tree) {
996 proto_item *mc_aal2_item;
997 proto_tree *mc_aal2_tree;
998 struct erf_mc_aal2_hdrx *mc_aal2;
999
1000 /* Multi Channel AAL2 Header */
1001 mc_aal2_item = proto_tree_add_uint(tree, hf_erf_mc_aal2, tvb, 0, 0, pinfo->pseudo_header->erf.subhdr.mc_hdr);
1002 mc_aal2_tree = proto_item_add_subtree(mc_aal2_item, ett_erf_mc_aal2);
1003 mc_aal2 = (struct erf_mc_aal2_hdrx *) (&pinfo->pseudo_header->erf.subhdr.mc_hdr);
1004
1005 proto_tree_add_uint(mc_aal2_tree, hf_erf_mc_aal2_cn, tvb, 0, 0, mc_aal2->byte01);
1006 proto_tree_add_uint(mc_aal2_tree, hf_erf_mc_aal2_res1, tvb, 0, 0, mc_aal2->byte01);
1007 proto_tree_add_uint(mc_aal2_tree, hf_erf_mc_aal2_res2, tvb, 0, 0, mc_aal2->byte01);
1008
1009 proto_tree_add_uint(mc_aal2_tree, hf_erf_mc_aal2_port, tvb, 0, 0, mc_aal2->byte2);
1010 proto_tree_add_uint(mc_aal2_tree, hf_erf_mc_aal2_res3, tvb, 0, 0, mc_aal2->byte2);
1011 proto_tree_add_uint(mc_aal2_tree, hf_erf_mc_aal2_first, tvb, 0, 0, mc_aal2->byte2);
1012 proto_tree_add_uint(mc_aal2_tree, hf_erf_mc_aal2_maale, tvb, 0, 0, mc_aal2->byte2);
1013 proto_tree_add_uint(mc_aal2_tree, hf_erf_mc_aal2_lene, tvb, 0, 0, mc_aal2->byte2);
1014
1015 proto_tree_add_uint(mc_aal2_tree, hf_erf_mc_aal2_cid, tvb, 0, 0, mc_aal2->byte3);
1016 }
1017 }
1018
1019 static void
1020 dissect_aal2_header(tvbuff_t *tvb, packet_info *pinfo, proto_tree *tree)
1021 {
1022 if (tree) {
1023 proto_item *aal2_item;
1024 proto_tree *aal2_tree;
1025 struct erf_aal2_hdrx *aal2;
1026
1027 /* AAL2 Header */
1028 aal2_item = proto_tree_add_uint(tree, hf_erf_aal2, tvb, 0, 0, pinfo->pseudo_header->erf.subhdr.mc_hdr);
1029 aal2_tree = proto_item_add_subtree(aal2_item, ett_erf_aal2);
1030 aal2 = (struct erf_aal2_hdrx*) (&pinfo->pseudo_header->erf.subhdr.mc_hdr);
1031
1032 proto_tree_add_uint(aal2_tree, hf_erf_aal2_cid, tvb, 0, 0, aal2->byte0);
1033
1034 proto_tree_add_uint(aal2_tree, hf_erf_aal2_maale, tvb, 0, 0, aal2->byte1);
1035
1036 proto_tree_add_uint(aal2_tree, hf_erf_aal2_maalei, tvb, 0, 0, aal2->byte23);
1037 proto_tree_add_uint(aal2_tree, hf_erf_aal2_first, tvb, 0, 0, aal2->byte23);
1038 proto_tree_add_uint(aal2_tree, hf_erf_aal2_res1, tvb, 0, 0, aal2->byte23);
1039
1040 }
1041 }
1042
1043 static void
1044 dissect_eth_header(tvbuff_t *tvb, packet_info *pinfo, proto_tree *tree)
1045 {
1046 if (tree) {
1047 proto_item *eth_item;
1048 proto_tree *eth_tree;
1049 struct erf_eth_hdrx *eth_hdr;
1050
1051 eth_item = proto_tree_add_item(tree, hf_erf_eth, tvb, 0, 0, ENC_NA);
1052
1053 eth_tree = proto_item_add_subtree(eth_item, ett_erf_eth);
1054 eth_hdr = (struct erf_eth_hdrx *) (&pinfo->pseudo_header->erf.subhdr.eth_hdr);
1055
1056 proto_tree_add_uint(eth_tree, hf_erf_eth_off, tvb, 0, 0, eth_hdr->byte0);
1057 proto_tree_add_uint(eth_tree, hf_erf_eth_res1, tvb, 0, 0, eth_hdr->byte1);
1058 }
1059 }
1060
1061 static void
1062 dissect_erf_pseudo_header(tvbuff_t *tvb, packet_info *pinfo, proto_tree *tree)
1063 {
1064 proto_item *pi;
1065 proto_item *flags_item, *rectype_item;
1066 proto_tree *flags_tree, *rectype_tree;
1067
1068 proto_tree_add_uint64(tree, hf_erf_ts, tvb, 0, 0, pinfo->pseudo_header->erf.phdr.ts);
1069
1070 rectype_item = proto_tree_add_uint_format_value(tree, hf_erf_rectype, tvb, 0, 0, pinfo->pseudo_header->erf.phdr.type,
1071 "0x%02x (Type %d: %s)",
1072 pinfo->pseudo_header->erf.phdr.type,
1073 pinfo->pseudo_header->erf.phdr.type & ERF_HDR_TYPE_MASK,
1074 val_to_str_const(pinfo->pseudo_header->erf.phdr.type & ERF_HDR_TYPE_MASK,
1075 erf_type_vals,
1076 "Unknown Type"));
1077
1078 rectype_tree = proto_item_add_subtree(rectype_item, ett_erf_rectype);
1079 proto_tree_add_uint(rectype_tree, hf_erf_type, tvb, 0, 0, pinfo->pseudo_header->erf.phdr.type);
1080 proto_tree_add_uint(rectype_tree, hf_erf_ehdr, tvb, 0, 0, pinfo->pseudo_header->erf.phdr.type);
1081
1082 flags_item=proto_tree_add_uint(tree, hf_erf_flags, tvb, 0, 0, pinfo->pseudo_header->erf.phdr.flags);
1083 flags_tree = proto_item_add_subtree(flags_item, ett_erf_flags);
1084
1085 proto_tree_add_uint(flags_tree, hf_erf_flags_cap, tvb, 0, 0, pinfo->pseudo_header->erf.phdr.flags);
1086 proto_item_append_text(flags_item, " (Capture Interface: %d", pinfo->pseudo_header->erf.phdr.flags & ERF_HDR_CAP_MASK);
1087
1088 proto_tree_add_uint(flags_tree, hf_erf_flags_vlen, tvb, 0, 0, pinfo->pseudo_header->erf.phdr.flags);
1089 pi=proto_tree_add_uint(flags_tree, hf_erf_flags_trunc, tvb, 0, 0, pinfo->pseudo_header->erf.phdr.flags);
1090 if (pinfo->pseudo_header->erf.phdr.flags & ERF_HDR_TRUNC_MASK) {
1091 proto_item_append_text(flags_item, "; ERF Truncation Error");
1092 expert_add_info_format(pinfo, pi, &ei_erf_checksum_error, "ERF Truncation Error");
1093 }
1094
1095 pi=proto_tree_add_uint(flags_tree, hf_erf_flags_rxe, tvb, 0, 0, pinfo->pseudo_header->erf.phdr.flags);
1096 if (pinfo->pseudo_header->erf.phdr.flags & ERF_HDR_RXE_MASK) {
1097 proto_item_append_text(flags_item, "; ERF Rx Error");
1098 expert_add_info_format(pinfo, pi, &ei_erf_checksum_error, "ERF Rx Error");
1099 }
1100
1101 pi=proto_tree_add_uint(flags_tree, hf_erf_flags_dse, tvb, 0, 0, pinfo->pseudo_header->erf.phdr.flags);
1102 if (pinfo->pseudo_header->erf.phdr.flags & ERF_HDR_DSE_MASK) {
1103 proto_item_append_text(flags_item, "; ERF DS Error");
1104 expert_add_info_format(pinfo, pi, &ei_erf_checksum_error, "ERF DS Error");
1105 }
1106 proto_item_append_text(flags_item, ")");
1107
1108 proto_tree_add_uint(flags_tree, hf_erf_flags_res, tvb, 0, 0, pinfo->pseudo_header->erf.phdr.flags);
1109
1110 proto_tree_add_uint(tree, hf_erf_rlen, tvb, 0, 0, pinfo->pseudo_header->erf.phdr.rlen);
1111 pi=proto_tree_add_uint(tree, hf_erf_lctr, tvb, 0, 0, pinfo->pseudo_header->erf.phdr.lctr);
1112 if (pinfo->pseudo_header->erf.phdr.lctr > 0)
1113 expert_add_info(pinfo, pi, &ei_erf_packet_loss);
1114
1115 proto_tree_add_uint(tree, hf_erf_wlen, tvb, 0, 0, pinfo->pseudo_header->erf.phdr.wlen);
1116 }
1117
1118 static void
1119 dissect_erf_pseudo_extension_header(tvbuff_t *tvb, packet_info *pinfo, proto_tree *tree)
1120 {
1121 proto_item *pi;
1122 proto_item *ehdr_tree;
1123 guint8 type;
1124 guint8 has_more = pinfo->pseudo_header->erf.phdr.type & 0x80;
1125 int i = 0;
1126 int max = sizeof(pinfo->pseudo_header->erf.ehdr_list)/sizeof(struct erf_ehdr);
1127
1128 while(has_more && (i < max)) {
1129 type = (guint8) (pinfo->pseudo_header->erf.ehdr_list[i].ehdr >> 56);
1130
1131 pi = proto_tree_add_uint(tree, hf_erf_ehdr_t, tvb, 0, 0, (type & 0x7f));
1132 ehdr_tree = proto_item_add_subtree(pi, ett_erf_pseudo_hdr);
1133
1134 switch (type & 0x7f) {
1135 case EXT_HDR_TYPE_CLASSIFICATION:
1136 dissect_classification_ex_header(tvb, pinfo, ehdr_tree, i);
1137 break;
1138 case EXT_HDR_TYPE_INTERCEPTID:
1139 dissect_intercept_ex_header(tvb, pinfo, ehdr_tree, i);
1140 break;
1141 case EXT_HDR_TYPE_RAW_LINK:
1142 dissect_raw_link_ex_header(tvb, pinfo, ehdr_tree, i);
1143 break;
1144 case EXT_HDR_TYPE_BFS:
1145 dissect_bfs_ex_header(tvb, pinfo, ehdr_tree, i);
1146 break;
1147 case EXT_HDR_TYPE_CHANNELISED:
1148 dissect_channelised_ex_header(tvb, pinfo, ehdr_tree, i);
1149 break;
1150 case EXT_HDR_TYPE_SIGNATURE:
1151 dissect_signature_ex_header(tvb, pinfo, ehdr_tree, i);
1152 break;
1153 default:
1154 dissect_unknown_ex_header(tvb, pinfo, ehdr_tree, i);
1155 break;
1156 }
1157 has_more = type & 0x80;
1158 i += 1;
1159 }
1160 if (has_more) {
1161 proto_tree_add_expert(tree, pinfo, &ei_erf_extension_headers_not_shown, tvb, 0, 0);
1162 }
1163
1164 }
1165
1166 guint64* erf_get_ehdr(packet_info *pinfo, guint8 hdrtype, gint* afterindex) {
1167 guint8 type;
1168 guint8 has_more;
1169 int max;
1170 int i = afterindex ? *afterindex + 1 : 0; /*allow specifying instance to start after for use in loop*/
1171
1172 if (!pinfo) /*XXX: how to determine if erf pseudo_header is valid?*/
1173 return NULL;
1174
1175 has_more = pinfo->pseudo_header->erf.phdr.type & 0x80;
1176 max = sizeof(pinfo->pseudo_header->erf.ehdr_list)/sizeof(struct erf_ehdr);
1177
1178
1179 while(has_more && (i < max)) {
1180 type = (guint8) (pinfo->pseudo_header->erf.ehdr_list[i].ehdr >> 56);
1181
1182 if ((type & 0x7f) == (hdrtype & 0x7f)) {
1183 if (afterindex)
1184 *afterindex = i;
1185 return &pinfo->pseudo_header->erf.ehdr_list[i].ehdr;
1186 }
1187
1188 has_more = type & 0x80;
1189 i += 1;
1190 }
1191
1192 return NULL;
1193 }
1194
1195 static void
1196 dissect_erf(tvbuff_t *tvb, packet_info *pinfo, proto_tree *tree)
1197 {
1198 guint8 flags;
1199 guint8 erf_type;
1200 guint32 atm_hdr = 0;
1201 proto_tree *erf_tree = NULL;
1202 guint atm_pdu_caplen;
1203 const guint8 *atm_pdu;
1204 erf_hdlc_type_vals hdlc_type;
1205 guint8 first_byte;
1206 tvbuff_t *new_tvb;
1207 guint8 aal2_cid;
1208
1209 erf_type=pinfo->pseudo_header->erf.phdr.type & 0x7F;
1210
1211 col_set_str(pinfo->cinfo, COL_PROTOCOL, "ERF");
1212
1213 col_add_fstr(pinfo->cinfo, COL_INFO, "%s",
1214 val_to_str(erf_type, erf_type_vals, "Unknown type %u"));
1215
1216 if (tree) {
1217 proto_item *erf_item;
1218 erf_item = proto_tree_add_item(tree, proto_erf, tvb, 0, -1, ENC_NA);
1219 erf_tree = proto_item_add_subtree(erf_item, ett_erf);
1220
1221 dissect_erf_pseudo_header(tvb, pinfo, erf_tree);
1222 if (pinfo->pseudo_header->erf.phdr.type & 0x80) {
1223 dissect_erf_pseudo_extension_header(tvb, pinfo, erf_tree);
1224 }
1225 }
1226
1227 flags = pinfo->pseudo_header->erf.phdr.flags;
1228 /*
1229 * Set if frame is Received or Sent.
1230 * XXX - this is really testing the low-order bit of the capture
1231 * interface number, so interface 0 is assumed to be capturing
1232 * in one direction on a bi-directional link, interface 1 is
1233 * assumed to be capturing in the other direction on that link,
1234 * and interfaces 2 and 3 are assumed to be capturing in two
1235 * different directions on another link. We don't distinguish
1236 * between the two links.
1237 */
1238 pinfo->p2p_dir = ( (flags & 0x01) ? P2P_DIR_RECV : P2P_DIR_SENT);
1239
1240 switch (erf_type) {
1241
1242 case ERF_TYPE_RAW_LINK:
1243 if(sdh_handle){
1244 call_dissector(sdh_handle, tvb, pinfo, tree);
1245 }
1246 else{
1247 call_dissector(data_handle, tvb, pinfo, tree);
1248 }
1249 break;
1250
1251 case ERF_TYPE_IPV4:
1252 if (ipv4_handle)
1253 call_dissector(ipv4_handle, tvb, pinfo, tree);
1254 else
1255 call_dissector(data_handle, tvb, pinfo, tree);
1256 break;
1257
1258 case ERF_TYPE_IPV6:
1259 if (ipv6_handle)
1260 call_dissector(ipv6_handle, tvb, pinfo, tree);
1261 else
1262 call_dissector(data_handle, tvb, pinfo, tree);
1263 break;
1264
1265 case ERF_TYPE_INFINIBAND:
1266 if (infiniband_handle)
1267 call_dissector(infiniband_handle, tvb, pinfo, tree);
1268 else
1269 call_dissector(data_handle, tvb, pinfo, tree);
1270 break;
1271
1272 case ERF_TYPE_INFINIBAND_LINK:
1273 if (infiniband_link_handle)
1274 call_dissector(infiniband_link_handle, tvb, pinfo, tree);
1275 else
1276 call_dissector(data_handle, tvb, pinfo, tree);
1277 break;
1278
1279 case ERF_TYPE_LEGACY:
1280 case ERF_TYPE_IP_COUNTER:
1281 case ERF_TYPE_TCP_FLOW_COUNTER:
1282 /* undefined */
1283 break;
1284
1285 case ERF_TYPE_PAD:
1286 /* Nothing to do */
1287 break;
1288
1289 case ERF_TYPE_MC_RAW:
1290 dissect_mc_raw_header(tvb, pinfo, erf_tree);
1291 if (data_handle)
1292 call_dissector(data_handle, tvb, pinfo, tree);
1293 break;
1294
1295 case ERF_TYPE_MC_RAW_CHANNEL:
1296 dissect_mc_rawlink_header(tvb, pinfo, erf_tree);
1297 if (data_handle)
1298 call_dissector(data_handle, tvb, pinfo, tree);
1299 break;
1300
1301 case ERF_TYPE_MC_ATM:
1302 dissect_mc_atm_header(tvb, pinfo, erf_tree);
1303 /* continue with type ATM */
1304
1305 case ERF_TYPE_ATM:
1306 memset(&pinfo->pseudo_header->atm, 0, sizeof(pinfo->pseudo_header->atm));
1307 atm_hdr = tvb_get_ntohl(tvb, 0);
1308 pinfo->pseudo_header->atm.vpi = ((atm_hdr & 0x0ff00000) >> 20);
1309 pinfo->pseudo_header->atm.vci = ((atm_hdr & 0x000ffff0) >> 4);
1310 pinfo->pseudo_header->atm.channel = (flags & 0x03);
1311
1312 /* Work around to have decoding working */
1313 if (erf_rawcell_first) {
1314 new_tvb = tvb_new_subset_remaining(tvb, ATM_HDR_LENGTH);
1315 /* Treat this as a (short) ATM AAL5 PDU */
1316 pinfo->pseudo_header->atm.aal = AAL_5;
1317 switch (erf_aal5_type) {
1318
1319 case ERF_AAL5_GUESS:
1320 pinfo->pseudo_header->atm.type = TRAF_UNKNOWN;
1321 pinfo->pseudo_header->atm.subtype = TRAF_ST_UNKNOWN;
1322 /* Try to guess the type according to the first bytes */
1323 atm_pdu_caplen = tvb_length(new_tvb);
1324 atm_pdu = tvb_get_ptr(new_tvb, 0, atm_pdu_caplen);
1325 erf_atm_guess_traffic_type(atm_pdu, atm_pdu_caplen, pinfo->pseudo_header);
1326 break;
1327
1328 case ERF_AAL5_LLC:
1329 pinfo->pseudo_header->atm.type = TRAF_LLCMX;
1330 pinfo->pseudo_header->atm.subtype = TRAF_ST_UNKNOWN;
1331 break;
1332
1333 case ERF_AAL5_UNSPEC:
1334 pinfo->pseudo_header->atm.aal = AAL_5;
1335 pinfo->pseudo_header->atm.type = TRAF_UNKNOWN;
1336 pinfo->pseudo_header->atm.subtype = TRAF_ST_UNKNOWN;
1337 break;
1338 }
1339
1340 call_dissector(atm_untruncated_handle, new_tvb, pinfo, tree);
1341 } else {
1342 /* Treat this as a raw cell */
1343 pinfo->pseudo_header->atm.flags |= ATM_RAW_CELL;
1344 pinfo->pseudo_header->atm.flags |= ATM_NO_HEC;
1345 pinfo->pseudo_header->atm.aal = AAL_UNKNOWN;
1346 /* can call atm_untruncated because we set ATM_RAW_CELL flag */
1347 call_dissector(atm_untruncated_handle, tvb, pinfo, tree);
1348 }
1349 break;
1350
1351 case ERF_TYPE_MC_AAL5:
1352 dissect_mc_aal5_header(tvb, pinfo, erf_tree);
1353 /* continue with type AAL5 */
1354
1355 case ERF_TYPE_AAL5:
1356 atm_hdr = tvb_get_ntohl(tvb, 0);
1357 memset(&pinfo->pseudo_header->atm, 0, sizeof(pinfo->pseudo_header->atm));
1358 pinfo->pseudo_header->atm.vpi = ((atm_hdr & 0x0ff00000) >> 20);
1359 pinfo->pseudo_header->atm.vci = ((atm_hdr & 0x000ffff0) >> 4);
1360 pinfo->pseudo_header->atm.channel = (flags & 0x03);
1361
1362 new_tvb = tvb_new_subset_remaining(tvb, ATM_HDR_LENGTH);
1363 /* Work around to have decoding working */
1364 pinfo->pseudo_header->atm.aal = AAL_5;
1365 switch (erf_aal5_type) {
1366
1367 case ERF_AAL5_GUESS:
1368 pinfo->pseudo_header->atm.type = TRAF_UNKNOWN;
1369 pinfo->pseudo_header->atm.subtype = TRAF_ST_UNKNOWN;
1370 /* Try to guess the type according to the first bytes */
1371 atm_pdu_caplen = tvb_length(new_tvb);
1372 atm_pdu = tvb_get_ptr(new_tvb, 0, atm_pdu_caplen);
1373 erf_atm_guess_traffic_type(atm_pdu, atm_pdu_caplen, pinfo->pseudo_header);
1374 break;
1375
1376 case ERF_AAL5_LLC:
1377 pinfo->pseudo_header->atm.type = TRAF_LLCMX;
1378 pinfo->pseudo_header->atm.subtype = TRAF_ST_UNKNOWN;
1379 break;
1380
1381 case ERF_AAL5_UNSPEC:
1382 pinfo->pseudo_header->atm.aal = AAL_5;
1383 pinfo->pseudo_header->atm.type = TRAF_UNKNOWN;
1384 pinfo->pseudo_header->atm.subtype = TRAF_ST_UNKNOWN;
1385 break;
1386 }
1387
1388 call_dissector(atm_untruncated_handle, new_tvb, pinfo, tree);
1389 break;
1390
1391 case ERF_TYPE_MC_AAL2:
1392 dissect_mc_aal2_header(tvb, pinfo, erf_tree);
1393
1394 /*
1395 * ERF_TYPE_MC_AAL2 MC pseudoheader is not included in tvb,
1396 * and we do not supply 'dct2000' pseudoheader.
1397 */
1398
1399 atm_hdr = tvb_get_ntohl(tvb, 0);
1400 aal2_cid = ((struct erf_mc_aal2_hdrx *)(&pinfo->pseudo_header->erf.subhdr.mc_hdr))->byte3;
1401
1402 /* Change wtap pseudo_header from erf to atm for atm dissector */
1403 memset(&pinfo->pseudo_header->atm, 0, sizeof(pinfo->pseudo_header->atm));
1404
1405 /* fill in atm pseudo header */
1406 pinfo->pseudo_header->atm.aal = AAL_2;
1407 pinfo->pseudo_header->atm.flags |= ATM_AAL2_NOPHDR;
1408 pinfo->pseudo_header->atm.vpi = ((atm_hdr & 0x0ff00000) >> 20);
1409 pinfo->pseudo_header->atm.vci = ((atm_hdr & 0x000ffff0) >> 4);
1410 pinfo->pseudo_header->atm.channel = (flags & 0x03);
1411 pinfo->pseudo_header->atm.aal2_cid = aal2_cid;
1412 pinfo->pseudo_header->atm.type = TRAF_UNKNOWN;
1413 pinfo->pseudo_header->atm.subtype = TRAF_ST_UNKNOWN;
1414
1415 /* remove ATM cell header from tvb */
1416 new_tvb = tvb_new_subset_remaining(tvb, ATM_HDR_LENGTH);
1417 call_dissector(atm_untruncated_handle, new_tvb, pinfo, tree);
1418 break;
1419
1420 case ERF_TYPE_AAL2:
1421 dissect_aal2_header(tvb, pinfo, erf_tree);
1422
1423 /*
1424 * We removed the ERF_TYPE_AAL2 'ext' pseudoheader in wtap,
1425 * and do not supply the 'dct2000' pseudoheader.
1426 */
1427
1428 atm_hdr = tvb_get_ntohl(tvb, 0);
1429
1430 /* Change wtap pseudo_header from erf to atm for atm dissector */
1431 memset(&pinfo->pseudo_header->atm, 0, sizeof(pinfo->pseudo_header->atm));
1432
1433 /* fill in atm pseudo header */
1434 pinfo->pseudo_header->atm.aal = AAL_2;
1435 pinfo->pseudo_header->atm.flags |= ATM_AAL2_NOPHDR;
1436 pinfo->pseudo_header->atm.vpi = ((atm_hdr & 0x0ff00000) >> 20);
1437 pinfo->pseudo_header->atm.vci = ((atm_hdr & 0x000ffff0) >> 4);
1438 pinfo->pseudo_header->atm.channel = (flags & 0x03);
1439 pinfo->pseudo_header->atm.type = TRAF_UNKNOWN;
1440 pinfo->pseudo_header->atm.subtype = TRAF_ST_UNKNOWN;
1441
1442 /* remove ATM cell header from tvb */
1443 new_tvb = tvb_new_subset_remaining(tvb, ATM_HDR_LENGTH);
1444 call_dissector(atm_untruncated_handle, new_tvb, pinfo, tree);
1445 break;
1446
1447 case ERF_TYPE_ETH:
1448 case ERF_TYPE_COLOR_ETH:
1449 case ERF_TYPE_DSM_COLOR_ETH:
1450 dissect_eth_header(tvb, pinfo, erf_tree);
1451 if (erf_ethfcs)
1452 call_dissector(ethwithfcs_handle, tvb, pinfo, tree);
1453 else
1454 call_dissector(ethwithoutfcs_handle, tvb, pinfo, tree);
1455 break;
1456
1457 case ERF_TYPE_MC_HDLC:
1458 dissect_mc_hdlc_header(tvb, pinfo, erf_tree);
1459 /* continue with type HDLC */
1460
1461 case ERF_TYPE_HDLC_POS:
1462 case ERF_TYPE_COLOR_HDLC_POS:
1463 case ERF_TYPE_DSM_COLOR_HDLC_POS:
1464 case ERF_TYPE_COLOR_MC_HDLC_POS:
1465 hdlc_type = (erf_hdlc_type_vals)erf_hdlc_type;
1466
1467 if (hdlc_type == ERF_HDLC_GUESS) {
1468 /* Try to guess the type. */
1469 first_byte = tvb_get_guint8(tvb, 0);
1470 if (first_byte == 0x0f || first_byte == 0x8f)
1471 hdlc_type = ERF_HDLC_CHDLC;
1472 else {
1473 /* Anything to check for to recognize Frame Relay or MTP2?
1474 Should we require PPP packets to beging with FF 03? */
1475 hdlc_type = ERF_HDLC_PPP;
1476 }
1477 }
1478 /* Clean the pseudo header (if used in subdissector) and call the
1479 appropriate subdissector. */
1480 switch (hdlc_type) {
1481 case ERF_HDLC_CHDLC:
1482 call_dissector(chdlc_handle, tvb, pinfo, tree);
1483 break;
1484 case ERF_HDLC_PPP:
1485 call_dissector(ppp_handle, tvb, pinfo, tree);
1486 break;
1487 case ERF_HDLC_FRELAY:
1488 memset(&pinfo->pseudo_header->x25, 0, sizeof(pinfo->pseudo_header->x25));
1489 call_dissector(frelay_handle, tvb, pinfo, tree);
1490 break;
1491 case ERF_HDLC_MTP2:
1492 /* not used, but .. */
1493 memset(&pinfo->pseudo_header->mtp2, 0, sizeof(pinfo->pseudo_header->mtp2));
1494 call_dissector(mtp2_handle, tvb, pinfo, tree);
1495 break;
1496 default:
1497 break;
1498 }
1499 break;
1500
1501 default:
1502 break;
1503 } /* erf type */
1504 }
1505
1506 void
1507 proto_register_erf(void)
1508 {
1509
1510 static hf_register_info hf[] = {
1511 /* ERF Header */
1512 { &hf_erf_ts,
1513 { "Timestamp", "erf.ts",
1514 FT_UINT64, BASE_HEX, NULL, 0x0, NULL, HFILL } },
1515 { &hf_erf_rectype,
1516 { "Record type", "erf.types",
1517 FT_UINT8, BASE_HEX, NULL, 0x0, NULL, HFILL } },
1518 { &hf_erf_type,
1519 { "Type", "erf.types.type",
1520 FT_UINT8, BASE_DEC, VALS(erf_type_vals), ERF_HDR_TYPE_MASK, NULL, HFILL } },
1521 { &hf_erf_ehdr,
1522 { "Extension header present", "erf.types.ext_header",
1523 FT_UINT8, BASE_DEC, NULL, ERF_HDR_EHDR_MASK, NULL, HFILL } },
1524 { &hf_erf_flags,
1525 { "Flags", "erf.flags",
1526 FT_UINT8, BASE_HEX, NULL, 0x0, NULL, HFILL } },
1527 { &hf_erf_flags_cap,
1528 { "Capture interface", "erf.flags.cap",
1529 FT_UINT8, BASE_DEC, NULL, ERF_HDR_CAP_MASK, NULL, HFILL } },
1530 { &hf_erf_flags_vlen,
1531 { "Varying record length", "erf.flags.vlen",
1532 FT_UINT8, BASE_DEC, NULL, ERF_HDR_VLEN_MASK, NULL, HFILL } },
1533 { &hf_erf_flags_trunc,
1534 { "Truncated", "erf.flags.trunc",
1535 FT_UINT8, BASE_DEC, NULL, ERF_HDR_TRUNC_MASK, NULL, HFILL } },
1536 { &hf_erf_flags_rxe,
1537 { "RX error", "erf.flags.rxe",
1538 FT_UINT8, BASE_DEC, NULL, ERF_HDR_RXE_MASK, NULL, HFILL } },
1539 { &hf_erf_flags_dse,
1540 { "DS error", "erf.flags.dse",
1541 FT_UINT8, BASE_DEC, NULL, ERF_HDR_DSE_MASK, NULL, HFILL } },
1542 { &hf_erf_flags_res,
1543 { "Reserved", "erf.flags.res",
1544 FT_UINT8, BASE_HEX, NULL, ERF_HDR_RES_MASK, NULL, HFILL } },
1545 { &hf_erf_rlen,
1546 { "Record length", "erf.rlen",
1547 FT_UINT16, BASE_DEC, NULL, 0x0, NULL, HFILL } },
1548 { &hf_erf_lctr,
1549 { "Loss counter", "erf.lctr",
1550 FT_UINT16, BASE_DEC, NULL, 0x0, NULL, HFILL } },
1551 { &hf_erf_wlen,
1552 { "Wire length", "erf.wlen",
1553 FT_UINT16, BASE_DEC, NULL, 0x0, NULL, HFILL } },
1554 { &hf_erf_ehdr_t,
1555 { "Extension Header", "erf.ehdr.types",
1556 FT_UINT8, BASE_DEC, VALS(ehdr_type_vals), 0x0, NULL, HFILL } },
1557
1558 /* Intercept ID Extension Header */
1559 { &hf_erf_ehdr_int_res1,
1560 { "Reserved", "erf.ehdr.int.res1",
1561 FT_UINT8, BASE_HEX, NULL, 0x0, NULL, HFILL } },
1562 { &hf_erf_ehdr_int_id,
1563 { "Intercept ID", "erf.ehdr.int.intid",
1564 FT_UINT16, BASE_DEC, NULL, 0x0, NULL, HFILL } },
1565 { &hf_erf_ehdr_int_res2,
1566 { "Reserved", "erf.ehdr.int.res2",
1567 FT_UINT32, BASE_HEX, NULL, 0x0, NULL, HFILL } },
1568
1569 /* Raw Link Extension Header */
1570 { &hf_erf_ehdr_raw_link_res,
1571 { "Reserved", "erf.ehdr.raw.res",
1572 FT_UINT32, BASE_HEX, NULL, 0x0, NULL, HFILL } },
1573 { &hf_erf_ehdr_raw_link_seqnum,
1574 { "Sequence number", "erf.ehdr.raw.seqnum",
1575 FT_UINT16, BASE_DEC, NULL, 0x0, NULL, HFILL } },
1576 { &hf_erf_ehdr_raw_link_rate,
1577 { "Rate", "erf.ehdr.raw.rate",
1578 FT_UINT8, BASE_DEC, VALS(raw_link_rates), 0x0, NULL, HFILL } },
1579 { &hf_erf_ehdr_raw_link_type,
1580 { "Link Type", "erf.ehdr.raw.link_type",
1581 FT_UINT8, BASE_DEC, VALS(raw_link_types), 0x0, NULL, HFILL } },
1582
1583 /* Classification Extension Header */
1584 { &hf_erf_ehdr_class_flags,
1585 { "Flags", "erf.ehdr.class.flags",
1586 FT_UINT32, BASE_HEX, NULL, 0x0, NULL, HFILL } },
1587 { &hf_erf_ehdr_class_flags_sh,
1588 { "Search hit", "erf.ehdr.class.flags.sh",
1589 FT_UINT32, BASE_DEC, NULL, EHDR_CLASS_SH_MASK, NULL, HFILL } },
1590 { &hf_erf_ehdr_class_flags_shm,
1591 { "Multiple search hits", "erf.ehdr.class.flags.shm",
1592 FT_UINT32, BASE_DEC, NULL, EHDR_CLASS_SHM_MASK, NULL, HFILL } },
1593 { &hf_erf_ehdr_class_flags_res1,
1594 { "Reserved", "erf.ehdr.class.flags.res1",
1595 FT_UINT32, BASE_HEX, NULL, EHDR_CLASS_RES1_MASK, NULL, HFILL } },
1596 { &hf_erf_ehdr_class_flags_user,
1597 { "User classification", "erf.ehdr.class.flags.user",
1598 FT_UINT32, BASE_DEC, NULL, EHDR_CLASS_USER_MASK, NULL, HFILL } },
1599 { &hf_erf_ehdr_class_flags_res2,
1600 { "Reserved", "erf.ehdr.class.flags.res2",
1601 FT_UINT32, BASE_HEX, NULL, EHDR_CLASS_RES2_MASK, NULL, HFILL } },
1602 { &hf_erf_ehdr_class_flags_drop,
1603 { "Drop Steering Bit", "erf.ehdr.class.flags.drop",
1604 FT_UINT32, BASE_DEC, NULL, EHDR_CLASS_DROP_MASK, NULL, HFILL } },
1605 { &hf_erf_ehdr_class_flags_str,
1606 { "Stream Steering Bits", "erf.ehdr.class.flags.str",
1607 FT_UINT32, BASE_DEC, NULL, EHDR_CLASS_STER_MASK, NULL, HFILL } },
1608 { &hf_erf_ehdr_class_seqnum,
1609 { "Sequence number", "erf.ehdr.class.seqnum",
1610 FT_UINT32, BASE_DEC, NULL, 0x0, NULL, HFILL } },
1611
1612 /* BFS Extension Header */
1613 { &hf_erf_ehdr_bfs_hash,
1614 { "Hash", "erf.ehdr.bfs.hash",
1615 FT_UINT8, BASE_HEX, NULL, 0, NULL, HFILL } },
1616 { &hf_erf_ehdr_bfs_color,
1617 { "Filter Color", "erf.ehdr.bfs.color",
1618 FT_UINT16, BASE_HEX, NULL, 0, NULL, HFILL } },
1619 { &hf_erf_ehdr_bfs_raw_hash,
1620 { "Raw Hash", "erf.ehdr.bfs.rawhash",
1621 FT_UINT32, BASE_HEX, NULL, 0, NULL, HFILL } },
1622
1623 /* Channelised Extension Header */
1624 { &hf_erf_ehdr_chan_morebits,
1625 { "More Bits", "erf.ehdr.chan.morebits",
1626 FT_BOOLEAN, BASE_NONE, NULL, 0, NULL, HFILL } },
1627 { &hf_erf_ehdr_chan_morefrag,
1628 { "More Fragments", "erf.ehdr.chan.morefrag",
1629 FT_BOOLEAN, BASE_NONE, NULL, 0, NULL, HFILL } },
1630 { &hf_erf_ehdr_chan_seqnum,
1631 { "Sequence Number", "erf.ehdr.chan.seqnum",
1632 FT_UINT16, BASE_DEC, NULL, 0, NULL, HFILL } },
1633 { &hf_erf_ehdr_chan_res,
1634 { "Reserved", "erf.ehdr.chan.res",
1635 FT_UINT8, BASE_HEX, NULL, 0, NULL, HFILL } },
1636 { &hf_erf_ehdr_chan_virt_container_id,
1637 { "Virtual Container ID", "erf.ehdr.chan.vcid",
1638 FT_UINT8, BASE_HEX, NULL, 0, NULL, HFILL } },
1639 { &hf_erf_ehdr_chan_assoc_virt_container_size,
1640 { "Associated Virtual Container Size", "erf.ehdr.chan.vcsize",
1641 FT_UINT8, BASE_HEX, VALS(channelised_assoc_virt_container_size), 0, NULL, HFILL } },
1642 { &hf_erf_ehdr_chan_rate,
1643 { "Origin Line Type/Rate", "erf.ehdr.chan.rate",
1644 FT_UINT8, BASE_HEX, VALS(channelised_rate), 0, NULL, HFILL } },
1645 { &hf_erf_ehdr_chan_type,
1646 { "Frame Part Type", "erf.ehdr.chan.type",
1647 FT_UINT8, BASE_HEX, VALS(channelised_type), 0, NULL, HFILL } },
1648
1649 /* Signature Extension Header */
1650 { &hf_erf_ehdr_signature_payload_hash,
1651 { "Payload Hash", "erf.ehdr.signature.payloadhash",
1652 FT_UINT24, BASE_HEX, NULL, 0, NULL, HFILL } },
1653 { &hf_erf_ehdr_signature_color,
1654 { "Filter Color", "erf.ehdr.signature.color",
1655 FT_UINT8, BASE_HEX, NULL, 0, NULL, HFILL } },
1656 { &hf_erf_ehdr_signature_flow_hash,
1657 { "Flow Hash", "erf.ehdr.signature.flowhash",
1658 FT_UINT24, BASE_HEX, NULL, 0, NULL, HFILL } },
1659
1660 /* Unknown Extension Header */
1661 { &hf_erf_ehdr_unk,
1662 { "Data", "erf.ehdr.unknown.data",
1663 FT_UINT64, BASE_HEX, NULL, 0x0, NULL, HFILL } },
1664
1665 /* MC HDLC Header */
1666 { &hf_erf_mc_hdlc,
1667 { "Multi Channel HDLC Header", "erf.mchdlc",
1668 FT_UINT32, BASE_HEX, NULL, 0x0, NULL, HFILL } },
1669 { &hf_erf_mc_hdlc_cn,
1670 { "Connection number", "erf.mchdlc.cn",
1671 FT_UINT16, BASE_DEC, NULL, MC_HDLC_CN_MASK, NULL, HFILL } },
1672 { &hf_erf_mc_hdlc_res1,
1673 { "Reserved", "erf.mchdlc.res1",
1674 FT_UINT16, BASE_HEX, NULL, MC_HDLC_RES1_MASK, NULL, HFILL } },
1675 { &hf_erf_mc_hdlc_res2,
1676 { "Reserved", "erf.mchdlc.res2",
1677 FT_UINT8, BASE_HEX, NULL, MC_HDLC_RES2_MASK, NULL, HFILL } },
1678 { &hf_erf_mc_hdlc_fcse,
1679 { "FCS error", "erf.mchdlc.fcse",
1680 FT_UINT8, BASE_DEC, NULL, MC_HDLC_FCSE_MASK, NULL, HFILL } },
1681 { &hf_erf_mc_hdlc_sre,
1682 { "Short record error", "erf.mchdlc.sre",
1683 FT_UINT8, BASE_DEC, NULL, MC_HDLC_SRE_MASK, NULL, HFILL } },
1684 { &hf_erf_mc_hdlc_lre,
1685 { "Long record error", "erf.mchdlc.lre",
1686 FT_UINT8, BASE_DEC, NULL, MC_HDLC_LRE_MASK, NULL, HFILL } },
1687 { &hf_erf_mc_hdlc_afe,
1688 { "Aborted frame error", "erf.mchdlc.afe",
1689 FT_UINT8, BASE_DEC, NULL, MC_HDLC_AFE_MASK, NULL, HFILL } },
1690 { &hf_erf_mc_hdlc_oe,
1691 { "Octet error", "erf.mchdlc.oe",
1692 FT_UINT8, BASE_DEC, NULL, MC_HDLC_OE_MASK, NULL, HFILL } },
1693 { &hf_erf_mc_hdlc_lbe,
1694 { "Lost byte error", "erf.mchdlc.lbe",
1695 FT_UINT8, BASE_DEC, NULL, MC_HDLC_LBE_MASK, NULL, HFILL } },
1696 { &hf_erf_mc_hdlc_first,
1697 { "First record", "erf.mchdlc.first",
1698 FT_UINT8, BASE_DEC, NULL, MC_HDLC_FIRST_MASK, NULL, HFILL } },
1699 { &hf_erf_mc_hdlc_res3,
1700 { "Reserved", "erf.mchdlc.res3",
1701 FT_UINT8, BASE_HEX, NULL, MC_HDLC_RES3_MASK, NULL, HFILL } },
1702
1703 /* MC RAW Header */
1704 { &hf_erf_mc_raw,
1705 { "Multi Channel RAW Header", "erf.mcraw",
1706 FT_UINT32, BASE_HEX, NULL, 0x0, NULL, HFILL } },
1707 { &hf_erf_mc_raw_int,
1708 { "Physical interface", "erf.mcraw.int",
1709 FT_UINT8, BASE_DEC, NULL, MC_RAW_INT_MASK, NULL, HFILL } },
1710 { &hf_erf_mc_raw_res1,
1711 { "Reserved", "erf.mcraw.res1",
1712 FT_UINT8, BASE_HEX, NULL, MC_RAW_RES1_MASK, NULL, HFILL } },
1713 { &hf_erf_mc_raw_res2,
1714 { "Reserved", "erf.mcraw.res2",
1715 FT_UINT16, BASE_HEX, NULL, MC_RAW_RES2_MASK, NULL, HFILL } },
1716 { &hf_erf_mc_raw_res3,
1717 { "Reserved", "erf.mcraw.res3",
1718 FT_UINT8, BASE_HEX, NULL, MC_RAW_RES3_MASK, NULL, HFILL } },
1719 { &hf_erf_mc_raw_sre,
1720 { "Short record error", "erf.mcraw.sre",
1721 FT_UINT8, BASE_DEC, NULL, MC_RAW_SRE_MASK, NULL, HFILL } },
1722 { &hf_erf_mc_raw_lre,
1723 { "Long record error", "erf.mcraw.lre",
1724 FT_UINT8, BASE_DEC, NULL, MC_RAW_LRE_MASK, NULL, HFILL } },
1725 { &hf_erf_mc_raw_res4,
1726 { "Reserved", "erf.mcraw.res4",
1727 FT_UINT8, BASE_HEX, NULL, MC_RAW_RES4_MASK, NULL, HFILL } },
1728 { &hf_erf_mc_raw_lbe,
1729 { "Lost byte error", "erf.mcraw.lbe",
1730 FT_UINT8, BASE_DEC, NULL, MC_RAW_LBE_MASK, NULL, HFILL } },
1731 { &hf_erf_mc_raw_first,
1732 { "First record", "erf.mcraw.first",
1733 FT_UINT8, BASE_DEC, NULL, MC_RAW_FIRST_MASK, NULL, HFILL } },
1734 { &hf_erf_mc_raw_res5,
1735 { "Reserved", "erf.mcraw.res5",
1736 FT_UINT8, BASE_HEX, NULL, MC_RAW_RES5_MASK, NULL, HFILL } },
1737
1738 /* MC ATM Header */
1739 { &hf_erf_mc_atm,
1740 { "Multi Channel ATM Header", "erf.mcatm",
1741 FT_UINT32, BASE_HEX, NULL, 0x00, NULL, HFILL } },
1742 { &hf_erf_mc_atm_cn,
1743 { "Connection number", "erf.mcatm.cn",
1744 FT_UINT16, BASE_DEC, NULL, MC_ATM_CN_MASK, NULL, HFILL } },
1745 { &hf_erf_mc_atm_res1,
1746 { "Reserved", "erf.mcatm.res1",
1747 FT_UINT16, BASE_HEX, NULL, MC_ATM_RES1_MASK, NULL, HFILL } },
1748 { &hf_erf_mc_atm_mul,
1749 { "Multiplexed", "erf.mcatm.mul",
1750 FT_UINT16, BASE_DEC, NULL, MC_ATM_MUL_MASK, NULL, HFILL } },
1751 { &hf_erf_mc_atm_port,
1752 { "Physical port", "erf.mcatm.port",
1753 FT_UINT8, BASE_DEC, NULL, MC_ATM_PORT_MASK, NULL, HFILL } },
1754 { &hf_erf_mc_atm_res2,
1755 { "Reserved", "erf.mcatm.res2",
1756 FT_UINT8, BASE_HEX, NULL, MC_ATM_RES2_MASK, NULL, HFILL } },
1757 { &hf_erf_mc_atm_lbe,
1758 { "Lost Byte Error", "erf.mcatm.lbe",
1759 FT_UINT8, BASE_DEC, NULL, MC_ATM_LBE_MASK, NULL, HFILL } },
1760 { &hf_erf_mc_atm_hec,
1761 { "HEC corrected", "erf.mcatm.hec",
1762 FT_UINT8, BASE_DEC, NULL, MC_ATM_HEC_MASK, NULL, HFILL } },
1763 { &hf_erf_mc_atm_crc10,
1764 { "OAM Cell CRC10 Error (not implemented)", "erf.mcatm.crc10",
1765 FT_UINT8, BASE_DEC, NULL, MC_ATM_CRC10_MASK, NULL, HFILL } },
1766 { &hf_erf_mc_atm_oamcell,
1767 { "OAM Cell", "erf.mcatm.oamcell",
1768 FT_UINT8, BASE_DEC, NULL, MC_ATM_OAMCELL_MASK, NULL, HFILL } },
1769 { &hf_erf_mc_atm_first,
1770 { "First record", "erf.mcatm.first",
1771 FT_UINT8, BASE_DEC, NULL, MC_ATM_FIRST_MASK, NULL, HFILL } },
1772 { &hf_erf_mc_atm_res3,
1773 { "Reserved", "erf.mcatm.res3",
1774 FT_UINT8, BASE_HEX, NULL, MC_ATM_RES3_MASK, NULL, HFILL } },
1775
1776 /* MC RAW Link Header */
1777 { &hf_erf_mc_rawl,
1778 { "Multi Channel RAW Link Header", "erf.mcrawl",
1779 FT_UINT32, BASE_HEX, NULL, 0x0, NULL, HFILL } },
1780 { &hf_erf_mc_rawl_cn,
1781 { "Connection number", "erf.mcrawl.cn",
1782 FT_UINT8, BASE_DEC, NULL, MC_RAWL_CN_MASK, NULL, HFILL } },
1783 { &hf_erf_mc_rawl_res2,
1784 { "Reserved", "erf.mcrawl.res2",
1785 FT_UINT8, BASE_HEX, NULL, MC_RAWL_RES2_MASK, NULL, HFILL } },
1786 { &hf_erf_mc_rawl_lbe,
1787 { "Lost byte error", "erf.mcrawl.lbe",
1788 FT_UINT8, BASE_DEC, NULL, MC_RAWL_LBE_MASK, NULL, HFILL } },
1789 { &hf_erf_mc_rawl_first,
1790 { "First record", "erf.mcrawl.first",
1791 FT_UINT8, BASE_DEC, NULL, MC_RAWL_FIRST_MASK, NULL, HFILL } },
1792 { &hf_erf_mc_rawl_res3,
1793 { "Reserved", "erf.mcrawl.res5",
1794 FT_UINT8, BASE_HEX, NULL, MC_RAWL_RES3_MASK, NULL, HFILL } },
1795
1796 /* MC AAL5 Header */
1797 { &hf_erf_mc_aal5,
1798 { "Multi Channel AAL5 Header", "erf.mcaal5",
1799 FT_UINT32, BASE_HEX, NULL, 0x0, NULL, HFILL } },
1800 { &hf_erf_mc_aal5_cn,
1801 { "Connection number", "erf.mcaal5.cn",
1802 FT_UINT16, BASE_DEC, NULL, MC_AAL5_CN_MASK, NULL, HFILL } },
1803 { &hf_erf_mc_aal5_res1,
1804 { "Reserved", "erf.mcaal5.res1",
1805 FT_UINT16, BASE_HEX, NULL, MC_AAL5_RES1_MASK, NULL, HFILL } },
1806 { &hf_erf_mc_aal5_port,
1807 { "Physical port", "erf.mcaal5.port",
1808 FT_UINT8, BASE_DEC, NULL, MC_AAL5_PORT_MASK, NULL, HFILL } },
1809 { &hf_erf_mc_aal5_crcck,
1810 { "CRC checked", "erf.mcaal5.crcck",
1811 FT_UINT8, BASE_DEC, NULL, MC_AAL5_CRCCK_MASK, NULL, HFILL } },
1812 { &hf_erf_mc_aal5_crce,
1813 { "CRC error", "erf.mcaal5.crce",
1814 FT_UINT8, BASE_DEC, NULL, MC_AAL5_CRCE_MASK, NULL, HFILL } },
1815 { &hf_erf_mc_aal5_lenck,
1816 { "Length checked", "erf.mcaal5.lenck",
1817 FT_UINT8, BASE_DEC, NULL, MC_AAL5_LENCK_MASK, NULL, HFILL } },
1818 { &hf_erf_mc_aal5_lene,
1819 { "Length error", "erf.mcaal5.lene",
1820 FT_UINT8, BASE_DEC, NULL, MC_AAL5_LENE_MASK, NULL, HFILL } },
1821 { &hf_erf_mc_aal5_res2,
1822 { "Reserved", "erf.mcaal5.res2",
1823 FT_UINT8, BASE_HEX, NULL, MC_AAL5_RES2_MASK, NULL, HFILL } },
1824 { &hf_erf_mc_aal5_first,
1825 { "First record", "erf.mcaal5.first",
1826 FT_UINT8, BASE_DEC, NULL, MC_AAL5_FIRST_MASK, NULL, HFILL } },
1827 { &hf_erf_mc_aal5_res3,
1828 { "Reserved", "erf.mcaal5.res3",
1829 FT_UINT8, BASE_HEX, NULL, MC_AAL5_RES3_MASK, NULL, HFILL } },
1830
1831 /* MC AAL2 Header */
1832 { &hf_erf_mc_aal2,
1833 { "Multi Channel AAL2 Header", "erf.mcaal2",
1834 FT_UINT32, BASE_HEX, NULL, 0x0, NULL, HFILL } },
1835 { &hf_erf_mc_aal2_cn,
1836 { "Connection number", "erf.mcaal2.cn",
1837 FT_UINT16, BASE_DEC, NULL, MC_AAL2_CN_MASK, NULL, HFILL } },
1838 { &hf_erf_mc_aal2_res1,
1839 { "Reserved for extra connection", "erf.mcaal2.res1",
1840 FT_UINT16, BASE_HEX, NULL, MC_AAL2_RES1_MASK, NULL, HFILL } },
1841 { &hf_erf_mc_aal2_res2,
1842 { "Reserved for type", "erf.mcaal2.mul",
1843 FT_UINT16, BASE_HEX, NULL, MC_AAL2_RES2_MASK, NULL, HFILL } },
1844 { &hf_erf_mc_aal2_port,
1845 { "Physical port", "erf.mcaal2.port",
1846 FT_UINT8, BASE_DEC, NULL, MC_AAL2_PORT_MASK, NULL, HFILL } },
1847 { &hf_erf_mc_aal2_res3,
1848 { "Reserved", "erf.mcaal2.res2",
1849 FT_UINT8, BASE_HEX, NULL, MC_AAL2_RES3_MASK, NULL, HFILL } },
1850 { &hf_erf_mc_aal2_first,
1851 { "First cell received", "erf.mcaal2.lbe",
1852 FT_UINT8, BASE_DEC, NULL, MC_AAL2_FIRST_MASK, NULL, HFILL } },
1853 { &hf_erf_mc_aal2_maale,
1854 { "MAAL error", "erf.mcaal2.hec",
1855 FT_UINT8, BASE_DEC, NULL, MC_AAL2_MAALE_MASK, NULL, HFILL } },
1856 { &hf_erf_mc_aal2_lene,
1857 { "Length error", "erf.mcaal2.crc10",
1858 FT_UINT8, BASE_DEC, NULL, MC_AAL2_LENE_MASK, NULL, HFILL } },
1859 { &hf_erf_mc_aal2_cid,
1860 { "Channel Identification Number", "erf.mcaal2.cid",
1861 FT_UINT8, BASE_DEC, NULL, MC_AAL2_CID_MASK, NULL, HFILL } },
1862
1863 /* AAL2 Header */
1864 { &hf_erf_aal2,
1865 { "AAL2 Header", "erf.aal2",
1866 FT_UINT32, BASE_HEX, NULL, 0x0, NULL, HFILL } },
1867 { &hf_erf_aal2_cid,
1868 { "Channel Identification Number", "erf.aal2.cid",
1869 FT_UINT8, BASE_DEC, NULL, AAL2_CID_MASK, NULL, HFILL } },
1870 { &hf_erf_aal2_maale,
1871 { "MAAL error number", "erf.aal2.maale",
1872 FT_UINT8, BASE_DEC, NULL, AAL2_MAALE_MASK, NULL, HFILL } },
1873 { &hf_erf_aal2_maalei,
1874 { "MAAL error", "erf.aal2.hec",
1875 FT_UINT16, BASE_DEC, NULL, AAL2_MAALEI_MASK, NULL, HFILL } },
1876 { &hf_erf_aal2_first,
1877 { "First cell received", "erf.aal2.lbe",
1878 FT_UINT16, BASE_DEC, NULL, AAL2_FIRST_MASK, NULL, HFILL } },
1879 { &hf_erf_aal2_res1,
1880 { "Reserved", "erf.aal2.res1",
1881 FT_UINT16, BASE_HEX, NULL, AAL2_RES1_MASK, NULL, HFILL } },
1882
1883 /* ETH Header */
1884 { &hf_erf_eth,
1885 { "Ethernet pad", "erf.eth",
1886 FT_NONE, BASE_NONE, NULL, 0x0, NULL, HFILL } },
1887 { &hf_erf_eth_off,
1888 { "Offset", "erf.eth.off",
1889 FT_UINT8, BASE_DEC, NULL, ETH_OFF_MASK, NULL, HFILL } },
1890 { &hf_erf_eth_res1,
1891 { "Reserved", "erf.eth.res1",
1892 FT_UINT8, BASE_HEX, NULL, ETH_RES1_MASK, NULL, HFILL } },
1893
1894 };
1895
1896 static gint *ett[] = {
1897 &ett_erf,
1898 &ett_erf_pseudo_hdr,
1899 &ett_erf_rectype,
1900 &ett_erf_flags,
1901 &ett_erf_mc_hdlc,
1902 &ett_erf_mc_raw,
1903 &ett_erf_mc_atm,
1904 &ett_erf_mc_rawlink,
1905 &ett_erf_mc_aal5,
1906 &ett_erf_mc_aal2,
1907 &ett_erf_aal2,
1908 &ett_erf_eth
1909 };
1910
1911 static const enum_val_t erf_hdlc_options[] = {
1912 { "chdlc", "Cisco HDLC", ERF_HDLC_CHDLC },
1913 { "ppp", "PPP serial", ERF_HDLC_PPP },
1914 { "frelay", "Frame Relay", ERF_HDLC_FRELAY },
1915 { "mtp2", "SS7 MTP2", ERF_HDLC_MTP2 },
1916 { "guess", "Attempt to guess", ERF_HDLC_GUESS },
1917 { NULL, NULL, 0 }
1918 };
1919
1920 static const enum_val_t erf_aal5_options[] = {
1921 { "guess", "Attempt to guess", ERF_AAL5_GUESS },
1922 { "llc", "LLC multiplexed", ERF_AAL5_LLC },
1923 { "unspec", "Unspecified", ERF_AAL5_UNSPEC },
1924 { NULL, NULL, 0 }
1925 };
1926
1927 static ei_register_info ei[] = {
1928 { &ei_erf_checksum_error, { "erf.checksum.error", PI_CHECKSUM, PI_ERROR, "ERF MC FCS Error", EXPFILL }},
1929 { &ei_erf_packet_loss, { "erf.packet_loss", PI_SEQUENCE, PI_WARN, "Packet loss occurred between previous and current packet", EXPFILL }},
1930 { &ei_erf_extension_headers_not_shown, { "erf.ehdr.more_not_shown", PI_SEQUENCE, PI_WARN, "More extension headers were present, not shown", EXPFILL }},
1931 };
1932
1933 module_t *erf_module;
1934 expert_module_t* expert_erf;
1935
1936 proto_erf = proto_register_protocol("Extensible Record Format", "ERF", "erf");
1937 register_dissector("erf", dissect_erf, proto_erf);
1938
1939 proto_register_field_array(proto_erf, hf, array_length(hf));
1940 proto_register_subtree_array(ett, array_length(ett));
1941 expert_erf = expert_register_protocol(proto_erf);
1942 expert_register_field_array(expert_erf, ei, array_length(ei));
1943
1944 erf_module = prefs_register_protocol(proto_erf, NULL);
1945
1946 prefs_register_enum_preference(erf_module, "hdlc_type", "ERF_HDLC Layer 2",
1947 "Protocol encapsulated in HDLC records",
1948 &erf_hdlc_type, erf_hdlc_options, FALSE);
1949
1950 prefs_register_bool_preference(erf_module, "rawcell_first",
1951 "Raw ATM cells are first cell of AAL5 PDU",
1952 "Whether raw ATM cells should be treated as "
1953 "the first cell of an AAL5 PDU",
1954 &erf_rawcell_first);
1955
1956 prefs_register_enum_preference(erf_module, "aal5_type",
1957 "ATM AAL5 packet type",
1958 "Protocol encapsulated in ATM AAL5 packets",
1959 &erf_aal5_type, erf_aal5_options, FALSE);
1960
1961 prefs_register_bool_preference(erf_module, "ethfcs",
1962 "Ethernet packets have FCS",
1963 "Whether the FCS is present in Ethernet packets",
1964 &erf_ethfcs);
1965 }
1966
1967 void
1968 proto_reg_handoff_erf(void)
1969 {
1970 dissector_handle_t erf_handle;
1971
1972 erf_handle = find_dissector("erf");
1973 dissector_add_uint("wtap_encap", WTAP_ENCAP_ERF, erf_handle);
1974
1975 /* Dissector called to dump raw data, or unknown protocol */
1976 data_handle = find_dissector("data");
1977
1978 /* Get handle for IP dissectors) */
1979 ipv4_handle = find_dissector("ip");
1980 ipv6_handle = find_dissector("ipv6");
1981
1982 /* Get handle for Infiniband dissector */
1983 infiniband_handle = find_dissector("infiniband");
1984 infiniband_link_handle = find_dissector("infiniband_link");
1985
1986 /* Get handles for serial line protocols */
1987 chdlc_handle = find_dissector("chdlc");
1988 ppp_handle = find_dissector("ppp_hdlc");
1989 frelay_handle = find_dissector("fr");
1990 mtp2_handle = find_dissector("mtp2");
1991
1992 /* Get handle for ATM dissector */
1993 atm_untruncated_handle = find_dissector("atm_untruncated");
1994
1995 /* Get handles for Ethernet dissectors */
1996 ethwithfcs_handle = find_dissector("eth_withfcs");
1997 ethwithoutfcs_handle = find_dissector("eth_withoutfcs");
1998
1999 sdh_handle = find_dissector("sdh");
2000 }