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Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/mingo/linux...
[wrt350n-kernel.git] / drivers / video / vermilion / vermilion.c
blob2aa71eb67c2bb048f5f80c29951cf24648dfb88c
1 /*
2 * Copyright (c) Intel Corp. 2007.
3 * All Rights Reserved.
4 *
5 * Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
6 * develop this driver.
7 *
8 * This file is part of the Vermilion Range fb driver.
9 * The Vermilion Range fb driver is free software;
10 * you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
14 *
15 * The Vermilion Range fb driver is distributed
16 * in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this driver; if not, write to the Free Software
23 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
24 *
25 * Authors:
26 * Thomas Hellström <thomas-at-tungstengraphics-dot-com>
27 * Michel Dänzer <michel-at-tungstengraphics-dot-com>
28 * Alan Hourihane <alanh-at-tungstengraphics-dot-com>
29 */
30
31 #include <linux/module.h>
32 #include <linux/kernel.h>
33 #include <linux/errno.h>
34 #include <linux/string.h>
35 #include <linux/delay.h>
36 #include <linux/mm.h>
37 #include <linux/fb.h>
38 #include <linux/pci.h>
39 #include <asm/cacheflush.h>
40 #include <asm/tlbflush.h>
41 #include <linux/mmzone.h>
42
43 /* #define VERMILION_DEBUG */
44
45 #include "vermilion.h"
46
47 #define MODULE_NAME "vmlfb"
48
49 #define VML_TOHW(_val, _width) ((((_val) << (_width)) + 0x7FFF - (_val)) >> 16)
50
51 static struct mutex vml_mutex;
52 static struct list_head global_no_mode;
53 static struct list_head global_has_mode;
54 static struct fb_ops vmlfb_ops;
55 static struct vml_sys *subsys = NULL;
56 static char *vml_default_mode = "1024x768@60";
57 static struct fb_videomode defaultmode = {
58 NULL, 60, 1024, 768, 12896, 144, 24, 29, 3, 136, 6,
59 0, FB_VMODE_NONINTERLACED
60 };
61
62 static u32 vml_mem_requested = (10 * 1024 * 1024);
63 static u32 vml_mem_contig = (4 * 1024 * 1024);
64 static u32 vml_mem_min = (4 * 1024 * 1024);
65
66 static u32 vml_clocks[] = {
67 6750,
68 13500,
69 27000,
70 29700,
71 37125,
72 54000,
73 59400,
74 74250,
75 120000,
76 148500
77 };
78
79 static u32 vml_num_clocks = ARRAY_SIZE(vml_clocks);
80
81 /*
82 * Allocate a contiguous vram area and make its linear kernel map
83 * uncached.
84 */
85
86 static int vmlfb_alloc_vram_area(struct vram_area *va, unsigned max_order,
87 unsigned min_order)
88 {
89 gfp_t flags;
90 unsigned long i;
91
92 max_order++;
93 do {
94 /*
95 * Really try hard to get the needed memory.
96 * We need memory below the first 32MB, so we
97 * add the __GFP_DMA flag that guarantees that we are
98 * below the first 16MB.
99 */
100
101 flags = __GFP_DMA | __GFP_HIGH;
102 va->logical =
103 __get_free_pages(flags, --max_order);
104 } while (va->logical == 0 && max_order > min_order);
105
106 if (!va->logical)
107 return -ENOMEM;
108
109 va->phys = virt_to_phys((void *)va->logical);
110 va->size = PAGE_SIZE << max_order;
111 va->order = max_order;
112
113 /*
114 * It seems like __get_free_pages only ups the usage count
115 * of the first page. This doesn't work with nopage mapping, so
116 * up the usage count once more.
117 */
118
119 memset((void *)va->logical, 0x00, va->size);
120 for (i = va->logical; i < va->logical + va->size; i += PAGE_SIZE) {
121 get_page(virt_to_page(i));
122 }
123
124 /*
125 * Change caching policy of the linear kernel map to avoid
126 * mapping type conflicts with user-space mappings.
127 */
128 set_pages_uc(virt_to_page(va->logical), va->size >> PAGE_SHIFT);
129
130 printk(KERN_DEBUG MODULE_NAME
131 ": Allocated %ld bytes vram area at 0x%08lx\n",
132 va->size, va->phys);
133
134 return 0;
135 }
136
137 /*
138 * Free a contiguous vram area and reset its linear kernel map
139 * mapping type.
140 */
141
142 static void vmlfb_free_vram_area(struct vram_area *va)
143 {
144 unsigned long j;
145
146 if (va->logical) {
147
148 /*
149 * Reset the linear kernel map caching policy.
150 */
151
152 set_pages_wb(virt_to_page(va->logical),
153 va->size >> PAGE_SHIFT);
154
155 /*
156 * Decrease the usage count on the pages we've used
157 * to compensate for upping when allocating.
158 */
159
160 for (j = va->logical; j < va->logical + va->size;
161 j += PAGE_SIZE) {
162 (void)put_page_testzero(virt_to_page(j));
163 }
164
165 printk(KERN_DEBUG MODULE_NAME
166 ": Freeing %ld bytes vram area at 0x%08lx\n",
167 va->size, va->phys);
168 free_pages(va->logical, va->order);
169
170 va->logical = 0;
171 }
172 }
173
174 /*
175 * Free allocated vram.
176 */
177
178 static void vmlfb_free_vram(struct vml_info *vinfo)
179 {
180 int i;
181
182 for (i = 0; i < vinfo->num_areas; ++i) {
183 vmlfb_free_vram_area(&vinfo->vram[i]);
184 }
185 vinfo->num_areas = 0;
186 }
187
188 /*
189 * Allocate vram. Currently we try to allocate contiguous areas from the
190 * __GFP_DMA zone and puzzle them together. A better approach would be to
191 * allocate one contiguous area for scanout and use one-page allocations for
192 * offscreen areas. This requires user-space and GPU virtual mappings.
193 */
194
195 static int vmlfb_alloc_vram(struct vml_info *vinfo,
196 size_t requested,
197 size_t min_total, size_t min_contig)
198 {
199 int i, j;
200 int order;
201 int contiguous;
202 int err;
203 struct vram_area *va;
204 struct vram_area *va2;
205
206 vinfo->num_areas = 0;
207 for (i = 0; i < VML_VRAM_AREAS; ++i) {
208 va = &vinfo->vram[i];
209 order = 0;
210
211 while (requested > (PAGE_SIZE << order) && order < MAX_ORDER)
212 order++;
213
214 err = vmlfb_alloc_vram_area(va, order, 0);
215
216 if (err)
217 break;
218
219 if (i == 0) {
220 vinfo->vram_start = va->phys;
221 vinfo->vram_logical = (void __iomem *) va->logical;
222 vinfo->vram_contig_size = va->size;
223 vinfo->num_areas = 1;
224 } else {
225 contiguous = 0;
226
227 for (j = 0; j < i; ++j) {
228 va2 = &vinfo->vram[j];
229 if (va->phys + va->size == va2->phys ||
230 va2->phys + va2->size == va->phys) {
231 contiguous = 1;
232 break;
233 }
234 }
235
236 if (contiguous) {
237 vinfo->num_areas++;
238 if (va->phys < vinfo->vram_start) {
239 vinfo->vram_start = va->phys;
240 vinfo->vram_logical =
241 (void __iomem *)va->logical;
242 }
243 vinfo->vram_contig_size += va->size;
244 } else {
245 vmlfb_free_vram_area(va);
246 break;
247 }
248 }
249
250 if (requested < va->size)
251 break;
252 else
253 requested -= va->size;
254 }
255
256 if (vinfo->vram_contig_size > min_total &&
257 vinfo->vram_contig_size > min_contig) {
258
259 printk(KERN_DEBUG MODULE_NAME
260 ": Contiguous vram: %ld bytes at physical 0x%08lx.\n",
261 (unsigned long)vinfo->vram_contig_size,
262 (unsigned long)vinfo->vram_start);
263
264 return 0;
265 }
266
267 printk(KERN_ERR MODULE_NAME
268 ": Could not allocate requested minimal amount of vram.\n");
269
270 vmlfb_free_vram(vinfo);
271
272 return -ENOMEM;
273 }
274
275 /*
276 * Find the GPU to use with our display controller.
277 */
278
279 static int vmlfb_get_gpu(struct vml_par *par)
280 {
281 mutex_lock(&vml_mutex);
282
283 par->gpu = pci_get_device(PCI_VENDOR_ID_INTEL, VML_DEVICE_GPU, NULL);
284
285 if (!par->gpu) {
286 mutex_unlock(&vml_mutex);
287 return -ENODEV;
288 }
289
290 mutex_unlock(&vml_mutex);
291
292 if (pci_enable_device(par->gpu) < 0)
293 return -ENODEV;
294
295 return 0;
296 }
297
298 /*
299 * Find a contiguous vram area that contains a given offset from vram start.
300 */
301 static int vmlfb_vram_offset(struct vml_info *vinfo, unsigned long offset)
302 {
303 unsigned long aoffset;
304 unsigned i;
305
306 for (i = 0; i < vinfo->num_areas; ++i) {
307 aoffset = offset - (vinfo->vram[i].phys - vinfo->vram_start);
308
309 if (aoffset < vinfo->vram[i].size) {
310 return 0;
311 }
312 }
313
314 return -EINVAL;
315 }
316
317 /*
318 * Remap the MMIO register spaces of the VDC and the GPU.
319 */
320
321 static int vmlfb_enable_mmio(struct vml_par *par)
322 {
323 int err;
324
325 par->vdc_mem_base = pci_resource_start(par->vdc, 0);
326 par->vdc_mem_size = pci_resource_len(par->vdc, 0);
327 if (!request_mem_region(par->vdc_mem_base, par->vdc_mem_size, "vmlfb")) {
328 printk(KERN_ERR MODULE_NAME
329 ": Could not claim display controller MMIO.\n");
330 return -EBUSY;
331 }
332 par->vdc_mem = ioremap_nocache(par->vdc_mem_base, par->vdc_mem_size);
333 if (par->vdc_mem == NULL) {
334 printk(KERN_ERR MODULE_NAME
335 ": Could not map display controller MMIO.\n");
336 err = -ENOMEM;
337 goto out_err_0;
338 }
339
340 par->gpu_mem_base = pci_resource_start(par->gpu, 0);
341 par->gpu_mem_size = pci_resource_len(par->gpu, 0);
342 if (!request_mem_region(par->gpu_mem_base, par->gpu_mem_size, "vmlfb")) {
343 printk(KERN_ERR MODULE_NAME ": Could not claim GPU MMIO.\n");
344 err = -EBUSY;
345 goto out_err_1;
346 }
347 par->gpu_mem = ioremap_nocache(par->gpu_mem_base, par->gpu_mem_size);
348 if (par->gpu_mem == NULL) {
349 printk(KERN_ERR MODULE_NAME ": Could not map GPU MMIO.\n");
350 err = -ENOMEM;
351 goto out_err_2;
352 }
353
354 return 0;
355
356 out_err_2:
357 release_mem_region(par->gpu_mem_base, par->gpu_mem_size);
358 out_err_1:
359 iounmap(par->vdc_mem);
360 out_err_0:
361 release_mem_region(par->vdc_mem_base, par->vdc_mem_size);
362 return err;
363 }
364
365 /*
366 * Unmap the VDC and GPU register spaces.
367 */
368
369 static void vmlfb_disable_mmio(struct vml_par *par)
370 {
371 iounmap(par->gpu_mem);
372 release_mem_region(par->gpu_mem_base, par->gpu_mem_size);
373 iounmap(par->vdc_mem);
374 release_mem_region(par->vdc_mem_base, par->vdc_mem_size);
375 }
376
377 /*
378 * Release and uninit the VDC and GPU.
379 */
380
381 static void vmlfb_release_devices(struct vml_par *par)
382 {
383 if (atomic_dec_and_test(&par->refcount)) {
384 pci_set_drvdata(par->vdc, NULL);
385 pci_disable_device(par->gpu);
386 pci_disable_device(par->vdc);
387 }
388 }
389
390 /*
391 * Free up allocated resources for a device.
392 */
393
394 static void __devexit vml_pci_remove(struct pci_dev *dev)
395 {
396 struct fb_info *info;
397 struct vml_info *vinfo;
398 struct vml_par *par;
399
400 info = pci_get_drvdata(dev);
401 if (info) {
402 vinfo = container_of(info, struct vml_info, info);
403 par = vinfo->par;
404 mutex_lock(&vml_mutex);
405 unregister_framebuffer(info);
406 fb_dealloc_cmap(&info->cmap);
407 vmlfb_free_vram(vinfo);
408 vmlfb_disable_mmio(par);
409 vmlfb_release_devices(par);
410 kfree(vinfo);
411 kfree(par);
412 mutex_unlock(&vml_mutex);
413 }
414 }
415
416 static void vmlfb_set_pref_pixel_format(struct fb_var_screeninfo *var)
417 {
418 switch (var->bits_per_pixel) {
419 case 16:
420 var->blue.offset = 0;
421 var->blue.length = 5;
422 var->green.offset = 5;
423 var->green.length = 5;
424 var->red.offset = 10;
425 var->red.length = 5;
426 var->transp.offset = 15;
427 var->transp.length = 1;
428 break;
429 case 32:
430 var->blue.offset = 0;
431 var->blue.length = 8;
432 var->green.offset = 8;
433 var->green.length = 8;
434 var->red.offset = 16;
435 var->red.length = 8;
436 var->transp.offset = 24;
437 var->transp.length = 0;
438 break;
439 default:
440 break;
441 }
442
443 var->blue.msb_right = var->green.msb_right =
444 var->red.msb_right = var->transp.msb_right = 0;
445 }
446
447 /*
448 * Device initialization.
449 * We initialize one vml_par struct per device and one vml_info
450 * struct per pipe. Currently we have only one pipe.
451 */
452
453 static int __devinit vml_pci_probe(struct pci_dev *dev,
454 const struct pci_device_id *id)
455 {
456 struct vml_info *vinfo;
457 struct fb_info *info;
458 struct vml_par *par;
459 int err = 0;
460
461 par = kzalloc(sizeof(*par), GFP_KERNEL);
462 if (par == NULL)
463 return -ENOMEM;
464
465 vinfo = kzalloc(sizeof(*vinfo), GFP_KERNEL);
466 if (vinfo == NULL) {
467 err = -ENOMEM;
468 goto out_err_0;
469 }
470
471 vinfo->par = par;
472 par->vdc = dev;
473 atomic_set(&par->refcount, 1);
474
475 switch (id->device) {
476 case VML_DEVICE_VDC:
477 if ((err = vmlfb_get_gpu(par)))
478 goto out_err_1;
479 pci_set_drvdata(dev, &vinfo->info);
480 break;
481 default:
482 err = -ENODEV;
483 goto out_err_1;
484 break;
485 }
486
487 info = &vinfo->info;
488 info->flags = FBINFO_DEFAULT | FBINFO_PARTIAL_PAN_OK;
489
490 err = vmlfb_enable_mmio(par);
491 if (err)
492 goto out_err_2;
493
494 err = vmlfb_alloc_vram(vinfo, vml_mem_requested,
495 vml_mem_contig, vml_mem_min);
496 if (err)
497 goto out_err_3;
498
499 strcpy(info->fix.id, "Vermilion Range");
500 info->fix.mmio_start = 0;
501 info->fix.mmio_len = 0;
502 info->fix.smem_start = vinfo->vram_start;
503 info->fix.smem_len = vinfo->vram_contig_size;
504 info->fix.type = FB_TYPE_PACKED_PIXELS;
505 info->fix.visual = FB_VISUAL_TRUECOLOR;
506 info->fix.ypanstep = 1;
507 info->fix.xpanstep = 1;
508 info->fix.ywrapstep = 0;
509 info->fix.accel = FB_ACCEL_NONE;
510 info->screen_base = vinfo->vram_logical;
511 info->pseudo_palette = vinfo->pseudo_palette;
512 info->par = par;
513 info->fbops = &vmlfb_ops;
514 info->device = &dev->dev;
515
516 INIT_LIST_HEAD(&vinfo->head);
517 vinfo->pipe_disabled = 1;
518 vinfo->cur_blank_mode = FB_BLANK_UNBLANK;
519
520 info->var.grayscale = 0;
521 info->var.bits_per_pixel = 16;
522 vmlfb_set_pref_pixel_format(&info->var);
523
524 if (!fb_find_mode
525 (&info->var, info, vml_default_mode, NULL, 0, &defaultmode, 16)) {
526 printk(KERN_ERR MODULE_NAME ": Could not find initial mode\n");
527 }
528
529 if (fb_alloc_cmap(&info->cmap, 256, 1) < 0) {
530 err = -ENOMEM;
531 goto out_err_4;
532 }
533
534 err = register_framebuffer(info);
535 if (err) {
536 printk(KERN_ERR MODULE_NAME ": Register framebuffer error.\n");
537 goto out_err_5;
538 }
539
540 printk("Initialized vmlfb\n");
541
542 return 0;
543
544 out_err_5:
545 fb_dealloc_cmap(&info->cmap);
546 out_err_4:
547 vmlfb_free_vram(vinfo);
548 out_err_3:
549 vmlfb_disable_mmio(par);
550 out_err_2:
551 vmlfb_release_devices(par);
552 out_err_1:
553 kfree(vinfo);
554 out_err_0:
555 kfree(par);
556 return err;
557 }
558
559 static int vmlfb_open(struct fb_info *info, int user)
560 {
561 /*
562 * Save registers here?
563 */
564 return 0;
565 }
566
567 static int vmlfb_release(struct fb_info *info, int user)
568 {
569 /*
570 * Restore registers here.
571 */
572
573 return 0;
574 }
575
576 static int vml_nearest_clock(int clock)
577 {
578
579 int i;
580 int cur_index;
581 int cur_diff;
582 int diff;
583
584 cur_index = 0;
585 cur_diff = clock - vml_clocks[0];
586 cur_diff = (cur_diff < 0) ? -cur_diff : cur_diff;
587 for (i = 1; i < vml_num_clocks; ++i) {
588 diff = clock - vml_clocks[i];
589 diff = (diff < 0) ? -diff : diff;
590 if (diff < cur_diff) {
591 cur_index = i;
592 cur_diff = diff;
593 }
594 }
595 return vml_clocks[cur_index];
596 }
597
598 static int vmlfb_check_var_locked(struct fb_var_screeninfo *var,
599 struct vml_info *vinfo)
600 {
601 u32 pitch;
602 u64 mem;
603 int nearest_clock;
604 int clock;
605 int clock_diff;
606 struct fb_var_screeninfo v;
607
608 v = *var;
609 clock = PICOS2KHZ(var->pixclock);
610
611 if (subsys && subsys->nearest_clock) {
612 nearest_clock = subsys->nearest_clock(subsys, clock);
613 } else {
614 nearest_clock = vml_nearest_clock(clock);
615 }
616
617 /*
618 * Accept a 20% diff.
619 */
620
621 clock_diff = nearest_clock - clock;
622 clock_diff = (clock_diff < 0) ? -clock_diff : clock_diff;
623 if (clock_diff > clock / 5) {
624 #if 0
625 printk(KERN_DEBUG MODULE_NAME ": Diff failure. %d %d\n",clock_diff,clock);
626 #endif
627 return -EINVAL;
628 }
629
630 v.pixclock = KHZ2PICOS(nearest_clock);
631
632 if (var->xres > VML_MAX_XRES || var->yres > VML_MAX_YRES) {
633 printk(KERN_DEBUG MODULE_NAME ": Resolution failure.\n");
634 return -EINVAL;
635 }
636 if (var->xres_virtual > VML_MAX_XRES_VIRTUAL) {
637 printk(KERN_DEBUG MODULE_NAME
638 ": Virtual resolution failure.\n");
639 return -EINVAL;
640 }
641 switch (v.bits_per_pixel) {
642 case 0 ... 16:
643 v.bits_per_pixel = 16;
644 break;
645 case 17 ... 32:
646 v.bits_per_pixel = 32;
647 break;
648 default:
649 printk(KERN_DEBUG MODULE_NAME ": Invalid bpp: %d.\n",
650 var->bits_per_pixel);
651 return -EINVAL;
652 }
653
654 pitch = ALIGN((var->xres * var->bits_per_pixel) >> 3, 0x40);
655 mem = pitch * var->yres_virtual;
656 if (mem > vinfo->vram_contig_size) {
657 return -ENOMEM;
658 }
659
660 switch (v.bits_per_pixel) {
661 case 16:
662 if (var->blue.offset != 0 ||
663 var->blue.length != 5 ||
664 var->green.offset != 5 ||
665 var->green.length != 5 ||
666 var->red.offset != 10 ||
667 var->red.length != 5 ||
668 var->transp.offset != 15 || var->transp.length != 1) {
669 vmlfb_set_pref_pixel_format(&v);
670 }
671 break;
672 case 32:
673 if (var->blue.offset != 0 ||
674 var->blue.length != 8 ||
675 var->green.offset != 8 ||
676 var->green.length != 8 ||
677 var->red.offset != 16 ||
678 var->red.length != 8 ||
679 (var->transp.length != 0 && var->transp.length != 8) ||
680 (var->transp.length == 8 && var->transp.offset != 24)) {
681 vmlfb_set_pref_pixel_format(&v);
682 }
683 break;
684 default:
685 return -EINVAL;
686 }
687
688 *var = v;
689
690 return 0;
691 }
692
693 static int vmlfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
694 {
695 struct vml_info *vinfo = container_of(info, struct vml_info, info);
696 int ret;
697
698 mutex_lock(&vml_mutex);
699 ret = vmlfb_check_var_locked(var, vinfo);
700 mutex_unlock(&vml_mutex);
701
702 return ret;
703 }
704
705 static void vml_wait_vblank(struct vml_info *vinfo)
706 {
707 /* Wait for vblank. For now, just wait for a 50Hz cycle (20ms)) */
708 mdelay(20);
709 }
710
711 static void vmlfb_disable_pipe(struct vml_info *vinfo)
712 {
713 struct vml_par *par = vinfo->par;
714
715 /* Disable the MDVO pad */
716 VML_WRITE32(par, VML_RCOMPSTAT, 0);
717 while (!(VML_READ32(par, VML_RCOMPSTAT) & VML_MDVO_VDC_I_RCOMP)) ;
718
719 /* Disable display planes */
720 VML_WRITE32(par, VML_DSPCCNTR,
721 VML_READ32(par, VML_DSPCCNTR) & ~VML_GFX_ENABLE);
722 (void)VML_READ32(par, VML_DSPCCNTR);
723 /* Wait for vblank for the disable to take effect */
724 vml_wait_vblank(vinfo);
725
726 /* Next, disable display pipes */
727 VML_WRITE32(par, VML_PIPEACONF, 0);
728 (void)VML_READ32(par, VML_PIPEACONF);
729
730 vinfo->pipe_disabled = 1;
731 }
732
733 #ifdef VERMILION_DEBUG
734 static void vml_dump_regs(struct vml_info *vinfo)
735 {
736 struct vml_par *par = vinfo->par;
737
738 printk(KERN_DEBUG MODULE_NAME ": Modesetting register dump:\n");
739 printk(KERN_DEBUG MODULE_NAME ": \tHTOTAL_A : 0x%08x\n",
740 (unsigned)VML_READ32(par, VML_HTOTAL_A));
741 printk(KERN_DEBUG MODULE_NAME ": \tHBLANK_A : 0x%08x\n",
742 (unsigned)VML_READ32(par, VML_HBLANK_A));
743 printk(KERN_DEBUG MODULE_NAME ": \tHSYNC_A : 0x%08x\n",
744 (unsigned)VML_READ32(par, VML_HSYNC_A));
745 printk(KERN_DEBUG MODULE_NAME ": \tVTOTAL_A : 0x%08x\n",
746 (unsigned)VML_READ32(par, VML_VTOTAL_A));
747 printk(KERN_DEBUG MODULE_NAME ": \tVBLANK_A : 0x%08x\n",
748 (unsigned)VML_READ32(par, VML_VBLANK_A));
749 printk(KERN_DEBUG MODULE_NAME ": \tVSYNC_A : 0x%08x\n",
750 (unsigned)VML_READ32(par, VML_VSYNC_A));
751 printk(KERN_DEBUG MODULE_NAME ": \tDSPCSTRIDE : 0x%08x\n",
752 (unsigned)VML_READ32(par, VML_DSPCSTRIDE));
753 printk(KERN_DEBUG MODULE_NAME ": \tDSPCSIZE : 0x%08x\n",
754 (unsigned)VML_READ32(par, VML_DSPCSIZE));
755 printk(KERN_DEBUG MODULE_NAME ": \tDSPCPOS : 0x%08x\n",
756 (unsigned)VML_READ32(par, VML_DSPCPOS));
757 printk(KERN_DEBUG MODULE_NAME ": \tDSPARB : 0x%08x\n",
758 (unsigned)VML_READ32(par, VML_DSPARB));
759 printk(KERN_DEBUG MODULE_NAME ": \tDSPCADDR : 0x%08x\n",
760 (unsigned)VML_READ32(par, VML_DSPCADDR));
761 printk(KERN_DEBUG MODULE_NAME ": \tBCLRPAT_A : 0x%08x\n",
762 (unsigned)VML_READ32(par, VML_BCLRPAT_A));
763 printk(KERN_DEBUG MODULE_NAME ": \tCANVSCLR_A : 0x%08x\n",
764 (unsigned)VML_READ32(par, VML_CANVSCLR_A));
765 printk(KERN_DEBUG MODULE_NAME ": \tPIPEASRC : 0x%08x\n",
766 (unsigned)VML_READ32(par, VML_PIPEASRC));
767 printk(KERN_DEBUG MODULE_NAME ": \tPIPEACONF : 0x%08x\n",
768 (unsigned)VML_READ32(par, VML_PIPEACONF));
769 printk(KERN_DEBUG MODULE_NAME ": \tDSPCCNTR : 0x%08x\n",
770 (unsigned)VML_READ32(par, VML_DSPCCNTR));
771 printk(KERN_DEBUG MODULE_NAME ": \tRCOMPSTAT : 0x%08x\n",
772 (unsigned)VML_READ32(par, VML_RCOMPSTAT));
773 printk(KERN_DEBUG MODULE_NAME ": End of modesetting register dump.\n");
774 }
775 #endif
776
777 static int vmlfb_set_par_locked(struct vml_info *vinfo)
778 {
779 struct vml_par *par = vinfo->par;
780 struct fb_info *info = &vinfo->info;
781 struct fb_var_screeninfo *var = &info->var;
782 u32 htotal, hactive, hblank_start, hblank_end, hsync_start, hsync_end;
783 u32 vtotal, vactive, vblank_start, vblank_end, vsync_start, vsync_end;
784 u32 dspcntr;
785 int clock;
786
787 vinfo->bytes_per_pixel = var->bits_per_pixel >> 3;
788 vinfo->stride = ALIGN(var->xres_virtual * vinfo->bytes_per_pixel, 0x40);
789 info->fix.line_length = vinfo->stride;
790
791 if (!subsys)
792 return 0;
793
794 htotal =
795 var->xres + var->right_margin + var->hsync_len + var->left_margin;
796 hactive = var->xres;
797 hblank_start = var->xres;
798 hblank_end = htotal;
799 hsync_start = hactive + var->right_margin;
800 hsync_end = hsync_start + var->hsync_len;
801
802 vtotal =
803 var->yres + var->lower_margin + var->vsync_len + var->upper_margin;
804 vactive = var->yres;
805 vblank_start = var->yres;
806 vblank_end = vtotal;
807 vsync_start = vactive + var->lower_margin;
808 vsync_end = vsync_start + var->vsync_len;
809
810 dspcntr = VML_GFX_ENABLE | VML_GFX_GAMMABYPASS;
811 clock = PICOS2KHZ(var->pixclock);
812
813 if (subsys->nearest_clock) {
814 clock = subsys->nearest_clock(subsys, clock);
815 } else {
816 clock = vml_nearest_clock(clock);
817 }
818 printk(KERN_DEBUG MODULE_NAME
819 ": Set mode Hfreq : %d kHz, Vfreq : %d Hz.\n", clock / htotal,
820 ((clock / htotal) * 1000) / vtotal);
821
822 switch (var->bits_per_pixel) {
823 case 16:
824 dspcntr |= VML_GFX_ARGB1555;
825 break;
826 case 32:
827 if (var->transp.length == 8)
828 dspcntr |= VML_GFX_ARGB8888 | VML_GFX_ALPHAMULT;
829 else
830 dspcntr |= VML_GFX_RGB0888;
831 break;
832 default:
833 return -EINVAL;
834 }
835
836 vmlfb_disable_pipe(vinfo);
837 mb();
838
839 if (subsys->set_clock)
840 subsys->set_clock(subsys, clock);
841 else
842 return -EINVAL;
843
844 VML_WRITE32(par, VML_HTOTAL_A, ((htotal - 1) << 16) | (hactive - 1));
845 VML_WRITE32(par, VML_HBLANK_A,
846 ((hblank_end - 1) << 16) | (hblank_start - 1));
847 VML_WRITE32(par, VML_HSYNC_A,
848 ((hsync_end - 1) << 16) | (hsync_start - 1));
849 VML_WRITE32(par, VML_VTOTAL_A, ((vtotal - 1) << 16) | (vactive - 1));
850 VML_WRITE32(par, VML_VBLANK_A,
851 ((vblank_end - 1) << 16) | (vblank_start - 1));
852 VML_WRITE32(par, VML_VSYNC_A,
853 ((vsync_end - 1) << 16) | (vsync_start - 1));
854 VML_WRITE32(par, VML_DSPCSTRIDE, vinfo->stride);
855 VML_WRITE32(par, VML_DSPCSIZE,
856 ((var->yres - 1) << 16) | (var->xres - 1));
857 VML_WRITE32(par, VML_DSPCPOS, 0x00000000);
858 VML_WRITE32(par, VML_DSPARB, VML_FIFO_DEFAULT);
859 VML_WRITE32(par, VML_BCLRPAT_A, 0x00000000);
860 VML_WRITE32(par, VML_CANVSCLR_A, 0x00000000);
861 VML_WRITE32(par, VML_PIPEASRC,
862 ((var->xres - 1) << 16) | (var->yres - 1));
863
864 wmb();
865 VML_WRITE32(par, VML_PIPEACONF, VML_PIPE_ENABLE);
866 wmb();
867 VML_WRITE32(par, VML_DSPCCNTR, dspcntr);
868 wmb();
869 VML_WRITE32(par, VML_DSPCADDR, (u32) vinfo->vram_start +
870 var->yoffset * vinfo->stride +
871 var->xoffset * vinfo->bytes_per_pixel);
872
873 VML_WRITE32(par, VML_RCOMPSTAT, VML_MDVO_PAD_ENABLE);
874
875 while (!(VML_READ32(par, VML_RCOMPSTAT) &
876 (VML_MDVO_VDC_I_RCOMP | VML_MDVO_PAD_ENABLE))) ;
877
878 vinfo->pipe_disabled = 0;
879 #ifdef VERMILION_DEBUG
880 vml_dump_regs(vinfo);
881 #endif
882
883 return 0;
884 }
885
886 static int vmlfb_set_par(struct fb_info *info)
887 {
888 struct vml_info *vinfo = container_of(info, struct vml_info, info);
889 int ret;
890
891 mutex_lock(&vml_mutex);
892 list_del(&vinfo->head);
893 list_add(&vinfo->head, (subsys) ? &global_has_mode : &global_no_mode);
894 ret = vmlfb_set_par_locked(vinfo);
895
896 mutex_unlock(&vml_mutex);
897 return ret;
898 }
899
900 static int vmlfb_blank_locked(struct vml_info *vinfo)
901 {
902 struct vml_par *par = vinfo->par;
903 u32 cur = VML_READ32(par, VML_PIPEACONF);
904
905 switch (vinfo->cur_blank_mode) {
906 case FB_BLANK_UNBLANK:
907 if (vinfo->pipe_disabled) {
908 vmlfb_set_par_locked(vinfo);
909 }
910 VML_WRITE32(par, VML_PIPEACONF, cur & ~VML_PIPE_FORCE_BORDER);
911 (void)VML_READ32(par, VML_PIPEACONF);
912 break;
913 case FB_BLANK_NORMAL:
914 if (vinfo->pipe_disabled) {
915 vmlfb_set_par_locked(vinfo);
916 }
917 VML_WRITE32(par, VML_PIPEACONF, cur | VML_PIPE_FORCE_BORDER);
918 (void)VML_READ32(par, VML_PIPEACONF);
919 break;
920 case FB_BLANK_VSYNC_SUSPEND:
921 case FB_BLANK_HSYNC_SUSPEND:
922 if (!vinfo->pipe_disabled) {
923 vmlfb_disable_pipe(vinfo);
924 }
925 break;
926 case FB_BLANK_POWERDOWN:
927 if (!vinfo->pipe_disabled) {
928 vmlfb_disable_pipe(vinfo);
929 }
930 break;
931 default:
932 return -EINVAL;
933 }
934
935 return 0;
936 }
937
938 static int vmlfb_blank(int blank_mode, struct fb_info *info)
939 {
940 struct vml_info *vinfo = container_of(info, struct vml_info, info);
941 int ret;
942
943 mutex_lock(&vml_mutex);
944 vinfo->cur_blank_mode = blank_mode;
945 ret = vmlfb_blank_locked(vinfo);
946 mutex_unlock(&vml_mutex);
947 return ret;
948 }
949
950 static int vmlfb_pan_display(struct fb_var_screeninfo *var,
951 struct fb_info *info)
952 {
953 struct vml_info *vinfo = container_of(info, struct vml_info, info);
954 struct vml_par *par = vinfo->par;
955
956 mutex_lock(&vml_mutex);
957 VML_WRITE32(par, VML_DSPCADDR, (u32) vinfo->vram_start +
958 var->yoffset * vinfo->stride +
959 var->xoffset * vinfo->bytes_per_pixel);
960 (void)VML_READ32(par, VML_DSPCADDR);
961 mutex_unlock(&vml_mutex);
962
963 return 0;
964 }
965
966 static int vmlfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
967 u_int transp, struct fb_info *info)
968 {
969 u32 v;
970
971 if (regno >= 16)
972 return -EINVAL;
973
974 if (info->var.grayscale) {
975 red = green = blue = (red * 77 + green * 151 + blue * 28) >> 8;
976 }
977
978 if (info->fix.visual != FB_VISUAL_TRUECOLOR)
979 return -EINVAL;
980
981 red = VML_TOHW(red, info->var.red.length);
982 blue = VML_TOHW(blue, info->var.blue.length);
983 green = VML_TOHW(green, info->var.green.length);
984 transp = VML_TOHW(transp, info->var.transp.length);
985
986 v = (red << info->var.red.offset) |
987 (green << info->var.green.offset) |
988 (blue << info->var.blue.offset) |
989 (transp << info->var.transp.offset);
990
991 switch (info->var.bits_per_pixel) {
992 case 16:
993 ((u32 *) info->pseudo_palette)[regno] = v;
994 break;
995 case 24:
996 case 32:
997 ((u32 *) info->pseudo_palette)[regno] = v;
998 break;
999 }
1000 return 0;
1001 }
1002
1003 static int vmlfb_mmap(struct fb_info *info, struct vm_area_struct *vma)
1004 {
1005 struct vml_info *vinfo = container_of(info, struct vml_info, info);
1006 unsigned long size = vma->vm_end - vma->vm_start;
1007 unsigned long offset = vma->vm_pgoff << PAGE_SHIFT;
1008 int ret;
1009
1010 if (vma->vm_pgoff > (~0UL >> PAGE_SHIFT))
1011 return -EINVAL;
1012 if (offset + size > vinfo->vram_contig_size)
1013 return -EINVAL;
1014 ret = vmlfb_vram_offset(vinfo, offset);
1015 if (ret)
1016 return -EINVAL;
1017 offset += vinfo->vram_start;
1018 pgprot_val(vma->vm_page_prot) |= _PAGE_PCD;
1019 pgprot_val(vma->vm_page_prot) &= ~_PAGE_PWT;
1020 vma->vm_flags |= VM_RESERVED | VM_IO;
1021 if (remap_pfn_range(vma, vma->vm_start, offset >> PAGE_SHIFT,
1022 size, vma->vm_page_prot))
1023 return -EAGAIN;
1024 return 0;
1025 }
1026
1027 static int vmlfb_sync(struct fb_info *info)
1028 {
1029 return 0;
1030 }
1031
1032 static int vmlfb_cursor(struct fb_info *info, struct fb_cursor *cursor)
1033 {
1034 return -EINVAL; /* just to force soft_cursor() call */
1035 }
1036
1037 static struct fb_ops vmlfb_ops = {
1038 .owner = THIS_MODULE,
1039 .fb_open = vmlfb_open,
1040 .fb_release = vmlfb_release,
1041 .fb_check_var = vmlfb_check_var,
1042 .fb_set_par = vmlfb_set_par,
1043 .fb_blank = vmlfb_blank,
1044 .fb_pan_display = vmlfb_pan_display,
1045 .fb_fillrect = cfb_fillrect,
1046 .fb_copyarea = cfb_copyarea,
1047 .fb_imageblit = cfb_imageblit,
1048 .fb_cursor = vmlfb_cursor,
1049 .fb_sync = vmlfb_sync,
1050 .fb_mmap = vmlfb_mmap,
1051 .fb_setcolreg = vmlfb_setcolreg
1052 };
1053
1054 static struct pci_device_id vml_ids[] = {
1055 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, VML_DEVICE_VDC)},
1056 {0}
1057 };
1058
1059 static struct pci_driver vmlfb_pci_driver = {
1060 .name = "vmlfb",
1061 .id_table = vml_ids,
1062 .probe = vml_pci_probe,
1063 .remove = __devexit_p(vml_pci_remove)
1064 };
1065
1066 static void __exit vmlfb_cleanup(void)
1067 {
1068 pci_unregister_driver(&vmlfb_pci_driver);
1069 }
1070
1071 static int __init vmlfb_init(void)
1072 {
1073
1074 #ifndef MODULE
1075 char *option = NULL;
1076
1077 if (fb_get_options(MODULE_NAME, &option))
1078 return -ENODEV;
1079 #endif
1080
1081 printk(KERN_DEBUG MODULE_NAME ": initializing\n");
1082 mutex_init(&vml_mutex);
1083 INIT_LIST_HEAD(&global_no_mode);
1084 INIT_LIST_HEAD(&global_has_mode);
1085
1086 return pci_register_driver(&vmlfb_pci_driver);
1087 }
1088
1089 int vmlfb_register_subsys(struct vml_sys *sys)
1090 {
1091 struct vml_info *entry;
1092 struct list_head *list;
1093 u32 save_activate;
1094
1095 mutex_lock(&vml_mutex);
1096 if (subsys != NULL) {
1097 subsys->restore(subsys);
1098 }
1099 subsys = sys;
1100 subsys->save(subsys);
1101
1102 /*
1103 * We need to restart list traversal for each item, since we
1104 * release the list mutex in the loop.
1105 */
1106
1107 list = global_no_mode.next;
1108 while (list != &global_no_mode) {
1109 list_del_init(list);
1110 entry = list_entry(list, struct vml_info, head);
1111
1112 /*
1113 * First, try the current mode which might not be
1114 * completely validated with respect to the pixel clock.
1115 */
1116
1117 if (!vmlfb_check_var_locked(&entry->info.var, entry)) {
1118 vmlfb_set_par_locked(entry);
1119 list_add_tail(list, &global_has_mode);
1120 } else {
1121
1122 /*
1123 * Didn't work. Try to find another mode,
1124 * that matches this subsys.
1125 */
1126
1127 mutex_unlock(&vml_mutex);
1128 save_activate = entry->info.var.activate;
1129 entry->info.var.bits_per_pixel = 16;
1130 vmlfb_set_pref_pixel_format(&entry->info.var);
1131 if (fb_find_mode(&entry->info.var,
1132 &entry->info,
1133 vml_default_mode, NULL, 0, NULL, 16)) {
1134 entry->info.var.activate |=
1135 FB_ACTIVATE_FORCE | FB_ACTIVATE_NOW;
1136 fb_set_var(&entry->info, &entry->info.var);
1137 } else {
1138 printk(KERN_ERR MODULE_NAME
1139 ": Sorry. no mode found for this subsys.\n");
1140 }
1141 entry->info.var.activate = save_activate;
1142 mutex_lock(&vml_mutex);
1143 }
1144 vmlfb_blank_locked(entry);
1145 list = global_no_mode.next;
1146 }
1147 mutex_unlock(&vml_mutex);
1148
1149 printk(KERN_DEBUG MODULE_NAME ": Registered %s subsystem.\n",
1150 subsys->name ? subsys->name : "unknown");
1151 return 0;
1152 }
1153
1154 EXPORT_SYMBOL_GPL(vmlfb_register_subsys);
1155
1156 void vmlfb_unregister_subsys(struct vml_sys *sys)
1157 {
1158 struct vml_info *entry, *next;
1159
1160 mutex_lock(&vml_mutex);
1161 if (subsys != sys) {
1162 mutex_unlock(&vml_mutex);
1163 return;
1164 }
1165 subsys->restore(subsys);
1166 subsys = NULL;
1167 list_for_each_entry_safe(entry, next, &global_has_mode, head) {
1168 printk(KERN_DEBUG MODULE_NAME ": subsys disable pipe\n");
1169 vmlfb_disable_pipe(entry);
1170 list_del(&entry->head);
1171 list_add_tail(&entry->head, &global_no_mode);
1172 }
1173 mutex_unlock(&vml_mutex);
1174 }
1175
1176 EXPORT_SYMBOL_GPL(vmlfb_unregister_subsys);
1177
1178 module_init(vmlfb_init);
1179 module_exit(vmlfb_cleanup);
1180
1181 MODULE_AUTHOR("Tungsten Graphics");
1182 MODULE_DESCRIPTION("Initialization of the Vermilion display devices");
1183 MODULE_VERSION("1.0.0");
1184 MODULE_LICENSE("GPL");
WRT350N Kernel Patches