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Merge master.kernel.org:/pub/scm/linux/kernel/git/davem/net-2.6
[wrt350n-kernel.git] / drivers / video / offb.c
blobad1434e3f2277ff33bbc5dad7224ceff8e7da4a5
1 /*
2 * linux/drivers/video/offb.c -- Open Firmware based frame buffer device
3 *
4 * Copyright (C) 1997 Geert Uytterhoeven
5 *
6 * This driver is partly based on the PowerMac console driver:
7 *
8 * Copyright (C) 1996 Paul Mackerras
9 *
10 * This file is subject to the terms and conditions of the GNU General Public
11 * License. See the file COPYING in the main directory of this archive for
12 * more details.
13 */
14
15 #include <linux/config.h>
16 #include <linux/module.h>
17 #include <linux/kernel.h>
18 #include <linux/errno.h>
19 #include <linux/string.h>
20 #include <linux/mm.h>
21 #include <linux/tty.h>
22 #include <linux/slab.h>
23 #include <linux/vmalloc.h>
24 #include <linux/delay.h>
25 #include <linux/interrupt.h>
26 #include <linux/fb.h>
27 #include <linux/init.h>
28 #include <linux/ioport.h>
29 #include <linux/pci.h>
30 #include <asm/io.h>
31 #include <asm/prom.h>
32
33 #ifdef CONFIG_PPC64
34 #include <asm/pci-bridge.h>
35 #endif
36
37 #ifdef CONFIG_PPC32
38 #include <asm/bootx.h>
39 #endif
40
41 #include "macmodes.h"
42
43 /* Supported palette hacks */
44 enum {
45 cmap_unknown,
46 cmap_m64, /* ATI Mach64 */
47 cmap_r128, /* ATI Rage128 */
48 cmap_M3A, /* ATI Rage Mobility M3 Head A */
49 cmap_M3B, /* ATI Rage Mobility M3 Head B */
50 cmap_radeon, /* ATI Radeon */
51 cmap_gxt2000, /* IBM GXT2000 */
52 };
53
54 struct offb_par {
55 volatile void __iomem *cmap_adr;
56 volatile void __iomem *cmap_data;
57 int cmap_type;
58 int blanked;
59 };
60
61 struct offb_par default_par;
62
63 /*
64 * Interface used by the world
65 */
66
67 int offb_init(void);
68
69 static int offb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
70 u_int transp, struct fb_info *info);
71 static int offb_blank(int blank, struct fb_info *info);
72
73 #ifdef CONFIG_PPC32
74 extern boot_infos_t *boot_infos;
75 #endif
76
77 static void offb_init_nodriver(struct device_node *);
78 static void offb_init_fb(const char *name, const char *full_name,
79 int width, int height, int depth, int pitch,
80 unsigned long address, struct device_node *dp);
81
82 static struct fb_ops offb_ops = {
83 .owner = THIS_MODULE,
84 .fb_setcolreg = offb_setcolreg,
85 .fb_blank = offb_blank,
86 .fb_fillrect = cfb_fillrect,
87 .fb_copyarea = cfb_copyarea,
88 .fb_imageblit = cfb_imageblit,
89 };
90
91 /*
92 * Set a single color register. The values supplied are already
93 * rounded down to the hardware's capabilities (according to the
94 * entries in the var structure). Return != 0 for invalid regno.
95 */
96
97 static int offb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
98 u_int transp, struct fb_info *info)
99 {
100 struct offb_par *par = (struct offb_par *) info->par;
101
102 if (!par->cmap_adr || regno > 255)
103 return 1;
104
105 red >>= 8;
106 green >>= 8;
107 blue >>= 8;
108
109 switch (par->cmap_type) {
110 case cmap_m64:
111 writeb(regno, par->cmap_adr);
112 writeb(red, par->cmap_data);
113 writeb(green, par->cmap_data);
114 writeb(blue, par->cmap_data);
115 break;
116 case cmap_M3A:
117 /* Clear PALETTE_ACCESS_CNTL in DAC_CNTL */
118 out_le32(par->cmap_adr + 0x58,
119 in_le32(par->cmap_adr + 0x58) & ~0x20);
120 case cmap_r128:
121 /* Set palette index & data */
122 out_8(par->cmap_adr + 0xb0, regno);
123 out_le32(par->cmap_adr + 0xb4,
124 (red << 16 | green << 8 | blue));
125 break;
126 case cmap_M3B:
127 /* Set PALETTE_ACCESS_CNTL in DAC_CNTL */
128 out_le32(par->cmap_adr + 0x58,
129 in_le32(par->cmap_adr + 0x58) | 0x20);
130 /* Set palette index & data */
131 out_8(par->cmap_adr + 0xb0, regno);
132 out_le32(par->cmap_adr + 0xb4, (red << 16 | green << 8 | blue));
133 break;
134 case cmap_radeon:
135 /* Set palette index & data (could be smarter) */
136 out_8(par->cmap_adr + 0xb0, regno);
137 out_le32(par->cmap_adr + 0xb4, (red << 16 | green << 8 | blue));
138 break;
139 case cmap_gxt2000:
140 out_le32((unsigned __iomem *) par->cmap_adr + regno,
141 (red << 16 | green << 8 | blue));
142 break;
143 }
144
145 if (regno < 16)
146 switch (info->var.bits_per_pixel) {
147 case 16:
148 ((u16 *) (info->pseudo_palette))[regno] =
149 (regno << 10) | (regno << 5) | regno;
150 break;
151 case 32:
152 {
153 int i = (regno << 8) | regno;
154 ((u32 *) (info->pseudo_palette))[regno] =
155 (i << 16) | i;
156 break;
157 }
158 }
159 return 0;
160 }
161
162 /*
163 * Blank the display.
164 */
165
166 static int offb_blank(int blank, struct fb_info *info)
167 {
168 struct offb_par *par = (struct offb_par *) info->par;
169 int i, j;
170
171 if (!par->cmap_adr)
172 return 0;
173
174 if (!par->blanked)
175 if (!blank)
176 return 0;
177
178 par->blanked = blank;
179
180 if (blank)
181 for (i = 0; i < 256; i++) {
182 switch (par->cmap_type) {
183 case cmap_m64:
184 writeb(i, par->cmap_adr);
185 for (j = 0; j < 3; j++)
186 writeb(0, par->cmap_data);
187 break;
188 case cmap_M3A:
189 /* Clear PALETTE_ACCESS_CNTL in DAC_CNTL */
190 out_le32(par->cmap_adr + 0x58,
191 in_le32(par->cmap_adr + 0x58) & ~0x20);
192 case cmap_r128:
193 /* Set palette index & data */
194 out_8(par->cmap_adr + 0xb0, i);
195 out_le32(par->cmap_adr + 0xb4, 0);
196 break;
197 case cmap_M3B:
198 /* Set PALETTE_ACCESS_CNTL in DAC_CNTL */
199 out_le32(par->cmap_adr + 0x58,
200 in_le32(par->cmap_adr + 0x58) | 0x20);
201 /* Set palette index & data */
202 out_8(par->cmap_adr + 0xb0, i);
203 out_le32(par->cmap_adr + 0xb4, 0);
204 break;
205 case cmap_radeon:
206 out_8(par->cmap_adr + 0xb0, i);
207 out_le32(par->cmap_adr + 0xb4, 0);
208 break;
209 case cmap_gxt2000:
210 out_le32((unsigned __iomem *) par->cmap_adr + i,
211 0);
212 break;
213 }
214 } else
215 fb_set_cmap(&info->cmap, info);
216 return 0;
217 }
218
219 /*
220 * Initialisation
221 */
222
223 int __init offb_init(void)
224 {
225 struct device_node *dp = NULL, *boot_disp = NULL;
226
227 #if defined(CONFIG_BOOTX_TEXT) && defined(CONFIG_PPC32)
228 struct device_node *macos_display = NULL;
229 #endif
230 if (fb_get_options("offb", NULL))
231 return -ENODEV;
232
233 #if defined(CONFIG_BOOTX_TEXT) && defined(CONFIG_PPC32)
234 /* If we're booted from BootX... */
235 if (boot_infos != 0) {
236 unsigned long addr =
237 (unsigned long) boot_infos->dispDeviceBase;
238 u32 *addrp;
239 u64 daddr, dsize;
240 unsigned int flags;
241
242 /* find the device node corresponding to the macos display */
243 while ((dp = of_find_node_by_type(dp, "display"))) {
244 int i;
245
246 /*
247 * Look for an AAPL,address property first.
248 */
249 unsigned int na;
250 unsigned int *ap =
251 (unsigned int *)get_property(dp, "AAPL,address",
252 &na);
253 if (ap != 0) {
254 for (na /= sizeof(unsigned int); na > 0;
255 --na, ++ap)
256 if (*ap <= addr &&
257 addr < *ap + 0x1000000) {
258 macos_display = dp;
259 goto foundit;
260 }
261 }
262
263 /*
264 * See if the display address is in one of the address
265 * ranges for this display.
266 */
267 i = 0;
268 for (;;) {
269 addrp = of_get_address(dp, i++, &dsize, &flags);
270 if (addrp == NULL)
271 break;
272 if (!(flags & IORESOURCE_MEM))
273 continue;
274 daddr = of_translate_address(dp, addrp);
275 if (daddr == OF_BAD_ADDR)
276 continue;
277 if (daddr <= addr && addr < (daddr + dsize)) {
278 macos_display = dp;
279 goto foundit;
280 }
281 }
282 foundit:
283 if (macos_display) {
284 printk(KERN_INFO "MacOS display is %s\n",
285 dp->full_name);
286 break;
287 }
288 }
289
290 /* initialize it */
291 offb_init_fb(macos_display ? macos_display->
292 name : "MacOS display",
293 macos_display ? macos_display->
294 full_name : "MacOS display",
295 boot_infos->dispDeviceRect[2],
296 boot_infos->dispDeviceRect[3],
297 boot_infos->dispDeviceDepth,
298 boot_infos->dispDeviceRowBytes, addr, NULL);
299 }
300 #endif /* defined(CONFIG_BOOTX_TEXT) && defined(CONFIG_PPC32) */
301
302 for (dp = NULL; (dp = of_find_node_by_type(dp, "display"));) {
303 if (get_property(dp, "linux,opened", NULL) &&
304 get_property(dp, "linux,boot-display", NULL)) {
305 boot_disp = dp;
306 offb_init_nodriver(dp);
307 }
308 }
309 for (dp = NULL; (dp = of_find_node_by_type(dp, "display"));) {
310 if (get_property(dp, "linux,opened", NULL) &&
311 dp != boot_disp)
312 offb_init_nodriver(dp);
313 }
314
315 return 0;
316 }
317
318
319 static void __init offb_init_nodriver(struct device_node *dp)
320 {
321 int *pp, i;
322 unsigned int len;
323 int width = 640, height = 480, depth = 8, pitch;
324 unsigned int flags, rsize, *up;
325 u64 address = OF_BAD_ADDR;
326 u32 *addrp;
327 u64 asize;
328
329 if ((pp = (int *) get_property(dp, "depth", &len)) != NULL
330 && len == sizeof(int))
331 depth = *pp;
332 if ((pp = (int *) get_property(dp, "width", &len)) != NULL
333 && len == sizeof(int))
334 width = *pp;
335 if ((pp = (int *) get_property(dp, "height", &len)) != NULL
336 && len == sizeof(int))
337 height = *pp;
338 if ((pp = (int *) get_property(dp, "linebytes", &len)) != NULL
339 && len == sizeof(int)) {
340 pitch = *pp;
341 if (pitch == 1)
342 pitch = 0x1000;
343 } else
344 pitch = width;
345
346 rsize = (unsigned long)pitch * (unsigned long)height *
347 (unsigned long)(depth / 8);
348
349 /* Try to match device to a PCI device in order to get a properly
350 * translated address rather then trying to decode the open firmware
351 * stuff in various incorrect ways
352 */
353 #ifdef CONFIG_PCI
354 /* First try to locate the PCI device if any */
355 {
356 struct pci_dev *pdev = NULL;
357
358 for_each_pci_dev(pdev) {
359 if (dp == pci_device_to_OF_node(pdev))
360 break;
361 }
362 if (pdev) {
363 for (i = 0; i < 6 && address == OF_BAD_ADDR; i++) {
364 if ((pci_resource_flags(pdev, i) &
365 IORESOURCE_MEM) &&
366 (pci_resource_len(pdev, i) >= rsize))
367 address = pci_resource_start(pdev, i);
368 }
369 pci_dev_put(pdev);
370 }
371 }
372 #endif /* CONFIG_PCI */
373
374 /* This one is dodgy, we may drop it ... */
375 if (address == OF_BAD_ADDR &&
376 (up = (unsigned *) get_property(dp, "address", &len)) != NULL &&
377 len == sizeof(unsigned int))
378 address = (u64) * up;
379
380 if (address == OF_BAD_ADDR) {
381 for (i = 0; (addrp = of_get_address(dp, i, &asize, &flags))
382 != NULL; i++) {
383 if (!(flags & IORESOURCE_MEM))
384 continue;
385 if (asize >= pitch * height * depth / 8)
386 break;
387 }
388 if (addrp == NULL) {
389 printk(KERN_ERR
390 "no framebuffer address found for %s\n",
391 dp->full_name);
392 return;
393 }
394 address = of_translate_address(dp, addrp);
395 if (address == OF_BAD_ADDR) {
396 printk(KERN_ERR
397 "can't translate framebuffer address for %s\n",
398 dp->full_name);
399 return;
400 }
401
402 /* kludge for valkyrie */
403 if (strcmp(dp->name, "valkyrie") == 0)
404 address += 0x1000;
405 }
406 offb_init_fb(dp->name, dp->full_name, width, height, depth,
407 pitch, address, dp);
408
409 }
410
411 static void __init offb_init_fb(const char *name, const char *full_name,
412 int width, int height, int depth,
413 int pitch, unsigned long address,
414 struct device_node *dp)
415 {
416 unsigned long res_size = pitch * height * depth / 8;
417 struct offb_par *par = &default_par;
418 unsigned long res_start = address;
419 struct fb_fix_screeninfo *fix;
420 struct fb_var_screeninfo *var;
421 struct fb_info *info;
422 int size;
423
424 if (!request_mem_region(res_start, res_size, "offb"))
425 return;
426
427 printk(KERN_INFO
428 "Using unsupported %dx%d %s at %lx, depth=%d, pitch=%d\n",
429 width, height, name, address, depth, pitch);
430 if (depth != 8 && depth != 16 && depth != 32) {
431 printk(KERN_ERR "%s: can't use depth = %d\n", full_name,
432 depth);
433 release_mem_region(res_start, res_size);
434 return;
435 }
436
437 size = sizeof(struct fb_info) + sizeof(u32) * 17;
438
439 info = kmalloc(size, GFP_ATOMIC);
440
441 if (info == 0) {
442 release_mem_region(res_start, res_size);
443 return;
444 }
445 memset(info, 0, size);
446
447 fix = &info->fix;
448 var = &info->var;
449
450 strcpy(fix->id, "OFfb ");
451 strncat(fix->id, name, sizeof(fix->id) - sizeof("OFfb "));
452 fix->id[sizeof(fix->id) - 1] = '\0';
453
454 var->xres = var->xres_virtual = width;
455 var->yres = var->yres_virtual = height;
456 fix->line_length = pitch;
457
458 fix->smem_start = address;
459 fix->smem_len = pitch * height;
460 fix->type = FB_TYPE_PACKED_PIXELS;
461 fix->type_aux = 0;
462
463 par->cmap_type = cmap_unknown;
464 if (depth == 8) {
465
466 /* Palette hacks disabled for now */
467 #if 0
468 if (dp && !strncmp(name, "ATY,Rage128", 11)) {
469 unsigned long regbase = dp->addrs[2].address;
470 par->cmap_adr = ioremap(regbase, 0x1FFF);
471 par->cmap_type = cmap_r128;
472 } else if (dp && (!strncmp(name, "ATY,RageM3pA", 12)
473 || !strncmp(name, "ATY,RageM3p12A", 14))) {
474 unsigned long regbase =
475 dp->parent->addrs[2].address;
476 par->cmap_adr = ioremap(regbase, 0x1FFF);
477 par->cmap_type = cmap_M3A;
478 } else if (dp && !strncmp(name, "ATY,RageM3pB", 12)) {
479 unsigned long regbase =
480 dp->parent->addrs[2].address;
481 par->cmap_adr = ioremap(regbase, 0x1FFF);
482 par->cmap_type = cmap_M3B;
483 } else if (dp && !strncmp(name, "ATY,Rage6", 9)) {
484 unsigned long regbase = dp->addrs[1].address;
485 par->cmap_adr = ioremap(regbase, 0x1FFF);
486 par->cmap_type = cmap_radeon;
487 } else if (!strncmp(name, "ATY,", 4)) {
488 unsigned long base = address & 0xff000000UL;
489 par->cmap_adr =
490 ioremap(base + 0x7ff000, 0x1000) + 0xcc0;
491 par->cmap_data = par->cmap_adr + 1;
492 par->cmap_type = cmap_m64;
493 } else if (device_is_compatible(dp, "pci1014,b7")) {
494 unsigned long regbase = dp->addrs[0].address;
495 par->cmap_adr = ioremap(regbase + 0x6000, 0x1000);
496 par->cmap_type = cmap_gxt2000;
497 }
498 #endif
499 fix->visual = par->cmap_adr ? FB_VISUAL_PSEUDOCOLOR
500 : FB_VISUAL_STATIC_PSEUDOCOLOR;
501 } else
502 fix->visual = /* par->cmap_adr ? FB_VISUAL_DIRECTCOLOR
503 : */ FB_VISUAL_TRUECOLOR;
504
505 var->xoffset = var->yoffset = 0;
506 var->bits_per_pixel = depth;
507 switch (depth) {
508 case 8:
509 var->bits_per_pixel = 8;
510 var->red.offset = 0;
511 var->red.length = 8;
512 var->green.offset = 0;
513 var->green.length = 8;
514 var->blue.offset = 0;
515 var->blue.length = 8;
516 var->transp.offset = 0;
517 var->transp.length = 0;
518 break;
519 case 16: /* RGB 555 */
520 var->bits_per_pixel = 16;
521 var->red.offset = 10;
522 var->red.length = 5;
523 var->green.offset = 5;
524 var->green.length = 5;
525 var->blue.offset = 0;
526 var->blue.length = 5;
527 var->transp.offset = 0;
528 var->transp.length = 0;
529 break;
530 case 32: /* RGB 888 */
531 var->bits_per_pixel = 32;
532 var->red.offset = 16;
533 var->red.length = 8;
534 var->green.offset = 8;
535 var->green.length = 8;
536 var->blue.offset = 0;
537 var->blue.length = 8;
538 var->transp.offset = 24;
539 var->transp.length = 8;
540 break;
541 }
542 var->red.msb_right = var->green.msb_right = var->blue.msb_right =
543 var->transp.msb_right = 0;
544 var->grayscale = 0;
545 var->nonstd = 0;
546 var->activate = 0;
547 var->height = var->width = -1;
548 var->pixclock = 10000;
549 var->left_margin = var->right_margin = 16;
550 var->upper_margin = var->lower_margin = 16;
551 var->hsync_len = var->vsync_len = 8;
552 var->sync = 0;
553 var->vmode = FB_VMODE_NONINTERLACED;
554
555 info->fbops = &offb_ops;
556 info->screen_base = ioremap(address, fix->smem_len);
557 info->par = par;
558 info->pseudo_palette = (void *) (info + 1);
559 info->flags = FBINFO_DEFAULT;
560
561 fb_alloc_cmap(&info->cmap, 256, 0);
562
563 if (register_framebuffer(info) < 0) {
564 kfree(info);
565 release_mem_region(res_start, res_size);
566 return;
567 }
568
569 printk(KERN_INFO "fb%d: Open Firmware frame buffer device on %s\n",
570 info->node, full_name);
571 }
572
573 module_init(offb_init);
574 MODULE_LICENSE("GPL");
WRT350N Kernel Patches