1 /***************************************************************************/
4 * linux/arch/m68knommu/platform/5307/config.c
6 * Copyright (C) 1999-2002, Greg Ungerer (gerg@snapgear.com)
7 * Copyright (C) 2000, Lineo (www.lineo.com)
10 /***************************************************************************/
12 #include <linux/kernel.h>
13 #include <linux/param.h>
14 #include <linux/init.h>
15 #include <linux/interrupt.h>
17 #include <asm/machdep.h>
18 #include <asm/coldfire.h>
19 #include <asm/mcfsim.h>
20 #include <asm/mcfuart.h>
21 #include <asm/mcfwdebug.h>
23 /***************************************************************************/
25 void coldfire_reset(void);
27 extern unsigned int mcf_timervector
;
28 extern unsigned int mcf_profilevector
;
29 extern unsigned int mcf_timerlevel
;
31 /***************************************************************************/
34 * Some platforms need software versions of the GPIO data registers.
36 unsigned short ppdata
;
37 unsigned char ledbank
= 0xff;
39 /***************************************************************************/
41 static struct mcf_platform_uart m5307_uart_platform
[] = {
43 .mapbase
= MCF_MBAR
+ MCFUART_BASE1
,
47 .mapbase
= MCF_MBAR
+ MCFUART_BASE2
,
53 static struct platform_device m5307_uart
= {
56 .dev
.platform_data
= m5307_uart_platform
,
59 static struct platform_device
*m5307_devices
[] __initdata
= {
63 /***************************************************************************/
65 static void __init
m5307_uart_init_line(int line
, int irq
)
68 writel(MCFSIM_ICR_LEVEL6
| MCFSIM_ICR_PRI1
, MCF_MBAR
+ MCFSIM_UART1ICR
);
69 writeb(irq
, MCFUART_BASE1
+ MCFUART_UIVR
);
70 mcf_setimr(mcf_getimr() & ~MCFSIM_IMR_UART1
);
71 } else if (line
== 1) {
72 writel(MCFSIM_ICR_LEVEL6
| MCFSIM_ICR_PRI2
, MCF_MBAR
+ MCFSIM_UART2ICR
);
73 writeb(irq
, MCFUART_BASE2
+ MCFUART_UIVR
);
74 mcf_setimr(mcf_getimr() & ~MCFSIM_IMR_UART2
);
78 static void __init
m5307_uarts_init(void)
80 const int nrlines
= ARRAY_SIZE(m5307_uart_platform
);
83 for (line
= 0; (line
< nrlines
); line
++)
84 m5307_uart_init_line(line
, m5307_uart_platform
[line
].irq
);
87 /***************************************************************************/
89 void mcf_autovector(unsigned int vec
)
91 volatile unsigned char *mbar
;
93 if ((vec
>= 25) && (vec
<= 31)) {
94 mbar
= (volatile unsigned char *) MCF_MBAR
;
95 vec
= 0x1 << (vec
- 24);
96 *(mbar
+ MCFSIM_AVR
) |= vec
;
97 mcf_setimr(mcf_getimr() & ~vec
);
101 /***************************************************************************/
103 void mcf_settimericr(unsigned int timer
, unsigned int level
)
105 volatile unsigned char *icrp
;
106 unsigned int icr
, imr
;
110 case 2: icr
= MCFSIM_TIMER2ICR
; imr
= MCFSIM_IMR_TIMER2
; break;
111 default: icr
= MCFSIM_TIMER1ICR
; imr
= MCFSIM_IMR_TIMER1
; break;
114 icrp
= (volatile unsigned char *) (MCF_MBAR
+ icr
);
115 *icrp
= MCFSIM_ICR_AUTOVEC
| (level
<< 2) | MCFSIM_ICR_PRI3
;
116 mcf_setimr(mcf_getimr() & ~imr
);
120 /***************************************************************************/
122 void __init
config_BSP(char *commandp
, int size
)
124 mcf_setimr(MCFSIM_IMR_MASKALL
);
126 #if defined(CONFIG_NETtel) || defined(CONFIG_eLIA) || \
127 defined(CONFIG_DISKtel) || defined(CONFIG_SECUREEDGEMP3) || \
128 defined(CONFIG_CLEOPATRA)
129 /* Copy command line from FLASH to local buffer... */
130 memcpy(commandp
, (char *) 0xf0004000, size
);
131 commandp
[size
-1] = 0;
132 /* Different timer setup - to prevent device clash */
133 mcf_timervector
= 30;
134 mcf_profilevector
= 31;
138 mach_reset
= coldfire_reset
;
140 #ifdef CONFIG_BDM_DISABLE
142 * Disable the BDM clocking. This also turns off most of the rest of
143 * the BDM device. This is good for EMC reasons. This option is not
144 * incompatible with the memory protection option.
146 wdebug(MCFDEBUG_CSR
, MCFDEBUG_CSR_PSTCLK
);
150 /***************************************************************************/
152 static int __init
init_BSP(void)
155 platform_add_devices(m5307_devices
, ARRAY_SIZE(m5307_devices
));
159 arch_initcall(init_BSP
);
161 /***************************************************************************/