2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
6 * Copyright (C) 2006 Ralf Baechle <ralf@linux-mips.org>
9 #ifndef __ASM_MACH_IP27_DMA_COHERENCE_H
10 #define __ASM_MACH_IP27_DMA_COHERENCE_H
12 #include <asm/pci/bridge.h>
14 #define pdev_to_baddr(pdev, addr) \
15 (BRIDGE_CONTROLLER(pdev->bus)->baddr + (addr))
16 #define dev_to_baddr(dev, addr) \
17 pdev_to_baddr(to_pci_dev(dev), (addr))
21 static inline dma_addr_t
plat_map_dma_mem(struct device
*dev
, void *addr
,
24 dma_addr_t pa
= dev_to_baddr(dev
, virt_to_phys(addr
));
29 static dma_addr_t
plat_map_dma_mem_page(struct device
*dev
, struct page
*page
)
31 dma_addr_t pa
= dev_to_baddr(dev
, page_to_phys(page
));
36 static unsigned long plat_dma_addr_to_phys(dma_addr_t dma_addr
)
38 return dma_addr
& (0xffUL
<< 56);
41 static inline void plat_unmap_dma_mem(dma_addr_t dma_addr
)
45 static inline int plat_device_is_coherent(struct device
*dev
)
47 return 1; /* IP27 non-cohernet mode is unsupported */
50 #endif /* __ASM_MACH_IP27_DMA_COHERENCE_H */