drivers/ata/pata_sil680.c

   1 /*
   2  * pata_sil680.c        - SIL680 PATA for new ATA layer
   3  *                        (C) 2005 Red Hat Inc
   4  *                        Alan Cox <alan@redhat.com>
   5  *
   6  * based upon
   7  *
   8  * linux/drivers/ide/pci/siimage.c              Version 1.07    Nov 30, 2003
   9  *
  10  * Copyright (C) 2001-2002      Andre Hedrick <andre@linux-ide.org>
  11  * Copyright (C) 2003           Red Hat <alan@redhat.com>
  12  *
  13  *  May be copied or modified under the terms of the GNU General Public License
  14  *
  15  *  Documentation publically available.
  16  *
  17  *      If you have strange problems with nVidia chipset systems please
  18  *      see the SI support documentation and update your system BIOS
  19  *      if neccessary
  20  *
  21  * TODO
  22  *      If we know all our devices are LBA28 (or LBA28 sized)  we could use
  23  *      the command fifo mode.
  24  */
  25
  26 #include <linux/kernel.h>
  27 #include <linux/module.h>
  28 #include <linux/pci.h>
  29 #include <linux/init.h>
  30 #include <linux/blkdev.h>
  31 #include <linux/delay.h>
  32 #include <scsi/scsi_host.h>
  33 #include <linux/libata.h>
  34
  35 #define DRV_NAME "pata_sil680"
  36 #define DRV_VERSION "0.4.6"
  37
  38 /**
  39  *      sil680_selreg           -       return register base
  40  *      @hwif: interface
  41  *      @r: config offset
  42  *
  43  *      Turn a config register offset into the right address in either
  44  *      PCI space or MMIO space to access the control register in question
  45  *      Thankfully this is a configuration operation so isnt performance
  46  *      criticial.
  47  */
  48
  49 static unsigned long sil680_selreg(struct ata_port *ap, int r)
  50 {
  51         unsigned long base = 0xA0 + r;
  52         base += (ap->port_no << 4);
  53         return base;
  54 }
  55
  56 /**
  57  *      sil680_seldev           -       return register base
  58  *      @hwif: interface
  59  *      @r: config offset
  60  *
  61  *      Turn a config register offset into the right address in either
  62  *      PCI space or MMIO space to access the control register in question
  63  *      including accounting for the unit shift.
  64  */
  65
  66 static unsigned long sil680_seldev(struct ata_port *ap, struct ata_device *adev, int r)
  67 {
  68         unsigned long base = 0xA0 + r;
  69         base += (ap->port_no << 4);
  70         base |= adev->devno ? 2 : 0;
  71         return base;
  72 }
  73
  74
  75 /**
  76  *      sil680_cable_detect     -       cable detection
  77  *      @ap: ATA port
  78  *
  79  *      Perform cable detection. The SIL680 stores this in PCI config
  80  *      space for us.
  81  */
  82
  83 static int sil680_cable_detect(struct ata_port *ap) {
  84         struct pci_dev *pdev = to_pci_dev(ap->host->dev);
  85         unsigned long addr = sil680_selreg(ap, 0);
  86         u8 ata66;
  87         pci_read_config_byte(pdev, addr, &ata66);
  88         if (ata66 & 1)
  89                 return ATA_CBL_PATA80;
  90         else
  91                 return ATA_CBL_PATA40;
  92 }
  93
  94 /**
  95  *      sil680_bus_reset        -       reset the SIL680 bus
  96  *      @ap: ATA port to reset
  97  *
  98  *      Perform the SIL680 housekeeping when doing an ATA bus reset
  99  */
 100
 101 static int sil680_bus_reset(struct ata_port *ap,unsigned int *classes)
 102 {
 103         struct pci_dev *pdev = to_pci_dev(ap->host->dev);
 104         unsigned long addr = sil680_selreg(ap, 0);
 105         u8 reset;
 106
 107         pci_read_config_byte(pdev, addr, &reset);
 108         pci_write_config_byte(pdev, addr, reset | 0x03);
 109         udelay(25);
 110         pci_write_config_byte(pdev, addr, reset);
 111         return ata_std_softreset(ap, classes);
 112 }
 113
 114 static void sil680_error_handler(struct ata_port *ap)
 115 {
 116         ata_bmdma_drive_eh(ap, ata_std_prereset, sil680_bus_reset, NULL, ata_std_postreset);
 117 }
 118
 119 /**
 120  *      sil680_set_piomode      -       set initial PIO mode data
 121  *      @ap: ATA interface
 122  *      @adev: ATA device
 123  *
 124  *      Program the SIL680 registers for PIO mode. Note that the task speed
 125  *      registers are shared between the devices so we must pick the lowest
 126  *      mode for command work.
 127  */
 128
 129 static void sil680_set_piomode(struct ata_port *ap, struct ata_device *adev)
 130 {
 131         static u16 speed_p[5] = { 0x328A, 0x2283, 0x1104, 0x10C3, 0x10C1 };
 132         static u16 speed_t[5] = { 0x328A, 0x2283, 0x1281, 0x10C3, 0x10C1 };
 133
 134         unsigned long tfaddr = sil680_selreg(ap, 0x02);
 135         unsigned long addr = sil680_seldev(ap, adev, 0x04);
 136         unsigned long addr_mask = 0x80 + 4 * ap->port_no;
 137         struct pci_dev *pdev = to_pci_dev(ap->host->dev);
 138         int pio = adev->pio_mode - XFER_PIO_0;
 139         int lowest_pio = pio;
 140         int port_shift = 4 * adev->devno;
 141         u16 reg;
 142         u8 mode;
 143
 144         struct ata_device *pair = ata_dev_pair(adev);
 145
 146         if (pair != NULL && adev->pio_mode > pair->pio_mode)
 147                 lowest_pio = pair->pio_mode - XFER_PIO_0;
 148
 149         pci_write_config_word(pdev, addr, speed_p[pio]);
 150         pci_write_config_word(pdev, tfaddr, speed_t[lowest_pio]);
 151
 152         pci_read_config_word(pdev, tfaddr-2, &reg);
 153         pci_read_config_byte(pdev, addr_mask, &mode);
 154
 155         reg &= ~0x0200;                 /* Clear IORDY */
 156         mode &= ~(3 << port_shift);     /* Clear IORDY and DMA bits */
 157
 158         if (ata_pio_need_iordy(adev)) {
 159                 reg |= 0x0200;          /* Enable IORDY */
 160                 mode |= 1 << port_shift;
 161         }
 162         pci_write_config_word(pdev, tfaddr-2, reg);
 163         pci_write_config_byte(pdev, addr_mask, mode);
 164 }
 165
 166 /**
 167  *      sil680_set_dmamode      -       set initial DMA mode data
 168  *      @ap: ATA interface
 169  *      @adev: ATA device
 170  *
 171  *      Program the MWDMA/UDMA modes for the sil680 k
 172  *      chipset. The MWDMA mode values are pulled from a lookup table
 173  *      while the chipset uses mode number for UDMA.
 174  */
 175
 176 static void sil680_set_dmamode(struct ata_port *ap, struct ata_device *adev)
 177 {
 178         static u8 ultra_table[2][7] = {
 179                 { 0x0C, 0x07, 0x05, 0x04, 0x02, 0x01, 0xFF },   /* 100MHz */
 180                 { 0x0F, 0x0B, 0x07, 0x05, 0x03, 0x02, 0x01 },   /* 133Mhz */
 181         };
 182         static u16 dma_table[3] = { 0x2208, 0x10C2, 0x10C1 };
 183
 184         struct pci_dev *pdev = to_pci_dev(ap->host->dev);
 185         unsigned long ma = sil680_seldev(ap, adev, 0x08);
 186         unsigned long ua = sil680_seldev(ap, adev, 0x0C);
 187         unsigned long addr_mask = 0x80 + 4 * ap->port_no;
 188         int port_shift = adev->devno * 4;
 189         u8 scsc, mode;
 190         u16 multi, ultra;
 191
 192         pci_read_config_byte(pdev, 0x8A, &scsc);
 193         pci_read_config_byte(pdev, addr_mask, &mode);
 194         pci_read_config_word(pdev, ma, &multi);
 195         pci_read_config_word(pdev, ua, &ultra);
 196
 197         /* Mask timing bits */
 198         ultra &= ~0x3F;
 199         mode &= ~(0x03 << port_shift);
 200
 201         /* Extract scsc */
 202         scsc = (scsc & 0x30) ? 1: 0;
 203
 204         if (adev->dma_mode >= XFER_UDMA_0) {
 205                 multi = 0x10C1;
 206                 ultra |= ultra_table[scsc][adev->dma_mode - XFER_UDMA_0];
 207                 mode |= (0x03 << port_shift);
 208         } else {
 209                 multi = dma_table[adev->dma_mode - XFER_MW_DMA_0];
 210                 mode |= (0x02 << port_shift);
 211         }
 212         pci_write_config_byte(pdev, addr_mask, mode);
 213         pci_write_config_word(pdev, ma, multi);
 214         pci_write_config_word(pdev, ua, ultra);
 215 }
 216
 217 static struct scsi_host_template sil680_sht = {
 218         .module                 = THIS_MODULE,
 219         .name                   = DRV_NAME,
 220         .ioctl                  = ata_scsi_ioctl,
 221         .queuecommand           = ata_scsi_queuecmd,
 222         .can_queue              = ATA_DEF_QUEUE,
 223         .this_id                = ATA_SHT_THIS_ID,
 224         .sg_tablesize           = LIBATA_MAX_PRD,
 225         .cmd_per_lun            = ATA_SHT_CMD_PER_LUN,
 226         .emulated               = ATA_SHT_EMULATED,
 227         .use_clustering         = ATA_SHT_USE_CLUSTERING,
 228         .proc_name              = DRV_NAME,
 229         .dma_boundary           = ATA_DMA_BOUNDARY,
 230         .slave_configure        = ata_scsi_slave_config,
 231         .slave_destroy          = ata_scsi_slave_destroy,
 232         .bios_param             = ata_std_bios_param,
 233 #ifdef CONFIG_PM
 234         .suspend                = ata_scsi_device_suspend,
 235         .resume                 = ata_scsi_device_resume,
 236 #endif
 237 };
 238
 239 static struct ata_port_operations sil680_port_ops = {
 240         .port_disable   = ata_port_disable,
 241         .set_piomode    = sil680_set_piomode,
 242         .set_dmamode    = sil680_set_dmamode,
 243         .mode_filter    = ata_pci_default_filter,
 244         .tf_load        = ata_tf_load,
 245         .tf_read        = ata_tf_read,
 246         .check_status   = ata_check_status,
 247         .exec_command   = ata_exec_command,
 248         .dev_select     = ata_std_dev_select,
 249
 250         .freeze         = ata_bmdma_freeze,
 251         .thaw           = ata_bmdma_thaw,
 252         .error_handler  = sil680_error_handler,
 253         .post_internal_cmd = ata_bmdma_post_internal_cmd,
 254         .cable_detect   = sil680_cable_detect,
 255
 256         .bmdma_setup    = ata_bmdma_setup,
 257         .bmdma_start    = ata_bmdma_start,
 258         .bmdma_stop     = ata_bmdma_stop,
 259         .bmdma_status   = ata_bmdma_status,
 260
 261         .qc_prep        = ata_qc_prep,
 262         .qc_issue       = ata_qc_issue_prot,
 263
 264         .data_xfer      = ata_data_xfer,
 265
 266         .irq_handler    = ata_interrupt,
 267         .irq_clear      = ata_bmdma_irq_clear,
 268         .irq_on         = ata_irq_on,
 269         .irq_ack        = ata_irq_ack,
 270
 271         .port_start     = ata_port_start,
 272 };
 273
 274 /**
 275  *      sil680_init_chip                -       chip setup
 276  *      @pdev: PCI device
 277  *
 278  *      Perform all the chip setup which must be done both when the device
 279  *      is powered up on boot and when we resume in case we resumed from RAM.
 280  *      Returns the final clock settings.
 281  */
 282
 283 static u8 sil680_init_chip(struct pci_dev *pdev)
 284 {
 285         u32 class_rev   = 0;
 286         u8 tmpbyte      = 0;
 287
 288         pci_read_config_dword(pdev, PCI_CLASS_REVISION, &class_rev);
 289         class_rev &= 0xff;
 290         /* FIXME: double check */
 291         pci_write_config_byte(pdev, PCI_CACHE_LINE_SIZE, (class_rev) ? 1 : 255);
 292
 293         pci_write_config_byte(pdev, 0x80, 0x00);
 294         pci_write_config_byte(pdev, 0x84, 0x00);
 295
 296         pci_read_config_byte(pdev, 0x8A, &tmpbyte);
 297
 298         printk(KERN_INFO "sil680: BA5_EN = %d clock = %02X\n",
 299                         tmpbyte & 1, tmpbyte & 0x30);
 300
 301         switch(tmpbyte & 0x30) {
 302                 case 0x00:
 303                         /* 133 clock attempt to force it on */
 304                         pci_write_config_byte(pdev, 0x8A, tmpbyte|0x10);
 305                         break;
 306                 case 0x30:
 307                         /* if clocking is disabled */
 308                         /* 133 clock attempt to force it on */
 309                         pci_write_config_byte(pdev, 0x8A, tmpbyte & ~0x20);
 310                         break;
 311                 case 0x10:
 312                         /* 133 already */
 313                         break;
 314                 case 0x20:
 315                         /* BIOS set PCI x2 clocking */
 316                         break;
 317         }
 318
 319         pci_read_config_byte(pdev,   0x8A, &tmpbyte);
 320         printk(KERN_INFO "sil680: BA5_EN = %d clock = %02X\n",
 321                         tmpbyte & 1, tmpbyte & 0x30);
 322
 323         pci_write_config_byte(pdev,  0xA1, 0x72);
 324         pci_write_config_word(pdev,  0xA2, 0x328A);
 325         pci_write_config_dword(pdev, 0xA4, 0x62DD62DD);
 326         pci_write_config_dword(pdev, 0xA8, 0x43924392);
 327         pci_write_config_dword(pdev, 0xAC, 0x40094009);
 328         pci_write_config_byte(pdev,  0xB1, 0x72);
 329         pci_write_config_word(pdev,  0xB2, 0x328A);
 330         pci_write_config_dword(pdev, 0xB4, 0x62DD62DD);
 331         pci_write_config_dword(pdev, 0xB8, 0x43924392);
 332         pci_write_config_dword(pdev, 0xBC, 0x40094009);
 333
 334         switch(tmpbyte & 0x30) {
 335                 case 0x00: printk(KERN_INFO "sil680: 100MHz clock.\n");break;
 336                 case 0x10: printk(KERN_INFO "sil680: 133MHz clock.\n");break;
 337                 case 0x20: printk(KERN_INFO "sil680: Using PCI clock.\n");break;
 338                 /* This last case is _NOT_ ok */
 339                 case 0x30: printk(KERN_ERR "sil680: Clock disabled ?\n");
 340         }
 341         return tmpbyte & 0x30;
 342 }
 343
 344 static int sil680_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
 345 {
 346         static struct ata_port_info info = {
 347                 .sht = &sil680_sht,
 348                 .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST,
 349                 .pio_mask = 0x1f,
 350                 .mwdma_mask = 0x07,
 351                 .udma_mask = 0x7f,
 352                 .port_ops = &sil680_port_ops
 353         };
 354         static struct ata_port_info info_slow = {
 355                 .sht = &sil680_sht,
 356                 .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST,
 357                 .pio_mask = 0x1f,
 358                 .mwdma_mask = 0x07,
 359                 .udma_mask = 0x3f,
 360                 .port_ops = &sil680_port_ops
 361         };
 362         static struct ata_port_info *port_info[2] = {&info, &info};
 363         static int printed_version;
 364
 365         if (!printed_version++)
 366                 dev_printk(KERN_DEBUG, &pdev->dev, "version " DRV_VERSION "\n");
 367
 368         switch(sil680_init_chip(pdev))
 369         {
 370                 case 0:
 371                         port_info[0] = port_info[1] = &info_slow;
 372                         break;
 373                 case 0x30:
 374                         return -ENODEV;
 375         }
 376         return ata_pci_init_one(pdev, port_info, 2);
 377 }
 378
 379 #ifdef CONFIG_PM
 380 static int sil680_reinit_one(struct pci_dev *pdev)
 381 {
 382         sil680_init_chip(pdev);
 383         return ata_pci_device_resume(pdev);
 384 }
 385 #endif
 386
 387 static const struct pci_device_id sil680[] = {
 388         { PCI_VDEVICE(CMD, PCI_DEVICE_ID_SII_680), },
 389
 390         { },
 391 };
 392
 393 static struct pci_driver sil680_pci_driver = {
 394         .name           = DRV_NAME,
 395         .id_table       = sil680,
 396         .probe          = sil680_init_one,
 397         .remove         = ata_pci_remove_one,
 398 #ifdef CONFIG_PM
 399         .suspend        = ata_pci_device_suspend,
 400         .resume         = sil680_reinit_one,
 401 #endif
 402 };
 403
 404 static int __init sil680_init(void)
 405 {
 406         return pci_register_driver(&sil680_pci_driver);
 407 }
 408
 409 static void __exit sil680_exit(void)
 410 {
 411         pci_unregister_driver(&sil680_pci_driver);
 412 }
 413
 414 MODULE_AUTHOR("Alan Cox");
 415 MODULE_DESCRIPTION("low-level driver for SI680 PATA");
 416 MODULE_LICENSE("GPL");
 417 MODULE_DEVICE_TABLE(pci, sil680);
 418 MODULE_VERSION(DRV_VERSION);
 419
 420 module_init(sil680_init);
 421 module_exit(sil680_exit);