2 * Kernel-based Virtual Machine driver for Linux
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
9 * Copyright (C) 2006 Qumranet, Inc.
12 * Yaniv Kamay <yaniv@qumranet.com>
13 * Avi Kivity <avi@qumranet.com>
15 * This work is licensed under the terms of the GNU GPL, version 2. See
16 * the COPYING file in the top-level directory.
21 * We need the mmu code to access both 32-bit and 64-bit guest ptes,
22 * so the code in this file is compiled twice, once per pte size.
26 #define pt_element_t u64
27 #define guest_walker guest_walker64
28 #define FNAME(name) paging##64_##name
29 #define PT_BASE_ADDR_MASK PT64_BASE_ADDR_MASK
30 #define PT_DIR_BASE_ADDR_MASK PT64_DIR_BASE_ADDR_MASK
31 #define PT_INDEX(addr, level) PT64_INDEX(addr, level)
32 #define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
33 #define PT_LEVEL_MASK(level) PT64_LEVEL_MASK(level)
34 #define PT_PTE_COPY_MASK PT64_PTE_COPY_MASK
36 #define PT_MAX_FULL_LEVELS 4
38 #define PT_MAX_FULL_LEVELS 2
41 #define pt_element_t u32
42 #define guest_walker guest_walker32
43 #define FNAME(name) paging##32_##name
44 #define PT_BASE_ADDR_MASK PT32_BASE_ADDR_MASK
45 #define PT_DIR_BASE_ADDR_MASK PT32_DIR_BASE_ADDR_MASK
46 #define PT_INDEX(addr, level) PT32_INDEX(addr, level)
47 #define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
48 #define PT_LEVEL_MASK(level) PT32_LEVEL_MASK(level)
49 #define PT_PTE_COPY_MASK PT32_PTE_COPY_MASK
50 #define PT_MAX_FULL_LEVELS 2
52 #error Invalid PTTYPE value
56 * The guest_walker structure emulates the behavior of the hardware page
61 gfn_t table_gfn
[PT_MAX_FULL_LEVELS
];
64 pt_element_t inherited_ar
;
70 * Fetch a guest pte for a guest virtual address
72 static int FNAME(walk_addr
)(struct guest_walker
*walker
,
73 struct kvm_vcpu
*vcpu
, gva_t addr
,
74 int write_fault
, int user_fault
, int fetch_fault
)
77 struct kvm_memory_slot
*slot
;
82 pgprintk("%s: addr %lx\n", __FUNCTION__
, addr
);
83 walker
->level
= vcpu
->mmu
.root_level
;
87 if (!is_long_mode(vcpu
)) {
88 walker
->ptep
= &vcpu
->pdptrs
[(addr
>> 30) & 3];
90 if (!(root
& PT_PRESENT_MASK
))
95 table_gfn
= (root
& PT64_BASE_ADDR_MASK
) >> PAGE_SHIFT
;
96 walker
->table_gfn
[walker
->level
- 1] = table_gfn
;
97 pgprintk("%s: table_gfn[%d] %lx\n", __FUNCTION__
,
98 walker
->level
- 1, table_gfn
);
99 slot
= gfn_to_memslot(vcpu
->kvm
, table_gfn
);
100 hpa
= safe_gpa_to_hpa(vcpu
, root
& PT64_BASE_ADDR_MASK
);
101 walker
->table
= kmap_atomic(pfn_to_page(hpa
>> PAGE_SHIFT
), KM_USER0
);
103 ASSERT((!is_long_mode(vcpu
) && is_pae(vcpu
)) ||
104 (vcpu
->cr3
& ~(PAGE_MASK
| CR3_FLAGS_MASK
)) == 0);
106 walker
->inherited_ar
= PT_USER_MASK
| PT_WRITABLE_MASK
;
109 int index
= PT_INDEX(addr
, walker
->level
);
112 ptep
= &walker
->table
[index
];
113 ASSERT(((unsigned long)walker
->table
& PAGE_MASK
) ==
114 ((unsigned long)ptep
& PAGE_MASK
));
116 if (!is_present_pte(*ptep
))
119 if (write_fault
&& !is_writeble_pte(*ptep
))
120 if (user_fault
|| is_write_protection(vcpu
))
123 if (user_fault
&& !(*ptep
& PT_USER_MASK
))
127 if (fetch_fault
&& is_nx(vcpu
) && (*ptep
& PT64_NX_MASK
))
131 if (!(*ptep
& PT_ACCESSED_MASK
)) {
132 mark_page_dirty(vcpu
->kvm
, table_gfn
);
133 *ptep
|= PT_ACCESSED_MASK
;
136 if (walker
->level
== PT_PAGE_TABLE_LEVEL
) {
137 walker
->gfn
= (*ptep
& PT_BASE_ADDR_MASK
)
142 if (walker
->level
== PT_DIRECTORY_LEVEL
143 && (*ptep
& PT_PAGE_SIZE_MASK
)
144 && (PTTYPE
== 64 || is_pse(vcpu
))) {
145 walker
->gfn
= (*ptep
& PT_DIR_BASE_ADDR_MASK
)
147 walker
->gfn
+= PT_INDEX(addr
, PT_PAGE_TABLE_LEVEL
);
151 if (walker
->level
!= 3 || is_long_mode(vcpu
))
152 walker
->inherited_ar
&= walker
->table
[index
];
153 table_gfn
= (*ptep
& PT_BASE_ADDR_MASK
) >> PAGE_SHIFT
;
154 paddr
= safe_gpa_to_hpa(vcpu
, *ptep
& PT_BASE_ADDR_MASK
);
155 kunmap_atomic(walker
->table
, KM_USER0
);
156 walker
->table
= kmap_atomic(pfn_to_page(paddr
>> PAGE_SHIFT
),
159 walker
->table_gfn
[walker
->level
- 1 ] = table_gfn
;
160 pgprintk("%s: table_gfn[%d] %lx\n", __FUNCTION__
,
161 walker
->level
- 1, table_gfn
);
164 pgprintk("%s: pte %llx\n", __FUNCTION__
, (u64
)*ptep
);
168 walker
->error_code
= 0;
172 walker
->error_code
= PFERR_PRESENT_MASK
;
176 walker
->error_code
|= PFERR_WRITE_MASK
;
178 walker
->error_code
|= PFERR_USER_MASK
;
180 walker
->error_code
|= PFERR_FETCH_MASK
;
184 static void FNAME(release_walker
)(struct guest_walker
*walker
)
187 kunmap_atomic(walker
->table
, KM_USER0
);
190 static void FNAME(mark_pagetable_dirty
)(struct kvm
*kvm
,
191 struct guest_walker
*walker
)
193 mark_page_dirty(kvm
, walker
->table_gfn
[walker
->level
- 1]);
196 static void FNAME(set_pte
)(struct kvm_vcpu
*vcpu
, u64 guest_pte
,
197 u64
*shadow_pte
, u64 access_bits
, gfn_t gfn
)
199 ASSERT(*shadow_pte
== 0);
200 access_bits
&= guest_pte
;
201 *shadow_pte
= (guest_pte
& PT_PTE_COPY_MASK
);
202 set_pte_common(vcpu
, shadow_pte
, guest_pte
& PT_BASE_ADDR_MASK
,
203 guest_pte
& PT_DIRTY_MASK
, access_bits
, gfn
);
206 static void FNAME(set_pde
)(struct kvm_vcpu
*vcpu
, u64 guest_pde
,
207 u64
*shadow_pte
, u64 access_bits
, gfn_t gfn
)
211 ASSERT(*shadow_pte
== 0);
212 access_bits
&= guest_pde
;
213 gaddr
= (gpa_t
)gfn
<< PAGE_SHIFT
;
214 if (PTTYPE
== 32 && is_cpuid_PSE36())
215 gaddr
|= (guest_pde
& PT32_DIR_PSE36_MASK
) <<
216 (32 - PT32_DIR_PSE36_SHIFT
);
217 *shadow_pte
= guest_pde
& PT_PTE_COPY_MASK
;
218 set_pte_common(vcpu
, shadow_pte
, gaddr
,
219 guest_pde
& PT_DIRTY_MASK
, access_bits
, gfn
);
223 * Fetch a shadow pte for a specific level in the paging hierarchy.
225 static u64
*FNAME(fetch
)(struct kvm_vcpu
*vcpu
, gva_t addr
,
226 struct guest_walker
*walker
)
230 u64
*prev_shadow_ent
= NULL
;
231 pt_element_t
*guest_ent
= walker
->ptep
;
233 if (!is_present_pte(*guest_ent
))
236 shadow_addr
= vcpu
->mmu
.root_hpa
;
237 level
= vcpu
->mmu
.shadow_root_level
;
238 if (level
== PT32E_ROOT_LEVEL
) {
239 shadow_addr
= vcpu
->mmu
.pae_root
[(addr
>> 30) & 3];
240 shadow_addr
&= PT64_BASE_ADDR_MASK
;
245 u32 index
= SHADOW_PT_INDEX(addr
, level
);
246 u64
*shadow_ent
= ((u64
*)__va(shadow_addr
)) + index
;
247 struct kvm_mmu_page
*shadow_page
;
252 if (is_present_pte(*shadow_ent
) || is_io_pte(*shadow_ent
)) {
253 if (level
== PT_PAGE_TABLE_LEVEL
)
255 shadow_addr
= *shadow_ent
& PT64_BASE_ADDR_MASK
;
256 prev_shadow_ent
= shadow_ent
;
260 if (level
== PT_PAGE_TABLE_LEVEL
) {
262 if (walker
->level
== PT_DIRECTORY_LEVEL
) {
264 *prev_shadow_ent
|= PT_SHADOW_PS_MARK
;
265 FNAME(set_pde
)(vcpu
, *guest_ent
, shadow_ent
,
266 walker
->inherited_ar
,
269 ASSERT(walker
->level
== PT_PAGE_TABLE_LEVEL
);
270 FNAME(set_pte
)(vcpu
, *guest_ent
, shadow_ent
,
271 walker
->inherited_ar
,
277 if (level
- 1 == PT_PAGE_TABLE_LEVEL
278 && walker
->level
== PT_DIRECTORY_LEVEL
) {
280 table_gfn
= (*guest_ent
& PT_BASE_ADDR_MASK
)
284 table_gfn
= walker
->table_gfn
[level
- 2];
286 shadow_page
= kvm_mmu_get_page(vcpu
, table_gfn
, addr
, level
-1,
287 metaphysical
, shadow_ent
);
288 shadow_addr
= shadow_page
->page_hpa
;
289 shadow_pte
= shadow_addr
| PT_PRESENT_MASK
| PT_ACCESSED_MASK
290 | PT_WRITABLE_MASK
| PT_USER_MASK
;
291 *shadow_ent
= shadow_pte
;
292 prev_shadow_ent
= shadow_ent
;
297 * The guest faulted for write. We need to
299 * - check write permissions
300 * - update the guest pte dirty bit
301 * - update our own dirty page tracking structures
303 static int FNAME(fix_write_pf
)(struct kvm_vcpu
*vcpu
,
305 struct guest_walker
*walker
,
310 pt_element_t
*guest_ent
;
313 struct kvm_mmu_page
*page
;
315 if (is_writeble_pte(*shadow_ent
))
316 return !user
|| (*shadow_ent
& PT_USER_MASK
);
318 writable_shadow
= *shadow_ent
& PT_SHADOW_WRITABLE_MASK
;
321 * User mode access. Fail if it's a kernel page or a read-only
324 if (!(*shadow_ent
& PT_SHADOW_USER_MASK
) || !writable_shadow
)
326 ASSERT(*shadow_ent
& PT_USER_MASK
);
329 * Kernel mode access. Fail if it's a read-only page and
330 * supervisor write protection is enabled.
332 if (!writable_shadow
) {
333 if (is_write_protection(vcpu
))
335 *shadow_ent
&= ~PT_USER_MASK
;
338 guest_ent
= walker
->ptep
;
340 if (!is_present_pte(*guest_ent
)) {
349 * Usermode page faults won't be for page table updates.
351 while ((page
= kvm_mmu_lookup_page(vcpu
, gfn
)) != NULL
) {
352 pgprintk("%s: zap %lx %x\n",
353 __FUNCTION__
, gfn
, page
->role
.word
);
354 kvm_mmu_zap_page(vcpu
, page
);
356 } else if (kvm_mmu_lookup_page(vcpu
, gfn
)) {
357 pgprintk("%s: found shadow page for %lx, marking ro\n",
359 mark_page_dirty(vcpu
->kvm
, gfn
);
360 FNAME(mark_pagetable_dirty
)(vcpu
->kvm
, walker
);
361 *guest_ent
|= PT_DIRTY_MASK
;
365 mark_page_dirty(vcpu
->kvm
, gfn
);
366 *shadow_ent
|= PT_WRITABLE_MASK
;
367 FNAME(mark_pagetable_dirty
)(vcpu
->kvm
, walker
);
368 *guest_ent
|= PT_DIRTY_MASK
;
369 rmap_add(vcpu
, shadow_ent
);
375 * Page fault handler. There are several causes for a page fault:
376 * - there is no shadow pte for the guest pte
377 * - write access through a shadow pte marked read only so that we can set
379 * - write access to a shadow pte marked read only so we can update the page
380 * dirty bitmap, when userspace requests it
381 * - mmio access; in this case we will never install a present shadow pte
382 * - normal guest page fault due to the guest pte marked not present, not
383 * writable, or not executable
385 * Returns: 1 if we need to emulate the instruction, 0 otherwise, or
386 * a negative value on error.
388 static int FNAME(page_fault
)(struct kvm_vcpu
*vcpu
, gva_t addr
,
391 int write_fault
= error_code
& PFERR_WRITE_MASK
;
392 int user_fault
= error_code
& PFERR_USER_MASK
;
393 int fetch_fault
= error_code
& PFERR_FETCH_MASK
;
394 struct guest_walker walker
;
400 pgprintk("%s: addr %lx err %x\n", __FUNCTION__
, addr
, error_code
);
401 kvm_mmu_audit(vcpu
, "pre page fault");
403 r
= mmu_topup_memory_caches(vcpu
);
408 * Look up the shadow pte for the faulting address.
410 r
= FNAME(walk_addr
)(&walker
, vcpu
, addr
, write_fault
, user_fault
,
414 * The page is not mapped by the guest. Let the guest handle it.
417 pgprintk("%s: guest page fault\n", __FUNCTION__
);
418 inject_page_fault(vcpu
, addr
, walker
.error_code
);
419 FNAME(release_walker
)(&walker
);
423 shadow_pte
= FNAME(fetch
)(vcpu
, addr
, &walker
);
424 pgprintk("%s: shadow pte %p %llx\n", __FUNCTION__
,
425 shadow_pte
, *shadow_pte
);
428 * Update the shadow pte.
431 fixed
= FNAME(fix_write_pf
)(vcpu
, shadow_pte
, &walker
, addr
,
432 user_fault
, &write_pt
);
434 fixed
= fix_read_pf(shadow_pte
);
436 pgprintk("%s: updated shadow pte %p %llx\n", __FUNCTION__
,
437 shadow_pte
, *shadow_pte
);
439 FNAME(release_walker
)(&walker
);
442 * mmio: emulate if accessible, otherwise its a guest fault.
444 if (is_io_pte(*shadow_pte
))
448 kvm_mmu_audit(vcpu
, "post page fault (fixed)");
453 static gpa_t
FNAME(gva_to_gpa
)(struct kvm_vcpu
*vcpu
, gva_t vaddr
)
455 struct guest_walker walker
;
456 gpa_t gpa
= UNMAPPED_GVA
;
459 r
= FNAME(walk_addr
)(&walker
, vcpu
, vaddr
, 0, 0, 0);
462 gpa
= (gpa_t
)walker
.gfn
<< PAGE_SHIFT
;
463 gpa
|= vaddr
& ~PAGE_MASK
;
466 FNAME(release_walker
)(&walker
);
473 #undef PT_BASE_ADDR_MASK
475 #undef SHADOW_PT_INDEX
477 #undef PT_PTE_COPY_MASK
478 #undef PT_NON_PTE_COPY_MASK
479 #undef PT_DIR_BASE_ADDR_MASK
480 #undef PT_MAX_FULL_LEVELS