2 * linux/drivers/char/atmel_serial.c
4 * Driver for Atmel AT91 / AT32 Serial ports
5 * Copyright (C) 2003 Rick Bronson
7 * Based on drivers/char/serial_sa1100.c, by Deep Blue Solutions Ltd.
8 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 #include <linux/module.h>
26 #include <linux/tty.h>
27 #include <linux/ioport.h>
28 #include <linux/slab.h>
29 #include <linux/init.h>
30 #include <linux/serial.h>
31 #include <linux/clk.h>
32 #include <linux/console.h>
33 #include <linux/sysrq.h>
34 #include <linux/tty_flip.h>
35 #include <linux/platform_device.h>
36 #include <linux/atmel_pdc.h>
40 #include <asm/mach/serial_at91.h>
41 #include <asm/arch/board.h>
44 #include <asm/arch/cpu.h>
45 #include <asm/arch/gpio.h>
48 #include "atmel_serial.h"
50 #if defined(CONFIG_SERIAL_ATMEL_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
54 #include <linux/serial_core.h>
56 #ifdef CONFIG_SERIAL_ATMEL_TTYAT
58 /* Use device name ttyAT, major 204 and minor 154-169. This is necessary if we
59 * should coexist with the 8250 driver, such as if we have an external 16C550
61 #define SERIAL_ATMEL_MAJOR 204
62 #define MINOR_START 154
63 #define ATMEL_DEVICENAME "ttyAT"
67 /* Use device name ttyS, major 4, minor 64-68. This is the usual serial port
68 * name, but it is legally reserved for the 8250 driver. */
69 #define SERIAL_ATMEL_MAJOR TTY_MAJOR
70 #define MINOR_START 64
71 #define ATMEL_DEVICENAME "ttyS"
75 #define ATMEL_ISR_PASS_LIMIT 256
77 #define UART_PUT_CR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_CR)
78 #define UART_GET_MR(port) __raw_readl((port)->membase + ATMEL_US_MR)
79 #define UART_PUT_MR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_MR)
80 #define UART_PUT_IER(port,v) __raw_writel(v, (port)->membase + ATMEL_US_IER)
81 #define UART_PUT_IDR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_IDR)
82 #define UART_GET_IMR(port) __raw_readl((port)->membase + ATMEL_US_IMR)
83 #define UART_GET_CSR(port) __raw_readl((port)->membase + ATMEL_US_CSR)
84 #define UART_GET_CHAR(port) __raw_readl((port)->membase + ATMEL_US_RHR)
85 #define UART_PUT_CHAR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_THR)
86 #define UART_GET_BRGR(port) __raw_readl((port)->membase + ATMEL_US_BRGR)
87 #define UART_PUT_BRGR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_BRGR)
88 #define UART_PUT_RTOR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_RTOR)
90 // #define UART_GET_CR(port) __raw_readl((port)->membase + ATMEL_US_CR) // is write-only
93 #define UART_PUT_PTCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_PTCR)
94 #define UART_GET_PTSR(port) __raw_readl((port)->membase + ATMEL_PDC_PTSR)
96 #define UART_PUT_RPR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RPR)
97 #define UART_GET_RPR(port) __raw_readl((port)->membase + ATMEL_PDC_RPR)
98 #define UART_PUT_RCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RCR)
99 #define UART_PUT_RNPR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RNPR)
100 #define UART_PUT_RNCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RNCR)
102 #define UART_PUT_TPR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_TPR)
103 #define UART_PUT_TCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_TCR)
104 //#define UART_PUT_TNPR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_TNPR)
105 //#define UART_PUT_TNCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_TNCR)
107 static int (*atmel_open_hook
)(struct uart_port
*);
108 static void (*atmel_close_hook
)(struct uart_port
*);
111 * We wrap our port structure around the generic uart_port.
113 struct atmel_uart_port
{
114 struct uart_port uart
; /* uart */
115 struct clk
*clk
; /* uart clock */
116 unsigned short suspended
; /* is port suspended? */
119 static struct atmel_uart_port atmel_ports
[ATMEL_MAX_UART
];
122 static struct console atmel_console
;
126 * Return TIOCSER_TEMT when transmitter FIFO and Shift register is empty.
128 static u_int
atmel_tx_empty(struct uart_port
*port
)
130 return (UART_GET_CSR(port
) & ATMEL_US_TXEMPTY
) ? TIOCSER_TEMT
: 0;
134 * Set state of the modem control output lines
136 static void atmel_set_mctrl(struct uart_port
*port
, u_int mctrl
)
138 unsigned int control
= 0;
141 #ifdef CONFIG_ARCH_AT91RM9200
142 if (cpu_is_at91rm9200()) {
144 * AT91RM9200 Errata #39: RTS0 is not internally connected to PA21.
145 * We need to drive the pin manually.
147 if (port
->mapbase
== AT91RM9200_BASE_US0
) {
148 if (mctrl
& TIOCM_RTS
)
149 at91_set_gpio_value(AT91_PIN_PA21
, 0);
151 at91_set_gpio_value(AT91_PIN_PA21
, 1);
156 if (mctrl
& TIOCM_RTS
)
157 control
|= ATMEL_US_RTSEN
;
159 control
|= ATMEL_US_RTSDIS
;
161 if (mctrl
& TIOCM_DTR
)
162 control
|= ATMEL_US_DTREN
;
164 control
|= ATMEL_US_DTRDIS
;
166 UART_PUT_CR(port
, control
);
168 /* Local loopback mode? */
169 mode
= UART_GET_MR(port
) & ~ATMEL_US_CHMODE
;
170 if (mctrl
& TIOCM_LOOP
)
171 mode
|= ATMEL_US_CHMODE_LOC_LOOP
;
173 mode
|= ATMEL_US_CHMODE_NORMAL
;
174 UART_PUT_MR(port
, mode
);
178 * Get state of the modem control input lines
180 static u_int
atmel_get_mctrl(struct uart_port
*port
)
182 unsigned int status
, ret
= 0;
184 status
= UART_GET_CSR(port
);
187 * The control signals are active low.
189 if (!(status
& ATMEL_US_DCD
))
191 if (!(status
& ATMEL_US_CTS
))
193 if (!(status
& ATMEL_US_DSR
))
195 if (!(status
& ATMEL_US_RI
))
204 static void atmel_stop_tx(struct uart_port
*port
)
206 struct atmel_uart_port
*atmel_port
= (struct atmel_uart_port
*) port
;
208 UART_PUT_IDR(port
, ATMEL_US_TXRDY
);
212 * Start transmitting.
214 static void atmel_start_tx(struct uart_port
*port
)
216 struct atmel_uart_port
*atmel_port
= (struct atmel_uart_port
*) port
;
218 UART_PUT_IER(port
, ATMEL_US_TXRDY
);
222 * Stop receiving - port is in process of being closed.
224 static void atmel_stop_rx(struct uart_port
*port
)
226 struct atmel_uart_port
*atmel_port
= (struct atmel_uart_port
*) port
;
228 UART_PUT_IDR(port
, ATMEL_US_RXRDY
);
232 * Enable modem status interrupts
234 static void atmel_enable_ms(struct uart_port
*port
)
236 UART_PUT_IER(port
, ATMEL_US_RIIC
| ATMEL_US_DSRIC
| ATMEL_US_DCDIC
| ATMEL_US_CTSIC
);
240 * Control the transmission of a break signal
242 static void atmel_break_ctl(struct uart_port
*port
, int break_state
)
244 if (break_state
!= 0)
245 UART_PUT_CR(port
, ATMEL_US_STTBRK
); /* start break */
247 UART_PUT_CR(port
, ATMEL_US_STPBRK
); /* stop break */
251 * Characters received (called from interrupt handler)
253 static void atmel_rx_chars(struct uart_port
*port
)
255 struct tty_struct
*tty
= port
->info
->tty
;
256 unsigned int status
, ch
, flg
;
258 status
= UART_GET_CSR(port
);
259 while (status
& ATMEL_US_RXRDY
) {
260 ch
= UART_GET_CHAR(port
);
267 * note that the error handling code is
268 * out of the main execution path
270 if (unlikely(status
& (ATMEL_US_PARE
| ATMEL_US_FRAME
| ATMEL_US_OVRE
| ATMEL_US_RXBRK
))) {
271 UART_PUT_CR(port
, ATMEL_US_RSTSTA
); /* clear error */
272 if (status
& ATMEL_US_RXBRK
) {
273 status
&= ~(ATMEL_US_PARE
| ATMEL_US_FRAME
); /* ignore side-effect */
275 if (uart_handle_break(port
))
278 if (status
& ATMEL_US_PARE
)
279 port
->icount
.parity
++;
280 if (status
& ATMEL_US_FRAME
)
281 port
->icount
.frame
++;
282 if (status
& ATMEL_US_OVRE
)
283 port
->icount
.overrun
++;
285 status
&= port
->read_status_mask
;
287 if (status
& ATMEL_US_RXBRK
)
289 else if (status
& ATMEL_US_PARE
)
291 else if (status
& ATMEL_US_FRAME
)
295 if (uart_handle_sysrq_char(port
, ch
))
298 uart_insert_char(port
, status
, ATMEL_US_OVRE
, ch
, flg
);
301 status
= UART_GET_CSR(port
);
304 tty_flip_buffer_push(tty
);
308 * Transmit characters (called from interrupt handler)
310 static void atmel_tx_chars(struct uart_port
*port
)
312 struct circ_buf
*xmit
= &port
->info
->xmit
;
315 UART_PUT_CHAR(port
, port
->x_char
);
320 if (uart_circ_empty(xmit
) || uart_tx_stopped(port
)) {
325 while (UART_GET_CSR(port
) & ATMEL_US_TXRDY
) {
326 UART_PUT_CHAR(port
, xmit
->buf
[xmit
->tail
]);
327 xmit
->tail
= (xmit
->tail
+ 1) & (UART_XMIT_SIZE
- 1);
329 if (uart_circ_empty(xmit
))
333 if (uart_circ_chars_pending(xmit
) < WAKEUP_CHARS
)
334 uart_write_wakeup(port
);
336 if (uart_circ_empty(xmit
))
343 static irqreturn_t
atmel_interrupt(int irq
, void *dev_id
)
345 struct uart_port
*port
= dev_id
;
346 struct atmel_uart_port
*atmel_port
= (struct atmel_uart_port
*) port
;
347 unsigned int status
, pending
, pass_counter
= 0;
349 status
= UART_GET_CSR(port
);
350 pending
= status
& UART_GET_IMR(port
);
352 /* Interrupt receive */
353 if (pending
& ATMEL_US_RXRDY
)
354 atmel_rx_chars(port
);
356 // TODO: All reads to CSR will clear these interrupts!
357 if (pending
& ATMEL_US_RIIC
) port
->icount
.rng
++;
358 if (pending
& ATMEL_US_DSRIC
) port
->icount
.dsr
++;
359 if (pending
& ATMEL_US_DCDIC
)
360 uart_handle_dcd_change(port
, !(status
& ATMEL_US_DCD
));
361 if (pending
& ATMEL_US_CTSIC
)
362 uart_handle_cts_change(port
, !(status
& ATMEL_US_CTS
));
363 if (pending
& (ATMEL_US_RIIC
| ATMEL_US_DSRIC
| ATMEL_US_DCDIC
| ATMEL_US_CTSIC
))
364 wake_up_interruptible(&port
->info
->delta_msr_wait
);
366 /* Interrupt transmit */
367 if (pending
& ATMEL_US_TXRDY
)
368 atmel_tx_chars(port
);
370 if (pass_counter
++ > ATMEL_ISR_PASS_LIMIT
)
373 status
= UART_GET_CSR(port
);
374 pending
= status
& UART_GET_IMR(port
);
380 * Perform initialization and enable port for reception
382 static int atmel_startup(struct uart_port
*port
)
384 struct atmel_uart_port
*atmel_port
= (struct atmel_uart_port
*) port
;
388 * Ensure that no interrupts are enabled otherwise when
389 * request_irq() is called we could get stuck trying to
390 * handle an unexpected interrupt
392 UART_PUT_IDR(port
, -1);
397 retval
= request_irq(port
->irq
, atmel_interrupt
, IRQF_SHARED
, "atmel_serial", port
);
399 printk("atmel_serial: atmel_startup - Can't get irq\n");
404 * If there is a specific "open" function (to register
405 * control line interrupts)
407 if (atmel_open_hook
) {
408 retval
= atmel_open_hook(port
);
410 free_irq(port
->irq
, port
);
416 * Finally, enable the serial port
418 UART_PUT_CR(port
, ATMEL_US_RSTSTA
| ATMEL_US_RSTRX
);
419 UART_PUT_CR(port
, ATMEL_US_TXEN
| ATMEL_US_RXEN
); /* enable xmit & rcvr */
421 UART_PUT_IER(port
, ATMEL_US_RXRDY
); /* enable receive only */
429 static void atmel_shutdown(struct uart_port
*port
)
431 struct atmel_uart_port
*atmel_port
= (struct atmel_uart_port
*) port
;
434 * Disable all interrupts, port and break condition.
436 UART_PUT_CR(port
, ATMEL_US_RSTSTA
);
437 UART_PUT_IDR(port
, -1);
442 free_irq(port
->irq
, port
);
445 * If there is a specific "close" function (to unregister
446 * control line interrupts)
448 if (atmel_close_hook
)
449 atmel_close_hook(port
);
453 * Power / Clock management.
455 static void atmel_serial_pm(struct uart_port
*port
, unsigned int state
, unsigned int oldstate
)
457 struct atmel_uart_port
*atmel_port
= (struct atmel_uart_port
*) port
;
462 * Enable the peripheral clock for this serial port.
463 * This is called on uart_open() or a resume event.
465 clk_enable(atmel_port
->clk
);
469 * Disable the peripheral clock for this serial port.
470 * This is called on uart_close() or a suspend event.
472 clk_disable(atmel_port
->clk
);
475 printk(KERN_ERR
"atmel_serial: unknown pm %d\n", state
);
480 * Change the port parameters
482 static void atmel_set_termios(struct uart_port
*port
, struct ktermios
* termios
, struct ktermios
* old
)
485 unsigned int mode
, imr
, quot
, baud
;
487 baud
= uart_get_baud_rate(port
, termios
, old
, 0, port
->uartclk
/16);
488 quot
= uart_get_divisor(port
, baud
);
490 /* Get current mode register */
491 mode
= UART_GET_MR(port
) & ~(ATMEL_US_CHRL
| ATMEL_US_NBSTOP
| ATMEL_US_PAR
);
494 switch (termios
->c_cflag
& CSIZE
) {
496 mode
|= ATMEL_US_CHRL_5
;
499 mode
|= ATMEL_US_CHRL_6
;
502 mode
|= ATMEL_US_CHRL_7
;
505 mode
|= ATMEL_US_CHRL_8
;
510 if (termios
->c_cflag
& CSTOPB
)
511 mode
|= ATMEL_US_NBSTOP_2
;
514 if (termios
->c_cflag
& PARENB
) {
515 if (termios
->c_cflag
& CMSPAR
) { /* Mark or Space parity */
516 if (termios
->c_cflag
& PARODD
)
517 mode
|= ATMEL_US_PAR_MARK
;
519 mode
|= ATMEL_US_PAR_SPACE
;
521 else if (termios
->c_cflag
& PARODD
)
522 mode
|= ATMEL_US_PAR_ODD
;
524 mode
|= ATMEL_US_PAR_EVEN
;
527 mode
|= ATMEL_US_PAR_NONE
;
529 spin_lock_irqsave(&port
->lock
, flags
);
531 port
->read_status_mask
= ATMEL_US_OVRE
;
532 if (termios
->c_iflag
& INPCK
)
533 port
->read_status_mask
|= (ATMEL_US_FRAME
| ATMEL_US_PARE
);
534 if (termios
->c_iflag
& (BRKINT
| PARMRK
))
535 port
->read_status_mask
|= ATMEL_US_RXBRK
;
538 * Characters to ignore
540 port
->ignore_status_mask
= 0;
541 if (termios
->c_iflag
& IGNPAR
)
542 port
->ignore_status_mask
|= (ATMEL_US_FRAME
| ATMEL_US_PARE
);
543 if (termios
->c_iflag
& IGNBRK
) {
544 port
->ignore_status_mask
|= ATMEL_US_RXBRK
;
546 * If we're ignoring parity and break indicators,
547 * ignore overruns too (for real raw support).
549 if (termios
->c_iflag
& IGNPAR
)
550 port
->ignore_status_mask
|= ATMEL_US_OVRE
;
553 // TODO: Ignore all characters if CREAD is set.
555 /* update the per-port timeout */
556 uart_update_timeout(port
, termios
->c_cflag
, baud
);
558 /* disable interrupts and drain transmitter */
559 imr
= UART_GET_IMR(port
); /* get interrupt mask */
560 UART_PUT_IDR(port
, -1); /* disable all interrupts */
561 while (!(UART_GET_CSR(port
) & ATMEL_US_TXEMPTY
)) { barrier(); }
563 /* disable receiver and transmitter */
564 UART_PUT_CR(port
, ATMEL_US_TXDIS
| ATMEL_US_RXDIS
);
566 /* set the parity, stop bits and data size */
567 UART_PUT_MR(port
, mode
);
569 /* set the baud rate */
570 UART_PUT_BRGR(port
, quot
);
571 UART_PUT_CR(port
, ATMEL_US_RSTSTA
| ATMEL_US_RSTRX
);
572 UART_PUT_CR(port
, ATMEL_US_TXEN
| ATMEL_US_RXEN
);
574 /* restore interrupts */
575 UART_PUT_IER(port
, imr
);
577 /* CTS flow-control and modem-status interrupts */
578 if (UART_ENABLE_MS(port
, termios
->c_cflag
))
579 port
->ops
->enable_ms(port
);
581 spin_unlock_irqrestore(&port
->lock
, flags
);
585 * Return string describing the specified port
587 static const char *atmel_type(struct uart_port
*port
)
589 return (port
->type
== PORT_ATMEL
) ? "ATMEL_SERIAL" : NULL
;
593 * Release the memory region(s) being used by 'port'.
595 static void atmel_release_port(struct uart_port
*port
)
597 struct platform_device
*pdev
= to_platform_device(port
->dev
);
598 int size
= pdev
->resource
[0].end
- pdev
->resource
[0].start
+ 1;
600 release_mem_region(port
->mapbase
, size
);
602 if (port
->flags
& UPF_IOREMAP
) {
603 iounmap(port
->membase
);
604 port
->membase
= NULL
;
609 * Request the memory region(s) being used by 'port'.
611 static int atmel_request_port(struct uart_port
*port
)
613 struct platform_device
*pdev
= to_platform_device(port
->dev
);
614 int size
= pdev
->resource
[0].end
- pdev
->resource
[0].start
+ 1;
616 if (!request_mem_region(port
->mapbase
, size
, "atmel_serial"))
619 if (port
->flags
& UPF_IOREMAP
) {
620 port
->membase
= ioremap(port
->mapbase
, size
);
621 if (port
->membase
== NULL
) {
622 release_mem_region(port
->mapbase
, size
);
631 * Configure/autoconfigure the port.
633 static void atmel_config_port(struct uart_port
*port
, int flags
)
635 if (flags
& UART_CONFIG_TYPE
) {
636 port
->type
= PORT_ATMEL
;
637 atmel_request_port(port
);
642 * Verify the new serial_struct (for TIOCSSERIAL).
644 static int atmel_verify_port(struct uart_port
*port
, struct serial_struct
*ser
)
647 if (ser
->type
!= PORT_UNKNOWN
&& ser
->type
!= PORT_ATMEL
)
649 if (port
->irq
!= ser
->irq
)
651 if (ser
->io_type
!= SERIAL_IO_MEM
)
653 if (port
->uartclk
/ 16 != ser
->baud_base
)
655 if ((void *)port
->mapbase
!= ser
->iomem_base
)
657 if (port
->iobase
!= ser
->port
)
664 static struct uart_ops atmel_pops
= {
665 .tx_empty
= atmel_tx_empty
,
666 .set_mctrl
= atmel_set_mctrl
,
667 .get_mctrl
= atmel_get_mctrl
,
668 .stop_tx
= atmel_stop_tx
,
669 .start_tx
= atmel_start_tx
,
670 .stop_rx
= atmel_stop_rx
,
671 .enable_ms
= atmel_enable_ms
,
672 .break_ctl
= atmel_break_ctl
,
673 .startup
= atmel_startup
,
674 .shutdown
= atmel_shutdown
,
675 .set_termios
= atmel_set_termios
,
677 .release_port
= atmel_release_port
,
678 .request_port
= atmel_request_port
,
679 .config_port
= atmel_config_port
,
680 .verify_port
= atmel_verify_port
,
681 .pm
= atmel_serial_pm
,
685 * Configure the port from the platform device resource info.
687 static void __devinit
atmel_init_port(struct atmel_uart_port
*atmel_port
, struct platform_device
*pdev
)
689 struct uart_port
*port
= &atmel_port
->uart
;
690 struct atmel_uart_data
*data
= pdev
->dev
.platform_data
;
692 port
->iotype
= UPIO_MEM
;
693 port
->flags
= UPF_BOOT_AUTOCONF
;
694 port
->ops
= &atmel_pops
;
696 port
->line
= pdev
->id
;
697 port
->dev
= &pdev
->dev
;
699 port
->mapbase
= pdev
->resource
[0].start
;
700 port
->irq
= pdev
->resource
[1].start
;
703 /* Already mapped by setup code */
704 port
->membase
= data
->regs
;
706 port
->flags
|= UPF_IOREMAP
;
707 port
->membase
= NULL
;
710 if (!atmel_port
->clk
) { /* for console, the clock could already be configured */
711 atmel_port
->clk
= clk_get(&pdev
->dev
, "usart");
712 clk_enable(atmel_port
->clk
);
713 port
->uartclk
= clk_get_rate(atmel_port
->clk
);
718 * Register board-specific modem-control line handlers.
720 void __init
atmel_register_uart_fns(struct atmel_port_fns
*fns
)
723 atmel_pops
.enable_ms
= fns
->enable_ms
;
725 atmel_pops
.get_mctrl
= fns
->get_mctrl
;
727 atmel_pops
.set_mctrl
= fns
->set_mctrl
;
728 atmel_open_hook
= fns
->open
;
729 atmel_close_hook
= fns
->close
;
730 atmel_pops
.pm
= fns
->pm
;
731 atmel_pops
.set_wake
= fns
->set_wake
;
735 #ifdef CONFIG_SERIAL_ATMEL_CONSOLE
736 static void atmel_console_putchar(struct uart_port
*port
, int ch
)
738 while (!(UART_GET_CSR(port
) & ATMEL_US_TXRDY
))
740 UART_PUT_CHAR(port
, ch
);
744 * Interrupts are disabled on entering
746 static void atmel_console_write(struct console
*co
, const char *s
, u_int count
)
748 struct uart_port
*port
= &atmel_ports
[co
->index
].uart
;
749 unsigned int status
, imr
;
752 * First, save IMR and then disable interrupts
754 imr
= UART_GET_IMR(port
); /* get interrupt mask */
755 UART_PUT_IDR(port
, ATMEL_US_RXRDY
| ATMEL_US_TXRDY
);
757 uart_console_write(port
, s
, count
, atmel_console_putchar
);
760 * Finally, wait for transmitter to become empty
764 status
= UART_GET_CSR(port
);
765 } while (!(status
& ATMEL_US_TXRDY
));
766 UART_PUT_IER(port
, imr
); /* set interrupts back the way they were */
770 * If the port was already initialised (eg, by a boot loader), try to determine
773 static void __init
atmel_console_get_options(struct uart_port
*port
, int *baud
, int *parity
, int *bits
)
775 unsigned int mr
, quot
;
777 // TODO: CR is a write-only register
780 // cr = UART_GET_CR(port) & (ATMEL_US_RXEN | ATMEL_US_TXEN);
781 // if (cr == (ATMEL_US_RXEN | ATMEL_US_TXEN)) {
782 // /* ok, the port was enabled */
785 mr
= UART_GET_MR(port
) & ATMEL_US_CHRL
;
786 if (mr
== ATMEL_US_CHRL_8
)
791 mr
= UART_GET_MR(port
) & ATMEL_US_PAR
;
792 if (mr
== ATMEL_US_PAR_EVEN
)
794 else if (mr
== ATMEL_US_PAR_ODD
)
798 * The serial core only rounds down when matching this to a
799 * supported baud rate. Make sure we don't end up slightly
800 * lower than one of those, as it would make us fall through
801 * to a much lower baud rate than we really want.
803 quot
= UART_GET_BRGR(port
);
804 *baud
= port
->uartclk
/ (16 * (quot
- 1));
807 static int __init
atmel_console_setup(struct console
*co
, char *options
)
809 struct uart_port
*port
= &atmel_ports
[co
->index
].uart
;
815 if (port
->membase
== 0) /* Port not initialized yet - delay setup */
818 UART_PUT_IDR(port
, -1); /* disable interrupts */
819 UART_PUT_CR(port
, ATMEL_US_RSTSTA
| ATMEL_US_RSTRX
);
820 UART_PUT_CR(port
, ATMEL_US_TXEN
| ATMEL_US_RXEN
);
823 uart_parse_options(options
, &baud
, &parity
, &bits
, &flow
);
825 atmel_console_get_options(port
, &baud
, &parity
, &bits
);
827 return uart_set_options(port
, co
, baud
, parity
, bits
, flow
);
830 static struct uart_driver atmel_uart
;
832 static struct console atmel_console
= {
833 .name
= ATMEL_DEVICENAME
,
834 .write
= atmel_console_write
,
835 .device
= uart_console_device
,
836 .setup
= atmel_console_setup
,
837 .flags
= CON_PRINTBUFFER
,
842 #define ATMEL_CONSOLE_DEVICE &atmel_console
845 * Early console initialization (before VM subsystem initialized).
847 static int __init
atmel_console_init(void)
849 if (atmel_default_console_device
) {
850 add_preferred_console(ATMEL_DEVICENAME
, atmel_default_console_device
->id
, NULL
);
851 atmel_init_port(&(atmel_ports
[atmel_default_console_device
->id
]), atmel_default_console_device
);
852 register_console(&atmel_console
);
857 console_initcall(atmel_console_init
);
860 * Late console initialization.
862 static int __init
atmel_late_console_init(void)
864 if (atmel_default_console_device
&& !(atmel_console
.flags
& CON_ENABLED
))
865 register_console(&atmel_console
);
869 core_initcall(atmel_late_console_init
);
872 #define ATMEL_CONSOLE_DEVICE NULL
875 static struct uart_driver atmel_uart
= {
876 .owner
= THIS_MODULE
,
877 .driver_name
= "atmel_serial",
878 .dev_name
= ATMEL_DEVICENAME
,
879 .major
= SERIAL_ATMEL_MAJOR
,
880 .minor
= MINOR_START
,
881 .nr
= ATMEL_MAX_UART
,
882 .cons
= ATMEL_CONSOLE_DEVICE
,
886 static int atmel_serial_suspend(struct platform_device
*pdev
, pm_message_t state
)
888 struct uart_port
*port
= platform_get_drvdata(pdev
);
889 struct atmel_uart_port
*atmel_port
= (struct atmel_uart_port
*) port
;
891 if (device_may_wakeup(&pdev
->dev
) && !at91_suspend_entering_slow_clock())
892 enable_irq_wake(port
->irq
);
894 uart_suspend_port(&atmel_uart
, port
);
895 atmel_port
->suspended
= 1;
901 static int atmel_serial_resume(struct platform_device
*pdev
)
903 struct uart_port
*port
= platform_get_drvdata(pdev
);
904 struct atmel_uart_port
*atmel_port
= (struct atmel_uart_port
*) port
;
906 if (atmel_port
->suspended
) {
907 uart_resume_port(&atmel_uart
, port
);
908 atmel_port
->suspended
= 0;
911 disable_irq_wake(port
->irq
);
916 #define atmel_serial_suspend NULL
917 #define atmel_serial_resume NULL
920 static int __devinit
atmel_serial_probe(struct platform_device
*pdev
)
922 struct atmel_uart_port
*port
;
925 port
= &atmel_ports
[pdev
->id
];
926 atmel_init_port(port
, pdev
);
928 ret
= uart_add_one_port(&atmel_uart
, &port
->uart
);
930 device_init_wakeup(&pdev
->dev
, 1);
931 platform_set_drvdata(pdev
, port
);
937 static int __devexit
atmel_serial_remove(struct platform_device
*pdev
)
939 struct uart_port
*port
= platform_get_drvdata(pdev
);
940 struct atmel_uart_port
*atmel_port
= (struct atmel_uart_port
*) port
;
943 clk_disable(atmel_port
->clk
);
944 clk_put(atmel_port
->clk
);
946 device_init_wakeup(&pdev
->dev
, 0);
947 platform_set_drvdata(pdev
, NULL
);
950 ret
= uart_remove_one_port(&atmel_uart
, port
);
957 static struct platform_driver atmel_serial_driver
= {
958 .probe
= atmel_serial_probe
,
959 .remove
= __devexit_p(atmel_serial_remove
),
960 .suspend
= atmel_serial_suspend
,
961 .resume
= atmel_serial_resume
,
963 .name
= "atmel_usart",
964 .owner
= THIS_MODULE
,
968 static int __init
atmel_serial_init(void)
972 ret
= uart_register_driver(&atmel_uart
);
976 ret
= platform_driver_register(&atmel_serial_driver
);
978 uart_unregister_driver(&atmel_uart
);
983 static void __exit
atmel_serial_exit(void)
985 platform_driver_unregister(&atmel_serial_driver
);
986 uart_unregister_driver(&atmel_uart
);
989 module_init(atmel_serial_init
);
990 module_exit(atmel_serial_exit
);
992 MODULE_AUTHOR("Rick Bronson");
993 MODULE_DESCRIPTION("Atmel AT91 / AT32 serial port driver");
994 MODULE_LICENSE("GPL");