?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
[POWERPC] Use menuconfig objects II - Macintosh
[wrt350n-kernel.git] / sound / pci / ac97 / ac97_pcm.c
blob3758d07182f8013f2707971894ffe7a963c5ddf7
1 /*
2 * Copyright (c) by Jaroslav Kysela <perex@suse.cz>
3 * Universal interface for Audio Codec '97
4 *
5 * For more details look to AC '97 component specification revision 2.2
6 * by Intel Corporation (http://developer.intel.com) and to datasheets
7 * for specific codecs.
8 *
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
23 *
24 */
25
26 #include <sound/driver.h>
27 #include <linux/delay.h>
28 #include <linux/init.h>
29 #include <linux/slab.h>
30 #include <linux/mutex.h>
31
32 #include <sound/core.h>
33 #include <sound/pcm.h>
34 #include <sound/control.h>
35 #include <sound/ac97_codec.h>
36 #include <sound/asoundef.h>
37 #include "ac97_patch.h"
38 #include "ac97_id.h"
39 #include "ac97_local.h"
40
41 /*
42 * PCM support
43 */
44
45 static unsigned char rate_reg_tables[2][4][9] = {
46 {
47 /* standard rates */
48 {
49 /* 3&4 front, 7&8 rear, 6&9 center/lfe */
50 AC97_PCM_FRONT_DAC_RATE, /* slot 3 */
51 AC97_PCM_FRONT_DAC_RATE, /* slot 4 */
52 0xff, /* slot 5 */
53 AC97_PCM_LFE_DAC_RATE, /* slot 6 */
54 AC97_PCM_SURR_DAC_RATE, /* slot 7 */
55 AC97_PCM_SURR_DAC_RATE, /* slot 8 */
56 AC97_PCM_LFE_DAC_RATE, /* slot 9 */
57 0xff, /* slot 10 */
58 0xff, /* slot 11 */
59 },
60 {
61 /* 7&8 front, 6&9 rear, 10&11 center/lfe */
62 0xff, /* slot 3 */
63 0xff, /* slot 4 */
64 0xff, /* slot 5 */
65 AC97_PCM_SURR_DAC_RATE, /* slot 6 */
66 AC97_PCM_FRONT_DAC_RATE, /* slot 7 */
67 AC97_PCM_FRONT_DAC_RATE, /* slot 8 */
68 AC97_PCM_SURR_DAC_RATE, /* slot 9 */
69 AC97_PCM_LFE_DAC_RATE, /* slot 10 */
70 AC97_PCM_LFE_DAC_RATE, /* slot 11 */
71 },
72 {
73 /* 6&9 front, 10&11 rear, 3&4 center/lfe */
74 AC97_PCM_LFE_DAC_RATE, /* slot 3 */
75 AC97_PCM_LFE_DAC_RATE, /* slot 4 */
76 0xff, /* slot 5 */
77 AC97_PCM_FRONT_DAC_RATE, /* slot 6 */
78 0xff, /* slot 7 */
79 0xff, /* slot 8 */
80 AC97_PCM_FRONT_DAC_RATE, /* slot 9 */
81 AC97_PCM_SURR_DAC_RATE, /* slot 10 */
82 AC97_PCM_SURR_DAC_RATE, /* slot 11 */
83 },
84 {
85 /* 10&11 front, 3&4 rear, 7&8 center/lfe */
86 AC97_PCM_SURR_DAC_RATE, /* slot 3 */
87 AC97_PCM_SURR_DAC_RATE, /* slot 4 */
88 0xff, /* slot 5 */
89 0xff, /* slot 6 */
90 AC97_PCM_LFE_DAC_RATE, /* slot 7 */
91 AC97_PCM_LFE_DAC_RATE, /* slot 8 */
92 0xff, /* slot 9 */
93 AC97_PCM_FRONT_DAC_RATE, /* slot 10 */
94 AC97_PCM_FRONT_DAC_RATE, /* slot 11 */
95 },
96 },
97 {
98 /* double rates */
99 {
100 /* 3&4 front, 7&8 front (t+1) */
101 AC97_PCM_FRONT_DAC_RATE, /* slot 3 */
102 AC97_PCM_FRONT_DAC_RATE, /* slot 4 */
103 0xff, /* slot 5 */
104 0xff, /* slot 6 */
105 AC97_PCM_FRONT_DAC_RATE, /* slot 7 */
106 AC97_PCM_FRONT_DAC_RATE, /* slot 8 */
107 0xff, /* slot 9 */
108 0xff, /* slot 10 */
109 0xff, /* slot 11 */
110 },
111 {
112 /* not specified in the specification */
113 0xff, /* slot 3 */
114 0xff, /* slot 4 */
115 0xff, /* slot 5 */
116 0xff, /* slot 6 */
117 0xff, /* slot 7 */
118 0xff, /* slot 8 */
119 0xff, /* slot 9 */
120 0xff, /* slot 10 */
121 0xff, /* slot 11 */
122 },
123 {
124 0xff, /* slot 3 */
125 0xff, /* slot 4 */
126 0xff, /* slot 5 */
127 0xff, /* slot 6 */
128 0xff, /* slot 7 */
129 0xff, /* slot 8 */
130 0xff, /* slot 9 */
131 0xff, /* slot 10 */
132 0xff, /* slot 11 */
133 },
134 {
135 0xff, /* slot 3 */
136 0xff, /* slot 4 */
137 0xff, /* slot 5 */
138 0xff, /* slot 6 */
139 0xff, /* slot 7 */
140 0xff, /* slot 8 */
141 0xff, /* slot 9 */
142 0xff, /* slot 10 */
143 0xff, /* slot 11 */
144 }
145 }};
146
147 /* FIXME: more various mappings for ADC? */
148 static unsigned char rate_cregs[9] = {
149 AC97_PCM_LR_ADC_RATE, /* 3 */
150 AC97_PCM_LR_ADC_RATE, /* 4 */
151 0xff, /* 5 */
152 AC97_PCM_MIC_ADC_RATE, /* 6 */
153 0xff, /* 7 */
154 0xff, /* 8 */
155 0xff, /* 9 */
156 0xff, /* 10 */
157 0xff, /* 11 */
158 };
159
160 static unsigned char get_slot_reg(struct ac97_pcm *pcm, unsigned short cidx,
161 unsigned short slot, int dbl)
162 {
163 if (slot < 3)
164 return 0xff;
165 if (slot > 11)
166 return 0xff;
167 if (pcm->spdif)
168 return AC97_SPDIF; /* pseudo register */
169 if (pcm->stream == SNDRV_PCM_STREAM_PLAYBACK)
170 return rate_reg_tables[dbl][pcm->r[dbl].rate_table[cidx]][slot - 3];
171 else
172 return rate_cregs[slot - 3];
173 }
174
175 static int set_spdif_rate(struct snd_ac97 *ac97, unsigned short rate)
176 {
177 unsigned short old, bits, reg, mask;
178 unsigned int sbits;
179
180 if (! (ac97->ext_id & AC97_EI_SPDIF))
181 return -ENODEV;
182
183 /* TODO: double rate support */
184 if (ac97->flags & AC97_CS_SPDIF) {
185 switch (rate) {
186 case 48000: bits = 0; break;
187 case 44100: bits = 1 << AC97_SC_SPSR_SHIFT; break;
188 default: /* invalid - disable output */
189 snd_ac97_update_bits(ac97, AC97_EXTENDED_STATUS, AC97_EA_SPDIF, 0);
190 return -EINVAL;
191 }
192 reg = AC97_CSR_SPDIF;
193 mask = 1 << AC97_SC_SPSR_SHIFT;
194 } else {
195 if (ac97->id == AC97_ID_CM9739 && rate != 48000) {
196 snd_ac97_update_bits(ac97, AC97_EXTENDED_STATUS, AC97_EA_SPDIF, 0);
197 return -EINVAL;
198 }
199 switch (rate) {
200 case 44100: bits = AC97_SC_SPSR_44K; break;
201 case 48000: bits = AC97_SC_SPSR_48K; break;
202 case 32000: bits = AC97_SC_SPSR_32K; break;
203 default: /* invalid - disable output */
204 snd_ac97_update_bits(ac97, AC97_EXTENDED_STATUS, AC97_EA_SPDIF, 0);
205 return -EINVAL;
206 }
207 reg = AC97_SPDIF;
208 mask = AC97_SC_SPSR_MASK;
209 }
210
211 mutex_lock(&ac97->reg_mutex);
212 old = snd_ac97_read(ac97, reg) & mask;
213 if (old != bits) {
214 snd_ac97_update_bits_nolock(ac97, AC97_EXTENDED_STATUS, AC97_EA_SPDIF, 0);
215 snd_ac97_update_bits_nolock(ac97, reg, mask, bits);
216 /* update the internal spdif bits */
217 sbits = ac97->spdif_status;
218 if (sbits & IEC958_AES0_PROFESSIONAL) {
219 sbits &= ~IEC958_AES0_PRO_FS;
220 switch (rate) {
221 case 44100: sbits |= IEC958_AES0_PRO_FS_44100; break;
222 case 48000: sbits |= IEC958_AES0_PRO_FS_48000; break;
223 case 32000: sbits |= IEC958_AES0_PRO_FS_32000; break;
224 }
225 } else {
226 sbits &= ~(IEC958_AES3_CON_FS << 24);
227 switch (rate) {
228 case 44100: sbits |= IEC958_AES3_CON_FS_44100<<24; break;
229 case 48000: sbits |= IEC958_AES3_CON_FS_48000<<24; break;
230 case 32000: sbits |= IEC958_AES3_CON_FS_32000<<24; break;
231 }
232 }
233 ac97->spdif_status = sbits;
234 }
235 snd_ac97_update_bits_nolock(ac97, AC97_EXTENDED_STATUS, AC97_EA_SPDIF, AC97_EA_SPDIF);
236 mutex_unlock(&ac97->reg_mutex);
237 return 0;
238 }
239
240 /**
241 * snd_ac97_set_rate - change the rate of the given input/output.
242 * @ac97: the ac97 instance
243 * @reg: the register to change
244 * @rate: the sample rate to set
245 *
246 * Changes the rate of the given input/output on the codec.
247 * If the codec doesn't support VAR, the rate must be 48000 (except
248 * for SPDIF).
249 *
250 * The valid registers are AC97_PMC_MIC_ADC_RATE,
251 * AC97_PCM_FRONT_DAC_RATE, AC97_PCM_LR_ADC_RATE.
252 * AC97_PCM_SURR_DAC_RATE and AC97_PCM_LFE_DAC_RATE are accepted
253 * if the codec supports them.
254 * AC97_SPDIF is accepted as a pseudo register to modify the SPDIF
255 * status bits.
256 *
257 * Returns zero if successful, or a negative error code on failure.
258 */
259 int snd_ac97_set_rate(struct snd_ac97 *ac97, int reg, unsigned int rate)
260 {
261 int dbl;
262 unsigned int tmp;
263
264 dbl = rate > 48000;
265 if (dbl) {
266 if (!(ac97->flags & AC97_DOUBLE_RATE))
267 return -EINVAL;
268 if (reg != AC97_PCM_FRONT_DAC_RATE)
269 return -EINVAL;
270 }
271
272 snd_ac97_update_power(ac97, reg, 1);
273 switch (reg) {
274 case AC97_PCM_MIC_ADC_RATE:
275 if ((ac97->regs[AC97_EXTENDED_STATUS] & AC97_EA_VRM) == 0) /* MIC VRA */
276 if (rate != 48000)
277 return -EINVAL;
278 break;
279 case AC97_PCM_FRONT_DAC_RATE:
280 case AC97_PCM_LR_ADC_RATE:
281 if ((ac97->regs[AC97_EXTENDED_STATUS] & AC97_EA_VRA) == 0) /* VRA */
282 if (rate != 48000 && rate != 96000)
283 return -EINVAL;
284 break;
285 case AC97_PCM_SURR_DAC_RATE:
286 if (! (ac97->scaps & AC97_SCAP_SURROUND_DAC))
287 return -EINVAL;
288 break;
289 case AC97_PCM_LFE_DAC_RATE:
290 if (! (ac97->scaps & AC97_SCAP_CENTER_LFE_DAC))
291 return -EINVAL;
292 break;
293 case AC97_SPDIF:
294 /* special case */
295 return set_spdif_rate(ac97, rate);
296 default:
297 return -EINVAL;
298 }
299 if (dbl)
300 rate /= 2;
301 tmp = (rate * ac97->bus->clock) / 48000;
302 if (tmp > 65535)
303 return -EINVAL;
304 if ((ac97->ext_id & AC97_EI_DRA) && reg == AC97_PCM_FRONT_DAC_RATE)
305 snd_ac97_update_bits(ac97, AC97_EXTENDED_STATUS,
306 AC97_EA_DRA, dbl ? AC97_EA_DRA : 0);
307 snd_ac97_update(ac97, reg, tmp & 0xffff);
308 snd_ac97_read(ac97, reg);
309 if ((ac97->ext_id & AC97_EI_DRA) && reg == AC97_PCM_FRONT_DAC_RATE) {
310 /* Intel controllers require double rate data to be put in
311 * slots 7+8
312 */
313 snd_ac97_update_bits(ac97, AC97_GENERAL_PURPOSE,
314 AC97_GP_DRSS_MASK,
315 dbl ? AC97_GP_DRSS_78 : 0);
316 snd_ac97_read(ac97, AC97_GENERAL_PURPOSE);
317 }
318 return 0;
319 }
320
321 EXPORT_SYMBOL(snd_ac97_set_rate);
322
323 static unsigned short get_pslots(struct snd_ac97 *ac97, unsigned char *rate_table, unsigned short *spdif_slots)
324 {
325 if (!ac97_is_audio(ac97))
326 return 0;
327 if (ac97_is_rev22(ac97) || ac97_can_amap(ac97)) {
328 unsigned short slots = 0;
329 if (ac97_is_rev22(ac97)) {
330 /* Note: it's simply emulation of AMAP behaviour */
331 u16 es;
332 es = ac97->regs[AC97_EXTENDED_ID] &= ~AC97_EI_DACS_SLOT_MASK;
333 switch (ac97->addr) {
334 case 1:
335 case 2: es |= (1<<AC97_EI_DACS_SLOT_SHIFT); break;
336 case 3: es |= (2<<AC97_EI_DACS_SLOT_SHIFT); break;
337 }
338 snd_ac97_write_cache(ac97, AC97_EXTENDED_ID, es);
339 }
340 switch (ac97->addr) {
341 case 0:
342 slots |= (1<<AC97_SLOT_PCM_LEFT)|(1<<AC97_SLOT_PCM_RIGHT);
343 if (ac97->scaps & AC97_SCAP_SURROUND_DAC)
344 slots |= (1<<AC97_SLOT_PCM_SLEFT)|(1<<AC97_SLOT_PCM_SRIGHT);
345 if (ac97->scaps & AC97_SCAP_CENTER_LFE_DAC)
346 slots |= (1<<AC97_SLOT_PCM_CENTER)|(1<<AC97_SLOT_LFE);
347 if (ac97->ext_id & AC97_EI_SPDIF) {
348 if (!(ac97->scaps & AC97_SCAP_SURROUND_DAC))
349 *spdif_slots = (1<<AC97_SLOT_SPDIF_LEFT)|(1<<AC97_SLOT_SPDIF_RIGHT);
350 else if (!(ac97->scaps & AC97_SCAP_CENTER_LFE_DAC))
351 *spdif_slots = (1<<AC97_SLOT_SPDIF_LEFT1)|(1<<AC97_SLOT_SPDIF_RIGHT1);
352 else
353 *spdif_slots = (1<<AC97_SLOT_SPDIF_LEFT2)|(1<<AC97_SLOT_SPDIF_RIGHT2);
354 }
355 *rate_table = 0;
356 break;
357 case 1:
358 case 2:
359 slots |= (1<<AC97_SLOT_PCM_SLEFT)|(1<<AC97_SLOT_PCM_SRIGHT);
360 if (ac97->scaps & AC97_SCAP_SURROUND_DAC)
361 slots |= (1<<AC97_SLOT_PCM_CENTER)|(1<<AC97_SLOT_LFE);
362 if (ac97->ext_id & AC97_EI_SPDIF) {
363 if (!(ac97->scaps & AC97_SCAP_SURROUND_DAC))
364 *spdif_slots = (1<<AC97_SLOT_SPDIF_LEFT1)|(1<<AC97_SLOT_SPDIF_RIGHT1);
365 else
366 *spdif_slots = (1<<AC97_SLOT_SPDIF_LEFT2)|(1<<AC97_SLOT_SPDIF_RIGHT2);
367 }
368 *rate_table = 1;
369 break;
370 case 3:
371 slots |= (1<<AC97_SLOT_PCM_CENTER)|(1<<AC97_SLOT_LFE);
372 if (ac97->ext_id & AC97_EI_SPDIF)
373 *spdif_slots = (1<<AC97_SLOT_SPDIF_LEFT2)|(1<<AC97_SLOT_SPDIF_RIGHT2);
374 *rate_table = 2;
375 break;
376 }
377 return slots;
378 } else {
379 unsigned short slots;
380 slots = (1<<AC97_SLOT_PCM_LEFT)|(1<<AC97_SLOT_PCM_RIGHT);
381 if (ac97->scaps & AC97_SCAP_SURROUND_DAC)
382 slots |= (1<<AC97_SLOT_PCM_SLEFT)|(1<<AC97_SLOT_PCM_SRIGHT);
383 if (ac97->scaps & AC97_SCAP_CENTER_LFE_DAC)
384 slots |= (1<<AC97_SLOT_PCM_CENTER)|(1<<AC97_SLOT_LFE);
385 if (ac97->ext_id & AC97_EI_SPDIF) {
386 if (!(ac97->scaps & AC97_SCAP_SURROUND_DAC))
387 *spdif_slots = (1<<AC97_SLOT_SPDIF_LEFT)|(1<<AC97_SLOT_SPDIF_RIGHT);
388 else if (!(ac97->scaps & AC97_SCAP_CENTER_LFE_DAC))
389 *spdif_slots = (1<<AC97_SLOT_SPDIF_LEFT1)|(1<<AC97_SLOT_SPDIF_RIGHT1);
390 else
391 *spdif_slots = (1<<AC97_SLOT_SPDIF_LEFT2)|(1<<AC97_SLOT_SPDIF_RIGHT2);
392 }
393 *rate_table = 0;
394 return slots;
395 }
396 }
397
398 static unsigned short get_cslots(struct snd_ac97 *ac97)
399 {
400 unsigned short slots;
401
402 if (!ac97_is_audio(ac97))
403 return 0;
404 slots = (1<<AC97_SLOT_PCM_LEFT)|(1<<AC97_SLOT_PCM_RIGHT);
405 slots |= (1<<AC97_SLOT_MIC);
406 return slots;
407 }
408
409 static unsigned int get_rates(struct ac97_pcm *pcm, unsigned int cidx, unsigned short slots, int dbl)
410 {
411 int i, idx;
412 unsigned int rates = ~0;
413 unsigned char reg;
414
415 for (i = 3; i < 12; i++) {
416 if (!(slots & (1 << i)))
417 continue;
418 reg = get_slot_reg(pcm, cidx, i, dbl);
419 switch (reg) {
420 case AC97_PCM_FRONT_DAC_RATE: idx = AC97_RATES_FRONT_DAC; break;
421 case AC97_PCM_SURR_DAC_RATE: idx = AC97_RATES_SURR_DAC; break;
422 case AC97_PCM_LFE_DAC_RATE: idx = AC97_RATES_LFE_DAC; break;
423 case AC97_PCM_LR_ADC_RATE: idx = AC97_RATES_ADC; break;
424 case AC97_PCM_MIC_ADC_RATE: idx = AC97_RATES_MIC_ADC; break;
425 default: idx = AC97_RATES_SPDIF; break;
426 }
427 rates &= pcm->r[dbl].codec[cidx]->rates[idx];
428 }
429 if (!dbl)
430 rates &= ~(SNDRV_PCM_RATE_64000 | SNDRV_PCM_RATE_88200 |
431 SNDRV_PCM_RATE_96000);
432 return rates;
433 }
434
435 /**
436 * snd_ac97_pcm_assign - assign AC97 slots to given PCM streams
437 * @bus: the ac97 bus instance
438 * @pcms_count: count of PCMs to be assigned
439 * @pcms: PCMs to be assigned
440 *
441 * It assigns available AC97 slots for given PCMs. If none or only
442 * some slots are available, pcm->xxx.slots and pcm->xxx.rslots[] members
443 * are reduced and might be zero.
444 */
445 int snd_ac97_pcm_assign(struct snd_ac97_bus *bus,
446 unsigned short pcms_count,
447 const struct ac97_pcm *pcms)
448 {
449 int i, j, k;
450 const struct ac97_pcm *pcm;
451 struct ac97_pcm *rpcms, *rpcm;
452 unsigned short avail_slots[2][4];
453 unsigned char rate_table[2][4];
454 unsigned short tmp, slots;
455 unsigned short spdif_slots[4];
456 unsigned int rates;
457 struct snd_ac97 *codec;
458
459 rpcms = kcalloc(pcms_count, sizeof(struct ac97_pcm), GFP_KERNEL);
460 if (rpcms == NULL)
461 return -ENOMEM;
462 memset(avail_slots, 0, sizeof(avail_slots));
463 memset(rate_table, 0, sizeof(rate_table));
464 memset(spdif_slots, 0, sizeof(spdif_slots));
465 for (i = 0; i < 4; i++) {
466 codec = bus->codec[i];
467 if (!codec)
468 continue;
469 avail_slots[0][i] = get_pslots(codec, &rate_table[0][i], &spdif_slots[i]);
470 avail_slots[1][i] = get_cslots(codec);
471 if (!(codec->scaps & AC97_SCAP_INDEP_SDIN)) {
472 for (j = 0; j < i; j++) {
473 if (bus->codec[j])
474 avail_slots[1][i] &= ~avail_slots[1][j];
475 }
476 }
477 }
478 /* first step - exclusive devices */
479 for (i = 0; i < pcms_count; i++) {
480 pcm = &pcms[i];
481 rpcm = &rpcms[i];
482 /* low-level driver thinks that it's more clever */
483 if (pcm->copy_flag) {
484 *rpcm = *pcm;
485 continue;
486 }
487 rpcm->stream = pcm->stream;
488 rpcm->exclusive = pcm->exclusive;
489 rpcm->spdif = pcm->spdif;
490 rpcm->private_value = pcm->private_value;
491 rpcm->bus = bus;
492 rpcm->rates = ~0;
493 slots = pcm->r[0].slots;
494 for (j = 0; j < 4 && slots; j++) {
495 if (!bus->codec[j])
496 continue;
497 rates = ~0;
498 if (pcm->spdif && pcm->stream == 0)
499 tmp = spdif_slots[j];
500 else
501 tmp = avail_slots[pcm->stream][j];
502 if (pcm->exclusive) {
503 /* exclusive access */
504 tmp &= slots;
505 for (k = 0; k < i; k++) {
506 if (rpcm->stream == rpcms[k].stream)
507 tmp &= ~rpcms[k].r[0].rslots[j];
508 }
509 } else {
510 /* non-exclusive access */
511 tmp &= pcm->r[0].slots;
512 }
513 if (tmp) {
514 rpcm->r[0].rslots[j] = tmp;
515 rpcm->r[0].codec[j] = bus->codec[j];
516 rpcm->r[0].rate_table[j] = rate_table[pcm->stream][j];
517 if (bus->no_vra)
518 rates = SNDRV_PCM_RATE_48000;
519 else
520 rates = get_rates(rpcm, j, tmp, 0);
521 if (pcm->exclusive)
522 avail_slots[pcm->stream][j] &= ~tmp;
523 }
524 slots &= ~tmp;
525 rpcm->r[0].slots |= tmp;
526 rpcm->rates &= rates;
527 }
528 /* for double rate, we check the first codec only */
529 if (pcm->stream == SNDRV_PCM_STREAM_PLAYBACK &&
530 bus->codec[0] && (bus->codec[0]->flags & AC97_DOUBLE_RATE) &&
531 rate_table[pcm->stream][0] == 0) {
532 tmp = (1<<AC97_SLOT_PCM_LEFT) | (1<<AC97_SLOT_PCM_RIGHT) |
533 (1<<AC97_SLOT_PCM_LEFT_0) | (1<<AC97_SLOT_PCM_RIGHT_0);
534 if ((tmp & pcm->r[1].slots) == tmp) {
535 rpcm->r[1].slots = tmp;
536 rpcm->r[1].rslots[0] = tmp;
537 rpcm->r[1].rate_table[0] = 0;
538 rpcm->r[1].codec[0] = bus->codec[0];
539 if (pcm->exclusive)
540 avail_slots[pcm->stream][0] &= ~tmp;
541 if (bus->no_vra)
542 rates = SNDRV_PCM_RATE_96000;
543 else
544 rates = get_rates(rpcm, 0, tmp, 1);
545 rpcm->rates |= rates;
546 }
547 }
548 if (rpcm->rates == ~0)
549 rpcm->rates = 0; /* not used */
550 }
551 bus->pcms_count = pcms_count;
552 bus->pcms = rpcms;
553 return 0;
554 }
555
556 EXPORT_SYMBOL(snd_ac97_pcm_assign);
557
558 /**
559 * snd_ac97_pcm_open - opens the given AC97 pcm
560 * @pcm: the ac97 pcm instance
561 * @rate: rate in Hz, if codec does not support VRA, this value must be 48000Hz
562 * @cfg: output stream characteristics
563 * @slots: a subset of allocated slots (snd_ac97_pcm_assign) for this pcm
564 *
565 * It locks the specified slots and sets the given rate to AC97 registers.
566 */
567 int snd_ac97_pcm_open(struct ac97_pcm *pcm, unsigned int rate,
568 enum ac97_pcm_cfg cfg, unsigned short slots)
569 {
570 struct snd_ac97_bus *bus;
571 int i, cidx, r, ok_flag;
572 unsigned int reg_ok[4] = {0,0,0,0};
573 unsigned char reg;
574 int err = 0;
575
576 r = rate > 48000;
577 bus = pcm->bus;
578 if (cfg == AC97_PCM_CFG_SPDIF) {
579 int err;
580 for (cidx = 0; cidx < 4; cidx++)
581 if (bus->codec[cidx] && (bus->codec[cidx]->ext_id & AC97_EI_SPDIF)) {
582 err = set_spdif_rate(bus->codec[cidx], rate);
583 if (err < 0)
584 return err;
585 }
586 }
587 spin_lock_irq(&pcm->bus->bus_lock);
588 for (i = 3; i < 12; i++) {
589 if (!(slots & (1 << i)))
590 continue;
591 ok_flag = 0;
592 for (cidx = 0; cidx < 4; cidx++) {
593 if (bus->used_slots[pcm->stream][cidx] & (1 << i)) {
594 spin_unlock_irq(&pcm->bus->bus_lock);
595 err = -EBUSY;
596 goto error;
597 }
598 if (pcm->r[r].rslots[cidx] & (1 << i)) {
599 bus->used_slots[pcm->stream][cidx] |= (1 << i);
600 ok_flag++;
601 }
602 }
603 if (!ok_flag) {
604 spin_unlock_irq(&pcm->bus->bus_lock);
605 snd_printk(KERN_ERR "cannot find configuration for AC97 slot %i\n", i);
606 err = -EAGAIN;
607 goto error;
608 }
609 }
610 pcm->cur_dbl = r;
611 spin_unlock_irq(&pcm->bus->bus_lock);
612 for (i = 3; i < 12; i++) {
613 if (!(slots & (1 << i)))
614 continue;
615 for (cidx = 0; cidx < 4; cidx++) {
616 if (pcm->r[r].rslots[cidx] & (1 << i)) {
617 reg = get_slot_reg(pcm, cidx, i, r);
618 if (reg == 0xff) {
619 snd_printk(KERN_ERR "invalid AC97 slot %i?\n", i);
620 continue;
621 }
622 if (reg_ok[cidx] & (1 << (reg - AC97_PCM_FRONT_DAC_RATE)))
623 continue;
624 //printk(KERN_DEBUG "setting ac97 reg 0x%x to rate %d\n", reg, rate);
625 err = snd_ac97_set_rate(pcm->r[r].codec[cidx], reg, rate);
626 if (err < 0)
627 snd_printk(KERN_ERR "error in snd_ac97_set_rate: cidx=%d, reg=0x%x, rate=%d, err=%d\n", cidx, reg, rate, err);
628 else
629 reg_ok[cidx] |= (1 << (reg - AC97_PCM_FRONT_DAC_RATE));
630 }
631 }
632 }
633 pcm->aslots = slots;
634 return 0;
635
636 error:
637 pcm->aslots = slots;
638 snd_ac97_pcm_close(pcm);
639 return err;
640 }
641
642 EXPORT_SYMBOL(snd_ac97_pcm_open);
643
644 /**
645 * snd_ac97_pcm_close - closes the given AC97 pcm
646 * @pcm: the ac97 pcm instance
647 *
648 * It frees the locked AC97 slots.
649 */
650 int snd_ac97_pcm_close(struct ac97_pcm *pcm)
651 {
652 struct snd_ac97_bus *bus;
653 unsigned short slots = pcm->aslots;
654 int i, cidx;
655
656 #ifdef CONFIG_SND_AC97_POWER_SAVE
657 int r = pcm->cur_dbl;
658 for (i = 3; i < 12; i++) {
659 if (!(slots & (1 << i)))
660 continue;
661 for (cidx = 0; cidx < 4; cidx++) {
662 if (pcm->r[r].rslots[cidx] & (1 << i)) {
663 int reg = get_slot_reg(pcm, cidx, i, r);
664 snd_ac97_update_power(pcm->r[r].codec[cidx],
665 reg, 0);
666 }
667 }
668 }
669 #endif
670
671 bus = pcm->bus;
672 spin_lock_irq(&pcm->bus->bus_lock);
673 for (i = 3; i < 12; i++) {
674 if (!(slots & (1 << i)))
675 continue;
676 for (cidx = 0; cidx < 4; cidx++)
677 bus->used_slots[pcm->stream][cidx] &= ~(1 << i);
678 }
679 pcm->aslots = 0;
680 pcm->cur_dbl = 0;
681 spin_unlock_irq(&pcm->bus->bus_lock);
682 return 0;
683 }
684
685 EXPORT_SYMBOL(snd_ac97_pcm_close);
686
687 static int double_rate_hw_constraint_rate(struct snd_pcm_hw_params *params,
688 struct snd_pcm_hw_rule *rule)
689 {
690 struct snd_interval *channels = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
691 if (channels->min > 2) {
692 static const struct snd_interval single_rates = {
693 .min = 1,
694 .max = 48000,
695 };
696 struct snd_interval *rate = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE);
697 return snd_interval_refine(rate, &single_rates);
698 }
699 return 0;
700 }
701
702 static int double_rate_hw_constraint_channels(struct snd_pcm_hw_params *params,
703 struct snd_pcm_hw_rule *rule)
704 {
705 struct snd_interval *rate = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE);
706 if (rate->min > 48000) {
707 static const struct snd_interval double_rate_channels = {
708 .min = 2,
709 .max = 2,
710 };
711 struct snd_interval *channels = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
712 return snd_interval_refine(channels, &double_rate_channels);
713 }
714 return 0;
715 }
716
717 /**
718 * snd_ac97_pcm_double_rate_rules - set double rate constraints
719 * @runtime: the runtime of the ac97 front playback pcm
720 *
721 * Installs the hardware constraint rules to prevent using double rates and
722 * more than two channels at the same time.
723 */
724 int snd_ac97_pcm_double_rate_rules(struct snd_pcm_runtime *runtime)
725 {
726 int err;
727
728 err = snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
729 double_rate_hw_constraint_rate, NULL,
730 SNDRV_PCM_HW_PARAM_CHANNELS, -1);
731 if (err < 0)
732 return err;
733 err = snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
734 double_rate_hw_constraint_channels, NULL,
735 SNDRV_PCM_HW_PARAM_RATE, -1);
736 return err;
737 }
738
739 EXPORT_SYMBOL(snd_ac97_pcm_double_rate_rules);
WRT350N Kernel Patches