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x86: define OBJCOPYFLAGS explicitly for each target.
[wrt350n-kernel.git] / drivers / block / swim3.c
blobb4e462f154ea8f9920200e598590a9dfa1df3741
1 /*
2 * Driver for the SWIM3 (Super Woz Integrated Machine 3)
3 * floppy controller found on Power Macintoshes.
4 *
5 * Copyright (C) 1996 Paul Mackerras.
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
11 */
12
13 /*
14 * TODO:
15 * handle 2 drives
16 * handle GCR disks
17 */
18
19 #include <linux/stddef.h>
20 #include <linux/kernel.h>
21 #include <linux/sched.h>
22 #include <linux/timer.h>
23 #include <linux/delay.h>
24 #include <linux/fd.h>
25 #include <linux/ioctl.h>
26 #include <linux/blkdev.h>
27 #include <linux/interrupt.h>
28 #include <linux/module.h>
29 #include <linux/spinlock.h>
30 #include <asm/io.h>
31 #include <asm/dbdma.h>
32 #include <asm/prom.h>
33 #include <asm/uaccess.h>
34 #include <asm/mediabay.h>
35 #include <asm/machdep.h>
36 #include <asm/pmac_feature.h>
37
38 static struct request_queue *swim3_queue;
39 static struct gendisk *disks[2];
40 static struct request *fd_req;
41
42 #define MAX_FLOPPIES 2
43
44 enum swim_state {
45 idle,
46 locating,
47 seeking,
48 settling,
49 do_transfer,
50 jogging,
51 available,
52 revalidating,
53 ejecting
54 };
55
56 #define REG(x) unsigned char x; char x ## _pad[15];
57
58 /*
59 * The names for these registers mostly represent speculation on my part.
60 * It will be interesting to see how close they are to the names Apple uses.
61 */
62 struct swim3 {
63 REG(data);
64 REG(timer); /* counts down at 1MHz */
65 REG(error);
66 REG(mode);
67 REG(select); /* controls CA0, CA1, CA2 and LSTRB signals */
68 REG(setup);
69 REG(control); /* writing bits clears them */
70 REG(status); /* writing bits sets them in control */
71 REG(intr);
72 REG(nseek); /* # tracks to seek */
73 REG(ctrack); /* current track number */
74 REG(csect); /* current sector number */
75 REG(gap3); /* size of gap 3 in track format */
76 REG(sector); /* sector # to read or write */
77 REG(nsect); /* # sectors to read or write */
78 REG(intr_enable);
79 };
80
81 #define control_bic control
82 #define control_bis status
83
84 /* Bits in select register */
85 #define CA_MASK 7
86 #define LSTRB 8
87
88 /* Bits in control register */
89 #define DO_SEEK 0x80
90 #define FORMAT 0x40
91 #define SELECT 0x20
92 #define WRITE_SECTORS 0x10
93 #define DO_ACTION 0x08
94 #define DRIVE2_ENABLE 0x04
95 #define DRIVE_ENABLE 0x02
96 #define INTR_ENABLE 0x01
97
98 /* Bits in status register */
99 #define FIFO_1BYTE 0x80
100 #define FIFO_2BYTE 0x40
101 #define ERROR 0x20
102 #define DATA 0x08
103 #define RDDATA 0x04
104 #define INTR_PENDING 0x02
105 #define MARK_BYTE 0x01
106
107 /* Bits in intr and intr_enable registers */
108 #define ERROR_INTR 0x20
109 #define DATA_CHANGED 0x10
110 #define TRANSFER_DONE 0x08
111 #define SEEN_SECTOR 0x04
112 #define SEEK_DONE 0x02
113 #define TIMER_DONE 0x01
114
115 /* Bits in error register */
116 #define ERR_DATA_CRC 0x80
117 #define ERR_ADDR_CRC 0x40
118 #define ERR_OVERRUN 0x04
119 #define ERR_UNDERRUN 0x01
120
121 /* Bits in setup register */
122 #define S_SW_RESET 0x80
123 #define S_GCR_WRITE 0x40
124 #define S_IBM_DRIVE 0x20
125 #define S_TEST_MODE 0x10
126 #define S_FCLK_DIV2 0x08
127 #define S_GCR 0x04
128 #define S_COPY_PROT 0x02
129 #define S_INV_WDATA 0x01
130
131 /* Select values for swim3_action */
132 #define SEEK_POSITIVE 0
133 #define SEEK_NEGATIVE 4
134 #define STEP 1
135 #define MOTOR_ON 2
136 #define MOTOR_OFF 6
137 #define INDEX 3
138 #define EJECT 7
139 #define SETMFM 9
140 #define SETGCR 13
141
142 /* Select values for swim3_select and swim3_readbit */
143 #define STEP_DIR 0
144 #define STEPPING 1
145 #define MOTOR_ON 2
146 #define RELAX 3 /* also eject in progress */
147 #define READ_DATA_0 4
148 #define TWOMEG_DRIVE 5
149 #define SINGLE_SIDED 6 /* drive or diskette is 4MB type? */
150 #define DRIVE_PRESENT 7
151 #define DISK_IN 8
152 #define WRITE_PROT 9
153 #define TRACK_ZERO 10
154 #define TACHO 11
155 #define READ_DATA_1 12
156 #define MFM_MODE 13
157 #define SEEK_COMPLETE 14
158 #define ONEMEG_MEDIA 15
159
160 /* Definitions of values used in writing and formatting */
161 #define DATA_ESCAPE 0x99
162 #define GCR_SYNC_EXC 0x3f
163 #define GCR_SYNC_CONV 0x80
164 #define GCR_FIRST_MARK 0xd5
165 #define GCR_SECOND_MARK 0xaa
166 #define GCR_ADDR_MARK "\xd5\xaa\x00"
167 #define GCR_DATA_MARK "\xd5\xaa\x0b"
168 #define GCR_SLIP_BYTE "\x27\xaa"
169 #define GCR_SELF_SYNC "\x3f\xbf\x1e\x34\x3c\x3f"
170
171 #define DATA_99 "\x99\x99"
172 #define MFM_ADDR_MARK "\x99\xa1\x99\xa1\x99\xa1\x99\xfe"
173 #define MFM_INDEX_MARK "\x99\xc2\x99\xc2\x99\xc2\x99\xfc"
174 #define MFM_GAP_LEN 12
175
176 struct floppy_state {
177 enum swim_state state;
178 spinlock_t lock;
179 struct swim3 __iomem *swim3; /* hardware registers */
180 struct dbdma_regs __iomem *dma; /* DMA controller registers */
181 int swim3_intr; /* interrupt number for SWIM3 */
182 int dma_intr; /* interrupt number for DMA channel */
183 int cur_cyl; /* cylinder head is on, or -1 */
184 int cur_sector; /* last sector we saw go past */
185 int req_cyl; /* the cylinder for the current r/w request */
186 int head; /* head number ditto */
187 int req_sector; /* sector number ditto */
188 int scount; /* # sectors we're transferring at present */
189 int retries;
190 int settle_time;
191 int secpercyl; /* disk geometry information */
192 int secpertrack;
193 int total_secs;
194 int write_prot; /* 1 if write-protected, 0 if not, -1 dunno */
195 struct dbdma_cmd *dma_cmd;
196 int ref_count;
197 int expect_cyl;
198 struct timer_list timeout;
199 int timeout_pending;
200 int ejected;
201 wait_queue_head_t wait;
202 int wanted;
203 struct device_node* media_bay; /* NULL when not in bay */
204 char dbdma_cmd_space[5 * sizeof(struct dbdma_cmd)];
205 };
206
207 static struct floppy_state floppy_states[MAX_FLOPPIES];
208 static int floppy_count = 0;
209 static DEFINE_SPINLOCK(swim3_lock);
210
211 static unsigned short write_preamble[] = {
212 0x4e4e, 0x4e4e, 0x4e4e, 0x4e4e, 0x4e4e, /* gap field */
213 0, 0, 0, 0, 0, 0, /* sync field */
214 0x99a1, 0x99a1, 0x99a1, 0x99fb, /* data address mark */
215 0x990f /* no escape for 512 bytes */
216 };
217
218 static unsigned short write_postamble[] = {
219 0x9904, /* insert CRC */
220 0x4e4e, 0x4e4e,
221 0x9908, /* stop writing */
222 0, 0, 0, 0, 0, 0
223 };
224
225 static void swim3_select(struct floppy_state *fs, int sel);
226 static void swim3_action(struct floppy_state *fs, int action);
227 static int swim3_readbit(struct floppy_state *fs, int bit);
228 static void do_fd_request(struct request_queue * q);
229 static void start_request(struct floppy_state *fs);
230 static void set_timeout(struct floppy_state *fs, int nticks,
231 void (*proc)(unsigned long));
232 static void scan_track(struct floppy_state *fs);
233 static void seek_track(struct floppy_state *fs, int n);
234 static void init_dma(struct dbdma_cmd *cp, int cmd, void *buf, int count);
235 static void setup_transfer(struct floppy_state *fs);
236 static void act(struct floppy_state *fs);
237 static void scan_timeout(unsigned long data);
238 static void seek_timeout(unsigned long data);
239 static void settle_timeout(unsigned long data);
240 static void xfer_timeout(unsigned long data);
241 static irqreturn_t swim3_interrupt(int irq, void *dev_id);
242 /*static void fd_dma_interrupt(int irq, void *dev_id);*/
243 static int grab_drive(struct floppy_state *fs, enum swim_state state,
244 int interruptible);
245 static void release_drive(struct floppy_state *fs);
246 static int fd_eject(struct floppy_state *fs);
247 static int floppy_ioctl(struct inode *inode, struct file *filp,
248 unsigned int cmd, unsigned long param);
249 static int floppy_open(struct inode *inode, struct file *filp);
250 static int floppy_release(struct inode *inode, struct file *filp);
251 static int floppy_check_change(struct gendisk *disk);
252 static int floppy_revalidate(struct gendisk *disk);
253
254 #ifndef CONFIG_PMAC_MEDIABAY
255 #define check_media_bay(which, what) 1
256 #endif
257
258 static void swim3_select(struct floppy_state *fs, int sel)
259 {
260 struct swim3 __iomem *sw = fs->swim3;
261
262 out_8(&sw->select, RELAX);
263 if (sel & 8)
264 out_8(&sw->control_bis, SELECT);
265 else
266 out_8(&sw->control_bic, SELECT);
267 out_8(&sw->select, sel & CA_MASK);
268 }
269
270 static void swim3_action(struct floppy_state *fs, int action)
271 {
272 struct swim3 __iomem *sw = fs->swim3;
273
274 swim3_select(fs, action);
275 udelay(1);
276 out_8(&sw->select, sw->select | LSTRB);
277 udelay(2);
278 out_8(&sw->select, sw->select & ~LSTRB);
279 udelay(1);
280 }
281
282 static int swim3_readbit(struct floppy_state *fs, int bit)
283 {
284 struct swim3 __iomem *sw = fs->swim3;
285 int stat;
286
287 swim3_select(fs, bit);
288 udelay(1);
289 stat = in_8(&sw->status);
290 return (stat & DATA) == 0;
291 }
292
293 static void do_fd_request(struct request_queue * q)
294 {
295 int i;
296 for(i=0;i<floppy_count;i++)
297 {
298 #ifdef CONFIG_PMAC_MEDIABAY
299 if (floppy_states[i].media_bay &&
300 check_media_bay(floppy_states[i].media_bay, MB_FD))
301 continue;
302 #endif /* CONFIG_PMAC_MEDIABAY */
303 start_request(&floppy_states[i]);
304 }
305 }
306
307 static void start_request(struct floppy_state *fs)
308 {
309 struct request *req;
310 unsigned long x;
311
312 if (fs->state == idle && fs->wanted) {
313 fs->state = available;
314 wake_up(&fs->wait);
315 return;
316 }
317 while (fs->state == idle && (req = elv_next_request(swim3_queue))) {
318 #if 0
319 printk("do_fd_req: dev=%s cmd=%d sec=%ld nr_sec=%ld buf=%p\n",
320 req->rq_disk->disk_name, req->cmd,
321 (long)req->sector, req->nr_sectors, req->buffer);
322 printk(" errors=%d current_nr_sectors=%ld\n",
323 req->errors, req->current_nr_sectors);
324 #endif
325
326 if (req->sector < 0 || req->sector >= fs->total_secs) {
327 end_request(req, 0);
328 continue;
329 }
330 if (req->current_nr_sectors == 0) {
331 end_request(req, 1);
332 continue;
333 }
334 if (fs->ejected) {
335 end_request(req, 0);
336 continue;
337 }
338
339 if (rq_data_dir(req) == WRITE) {
340 if (fs->write_prot < 0)
341 fs->write_prot = swim3_readbit(fs, WRITE_PROT);
342 if (fs->write_prot) {
343 end_request(req, 0);
344 continue;
345 }
346 }
347
348 /* Do not remove the cast. req->sector is now a sector_t and
349 * can be 64 bits, but it will never go past 32 bits for this
350 * driver anyway, so we can safely cast it down and not have
351 * to do a 64/32 division
352 */
353 fs->req_cyl = ((long)req->sector) / fs->secpercyl;
354 x = ((long)req->sector) % fs->secpercyl;
355 fs->head = x / fs->secpertrack;
356 fs->req_sector = x % fs->secpertrack + 1;
357 fd_req = req;
358 fs->state = do_transfer;
359 fs->retries = 0;
360
361 act(fs);
362 }
363 }
364
365 static void set_timeout(struct floppy_state *fs, int nticks,
366 void (*proc)(unsigned long))
367 {
368 unsigned long flags;
369
370 spin_lock_irqsave(&fs->lock, flags);
371 if (fs->timeout_pending)
372 del_timer(&fs->timeout);
373 fs->timeout.expires = jiffies + nticks;
374 fs->timeout.function = proc;
375 fs->timeout.data = (unsigned long) fs;
376 add_timer(&fs->timeout);
377 fs->timeout_pending = 1;
378 spin_unlock_irqrestore(&fs->lock, flags);
379 }
380
381 static inline void scan_track(struct floppy_state *fs)
382 {
383 struct swim3 __iomem *sw = fs->swim3;
384
385 swim3_select(fs, READ_DATA_0);
386 in_8(&sw->intr); /* clear SEEN_SECTOR bit */
387 in_8(&sw->error);
388 out_8(&sw->intr_enable, SEEN_SECTOR);
389 out_8(&sw->control_bis, DO_ACTION);
390 /* enable intr when track found */
391 set_timeout(fs, HZ, scan_timeout); /* enable timeout */
392 }
393
394 static inline void seek_track(struct floppy_state *fs, int n)
395 {
396 struct swim3 __iomem *sw = fs->swim3;
397
398 if (n >= 0) {
399 swim3_action(fs, SEEK_POSITIVE);
400 sw->nseek = n;
401 } else {
402 swim3_action(fs, SEEK_NEGATIVE);
403 sw->nseek = -n;
404 }
405 fs->expect_cyl = (fs->cur_cyl >= 0)? fs->cur_cyl + n: -1;
406 swim3_select(fs, STEP);
407 in_8(&sw->error);
408 /* enable intr when seek finished */
409 out_8(&sw->intr_enable, SEEK_DONE);
410 out_8(&sw->control_bis, DO_SEEK);
411 set_timeout(fs, 3*HZ, seek_timeout); /* enable timeout */
412 fs->settle_time = 0;
413 }
414
415 static inline void init_dma(struct dbdma_cmd *cp, int cmd,
416 void *buf, int count)
417 {
418 st_le16(&cp->req_count, count);
419 st_le16(&cp->command, cmd);
420 st_le32(&cp->phy_addr, virt_to_bus(buf));
421 cp->xfer_status = 0;
422 }
423
424 static inline void setup_transfer(struct floppy_state *fs)
425 {
426 int n;
427 struct swim3 __iomem *sw = fs->swim3;
428 struct dbdma_cmd *cp = fs->dma_cmd;
429 struct dbdma_regs __iomem *dr = fs->dma;
430
431 if (fd_req->current_nr_sectors <= 0) {
432 printk(KERN_ERR "swim3: transfer 0 sectors?\n");
433 return;
434 }
435 if (rq_data_dir(fd_req) == WRITE)
436 n = 1;
437 else {
438 n = fs->secpertrack - fs->req_sector + 1;
439 if (n > fd_req->current_nr_sectors)
440 n = fd_req->current_nr_sectors;
441 }
442 fs->scount = n;
443 swim3_select(fs, fs->head? READ_DATA_1: READ_DATA_0);
444 out_8(&sw->sector, fs->req_sector);
445 out_8(&sw->nsect, n);
446 out_8(&sw->gap3, 0);
447 out_le32(&dr->cmdptr, virt_to_bus(cp));
448 if (rq_data_dir(fd_req) == WRITE) {
449 /* Set up 3 dma commands: write preamble, data, postamble */
450 init_dma(cp, OUTPUT_MORE, write_preamble, sizeof(write_preamble));
451 ++cp;
452 init_dma(cp, OUTPUT_MORE, fd_req->buffer, 512);
453 ++cp;
454 init_dma(cp, OUTPUT_LAST, write_postamble, sizeof(write_postamble));
455 } else {
456 init_dma(cp, INPUT_LAST, fd_req->buffer, n * 512);
457 }
458 ++cp;
459 out_le16(&cp->command, DBDMA_STOP);
460 out_8(&sw->control_bic, DO_ACTION | WRITE_SECTORS);
461 in_8(&sw->error);
462 out_8(&sw->control_bic, DO_ACTION | WRITE_SECTORS);
463 if (rq_data_dir(fd_req) == WRITE)
464 out_8(&sw->control_bis, WRITE_SECTORS);
465 in_8(&sw->intr);
466 out_le32(&dr->control, (RUN << 16) | RUN);
467 /* enable intr when transfer complete */
468 out_8(&sw->intr_enable, TRANSFER_DONE);
469 out_8(&sw->control_bis, DO_ACTION);
470 set_timeout(fs, 2*HZ, xfer_timeout); /* enable timeout */
471 }
472
473 static void act(struct floppy_state *fs)
474 {
475 for (;;) {
476 switch (fs->state) {
477 case idle:
478 return; /* XXX shouldn't get here */
479
480 case locating:
481 if (swim3_readbit(fs, TRACK_ZERO)) {
482 fs->cur_cyl = 0;
483 if (fs->req_cyl == 0)
484 fs->state = do_transfer;
485 else
486 fs->state = seeking;
487 break;
488 }
489 scan_track(fs);
490 return;
491
492 case seeking:
493 if (fs->cur_cyl < 0) {
494 fs->expect_cyl = -1;
495 fs->state = locating;
496 break;
497 }
498 if (fs->req_cyl == fs->cur_cyl) {
499 printk("whoops, seeking 0\n");
500 fs->state = do_transfer;
501 break;
502 }
503 seek_track(fs, fs->req_cyl - fs->cur_cyl);
504 return;
505
506 case settling:
507 /* check for SEEK_COMPLETE after 30ms */
508 fs->settle_time = (HZ + 32) / 33;
509 set_timeout(fs, fs->settle_time, settle_timeout);
510 return;
511
512 case do_transfer:
513 if (fs->cur_cyl != fs->req_cyl) {
514 if (fs->retries > 5) {
515 end_request(fd_req, 0);
516 fs->state = idle;
517 return;
518 }
519 fs->state = seeking;
520 break;
521 }
522 setup_transfer(fs);
523 return;
524
525 case jogging:
526 seek_track(fs, -5);
527 return;
528
529 default:
530 printk(KERN_ERR"swim3: unknown state %d\n", fs->state);
531 return;
532 }
533 }
534 }
535
536 static void scan_timeout(unsigned long data)
537 {
538 struct floppy_state *fs = (struct floppy_state *) data;
539 struct swim3 __iomem *sw = fs->swim3;
540
541 fs->timeout_pending = 0;
542 out_8(&sw->control_bic, DO_ACTION | WRITE_SECTORS);
543 out_8(&sw->select, RELAX);
544 out_8(&sw->intr_enable, 0);
545 fs->cur_cyl = -1;
546 if (fs->retries > 5) {
547 end_request(fd_req, 0);
548 fs->state = idle;
549 start_request(fs);
550 } else {
551 fs->state = jogging;
552 act(fs);
553 }
554 }
555
556 static void seek_timeout(unsigned long data)
557 {
558 struct floppy_state *fs = (struct floppy_state *) data;
559 struct swim3 __iomem *sw = fs->swim3;
560
561 fs->timeout_pending = 0;
562 out_8(&sw->control_bic, DO_SEEK);
563 out_8(&sw->select, RELAX);
564 out_8(&sw->intr_enable, 0);
565 printk(KERN_ERR "swim3: seek timeout\n");
566 end_request(fd_req, 0);
567 fs->state = idle;
568 start_request(fs);
569 }
570
571 static void settle_timeout(unsigned long data)
572 {
573 struct floppy_state *fs = (struct floppy_state *) data;
574 struct swim3 __iomem *sw = fs->swim3;
575
576 fs->timeout_pending = 0;
577 if (swim3_readbit(fs, SEEK_COMPLETE)) {
578 out_8(&sw->select, RELAX);
579 fs->state = locating;
580 act(fs);
581 return;
582 }
583 out_8(&sw->select, RELAX);
584 if (fs->settle_time < 2*HZ) {
585 ++fs->settle_time;
586 set_timeout(fs, 1, settle_timeout);
587 return;
588 }
589 printk(KERN_ERR "swim3: seek settle timeout\n");
590 end_request(fd_req, 0);
591 fs->state = idle;
592 start_request(fs);
593 }
594
595 static void xfer_timeout(unsigned long data)
596 {
597 struct floppy_state *fs = (struct floppy_state *) data;
598 struct swim3 __iomem *sw = fs->swim3;
599 struct dbdma_regs __iomem *dr = fs->dma;
600 struct dbdma_cmd *cp = fs->dma_cmd;
601 unsigned long s;
602 int n;
603
604 fs->timeout_pending = 0;
605 out_le32(&dr->control, RUN << 16);
606 /* We must wait a bit for dbdma to stop */
607 for (n = 0; (in_le32(&dr->status) & ACTIVE) && n < 1000; n++)
608 udelay(1);
609 out_8(&sw->intr_enable, 0);
610 out_8(&sw->control_bic, WRITE_SECTORS | DO_ACTION);
611 out_8(&sw->select, RELAX);
612 if (rq_data_dir(fd_req) == WRITE)
613 ++cp;
614 if (ld_le16(&cp->xfer_status) != 0)
615 s = fs->scount - ((ld_le16(&cp->res_count) + 511) >> 9);
616 else
617 s = 0;
618 fd_req->sector += s;
619 fd_req->current_nr_sectors -= s;
620 printk(KERN_ERR "swim3: timeout %sing sector %ld\n",
621 (rq_data_dir(fd_req)==WRITE? "writ": "read"), (long)fd_req->sector);
622 end_request(fd_req, 0);
623 fs->state = idle;
624 start_request(fs);
625 }
626
627 static irqreturn_t swim3_interrupt(int irq, void *dev_id)
628 {
629 struct floppy_state *fs = (struct floppy_state *) dev_id;
630 struct swim3 __iomem *sw = fs->swim3;
631 int intr, err, n;
632 int stat, resid;
633 struct dbdma_regs __iomem *dr;
634 struct dbdma_cmd *cp;
635
636 intr = in_8(&sw->intr);
637 err = (intr & ERROR_INTR)? in_8(&sw->error): 0;
638 if ((intr & ERROR_INTR) && fs->state != do_transfer)
639 printk(KERN_ERR "swim3_interrupt, state=%d, dir=%x, intr=%x, err=%x\n",
640 fs->state, rq_data_dir(fd_req), intr, err);
641 switch (fs->state) {
642 case locating:
643 if (intr & SEEN_SECTOR) {
644 out_8(&sw->control_bic, DO_ACTION | WRITE_SECTORS);
645 out_8(&sw->select, RELAX);
646 out_8(&sw->intr_enable, 0);
647 del_timer(&fs->timeout);
648 fs->timeout_pending = 0;
649 if (sw->ctrack == 0xff) {
650 printk(KERN_ERR "swim3: seen sector but cyl=ff?\n");
651 fs->cur_cyl = -1;
652 if (fs->retries > 5) {
653 end_request(fd_req, 0);
654 fs->state = idle;
655 start_request(fs);
656 } else {
657 fs->state = jogging;
658 act(fs);
659 }
660 break;
661 }
662 fs->cur_cyl = sw->ctrack;
663 fs->cur_sector = sw->csect;
664 if (fs->expect_cyl != -1 && fs->expect_cyl != fs->cur_cyl)
665 printk(KERN_ERR "swim3: expected cyl %d, got %d\n",
666 fs->expect_cyl, fs->cur_cyl);
667 fs->state = do_transfer;
668 act(fs);
669 }
670 break;
671 case seeking:
672 case jogging:
673 if (sw->nseek == 0) {
674 out_8(&sw->control_bic, DO_SEEK);
675 out_8(&sw->select, RELAX);
676 out_8(&sw->intr_enable, 0);
677 del_timer(&fs->timeout);
678 fs->timeout_pending = 0;
679 if (fs->state == seeking)
680 ++fs->retries;
681 fs->state = settling;
682 act(fs);
683 }
684 break;
685 case settling:
686 out_8(&sw->intr_enable, 0);
687 del_timer(&fs->timeout);
688 fs->timeout_pending = 0;
689 act(fs);
690 break;
691 case do_transfer:
692 if ((intr & (ERROR_INTR | TRANSFER_DONE)) == 0)
693 break;
694 out_8(&sw->intr_enable, 0);
695 out_8(&sw->control_bic, WRITE_SECTORS | DO_ACTION);
696 out_8(&sw->select, RELAX);
697 del_timer(&fs->timeout);
698 fs->timeout_pending = 0;
699 dr = fs->dma;
700 cp = fs->dma_cmd;
701 if (rq_data_dir(fd_req) == WRITE)
702 ++cp;
703 /*
704 * Check that the main data transfer has finished.
705 * On writing, the swim3 sometimes doesn't use
706 * up all the bytes of the postamble, so we can still
707 * see DMA active here. That doesn't matter as long
708 * as all the sector data has been transferred.
709 */
710 if ((intr & ERROR_INTR) == 0 && cp->xfer_status == 0) {
711 /* wait a little while for DMA to complete */
712 for (n = 0; n < 100; ++n) {
713 if (cp->xfer_status != 0)
714 break;
715 udelay(1);
716 barrier();
717 }
718 }
719 /* turn off DMA */
720 out_le32(&dr->control, (RUN | PAUSE) << 16);
721 stat = ld_le16(&cp->xfer_status);
722 resid = ld_le16(&cp->res_count);
723 if (intr & ERROR_INTR) {
724 n = fs->scount - 1 - resid / 512;
725 if (n > 0) {
726 fd_req->sector += n;
727 fd_req->current_nr_sectors -= n;
728 fd_req->buffer += n * 512;
729 fs->req_sector += n;
730 }
731 if (fs->retries < 5) {
732 ++fs->retries;
733 act(fs);
734 } else {
735 printk("swim3: error %sing block %ld (err=%x)\n",
736 rq_data_dir(fd_req) == WRITE? "writ": "read",
737 (long)fd_req->sector, err);
738 end_request(fd_req, 0);
739 fs->state = idle;
740 }
741 } else {
742 if ((stat & ACTIVE) == 0 || resid != 0) {
743 /* musta been an error */
744 printk(KERN_ERR "swim3: fd dma: stat=%x resid=%d\n", stat, resid);
745 printk(KERN_ERR " state=%d, dir=%x, intr=%x, err=%x\n",
746 fs->state, rq_data_dir(fd_req), intr, err);
747 end_request(fd_req, 0);
748 fs->state = idle;
749 start_request(fs);
750 break;
751 }
752 fd_req->sector += fs->scount;
753 fd_req->current_nr_sectors -= fs->scount;
754 fd_req->buffer += fs->scount * 512;
755 if (fd_req->current_nr_sectors <= 0) {
756 end_request(fd_req, 1);
757 fs->state = idle;
758 } else {
759 fs->req_sector += fs->scount;
760 if (fs->req_sector > fs->secpertrack) {
761 fs->req_sector -= fs->secpertrack;
762 if (++fs->head > 1) {
763 fs->head = 0;
764 ++fs->req_cyl;
765 }
766 }
767 act(fs);
768 }
769 }
770 if (fs->state == idle)
771 start_request(fs);
772 break;
773 default:
774 printk(KERN_ERR "swim3: don't know what to do in state %d\n", fs->state);
775 }
776 return IRQ_HANDLED;
777 }
778
779 /*
780 static void fd_dma_interrupt(int irq, void *dev_id)
781 {
782 }
783 */
784
785 static int grab_drive(struct floppy_state *fs, enum swim_state state,
786 int interruptible)
787 {
788 unsigned long flags;
789
790 spin_lock_irqsave(&fs->lock, flags);
791 if (fs->state != idle) {
792 ++fs->wanted;
793 while (fs->state != available) {
794 if (interruptible && signal_pending(current)) {
795 --fs->wanted;
796 spin_unlock_irqrestore(&fs->lock, flags);
797 return -EINTR;
798 }
799 interruptible_sleep_on(&fs->wait);
800 }
801 --fs->wanted;
802 }
803 fs->state = state;
804 spin_unlock_irqrestore(&fs->lock, flags);
805 return 0;
806 }
807
808 static void release_drive(struct floppy_state *fs)
809 {
810 unsigned long flags;
811
812 spin_lock_irqsave(&fs->lock, flags);
813 fs->state = idle;
814 start_request(fs);
815 spin_unlock_irqrestore(&fs->lock, flags);
816 }
817
818 static int fd_eject(struct floppy_state *fs)
819 {
820 int err, n;
821
822 err = grab_drive(fs, ejecting, 1);
823 if (err)
824 return err;
825 swim3_action(fs, EJECT);
826 for (n = 20; n > 0; --n) {
827 if (signal_pending(current)) {
828 err = -EINTR;
829 break;
830 }
831 swim3_select(fs, RELAX);
832 schedule_timeout_interruptible(1);
833 if (swim3_readbit(fs, DISK_IN) == 0)
834 break;
835 }
836 swim3_select(fs, RELAX);
837 udelay(150);
838 fs->ejected = 1;
839 release_drive(fs);
840 return err;
841 }
842
843 static struct floppy_struct floppy_type =
844 { 2880,18,2,80,0,0x1B,0x00,0xCF,0x6C,NULL }; /* 7 1.44MB 3.5" */
845
846 static int floppy_ioctl(struct inode *inode, struct file *filp,
847 unsigned int cmd, unsigned long param)
848 {
849 struct floppy_state *fs = inode->i_bdev->bd_disk->private_data;
850 int err;
851
852 if ((cmd & 0x80) && !capable(CAP_SYS_ADMIN))
853 return -EPERM;
854
855 #ifdef CONFIG_PMAC_MEDIABAY
856 if (fs->media_bay && check_media_bay(fs->media_bay, MB_FD))
857 return -ENXIO;
858 #endif
859
860 switch (cmd) {
861 case FDEJECT:
862 if (fs->ref_count != 1)
863 return -EBUSY;
864 err = fd_eject(fs);
865 return err;
866 case FDGETPRM:
867 if (copy_to_user((void __user *) param, &floppy_type,
868 sizeof(struct floppy_struct)))
869 return -EFAULT;
870 return 0;
871 }
872 return -ENOTTY;
873 }
874
875 static int floppy_open(struct inode *inode, struct file *filp)
876 {
877 struct floppy_state *fs = inode->i_bdev->bd_disk->private_data;
878 struct swim3 __iomem *sw = fs->swim3;
879 int n, err = 0;
880
881 if (fs->ref_count == 0) {
882 #ifdef CONFIG_PMAC_MEDIABAY
883 if (fs->media_bay && check_media_bay(fs->media_bay, MB_FD))
884 return -ENXIO;
885 #endif
886 out_8(&sw->setup, S_IBM_DRIVE | S_FCLK_DIV2);
887 out_8(&sw->control_bic, 0xff);
888 out_8(&sw->mode, 0x95);
889 udelay(10);
890 out_8(&sw->intr_enable, 0);
891 out_8(&sw->control_bis, DRIVE_ENABLE | INTR_ENABLE);
892 swim3_action(fs, MOTOR_ON);
893 fs->write_prot = -1;
894 fs->cur_cyl = -1;
895 for (n = 0; n < 2 * HZ; ++n) {
896 if (n >= HZ/30 && swim3_readbit(fs, SEEK_COMPLETE))
897 break;
898 if (signal_pending(current)) {
899 err = -EINTR;
900 break;
901 }
902 swim3_select(fs, RELAX);
903 schedule_timeout_interruptible(1);
904 }
905 if (err == 0 && (swim3_readbit(fs, SEEK_COMPLETE) == 0
906 || swim3_readbit(fs, DISK_IN) == 0))
907 err = -ENXIO;
908 swim3_action(fs, SETMFM);
909 swim3_select(fs, RELAX);
910
911 } else if (fs->ref_count == -1 || filp->f_flags & O_EXCL)
912 return -EBUSY;
913
914 if (err == 0 && (filp->f_flags & O_NDELAY) == 0
915 && (filp->f_mode & 3)) {
916 check_disk_change(inode->i_bdev);
917 if (fs->ejected)
918 err = -ENXIO;
919 }
920
921 if (err == 0 && (filp->f_mode & 2)) {
922 if (fs->write_prot < 0)
923 fs->write_prot = swim3_readbit(fs, WRITE_PROT);
924 if (fs->write_prot)
925 err = -EROFS;
926 }
927
928 if (err) {
929 if (fs->ref_count == 0) {
930 swim3_action(fs, MOTOR_OFF);
931 out_8(&sw->control_bic, DRIVE_ENABLE | INTR_ENABLE);
932 swim3_select(fs, RELAX);
933 }
934 return err;
935 }
936
937 if (filp->f_flags & O_EXCL)
938 fs->ref_count = -1;
939 else
940 ++fs->ref_count;
941
942 return 0;
943 }
944
945 static int floppy_release(struct inode *inode, struct file *filp)
946 {
947 struct floppy_state *fs = inode->i_bdev->bd_disk->private_data;
948 struct swim3 __iomem *sw = fs->swim3;
949 if (fs->ref_count > 0 && --fs->ref_count == 0) {
950 swim3_action(fs, MOTOR_OFF);
951 out_8(&sw->control_bic, 0xff);
952 swim3_select(fs, RELAX);
953 }
954 return 0;
955 }
956
957 static int floppy_check_change(struct gendisk *disk)
958 {
959 struct floppy_state *fs = disk->private_data;
960 return fs->ejected;
961 }
962
963 static int floppy_revalidate(struct gendisk *disk)
964 {
965 struct floppy_state *fs = disk->private_data;
966 struct swim3 __iomem *sw;
967 int ret, n;
968
969 #ifdef CONFIG_PMAC_MEDIABAY
970 if (fs->media_bay && check_media_bay(fs->media_bay, MB_FD))
971 return -ENXIO;
972 #endif
973
974 sw = fs->swim3;
975 grab_drive(fs, revalidating, 0);
976 out_8(&sw->intr_enable, 0);
977 out_8(&sw->control_bis, DRIVE_ENABLE);
978 swim3_action(fs, MOTOR_ON); /* necessary? */
979 fs->write_prot = -1;
980 fs->cur_cyl = -1;
981 mdelay(1);
982 for (n = HZ; n > 0; --n) {
983 if (swim3_readbit(fs, SEEK_COMPLETE))
984 break;
985 if (signal_pending(current))
986 break;
987 swim3_select(fs, RELAX);
988 schedule_timeout_interruptible(1);
989 }
990 ret = swim3_readbit(fs, SEEK_COMPLETE) == 0
991 || swim3_readbit(fs, DISK_IN) == 0;
992 if (ret)
993 swim3_action(fs, MOTOR_OFF);
994 else {
995 fs->ejected = 0;
996 swim3_action(fs, SETMFM);
997 }
998 swim3_select(fs, RELAX);
999
1000 release_drive(fs);
1001 return ret;
1002 }
1003
1004 static struct block_device_operations floppy_fops = {
1005 .open = floppy_open,
1006 .release = floppy_release,
1007 .ioctl = floppy_ioctl,
1008 .media_changed = floppy_check_change,
1009 .revalidate_disk= floppy_revalidate,
1010 };
1011
1012 static int swim3_add_device(struct macio_dev *mdev, int index)
1013 {
1014 struct device_node *swim = mdev->ofdev.node;
1015 struct device_node *mediabay;
1016 struct floppy_state *fs = &floppy_states[index];
1017 int rc = -EBUSY;
1018
1019 /* Check & Request resources */
1020 if (macio_resource_count(mdev) < 2) {
1021 printk(KERN_WARNING "ifd%d: no address for %s\n",
1022 index, swim->full_name);
1023 return -ENXIO;
1024 }
1025 if (macio_irq_count(mdev) < 2) {
1026 printk(KERN_WARNING "fd%d: no intrs for device %s\n",
1027 index, swim->full_name);
1028 }
1029 if (macio_request_resource(mdev, 0, "swim3 (mmio)")) {
1030 printk(KERN_ERR "fd%d: can't request mmio resource for %s\n",
1031 index, swim->full_name);
1032 return -EBUSY;
1033 }
1034 if (macio_request_resource(mdev, 1, "swim3 (dma)")) {
1035 printk(KERN_ERR "fd%d: can't request dma resource for %s\n",
1036 index, swim->full_name);
1037 macio_release_resource(mdev, 0);
1038 return -EBUSY;
1039 }
1040 dev_set_drvdata(&mdev->ofdev.dev, fs);
1041
1042 mediabay = (strcasecmp(swim->parent->type, "media-bay") == 0) ?
1043 swim->parent : NULL;
1044 if (mediabay == NULL)
1045 pmac_call_feature(PMAC_FTR_SWIM3_ENABLE, swim, 0, 1);
1046
1047 memset(fs, 0, sizeof(*fs));
1048 spin_lock_init(&fs->lock);
1049 fs->state = idle;
1050 fs->swim3 = (struct swim3 __iomem *)
1051 ioremap(macio_resource_start(mdev, 0), 0x200);
1052 if (fs->swim3 == NULL) {
1053 printk("fd%d: couldn't map registers for %s\n",
1054 index, swim->full_name);
1055 rc = -ENOMEM;
1056 goto out_release;
1057 }
1058 fs->dma = (struct dbdma_regs __iomem *)
1059 ioremap(macio_resource_start(mdev, 1), 0x200);
1060 if (fs->dma == NULL) {
1061 printk("fd%d: couldn't map DMA for %s\n",
1062 index, swim->full_name);
1063 iounmap(fs->swim3);
1064 rc = -ENOMEM;
1065 goto out_release;
1066 }
1067 fs->swim3_intr = macio_irq(mdev, 0);
1068 fs->dma_intr = macio_irq(mdev, 1);;
1069 fs->cur_cyl = -1;
1070 fs->cur_sector = -1;
1071 fs->secpercyl = 36;
1072 fs->secpertrack = 18;
1073 fs->total_secs = 2880;
1074 fs->media_bay = mediabay;
1075 init_waitqueue_head(&fs->wait);
1076
1077 fs->dma_cmd = (struct dbdma_cmd *) DBDMA_ALIGN(fs->dbdma_cmd_space);
1078 memset(fs->dma_cmd, 0, 2 * sizeof(struct dbdma_cmd));
1079 st_le16(&fs->dma_cmd[1].command, DBDMA_STOP);
1080
1081 if (request_irq(fs->swim3_intr, swim3_interrupt, 0, "SWIM3", fs)) {
1082 printk(KERN_ERR "fd%d: couldn't request irq %d for %s\n",
1083 index, fs->swim3_intr, swim->full_name);
1084 pmac_call_feature(PMAC_FTR_SWIM3_ENABLE, swim, 0, 0);
1085 goto out_unmap;
1086 return -EBUSY;
1087 }
1088 /*
1089 if (request_irq(fs->dma_intr, fd_dma_interrupt, 0, "SWIM3-dma", fs)) {
1090 printk(KERN_ERR "Couldn't get irq %d for SWIM3 DMA",
1091 fs->dma_intr);
1092 return -EBUSY;
1093 }
1094 */
1095
1096 init_timer(&fs->timeout);
1097
1098 printk(KERN_INFO "fd%d: SWIM3 floppy controller %s\n", floppy_count,
1099 mediabay ? "in media bay" : "");
1100
1101 return 0;
1102
1103 out_unmap:
1104 iounmap(fs->dma);
1105 iounmap(fs->swim3);
1106
1107 out_release:
1108 macio_release_resource(mdev, 0);
1109 macio_release_resource(mdev, 1);
1110
1111 return rc;
1112 }
1113
1114 static int __devinit swim3_attach(struct macio_dev *mdev, const struct of_device_id *match)
1115 {
1116 int i, rc;
1117 struct gendisk *disk;
1118
1119 /* Add the drive */
1120 rc = swim3_add_device(mdev, floppy_count);
1121 if (rc)
1122 return rc;
1123
1124 /* Now create the queue if not there yet */
1125 if (swim3_queue == NULL) {
1126 /* If we failed, there isn't much we can do as the driver is still
1127 * too dumb to remove the device, just bail out
1128 */
1129 if (register_blkdev(FLOPPY_MAJOR, "fd"))
1130 return 0;
1131 swim3_queue = blk_init_queue(do_fd_request, &swim3_lock);
1132 if (swim3_queue == NULL) {
1133 unregister_blkdev(FLOPPY_MAJOR, "fd");
1134 return 0;
1135 }
1136 }
1137
1138 /* Now register that disk. Same comment about failure handling */
1139 i = floppy_count++;
1140 disk = disks[i] = alloc_disk(1);
1141 if (disk == NULL)
1142 return 0;
1143
1144 disk->major = FLOPPY_MAJOR;
1145 disk->first_minor = i;
1146 disk->fops = &floppy_fops;
1147 disk->private_data = &floppy_states[i];
1148 disk->queue = swim3_queue;
1149 disk->flags |= GENHD_FL_REMOVABLE;
1150 sprintf(disk->disk_name, "fd%d", i);
1151 set_capacity(disk, 2880);
1152 add_disk(disk);
1153
1154 return 0;
1155 }
1156
1157 static struct of_device_id swim3_match[] =
1158 {
1159 {
1160 .name = "swim3",
1161 },
1162 {
1163 .compatible = "ohare-swim3"
1164 },
1165 {
1166 .compatible = "swim3"
1167 },
1168 };
1169
1170 static struct macio_driver swim3_driver =
1171 {
1172 .name = "swim3",
1173 .match_table = swim3_match,
1174 .probe = swim3_attach,
1175 #if 0
1176 .suspend = swim3_suspend,
1177 .resume = swim3_resume,
1178 #endif
1179 };
1180
1181
1182 int swim3_init(void)
1183 {
1184 macio_register_driver(&swim3_driver);
1185 return 0;
1186 }
1187
1188 module_init(swim3_init)
1189
1190 MODULE_LICENSE("GPL");
1191 MODULE_AUTHOR("Paul Mackerras");
1192 MODULE_ALIAS_BLOCKDEV_MAJOR(FLOPPY_MAJOR);
WRT350N Kernel Patches