Use helpers to obtain task pid in printks (arch code)
[wrt350n-kernel.git] / arch / arm / mach-s3c2412 / irq.c
blobe9d0c769f5da2e576891953d27f8f6d18c477714
1 /* linux/arch/arm/mach-s3c2412/irq.c
3 * Copyright (c) 2006 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 #include <linux/init.h>
23 #include <linux/module.h>
24 #include <linux/interrupt.h>
25 #include <linux/ioport.h>
26 #include <linux/sysdev.h>
28 #include <asm/hardware.h>
29 #include <asm/irq.h>
30 #include <asm/io.h>
32 #include <asm/mach/irq.h>
34 #include <asm/arch/regs-irq.h>
35 #include <asm/arch/regs-gpio.h>
37 #include <asm/plat-s3c24xx/cpu.h>
38 #include <asm/plat-s3c24xx/irq.h>
39 #include <asm/plat-s3c24xx/pm.h>
41 #define INTMSK(start, end) ((1 << ((end) + 1 - (start))) - 1)
42 #define INTMSK_SUB(start, end) (INTMSK(start, end) << ((start - S3C2410_IRQSUB(0))))
44 /* the s3c2412 changes the behaviour of IRQ_EINT0 through IRQ_EINT3 by
45 * having them turn up in both the INT* and the EINT* registers. Whilst
46 * both show the status, they both now need to be acked when the IRQs
47 * go off.
50 static void
51 s3c2412_irq_mask(unsigned int irqno)
53 unsigned long bitval = 1UL << (irqno - IRQ_EINT0);
54 unsigned long mask;
56 mask = __raw_readl(S3C2410_INTMSK);
57 __raw_writel(mask | bitval, S3C2410_INTMSK);
59 mask = __raw_readl(S3C2412_EINTMASK);
60 __raw_writel(mask | bitval, S3C2412_EINTMASK);
63 static inline void
64 s3c2412_irq_ack(unsigned int irqno)
66 unsigned long bitval = 1UL << (irqno - IRQ_EINT0);
68 __raw_writel(bitval, S3C2412_EINTPEND);
69 __raw_writel(bitval, S3C2410_SRCPND);
70 __raw_writel(bitval, S3C2410_INTPND);
73 static inline void
74 s3c2412_irq_maskack(unsigned int irqno)
76 unsigned long bitval = 1UL << (irqno - IRQ_EINT0);
77 unsigned long mask;
79 mask = __raw_readl(S3C2410_INTMSK);
80 __raw_writel(mask|bitval, S3C2410_INTMSK);
82 mask = __raw_readl(S3C2412_EINTMASK);
83 __raw_writel(mask | bitval, S3C2412_EINTMASK);
85 __raw_writel(bitval, S3C2412_EINTPEND);
86 __raw_writel(bitval, S3C2410_SRCPND);
87 __raw_writel(bitval, S3C2410_INTPND);
90 static void
91 s3c2412_irq_unmask(unsigned int irqno)
93 unsigned long bitval = 1UL << (irqno - IRQ_EINT0);
94 unsigned long mask;
96 mask = __raw_readl(S3C2412_EINTMASK);
97 __raw_writel(mask & ~bitval, S3C2412_EINTMASK);
99 mask = __raw_readl(S3C2410_INTMSK);
100 __raw_writel(mask & ~bitval, S3C2410_INTMSK);
103 static struct irq_chip s3c2412_irq_eint0t4 = {
104 .ack = s3c2412_irq_ack,
105 .mask = s3c2412_irq_mask,
106 .unmask = s3c2412_irq_unmask,
107 .set_wake = s3c_irq_wake,
108 .set_type = s3c_irqext_type,
111 #define INTBIT(x) (1 << ((x) - S3C2410_IRQSUB(0)))
113 /* CF and SDI sub interrupts */
115 static void s3c2412_irq_demux_cfsdi(unsigned int irq, struct irq_desc *desc)
117 unsigned int subsrc, submsk;
119 subsrc = __raw_readl(S3C2410_SUBSRCPND);
120 submsk = __raw_readl(S3C2410_INTSUBMSK);
122 subsrc &= ~submsk;
124 if (subsrc & INTBIT(IRQ_S3C2412_SDI))
125 desc_handle_irq(IRQ_S3C2412_SDI, irq_desc + IRQ_S3C2412_SDI);
127 if (subsrc & INTBIT(IRQ_S3C2412_CF))
128 desc_handle_irq(IRQ_S3C2412_CF, irq_desc + IRQ_S3C2412_CF);
131 #define INTMSK_CFSDI (1UL << (IRQ_S3C2412_CFSDI - IRQ_EINT0))
132 #define SUBMSK_CFSDI INTMSK_SUB(IRQ_S3C2412_SDI, IRQ_S3C2412_CF)
134 static void s3c2412_irq_cfsdi_mask(unsigned int irqno)
136 s3c_irqsub_mask(irqno, INTMSK_CFSDI, SUBMSK_CFSDI);
139 static void s3c2412_irq_cfsdi_unmask(unsigned int irqno)
141 s3c_irqsub_unmask(irqno, INTMSK_CFSDI);
144 static void s3c2412_irq_cfsdi_ack(unsigned int irqno)
146 s3c_irqsub_maskack(irqno, INTMSK_CFSDI, SUBMSK_CFSDI);
149 static struct irq_chip s3c2412_irq_cfsdi = {
150 .name = "s3c2412-cfsdi",
151 .ack = s3c2412_irq_cfsdi_ack,
152 .mask = s3c2412_irq_cfsdi_mask,
153 .unmask = s3c2412_irq_cfsdi_unmask,
156 static int s3c2412_irq_add(struct sys_device *sysdev)
158 unsigned int irqno;
160 for (irqno = IRQ_EINT0; irqno <= IRQ_EINT3; irqno++) {
161 set_irq_chip(irqno, &s3c2412_irq_eint0t4);
162 set_irq_handler(irqno, handle_edge_irq);
163 set_irq_flags(irqno, IRQF_VALID);
166 /* add demux support for CF/SDI */
168 set_irq_chained_handler(IRQ_S3C2412_CFSDI, s3c2412_irq_demux_cfsdi);
170 for (irqno = IRQ_S3C2412_SDI; irqno <= IRQ_S3C2412_CF; irqno++) {
171 set_irq_chip(irqno, &s3c2412_irq_cfsdi);
172 set_irq_handler(irqno, handle_level_irq);
173 set_irq_flags(irqno, IRQF_VALID);
176 return 0;
179 static struct sysdev_driver s3c2412_irq_driver = {
180 .add = s3c2412_irq_add,
181 .suspend = s3c24xx_irq_suspend,
182 .resume = s3c24xx_irq_resume,
185 static int s3c2412_irq_init(void)
187 return sysdev_driver_register(&s3c2412_sysclass, &s3c2412_irq_driver);
190 arch_initcall(s3c2412_irq_init);