2 * arch/xtensa/kernel/setup.c
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
8 * Copyright (C) 1995 Linus Torvalds
9 * Copyright (C) 2001 - 2005 Tensilica Inc.
11 * Chris Zankel <chris@zankel.net>
12 * Joe Taylor <joe@tensilica.com, joetylr@yahoo.com>
14 * Marc Gauthier<marc@tensilica.com> <marc@alumni.uwaterloo.ca>
17 #include <linux/errno.h>
18 #include <linux/init.h>
19 #include <linux/proc_fs.h>
20 #include <linux/screen_info.h>
21 #include <linux/bootmem.h>
22 #include <linux/kernel.h>
24 #if defined(CONFIG_VGA_CONSOLE) || defined(CONFIG_DUMMY_CONSOLE)
25 # include <linux/console.h>
29 # include <linux/timex.h>
33 # include <linux/seq_file.h>
36 #include <asm/system.h>
37 #include <asm/bootparam.h>
38 #include <asm/pgtable.h>
39 #include <asm/processor.h>
40 #include <asm/timex.h>
41 #include <asm/platform.h>
43 #include <asm/setup.h>
44 #include <asm/param.h>
46 #if defined(CONFIG_VGA_CONSOLE) || defined(CONFIG_DUMMY_CONSOLE)
47 struct screen_info screen_info
= { 0, 24, 0, 0, 0, 80, 0, 0, 0, 24, 1, 16};
50 #ifdef CONFIG_BLK_DEV_FD
51 extern struct fd_ops no_fd_ops
;
52 struct fd_ops
*fd_ops
;
55 #if defined(CONFIG_BLK_DEV_IDE) || defined(CONFIG_BLK_DEV_IDE_MODULE)
56 extern struct ide_ops no_ide_ops
;
57 struct ide_ops
*ide_ops
;
60 extern struct rtc_ops no_rtc_ops
;
61 struct rtc_ops
*rtc_ops
;
64 extern struct kbd_ops no_kbd_ops
;
65 struct kbd_ops
*kbd_ops
;
68 #ifdef CONFIG_BLK_DEV_INITRD
69 extern void *initrd_start
;
70 extern void *initrd_end
;
71 extern void *__initrd_start
;
72 extern void *__initrd_end
;
73 int initrd_is_mapped
= 0;
74 extern int initrd_below_start_ok
;
77 unsigned char aux_device_present
;
78 extern unsigned long loops_per_jiffy
;
80 /* Command line specified as configuration option. */
82 static char __initdata command_line
[COMMAND_LINE_SIZE
];
84 #ifdef CONFIG_CMDLINE_BOOL
85 static char default_command_line
[COMMAND_LINE_SIZE
] __initdata
= CONFIG_CMDLINE
;
88 sysmem_info_t __initdata sysmem
;
90 #ifdef CONFIG_BLK_DEV_INITRD
94 extern void init_mmu(void);
97 * Boot parameter parsing.
99 * The Xtensa port uses a list of variable-sized tags to pass data to
100 * the kernel. The first tag must be a BP_TAG_FIRST tag for the list
101 * to be recognised. The list is terminated with a zero-sized
105 typedef struct tagtable
{
107 int (*parse
)(const bp_tag_t
*);
110 #define __tagtable(tag, fn) static tagtable_t __tagtable_##fn \
111 __attribute__((unused, __section__(".taglist"))) = { tag, fn }
113 /* parse current tag */
115 static int __init
parse_tag_mem(const bp_tag_t
*tag
)
117 meminfo_t
*mi
= (meminfo_t
*)(tag
->data
);
119 if (mi
->type
!= MEMORY_TYPE_CONVENTIONAL
)
122 if (sysmem
.nr_banks
>= SYSMEM_BANKS_MAX
) {
124 "Ignoring memory bank 0x%08lx size %ldKB\n",
125 (unsigned long)mi
->start
,
126 (unsigned long)mi
->end
- (unsigned long)mi
->start
);
129 sysmem
.bank
[sysmem
.nr_banks
].type
= mi
->type
;
130 sysmem
.bank
[sysmem
.nr_banks
].start
= PAGE_ALIGN(mi
->start
);
131 sysmem
.bank
[sysmem
.nr_banks
].end
= mi
->end
& PAGE_SIZE
;
137 __tagtable(BP_TAG_MEMORY
, parse_tag_mem
);
139 #ifdef CONFIG_BLK_DEV_INITRD
141 static int __init
parse_tag_initrd(const bp_tag_t
* tag
)
144 mi
= (meminfo_t
*)(tag
->data
);
145 initrd_start
= (void*)(mi
->start
);
146 initrd_end
= (void*)(mi
->end
);
151 __tagtable(BP_TAG_INITRD
, parse_tag_initrd
);
153 #endif /* CONFIG_BLK_DEV_INITRD */
155 static int __init
parse_tag_cmdline(const bp_tag_t
* tag
)
157 strncpy(command_line
, (char*)(tag
->data
), COMMAND_LINE_SIZE
);
158 command_line
[COMMAND_LINE_SIZE
- 1] = '\0';
162 __tagtable(BP_TAG_COMMAND_LINE
, parse_tag_cmdline
);
164 static int __init
parse_bootparam(const bp_tag_t
* tag
)
166 extern tagtable_t __tagtable_begin
, __tagtable_end
;
169 /* Boot parameters must start with a BP_TAG_FIRST tag. */
171 if (tag
->id
!= BP_TAG_FIRST
) {
172 printk(KERN_WARNING
"Invalid boot parameters!\n");
176 tag
= (bp_tag_t
*)((unsigned long)tag
+ sizeof(bp_tag_t
) + tag
->size
);
178 /* Parse all tags. */
180 while (tag
!= NULL
&& tag
->id
!= BP_TAG_LAST
) {
181 for (t
= &__tagtable_begin
; t
< &__tagtable_end
; t
++) {
182 if (tag
->id
== t
->tag
) {
187 if (t
== &__tagtable_end
)
188 printk(KERN_WARNING
"Ignoring tag "
189 "0x%08x\n", tag
->id
);
190 tag
= (bp_tag_t
*)((unsigned long)(tag
+ 1) + tag
->size
);
197 * Initialize architecture. (Early stage)
200 void __init
init_arch(bp_tag_t
*bp_start
)
203 #ifdef CONFIG_BLK_DEV_INITRD
204 initrd_start
= &__initrd_start
;
205 initrd_end
= &__initrd_end
;
210 #ifdef CONFIG_CMDLINE_BOOL
211 strcpy(command_line
, default_command_line
);
214 /* Parse boot parameters */
217 parse_bootparam(bp_start
);
219 if (sysmem
.nr_banks
== 0) {
221 sysmem
.bank
[0].start
= PLATFORM_DEFAULT_MEM_START
;
222 sysmem
.bank
[0].end
= PLATFORM_DEFAULT_MEM_START
223 + PLATFORM_DEFAULT_MEM_SIZE
;
226 /* Early hook for platforms */
228 platform_init(bp_start
);
230 /* Initialize MMU. */
236 * Initialize system. Setup memory and reserve regions.
241 extern char _WindowVectors_text_start
;
242 extern char _WindowVectors_text_end
;
243 extern char _DebugInterruptVector_literal_start
;
244 extern char _DebugInterruptVector_text_end
;
245 extern char _KernelExceptionVector_literal_start
;
246 extern char _KernelExceptionVector_text_end
;
247 extern char _UserExceptionVector_literal_start
;
248 extern char _UserExceptionVector_text_end
;
249 extern char _DoubleExceptionVector_literal_start
;
250 extern char _DoubleExceptionVector_text_end
;
252 void __init
setup_arch(char **cmdline_p
)
254 extern int mem_reserve(unsigned long, unsigned long, int);
255 extern void bootmem_init(void);
257 memcpy(boot_command_line
, command_line
, COMMAND_LINE_SIZE
);
258 boot_command_line
[COMMAND_LINE_SIZE
-1] = '\0';
259 *cmdline_p
= command_line
;
261 /* Reserve some memory regions */
263 #ifdef CONFIG_BLK_DEV_INITRD
264 if (initrd_start
< initrd_end
) {
265 initrd_is_mapped
= mem_reserve(__pa(initrd_start
),
266 __pa(initrd_end
), 0);
267 initrd_below_start_ok
= 1;
273 mem_reserve(__pa(&_stext
),__pa(&_end
), 1);
275 mem_reserve(__pa(&_WindowVectors_text_start
),
276 __pa(&_WindowVectors_text_end
), 0);
278 mem_reserve(__pa(&_DebugInterruptVector_literal_start
),
279 __pa(&_DebugInterruptVector_text_end
), 0);
281 mem_reserve(__pa(&_KernelExceptionVector_literal_start
),
282 __pa(&_KernelExceptionVector_text_end
), 0);
284 mem_reserve(__pa(&_UserExceptionVector_literal_start
),
285 __pa(&_UserExceptionVector_text_end
), 0);
287 mem_reserve(__pa(&_DoubleExceptionVector_literal_start
),
288 __pa(&_DoubleExceptionVector_text_end
), 0);
292 platform_setup(cmdline_p
);
298 # if defined(CONFIG_VGA_CONSOLE)
299 conswitchp
= &vga_con
;
300 # elif defined(CONFIG_DUMMY_CONSOLE)
301 conswitchp
= &dummy_con
;
306 platform_pcibios_init();
310 void machine_restart(char * cmd
)
315 void machine_halt(void)
321 void machine_power_off(void)
323 platform_power_off();
326 #ifdef CONFIG_PROC_FS
329 * Display some core information through /proc/cpuinfo.
333 c_show(struct seq_file
*f
, void *slot
)
335 /* high-level stuff */
336 seq_printf(f
,"processor\t: 0\n"
337 "vendor_id\t: Tensilica\n"
338 "model\t\t: Xtensa " XCHAL_HW_VERSION_NAME
"\n"
339 "core ID\t\t: " XCHAL_CORE_ID
"\n"
342 "cpu MHz\t\t: %lu.%02lu\n"
343 "bogomips\t: %lu.%02lu\n",
344 XCHAL_BUILD_UNIQUE_ID
,
345 XCHAL_HAVE_BE
? "big" : "little",
346 CCOUNT_PER_JIFFY
/(1000000/HZ
),
347 (CCOUNT_PER_JIFFY
/(10000/HZ
)) % 100,
348 loops_per_jiffy
/(500000/HZ
),
349 (loops_per_jiffy
/(5000/HZ
)) % 100);
351 seq_printf(f
,"flags\t\t: "
361 #if XCHAL_HAVE_DENSITY
364 #if XCHAL_HAVE_BOOLEANS
373 #if XCHAL_HAVE_MINMAX
379 #if XCHAL_HAVE_CLAMPS
391 #if XCHAL_HAVE_MUL32_HIGH
400 seq_printf(f
,"physical aregs\t: %d\n"
411 seq_printf(f
,"num ints\t: %d\n"
415 "debug level\t: %d\n",
416 XCHAL_NUM_INTERRUPTS
,
417 XCHAL_NUM_EXTINTERRUPTS
,
423 seq_printf(f
,"icache line size: %d\n"
424 "icache ways\t: %d\n"
425 "icache size\t: %d\n"
427 #if XCHAL_ICACHE_LINE_LOCKABLE
431 "dcache line size: %d\n"
432 "dcache ways\t: %d\n"
433 "dcache size\t: %d\n"
435 #if XCHAL_DCACHE_IS_WRITEBACK
438 #if XCHAL_DCACHE_LINE_LOCKABLE
442 XCHAL_ICACHE_LINESIZE
,
445 XCHAL_DCACHE_LINESIZE
,
453 * We show only CPU #0 info.
456 c_start(struct seq_file
*f
, loff_t
*pos
)
458 return (void *) ((*pos
== 0) ? (void *)1 : NULL
);
462 c_next(struct seq_file
*f
, void *v
, loff_t
*pos
)
468 c_stop(struct seq_file
*f
, void *v
)
472 struct seq_operations cpuinfo_op
=
480 #endif /* CONFIG_PROC_FS */