[PATCH] powerpc: Migrate Xilinx Vertex support from the OCP bus to the platfom bus.
[wrt350n-kernel.git] / include / asm-sparc64 / lsu.h
blobe5329c7f5833365d7c59fe29f65ca8d3bd9570e6
1 /* $Id: lsu.h,v 1.2 1997/04/04 00:50:22 davem Exp $ */
2 #ifndef _SPARC64_LSU_H
3 #define _SPARC64_LSU_H
5 #include <asm/const.h>
7 /* LSU Control Register */
8 #define LSU_CONTROL_PM _AC(0x000001fe00000000,UL) /* Phys-watchpoint byte mask*/
9 #define LSU_CONTROL_VM _AC(0x00000001fe000000,UL) /* Virt-watchpoint byte mask*/
10 #define LSU_CONTROL_PR _AC(0x0000000001000000,UL) /* Phys-rd watchpoint enable*/
11 #define LSU_CONTROL_PW _AC(0x0000000000800000,UL) /* Phys-wr watchpoint enable*/
12 #define LSU_CONTROL_VR _AC(0x0000000000400000,UL) /* Virt-rd watchpoint enable*/
13 #define LSU_CONTROL_VW _AC(0x0000000000200000,UL) /* Virt-wr watchpoint enable*/
14 #define LSU_CONTROL_FM _AC(0x00000000000ffff0,UL) /* Parity mask enables. */
15 #define LSU_CONTROL_DM _AC(0x0000000000000008,UL) /* Data MMU enable. */
16 #define LSU_CONTROL_IM _AC(0x0000000000000004,UL) /* Instruction MMU enable. */
17 #define LSU_CONTROL_DC _AC(0x0000000000000002,UL) /* Data cache enable. */
18 #define LSU_CONTROL_IC _AC(0x0000000000000001,UL) /* Instruction cache enable.*/
20 #endif /* !(_SPARC64_LSU_H) */