x86: remove X2 workaround
[wrt350n-kernel.git] / arch / x86 / mm / pageattr.c
blobc870424aa9ad7b1f643c47255c3fbf63d68275d5
1 /*
2 * Copyright 2002 Andi Kleen, SuSE Labs.
3 * Thanks to Ben LaHaise for precious feedback.
4 */
5 #include <linux/highmem.h>
6 #include <linux/bootmem.h>
7 #include <linux/module.h>
8 #include <linux/sched.h>
9 #include <linux/slab.h>
10 #include <linux/mm.h>
12 #include <asm/e820.h>
13 #include <asm/processor.h>
14 #include <asm/tlbflush.h>
15 #include <asm/sections.h>
16 #include <asm/uaccess.h>
17 #include <asm/pgalloc.h>
20 * The current flushing context - we pass it instead of 5 arguments:
22 struct cpa_data {
23 unsigned long vaddr;
24 pgprot_t mask_set;
25 pgprot_t mask_clr;
26 int numpages;
27 int flushtlb;
30 static inline int
31 within(unsigned long addr, unsigned long start, unsigned long end)
33 return addr >= start && addr < end;
37 * Flushing functions
40 /**
41 * clflush_cache_range - flush a cache range with clflush
42 * @addr: virtual start address
43 * @size: number of bytes to flush
45 * clflush is an unordered instruction which needs fencing with mfence
46 * to avoid ordering issues.
48 void clflush_cache_range(void *vaddr, unsigned int size)
50 void *vend = vaddr + size - 1;
52 mb();
54 for (; vaddr < vend; vaddr += boot_cpu_data.x86_clflush_size)
55 clflush(vaddr);
57 * Flush any possible final partial cacheline:
59 clflush(vend);
61 mb();
64 static void __cpa_flush_all(void *arg)
66 unsigned long cache = (unsigned long)arg;
69 * Flush all to work around Errata in early athlons regarding
70 * large page flushing.
72 __flush_tlb_all();
74 if (cache && boot_cpu_data.x86_model >= 4)
75 wbinvd();
78 static void cpa_flush_all(unsigned long cache)
80 BUG_ON(irqs_disabled());
82 on_each_cpu(__cpa_flush_all, (void *) cache, 1, 1);
85 static void __cpa_flush_range(void *arg)
88 * We could optimize that further and do individual per page
89 * tlb invalidates for a low number of pages. Caveat: we must
90 * flush the high aliases on 64bit as well.
92 __flush_tlb_all();
95 static void cpa_flush_range(unsigned long start, int numpages, int cache)
97 unsigned int i, level;
98 unsigned long addr;
100 BUG_ON(irqs_disabled());
101 WARN_ON(PAGE_ALIGN(start) != start);
103 on_each_cpu(__cpa_flush_range, NULL, 1, 1);
105 if (!cache)
106 return;
109 * We only need to flush on one CPU,
110 * clflush is a MESI-coherent instruction that
111 * will cause all other CPUs to flush the same
112 * cachelines:
114 for (i = 0, addr = start; i < numpages; i++, addr += PAGE_SIZE) {
115 pte_t *pte = lookup_address(addr, &level);
118 * Only flush present addresses:
120 if (pte && (pte_val(*pte) & _PAGE_PRESENT))
121 clflush_cache_range((void *) addr, PAGE_SIZE);
125 #define HIGH_MAP_START __START_KERNEL_map
126 #define HIGH_MAP_END (__START_KERNEL_map + KERNEL_TEXT_SIZE)
130 * Converts a virtual address to a X86-64 highmap address
132 static unsigned long virt_to_highmap(void *address)
134 #ifdef CONFIG_X86_64
135 return __pa((unsigned long)address) + HIGH_MAP_START - phys_base;
136 #else
137 return (unsigned long)address;
138 #endif
142 * Certain areas of memory on x86 require very specific protection flags,
143 * for example the BIOS area or kernel text. Callers don't always get this
144 * right (again, ioremap() on BIOS memory is not uncommon) so this function
145 * checks and fixes these known static required protection bits.
147 static inline pgprot_t static_protections(pgprot_t prot, unsigned long address)
149 pgprot_t forbidden = __pgprot(0);
152 * The BIOS area between 640k and 1Mb needs to be executable for
153 * PCI BIOS based config access (CONFIG_PCI_GOBIOS) support.
155 if (within(__pa(address), BIOS_BEGIN, BIOS_END))
156 pgprot_val(forbidden) |= _PAGE_NX;
159 * The kernel text needs to be executable for obvious reasons
160 * Does not cover __inittext since that is gone later on
162 if (within(address, (unsigned long)_text, (unsigned long)_etext))
163 pgprot_val(forbidden) |= _PAGE_NX;
165 * Do the same for the x86-64 high kernel mapping
167 if (within(address, virt_to_highmap(_text), virt_to_highmap(_etext)))
168 pgprot_val(forbidden) |= _PAGE_NX;
171 #ifdef CONFIG_DEBUG_RODATA
172 /* The .rodata section needs to be read-only */
173 if (within(address, (unsigned long)__start_rodata,
174 (unsigned long)__end_rodata))
175 pgprot_val(forbidden) |= _PAGE_RW;
177 * Do the same for the x86-64 high kernel mapping
179 if (within(address, virt_to_highmap(__start_rodata),
180 virt_to_highmap(__end_rodata)))
181 pgprot_val(forbidden) |= _PAGE_RW;
182 #endif
184 prot = __pgprot(pgprot_val(prot) & ~pgprot_val(forbidden));
186 return prot;
190 * Lookup the page table entry for a virtual address. Return a pointer
191 * to the entry and the level of the mapping.
193 * Note: We return pud and pmd either when the entry is marked large
194 * or when the present bit is not set. Otherwise we would return a
195 * pointer to a nonexisting mapping.
197 pte_t *lookup_address(unsigned long address, int *level)
199 pgd_t *pgd = pgd_offset_k(address);
200 pud_t *pud;
201 pmd_t *pmd;
203 *level = PG_LEVEL_NONE;
205 if (pgd_none(*pgd))
206 return NULL;
208 pud = pud_offset(pgd, address);
209 if (pud_none(*pud))
210 return NULL;
212 *level = PG_LEVEL_1G;
213 if (pud_large(*pud) || !pud_present(*pud))
214 return (pte_t *)pud;
216 pmd = pmd_offset(pud, address);
217 if (pmd_none(*pmd))
218 return NULL;
220 *level = PG_LEVEL_2M;
221 if (pmd_large(*pmd) || !pmd_present(*pmd))
222 return (pte_t *)pmd;
224 *level = PG_LEVEL_4K;
226 return pte_offset_kernel(pmd, address);
230 * Set the new pmd in all the pgds we know about:
232 static void __set_pmd_pte(pte_t *kpte, unsigned long address, pte_t pte)
234 /* change init_mm */
235 set_pte_atomic(kpte, pte);
236 #ifdef CONFIG_X86_32
237 if (!SHARED_KERNEL_PMD) {
238 struct page *page;
240 list_for_each_entry(page, &pgd_list, lru) {
241 pgd_t *pgd;
242 pud_t *pud;
243 pmd_t *pmd;
245 pgd = (pgd_t *)page_address(page) + pgd_index(address);
246 pud = pud_offset(pgd, address);
247 pmd = pmd_offset(pud, address);
248 set_pte_atomic((pte_t *)pmd, pte);
251 #endif
254 static int
255 try_preserve_large_page(pte_t *kpte, unsigned long address,
256 struct cpa_data *cpa)
258 unsigned long nextpage_addr, numpages, pmask, psize, flags;
259 pte_t new_pte, old_pte, *tmp;
260 pgprot_t old_prot, new_prot;
261 int level, do_split = 1;
263 spin_lock_irqsave(&pgd_lock, flags);
265 * Check for races, another CPU might have split this page
266 * up already:
268 tmp = lookup_address(address, &level);
269 if (tmp != kpte)
270 goto out_unlock;
272 switch (level) {
273 case PG_LEVEL_2M:
274 psize = PMD_PAGE_SIZE;
275 pmask = PMD_PAGE_MASK;
276 break;
277 #ifdef CONFIG_X86_64
278 case PG_LEVEL_1G:
279 psize = PMD_PAGE_SIZE;
280 pmask = PMD_PAGE_MASK;
281 break;
282 #endif
283 default:
284 do_split = -EINVAL;
285 goto out_unlock;
289 * Calculate the number of pages, which fit into this large
290 * page starting at address:
292 nextpage_addr = (address + psize) & pmask;
293 numpages = (nextpage_addr - address) >> PAGE_SHIFT;
294 if (numpages < cpa->numpages)
295 cpa->numpages = numpages;
298 * We are safe now. Check whether the new pgprot is the same:
300 old_pte = *kpte;
301 old_prot = new_prot = pte_pgprot(old_pte);
303 pgprot_val(new_prot) &= ~pgprot_val(cpa->mask_clr);
304 pgprot_val(new_prot) |= pgprot_val(cpa->mask_set);
305 new_prot = static_protections(new_prot, address);
308 * If there are no changes, return. maxpages has been updated
309 * above:
311 if (pgprot_val(new_prot) == pgprot_val(old_prot)) {
312 do_split = 0;
313 goto out_unlock;
317 * We need to change the attributes. Check, whether we can
318 * change the large page in one go. We request a split, when
319 * the address is not aligned and the number of pages is
320 * smaller than the number of pages in the large page. Note
321 * that we limited the number of possible pages already to
322 * the number of pages in the large page.
324 if (address == (nextpage_addr - psize) && cpa->numpages == numpages) {
326 * The address is aligned and the number of pages
327 * covers the full page.
329 new_pte = pfn_pte(pte_pfn(old_pte), canon_pgprot(new_prot));
330 __set_pmd_pte(kpte, address, new_pte);
331 cpa->flushtlb = 1;
332 do_split = 0;
335 out_unlock:
336 spin_unlock_irqrestore(&pgd_lock, flags);
338 return do_split;
341 static int split_large_page(pte_t *kpte, unsigned long address)
343 unsigned long flags, pfn, pfninc = 1;
344 gfp_t gfp_flags = GFP_KERNEL;
345 unsigned int i, level;
346 pte_t *pbase, *tmp;
347 pgprot_t ref_prot;
348 struct page *base;
350 #ifdef CONFIG_DEBUG_PAGEALLOC
351 gfp_flags = GFP_ATOMIC | __GFP_NOWARN;
352 #endif
353 base = alloc_pages(gfp_flags, 0);
354 if (!base)
355 return -ENOMEM;
357 spin_lock_irqsave(&pgd_lock, flags);
359 * Check for races, another CPU might have split this page
360 * up for us already:
362 tmp = lookup_address(address, &level);
363 if (tmp != kpte)
364 goto out_unlock;
366 pbase = (pte_t *)page_address(base);
367 #ifdef CONFIG_X86_32
368 paravirt_alloc_pt(&init_mm, page_to_pfn(base));
369 #endif
370 ref_prot = pte_pgprot(pte_clrhuge(*kpte));
372 #ifdef CONFIG_X86_64
373 if (level == PG_LEVEL_1G) {
374 pfninc = PMD_PAGE_SIZE >> PAGE_SHIFT;
375 pgprot_val(ref_prot) |= _PAGE_PSE;
377 #endif
380 * Get the target pfn from the original entry:
382 pfn = pte_pfn(*kpte);
383 for (i = 0; i < PTRS_PER_PTE; i++, pfn += pfninc)
384 set_pte(&pbase[i], pfn_pte(pfn, ref_prot));
387 * Install the new, split up pagetable. Important details here:
389 * On Intel the NX bit of all levels must be cleared to make a
390 * page executable. See section 4.13.2 of Intel 64 and IA-32
391 * Architectures Software Developer's Manual).
393 * Mark the entry present. The current mapping might be
394 * set to not present, which we preserved above.
396 ref_prot = pte_pgprot(pte_mkexec(pte_clrhuge(*kpte)));
397 pgprot_val(ref_prot) |= _PAGE_PRESENT;
398 __set_pmd_pte(kpte, address, mk_pte(base, ref_prot));
399 base = NULL;
401 out_unlock:
402 spin_unlock_irqrestore(&pgd_lock, flags);
404 if (base)
405 __free_pages(base, 0);
407 return 0;
410 static int __change_page_attr(unsigned long address, struct cpa_data *cpa)
412 int level, do_split, err;
413 struct page *kpte_page;
414 pte_t *kpte;
416 repeat:
417 kpte = lookup_address(address, &level);
418 if (!kpte)
419 return -EINVAL;
421 kpte_page = virt_to_page(kpte);
422 BUG_ON(PageLRU(kpte_page));
423 BUG_ON(PageCompound(kpte_page));
425 if (level == PG_LEVEL_4K) {
426 pte_t new_pte, old_pte = *kpte;
427 pgprot_t new_prot = pte_pgprot(old_pte);
429 if(!pte_val(old_pte)) {
430 printk(KERN_WARNING "CPA: called for zero pte. "
431 "vaddr = %lx cpa->vaddr = %lx\n", address,
432 cpa->vaddr);
433 WARN_ON(1);
434 return -EINVAL;
437 pgprot_val(new_prot) &= ~pgprot_val(cpa->mask_clr);
438 pgprot_val(new_prot) |= pgprot_val(cpa->mask_set);
440 new_prot = static_protections(new_prot, address);
443 * We need to keep the pfn from the existing PTE,
444 * after all we're only going to change it's attributes
445 * not the memory it points to
447 new_pte = pfn_pte(pte_pfn(old_pte), canon_pgprot(new_prot));
450 * Do we really change anything ?
452 if (pte_val(old_pte) != pte_val(new_pte)) {
453 set_pte_atomic(kpte, new_pte);
454 cpa->flushtlb = 1;
456 cpa->numpages = 1;
457 return 0;
461 * Check, whether we can keep the large page intact
462 * and just change the pte:
464 do_split = try_preserve_large_page(kpte, address, cpa);
466 * When the range fits into the existing large page,
467 * return. cp->numpages and cpa->tlbflush have been updated in
468 * try_large_page:
470 if (do_split <= 0)
471 return do_split;
474 * We have to split the large page:
476 err = split_large_page(kpte, address);
477 if (!err) {
478 cpa->flushtlb = 1;
479 goto repeat;
482 return err;
486 * change_page_attr_addr - Change page table attributes in linear mapping
487 * @address: Virtual address in linear mapping.
488 * @prot: New page table attribute (PAGE_*)
490 * Change page attributes of a page in the direct mapping. This is a variant
491 * of change_page_attr() that also works on memory holes that do not have
492 * mem_map entry (pfn_valid() is false).
494 * See change_page_attr() documentation for more details.
496 * Modules and drivers should use the set_memory_* APIs instead.
498 static int change_page_attr_addr(struct cpa_data *cpa)
500 int err;
501 unsigned long address = cpa->vaddr;
503 #ifdef CONFIG_X86_64
504 unsigned long phys_addr = __pa(address);
507 * If we are inside the high mapped kernel range, then we
508 * fixup the low mapping first. __va() returns the virtual
509 * address in the linear mapping:
511 if (within(address, HIGH_MAP_START, HIGH_MAP_END))
512 address = (unsigned long) __va(phys_addr);
513 #endif
515 err = __change_page_attr(address, cpa);
516 if (err)
517 return err;
519 #ifdef CONFIG_X86_64
521 * If the physical address is inside the kernel map, we need
522 * to touch the high mapped kernel as well:
524 if (within(phys_addr, 0, KERNEL_TEXT_SIZE)) {
526 * Calc the high mapping address. See __phys_addr()
527 * for the non obvious details.
529 * Note that NX and other required permissions are
530 * checked in static_protections().
532 address = phys_addr + HIGH_MAP_START - phys_base;
535 * Our high aliases are imprecise, because we check
536 * everything between 0 and KERNEL_TEXT_SIZE, so do
537 * not propagate lookup failures back to users:
539 __change_page_attr(address, cpa);
541 #endif
542 return err;
545 static int __change_page_attr_set_clr(struct cpa_data *cpa)
547 int ret, numpages = cpa->numpages;
549 while (numpages) {
551 * Store the remaining nr of pages for the large page
552 * preservation check.
554 cpa->numpages = numpages;
555 ret = change_page_attr_addr(cpa);
556 if (ret)
557 return ret;
560 * Adjust the number of pages with the result of the
561 * CPA operation. Either a large page has been
562 * preserved or a single page update happened.
564 BUG_ON(cpa->numpages > numpages);
565 numpages -= cpa->numpages;
566 cpa->vaddr += cpa->numpages * PAGE_SIZE;
568 return 0;
571 static inline int cache_attr(pgprot_t attr)
573 return pgprot_val(attr) &
574 (_PAGE_PAT | _PAGE_PAT_LARGE | _PAGE_PWT | _PAGE_PCD);
577 static int change_page_attr_set_clr(unsigned long addr, int numpages,
578 pgprot_t mask_set, pgprot_t mask_clr)
580 struct cpa_data cpa;
581 int ret, cache;
584 * Check, if we are requested to change a not supported
585 * feature:
587 mask_set = canon_pgprot(mask_set);
588 mask_clr = canon_pgprot(mask_clr);
589 if (!pgprot_val(mask_set) && !pgprot_val(mask_clr))
590 return 0;
592 cpa.vaddr = addr;
593 cpa.numpages = numpages;
594 cpa.mask_set = mask_set;
595 cpa.mask_clr = mask_clr;
596 cpa.flushtlb = 0;
598 ret = __change_page_attr_set_clr(&cpa);
601 * Check whether we really changed something:
603 if (!cpa.flushtlb)
604 return ret;
607 * No need to flush, when we did not set any of the caching
608 * attributes:
610 cache = cache_attr(mask_set);
613 * On success we use clflush, when the CPU supports it to
614 * avoid the wbindv. If the CPU does not support it and in the
615 * error case we fall back to cpa_flush_all (which uses
616 * wbindv):
618 if (!ret && cpu_has_clflush)
619 cpa_flush_range(addr, numpages, cache);
620 else
621 cpa_flush_all(cache);
623 return ret;
626 static inline int change_page_attr_set(unsigned long addr, int numpages,
627 pgprot_t mask)
629 return change_page_attr_set_clr(addr, numpages, mask, __pgprot(0));
632 static inline int change_page_attr_clear(unsigned long addr, int numpages,
633 pgprot_t mask)
635 return change_page_attr_set_clr(addr, numpages, __pgprot(0), mask);
638 int set_memory_uc(unsigned long addr, int numpages)
640 return change_page_attr_set(addr, numpages,
641 __pgprot(_PAGE_PCD | _PAGE_PWT));
643 EXPORT_SYMBOL(set_memory_uc);
645 int set_memory_wb(unsigned long addr, int numpages)
647 return change_page_attr_clear(addr, numpages,
648 __pgprot(_PAGE_PCD | _PAGE_PWT));
650 EXPORT_SYMBOL(set_memory_wb);
652 int set_memory_x(unsigned long addr, int numpages)
654 return change_page_attr_clear(addr, numpages, __pgprot(_PAGE_NX));
656 EXPORT_SYMBOL(set_memory_x);
658 int set_memory_nx(unsigned long addr, int numpages)
660 return change_page_attr_set(addr, numpages, __pgprot(_PAGE_NX));
662 EXPORT_SYMBOL(set_memory_nx);
664 int set_memory_ro(unsigned long addr, int numpages)
666 return change_page_attr_clear(addr, numpages, __pgprot(_PAGE_RW));
669 int set_memory_rw(unsigned long addr, int numpages)
671 return change_page_attr_set(addr, numpages, __pgprot(_PAGE_RW));
674 int set_memory_np(unsigned long addr, int numpages)
676 return change_page_attr_clear(addr, numpages, __pgprot(_PAGE_PRESENT));
679 int set_pages_uc(struct page *page, int numpages)
681 unsigned long addr = (unsigned long)page_address(page);
683 return set_memory_uc(addr, numpages);
685 EXPORT_SYMBOL(set_pages_uc);
687 int set_pages_wb(struct page *page, int numpages)
689 unsigned long addr = (unsigned long)page_address(page);
691 return set_memory_wb(addr, numpages);
693 EXPORT_SYMBOL(set_pages_wb);
695 int set_pages_x(struct page *page, int numpages)
697 unsigned long addr = (unsigned long)page_address(page);
699 return set_memory_x(addr, numpages);
701 EXPORT_SYMBOL(set_pages_x);
703 int set_pages_nx(struct page *page, int numpages)
705 unsigned long addr = (unsigned long)page_address(page);
707 return set_memory_nx(addr, numpages);
709 EXPORT_SYMBOL(set_pages_nx);
711 int set_pages_ro(struct page *page, int numpages)
713 unsigned long addr = (unsigned long)page_address(page);
715 return set_memory_ro(addr, numpages);
718 int set_pages_rw(struct page *page, int numpages)
720 unsigned long addr = (unsigned long)page_address(page);
722 return set_memory_rw(addr, numpages);
725 #ifdef CONFIG_DEBUG_PAGEALLOC
727 static int __set_pages_p(struct page *page, int numpages)
729 struct cpa_data cpa = { .vaddr = (unsigned long) page_address(page),
730 .numpages = numpages,
731 .mask_set = __pgprot(_PAGE_PRESENT | _PAGE_RW),
732 .mask_clr = __pgprot(0)};
734 return __change_page_attr_set_clr(&cpa);
737 static int __set_pages_np(struct page *page, int numpages)
739 struct cpa_data cpa = { .vaddr = (unsigned long) page_address(page),
740 .numpages = numpages,
741 .mask_set = __pgprot(0),
742 .mask_clr = __pgprot(_PAGE_PRESENT | _PAGE_RW)};
744 return __change_page_attr_set_clr(&cpa);
747 void kernel_map_pages(struct page *page, int numpages, int enable)
749 if (PageHighMem(page))
750 return;
751 if (!enable) {
752 debug_check_no_locks_freed(page_address(page),
753 numpages * PAGE_SIZE);
757 * If page allocator is not up yet then do not call c_p_a():
759 if (!debug_pagealloc_enabled)
760 return;
763 * The return value is ignored - the calls cannot fail,
764 * large pages are disabled at boot time:
766 if (enable)
767 __set_pages_p(page, numpages);
768 else
769 __set_pages_np(page, numpages);
772 * We should perform an IPI and flush all tlbs,
773 * but that can deadlock->flush only current cpu:
775 __flush_tlb_all();
777 #endif
780 * The testcases use internal knowledge of the implementation that shouldn't
781 * be exposed to the rest of the kernel. Include these directly here.
783 #ifdef CONFIG_CPA_DEBUG
784 #include "pageattr-test.c"
785 #endif