arch/avr32/mach-at32ap/intc.c

   1 /*
   2  * Copyright (C) 2006 Atmel Corporation
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License version 2 as
   6  * published by the Free Software Foundation.
   7  */
   8
   9 #include <linux/clk.h>
  10 #include <linux/err.h>
  11 #include <linux/init.h>
  12 #include <linux/interrupt.h>
  13 #include <linux/irq.h>
  14 #include <linux/platform_device.h>
  15
  16 #include <asm/intc.h>
  17 #include <asm/io.h>
  18
  19 #include "intc.h"
  20
  21 struct intc {
  22         void __iomem    *regs;
  23         struct irq_chip chip;
  24 };
  25
  26 extern struct platform_device at32_intc0_device;
  27
  28 /*
  29  * TODO: We may be able to implement mask/unmask by setting IxM flags
  30  * in the status register.
  31  */
  32 static void intc_mask_irq(unsigned int irq)
  33 {
  34
  35 }
  36
  37 static void intc_unmask_irq(unsigned int irq)
  38 {
  39
  40 }
  41
  42 static struct intc intc0 = {
  43         .chip = {
  44                 .name           = "intc",
  45                 .mask           = intc_mask_irq,
  46                 .unmask         = intc_unmask_irq,
  47         },
  48 };
  49
  50 /*
  51  * All interrupts go via intc at some point.
  52  */
  53 asmlinkage void do_IRQ(int level, struct pt_regs *regs)
  54 {
  55         struct irq_desc *desc;
  56         struct pt_regs *old_regs;
  57         unsigned int irq;
  58         unsigned long status_reg;
  59
  60         local_irq_disable();
  61
  62         old_regs = set_irq_regs(regs);
  63
  64         irq_enter();
  65
  66         irq = intc_readl(&intc0, INTCAUSE0 - 4 * level);
  67         desc = irq_desc + irq;
  68         desc->handle_irq(irq, desc);
  69
  70         /*
  71          * Clear all interrupt level masks so that we may handle
  72          * interrupts during softirq processing.  If this is a nested
  73          * interrupt, interrupts must stay globally disabled until we
  74          * return.
  75          */
  76         status_reg = sysreg_read(SR);
  77         status_reg &= ~(SYSREG_BIT(I0M) | SYSREG_BIT(I1M)
  78                         | SYSREG_BIT(I2M) | SYSREG_BIT(I3M));
  79         sysreg_write(SR, status_reg);
  80
  81         irq_exit();
  82
  83         set_irq_regs(old_regs);
  84 }
  85
  86 void __init init_IRQ(void)
  87 {
  88         extern void _evba(void);
  89         extern void irq_level0(void);
  90         struct resource *regs;
  91         struct clk *pclk;
  92         unsigned int i;
  93         u32 offset, readback;
  94
  95         regs = platform_get_resource(&at32_intc0_device, IORESOURCE_MEM, 0);
  96         if (!regs) {
  97                 printk(KERN_EMERG "intc: no mmio resource defined\n");
  98                 goto fail;
  99         }
 100         pclk = clk_get(&at32_intc0_device.dev, "pclk");
 101         if (IS_ERR(pclk)) {
 102                 printk(KERN_EMERG "intc: no clock defined\n");
 103                 goto fail;
 104         }
 105
 106         clk_enable(pclk);
 107
 108         intc0.regs = ioremap(regs->start, regs->end - regs->start + 1);
 109         if (!intc0.regs) {
 110                 printk(KERN_EMERG "intc: failed to map registers (0x%08lx)\n",
 111                        (unsigned long)regs->start);
 112                 goto fail;
 113         }
 114
 115         /*
 116          * Initialize all interrupts to level 0 (lowest priority). The
 117          * priority level may be changed by calling
 118          * irq_set_priority().
 119          *
 120          */
 121         offset = (unsigned long)&irq_level0 - (unsigned long)&_evba;
 122         for (i = 0; i < NR_INTERNAL_IRQS; i++) {
 123                 intc_writel(&intc0, INTPR0 + 4 * i, offset);
 124                 readback = intc_readl(&intc0, INTPR0 + 4 * i);
 125                 if (readback == offset)
 126                         set_irq_chip_and_handler(i, &intc0.chip,
 127                                                  handle_simple_irq);
 128         }
 129
 130         /* Unmask all interrupt levels */
 131         sysreg_write(SR, (sysreg_read(SR)
 132                           & ~(SR_I3M | SR_I2M | SR_I1M | SR_I0M)));
 133
 134         return;
 135
 136 fail:
 137         panic("Interrupt controller initialization failed!\n");
 138 }
 139
 140 unsigned long intc_get_pending(unsigned int group)
 141 {
 142         return intc_readl(&intc0, INTREQ0 + 4 * group);
 143 }
 144 EXPORT_SYMBOL_GPL(intc_get_pending);