2 * $Id: pmc551.c,v 1.32 2005/11/07 11:14:25 gleixner Exp $
4 * PMC551 PCI Mezzanine Ram Device
7 * Mark Ferrell <mferrell@mvista.com>
8 * Copyright 1999,2000 Nortel Networks
11 * As part of this driver was derived from the slram.c driver it
12 * falls under the same license, which is GNU General Public
16 * This driver is intended to support the PMC551 PCI Ram device
17 * from Ramix Inc. The PMC551 is a PMC Mezzanine module for
18 * cPCI embedded systems. The device contains a single SROM
19 * that initially programs the V370PDC chipset onboard the
20 * device, and various banks of DRAM/SDRAM onboard. This driver
21 * implements this PCI Ram device as an MTD (Memory Technology
22 * Device) so that it can be used to hold a file system, or for
23 * added swap space in embedded systems. Since the memory on
24 * this board isn't as fast as main memory we do not try to hook
25 * it into main memory as that would simply reduce performance
26 * on the system. Using it as a block device allows us to use
27 * it as high speed swap or for a high speed disk device of some
28 * sort. Which becomes very useful on diskless systems in the
29 * embedded market I might add.
32 * Due to what I assume is more buggy SROM, the 64M PMC551 I
33 * have available claims that all 4 of its DRAM banks have 64MiB
34 * of ram configured (making a grand total of 256MiB onboard).
35 * This is slightly annoying since the BAR0 size reflects the
36 * aperture size, not the dram size, and the V370PDC supplies no
37 * other method for memory size discovery. This problem is
38 * mostly only relevant when compiled as a module, as the
39 * unloading of the module with an aperture size smaller then
40 * the ram will cause the driver to detect the onboard memory
41 * size to be equal to the aperture size when the module is
42 * reloaded. Soooo, to help, the module supports an msize
43 * option to allow the specification of the onboard memory, and
44 * an asize option, to allow the specification of the aperture
45 * size. The aperture must be equal to or less then the memory
46 * size, the driver will correct this if you screw it up. This
47 * problem is not relevant for compiled in drivers as compiled
48 * in drivers only init once.
51 * Saeed Karamooz <saeed@ramix.com> of Ramix INC. for the
52 * initial example code of how to initialize this device and for
53 * help with questions I had concerning operation of the device.
55 * Most of the MTD code for this driver was originally written
56 * for the slram.o module in the MTD drivers package which
57 * allows the mapping of system memory into an MTD device.
58 * Since the PMC551 memory module is accessed in the same
59 * fashion as system memory, the slram.c code became a very nice
60 * fit to the needs of this driver. All we added was PCI
61 * detection/initialization to the driver and automatically figure
62 * out the size via the PCI detection.o, later changes by Corey
63 * Minyard set up the card to utilize a 1M sliding apature.
65 * Corey Minyard <minyard@nortelnetworks.com>
66 * * Modified driver to utilize a sliding aperture instead of
67 * mapping all memory into kernel space which turned out to
69 * * Located a bug in the SROM's initialization sequence that
70 * made the memory unusable, added a fix to code to touch up
74 * * MUST fix the init function to not spin on a register
75 * waiting for it to set .. this does not safely handle busted
76 * devices that never reset the register correctly which will
77 * cause the system to hang w/ a reboot being the only chance at
78 * recover. [sort of fixed, could be better]
79 * * Add I2C handling of the SROM so we can read the SROM's information
80 * about the aperture size. This should always accurately reflect the
81 * onboard memory size.
82 * * Comb the init routine. It's still a bit cludgy on a few things.
85 #include <linux/kernel.h>
86 #include <linux/module.h>
87 #include <asm/uaccess.h>
88 #include <linux/types.h>
89 #include <linux/init.h>
90 #include <linux/ptrace.h>
91 #include <linux/slab.h>
92 #include <linux/string.h>
93 #include <linux/timer.h>
94 #include <linux/major.h>
96 #include <linux/ioctl.h>
98 #include <asm/system.h>
99 #include <linux/pci.h>
101 #include <linux/mtd/mtd.h>
102 #include <linux/mtd/pmc551.h>
103 #include <linux/mtd/compatmac.h>
105 static struct mtd_info
*pmc551list
;
107 static int pmc551_erase(struct mtd_info
*mtd
, struct erase_info
*instr
)
109 struct mypriv
*priv
= mtd
->priv
;
110 u32 soff_hi
, soff_lo
; /* start address offset hi/lo */
111 u32 eoff_hi
, eoff_lo
; /* end address offset hi/lo */
116 #ifdef CONFIG_MTD_PMC551_DEBUG
117 printk(KERN_DEBUG
"pmc551_erase(pos:%ld, len:%ld)\n", (long)instr
->addr
,
121 end
= instr
->addr
+ instr
->len
- 1;
123 /* Is it past the end? */
124 if (end
> mtd
->size
) {
125 #ifdef CONFIG_MTD_PMC551_DEBUG
126 printk(KERN_DEBUG
"pmc551_erase() out of bounds (%ld > %ld)\n",
127 (long)end
, (long)mtd
->size
);
132 eoff_hi
= end
& ~(priv
->asize
- 1);
133 soff_hi
= instr
->addr
& ~(priv
->asize
- 1);
134 eoff_lo
= end
& (priv
->asize
- 1);
135 soff_lo
= instr
->addr
& (priv
->asize
- 1);
137 pmc551_point(mtd
, instr
->addr
, instr
->len
, &retlen
, &ptr
);
139 if (soff_hi
== eoff_hi
|| mtd
->size
== priv
->asize
) {
140 /* The whole thing fits within one access, so just one shot
142 memset(ptr
, 0xff, instr
->len
);
144 /* We have to do multiple writes to get all the data
146 while (soff_hi
!= eoff_hi
) {
147 #ifdef CONFIG_MTD_PMC551_DEBUG
148 printk(KERN_DEBUG
"pmc551_erase() soff_hi: %ld, "
149 "eoff_hi: %ld\n", (long)soff_hi
, (long)eoff_hi
);
151 memset(ptr
, 0xff, priv
->asize
);
152 if (soff_hi
+ priv
->asize
>= mtd
->size
) {
155 soff_hi
+= priv
->asize
;
156 pmc551_point(mtd
, (priv
->base_map0
| soff_hi
),
157 priv
->asize
, &retlen
, &ptr
);
159 memset(ptr
, 0xff, eoff_lo
);
163 instr
->state
= MTD_ERASE_DONE
;
164 #ifdef CONFIG_MTD_PMC551_DEBUG
165 printk(KERN_DEBUG
"pmc551_erase() done\n");
168 mtd_erase_callback(instr
);
172 static int pmc551_point(struct mtd_info
*mtd
, loff_t from
, size_t len
,
173 size_t * retlen
, u_char
** mtdbuf
)
175 struct mypriv
*priv
= mtd
->priv
;
179 #ifdef CONFIG_MTD_PMC551_DEBUG
180 printk(KERN_DEBUG
"pmc551_point(%ld, %ld)\n", (long)from
, (long)len
);
183 if (from
+ len
> mtd
->size
) {
184 #ifdef CONFIG_MTD_PMC551_DEBUG
185 printk(KERN_DEBUG
"pmc551_point() out of bounds (%ld > %ld)\n",
186 (long)from
+ len
, (long)mtd
->size
);
191 soff_hi
= from
& ~(priv
->asize
- 1);
192 soff_lo
= from
& (priv
->asize
- 1);
194 /* Cheap hack optimization */
195 if (priv
->curr_map0
!= from
) {
196 pci_write_config_dword(priv
->dev
, PMC551_PCI_MEM_MAP0
,
197 (priv
->base_map0
| soff_hi
));
198 priv
->curr_map0
= soff_hi
;
201 *mtdbuf
= priv
->start
+ soff_lo
;
206 static void pmc551_unpoint(struct mtd_info
*mtd
, u_char
* addr
, loff_t from
,
209 #ifdef CONFIG_MTD_PMC551_DEBUG
210 printk(KERN_DEBUG
"pmc551_unpoint()\n");
214 static int pmc551_read(struct mtd_info
*mtd
, loff_t from
, size_t len
,
215 size_t * retlen
, u_char
* buf
)
217 struct mypriv
*priv
= mtd
->priv
;
218 u32 soff_hi
, soff_lo
; /* start address offset hi/lo */
219 u32 eoff_hi
, eoff_lo
; /* end address offset hi/lo */
222 u_char
*copyto
= buf
;
224 #ifdef CONFIG_MTD_PMC551_DEBUG
225 printk(KERN_DEBUG
"pmc551_read(pos:%ld, len:%ld) asize: %ld\n",
226 (long)from
, (long)len
, (long)priv
->asize
);
229 end
= from
+ len
- 1;
231 /* Is it past the end? */
232 if (end
> mtd
->size
) {
233 #ifdef CONFIG_MTD_PMC551_DEBUG
234 printk(KERN_DEBUG
"pmc551_read() out of bounds (%ld > %ld)\n",
235 (long)end
, (long)mtd
->size
);
240 soff_hi
= from
& ~(priv
->asize
- 1);
241 eoff_hi
= end
& ~(priv
->asize
- 1);
242 soff_lo
= from
& (priv
->asize
- 1);
243 eoff_lo
= end
& (priv
->asize
- 1);
245 pmc551_point(mtd
, from
, len
, retlen
, &ptr
);
247 if (soff_hi
== eoff_hi
) {
248 /* The whole thing fits within one access, so just one shot
250 memcpy(copyto
, ptr
, len
);
253 /* We have to do multiple writes to get all the data
255 while (soff_hi
!= eoff_hi
) {
256 #ifdef CONFIG_MTD_PMC551_DEBUG
257 printk(KERN_DEBUG
"pmc551_read() soff_hi: %ld, "
258 "eoff_hi: %ld\n", (long)soff_hi
, (long)eoff_hi
);
260 memcpy(copyto
, ptr
, priv
->asize
);
261 copyto
+= priv
->asize
;
262 if (soff_hi
+ priv
->asize
>= mtd
->size
) {
265 soff_hi
+= priv
->asize
;
266 pmc551_point(mtd
, soff_hi
, priv
->asize
, retlen
, &ptr
);
268 memcpy(copyto
, ptr
, eoff_lo
);
273 #ifdef CONFIG_MTD_PMC551_DEBUG
274 printk(KERN_DEBUG
"pmc551_read() done\n");
276 *retlen
= copyto
- buf
;
280 static int pmc551_write(struct mtd_info
*mtd
, loff_t to
, size_t len
,
281 size_t * retlen
, const u_char
* buf
)
283 struct mypriv
*priv
= mtd
->priv
;
284 u32 soff_hi
, soff_lo
; /* start address offset hi/lo */
285 u32 eoff_hi
, eoff_lo
; /* end address offset hi/lo */
288 const u_char
*copyfrom
= buf
;
290 #ifdef CONFIG_MTD_PMC551_DEBUG
291 printk(KERN_DEBUG
"pmc551_write(pos:%ld, len:%ld) asize:%ld\n",
292 (long)to
, (long)len
, (long)priv
->asize
);
296 /* Is it past the end? or did the u32 wrap? */
297 if (end
> mtd
->size
) {
298 #ifdef CONFIG_MTD_PMC551_DEBUG
299 printk(KERN_DEBUG
"pmc551_write() out of bounds (end: %ld, "
300 "size: %ld, to: %ld)\n", (long)end
, (long)mtd
->size
,
306 soff_hi
= to
& ~(priv
->asize
- 1);
307 eoff_hi
= end
& ~(priv
->asize
- 1);
308 soff_lo
= to
& (priv
->asize
- 1);
309 eoff_lo
= end
& (priv
->asize
- 1);
311 pmc551_point(mtd
, to
, len
, retlen
, &ptr
);
313 if (soff_hi
== eoff_hi
) {
314 /* The whole thing fits within one access, so just one shot
316 memcpy(ptr
, copyfrom
, len
);
319 /* We have to do multiple writes to get all the data
321 while (soff_hi
!= eoff_hi
) {
322 #ifdef CONFIG_MTD_PMC551_DEBUG
323 printk(KERN_DEBUG
"pmc551_write() soff_hi: %ld, "
324 "eoff_hi: %ld\n", (long)soff_hi
, (long)eoff_hi
);
326 memcpy(ptr
, copyfrom
, priv
->asize
);
327 copyfrom
+= priv
->asize
;
328 if (soff_hi
>= mtd
->size
) {
331 soff_hi
+= priv
->asize
;
332 pmc551_point(mtd
, soff_hi
, priv
->asize
, retlen
, &ptr
);
334 memcpy(ptr
, copyfrom
, eoff_lo
);
339 #ifdef CONFIG_MTD_PMC551_DEBUG
340 printk(KERN_DEBUG
"pmc551_write() done\n");
342 *retlen
= copyfrom
- buf
;
347 * Fixup routines for the V370PDC
348 * PCI device ID 0x020011b0
350 * This function basicly kick starts the DRAM oboard the card and gets it
351 * ready to be used. Before this is done the device reads VERY erratic, so
352 * much that it can crash the Linux 2.2.x series kernels when a user cat's
353 * /proc/pci .. though that is mainly a kernel bug in handling the PCI DEVSEL
354 * register. FIXME: stop spinning on registers .. must implement a timeout
356 * returns the size of the memory region found.
358 static u32
fixup_pmc551(struct pci_dev
*dev
)
360 #ifdef CONFIG_MTD_PMC551_BUGFIX
363 u32 size
, dcmd
, cfg
, dtmp
;
373 * Attempt to reset the card
374 * FIXME: Stop Spinning registers
377 /* unlock registers */
378 pci_write_config_byte(dev
, PMC551_SYS_CTRL_REG
, 0xA5);
379 /* read in old data */
380 pci_read_config_byte(dev
, PMC551_SYS_CTRL_REG
, &bcmd
);
381 /* bang the reset line up and down for a few */
382 for (i
= 0; i
< 10; i
++) {
385 while (counter
++ < 100) {
386 pci_write_config_byte(dev
, PMC551_SYS_CTRL_REG
, bcmd
);
390 while (counter
++ < 100) {
391 pci_write_config_byte(dev
, PMC551_SYS_CTRL_REG
, bcmd
);
394 bcmd
|= (0x40 | 0x20);
395 pci_write_config_byte(dev
, PMC551_SYS_CTRL_REG
, bcmd
);
398 * Take care and turn off the memory on the device while we
399 * tweak the configurations
401 pci_read_config_word(dev
, PCI_COMMAND
, &cmd
);
402 tmp
= cmd
& ~(PCI_COMMAND_IO
| PCI_COMMAND_MEMORY
);
403 pci_write_config_word(dev
, PCI_COMMAND
, tmp
);
406 * Disable existing aperture before probing memory size
408 pci_read_config_dword(dev
, PMC551_PCI_MEM_MAP0
, &dcmd
);
409 dtmp
= (dcmd
| PMC551_PCI_MEM_MAP_ENABLE
| PMC551_PCI_MEM_MAP_REG_EN
);
410 pci_write_config_dword(dev
, PMC551_PCI_MEM_MAP0
, dtmp
);
412 * Grab old BAR0 config so that we can figure out memory size
413 * This is another bit of kludge going on. The reason for the
414 * redundancy is I am hoping to retain the original configuration
415 * previously assigned to the card by the BIOS or some previous
416 * fixup routine in the kernel. So we read the old config into cfg,
417 * then write all 1's to the memory space, read back the result into
418 * "size", and then write back all the old config.
420 pci_read_config_dword(dev
, PCI_BASE_ADDRESS_0
, &cfg
);
421 #ifndef CONFIG_MTD_PMC551_BUGFIX
422 pci_write_config_dword(dev
, PCI_BASE_ADDRESS_0
, ~0);
423 pci_read_config_dword(dev
, PCI_BASE_ADDRESS_0
, &size
);
424 size
= (size
& PCI_BASE_ADDRESS_MEM_MASK
);
426 pci_write_config_dword(dev
, PCI_BASE_ADDRESS_0
, cfg
);
429 * Get the size of the memory by reading all the DRAM size values
430 * and adding them up.
432 * KLUDGE ALERT: the boards we are using have invalid column and
433 * row mux values. We fix them here, but this will break other
434 * memory configurations.
436 pci_read_config_dword(dev
, PMC551_DRAM_BLK0
, &dram_data
);
437 size
= PMC551_DRAM_BLK_GET_SIZE(dram_data
);
438 dram_data
= PMC551_DRAM_BLK_SET_COL_MUX(dram_data
, 0x5);
439 dram_data
= PMC551_DRAM_BLK_SET_ROW_MUX(dram_data
, 0x9);
440 pci_write_config_dword(dev
, PMC551_DRAM_BLK0
, dram_data
);
442 pci_read_config_dword(dev
, PMC551_DRAM_BLK1
, &dram_data
);
443 size
+= PMC551_DRAM_BLK_GET_SIZE(dram_data
);
444 dram_data
= PMC551_DRAM_BLK_SET_COL_MUX(dram_data
, 0x5);
445 dram_data
= PMC551_DRAM_BLK_SET_ROW_MUX(dram_data
, 0x9);
446 pci_write_config_dword(dev
, PMC551_DRAM_BLK1
, dram_data
);
448 pci_read_config_dword(dev
, PMC551_DRAM_BLK2
, &dram_data
);
449 size
+= PMC551_DRAM_BLK_GET_SIZE(dram_data
);
450 dram_data
= PMC551_DRAM_BLK_SET_COL_MUX(dram_data
, 0x5);
451 dram_data
= PMC551_DRAM_BLK_SET_ROW_MUX(dram_data
, 0x9);
452 pci_write_config_dword(dev
, PMC551_DRAM_BLK2
, dram_data
);
454 pci_read_config_dword(dev
, PMC551_DRAM_BLK3
, &dram_data
);
455 size
+= PMC551_DRAM_BLK_GET_SIZE(dram_data
);
456 dram_data
= PMC551_DRAM_BLK_SET_COL_MUX(dram_data
, 0x5);
457 dram_data
= PMC551_DRAM_BLK_SET_ROW_MUX(dram_data
, 0x9);
458 pci_write_config_dword(dev
, PMC551_DRAM_BLK3
, dram_data
);
461 * Oops .. something went wrong
463 if ((size
&= PCI_BASE_ADDRESS_MEM_MASK
) == 0) {
466 #endif /* CONFIG_MTD_PMC551_BUGFIX */
468 if ((cfg
& PCI_BASE_ADDRESS_SPACE
) != PCI_BASE_ADDRESS_SPACE_MEMORY
) {
475 pci_write_config_word(dev
, PMC551_SDRAM_MA
, 0x0400);
476 pci_write_config_word(dev
, PMC551_SDRAM_CMD
, 0x00bf);
479 * Wait until command has gone through
480 * FIXME: register spinning issue
483 pci_read_config_word(dev
, PMC551_SDRAM_CMD
, &cmd
);
486 } while ((PCI_COMMAND_IO
) & cmd
);
489 * Turn on auto refresh
490 * The loop is taken directly from Ramix's example code. I assume that
491 * this must be held high for some duration of time, but I can find no
492 * documentation refrencing the reasons why.
494 for (i
= 1; i
<= 8; i
++) {
495 pci_write_config_word(dev
, PMC551_SDRAM_CMD
, 0x0df);
498 * Make certain command has gone through
499 * FIXME: register spinning issue
503 pci_read_config_word(dev
, PMC551_SDRAM_CMD
, &cmd
);
506 } while ((PCI_COMMAND_IO
) & cmd
);
509 pci_write_config_word(dev
, PMC551_SDRAM_MA
, 0x0020);
510 pci_write_config_word(dev
, PMC551_SDRAM_CMD
, 0x0ff);
513 * Wait until command completes
514 * FIXME: register spinning issue
518 pci_read_config_word(dev
, PMC551_SDRAM_CMD
, &cmd
);
521 } while ((PCI_COMMAND_IO
) & cmd
);
523 pci_read_config_dword(dev
, PMC551_DRAM_CFG
, &dcmd
);
525 pci_write_config_dword(dev
, PMC551_DRAM_CFG
, dcmd
);
528 * Check to make certain fast back-to-back, if not
531 pci_read_config_word(dev
, PCI_STATUS
, &cmd
);
532 if ((cmd
& PCI_COMMAND_FAST_BACK
) == 0) {
533 cmd
|= PCI_COMMAND_FAST_BACK
;
534 pci_write_config_word(dev
, PCI_STATUS
, cmd
);
538 * Check to make certain the DEVSEL is set correctly, this device
539 * has a tendancy to assert DEVSEL and TRDY when a write is performed
540 * to the memory when memory is read-only
542 if ((cmd
& PCI_STATUS_DEVSEL_MASK
) != 0x0) {
543 cmd
&= ~PCI_STATUS_DEVSEL_MASK
;
544 pci_write_config_word(dev
, PCI_STATUS
, cmd
);
547 * Set to be prefetchable and put everything back based on old cfg.
548 * it's possible that the reset of the V370PDC nuked the original
552 cfg |= PCI_BASE_ADDRESS_MEM_PREFETCH;
553 pci_write_config_dword( dev, PCI_BASE_ADDRESS_0, cfg );
557 * Turn PCI memory and I/O bus access back on
559 pci_write_config_word(dev
, PCI_COMMAND
,
560 PCI_COMMAND_MEMORY
| PCI_COMMAND_IO
);
561 #ifdef CONFIG_MTD_PMC551_DEBUG
565 printk(KERN_DEBUG
"pmc551: %d%sB (0x%x) of %sprefetchable memory at "
566 "0x%llx\n", (size
< 1024) ? size
: (size
< 1048576) ?
567 size
>> 10 : size
>> 20,
568 (size
< 1024) ? "" : (size
< 1048576) ? "Ki" : "Mi", size
,
569 ((dcmd
& (0x1 << 3)) == 0) ? "non-" : "",
570 (unsigned long long)pci_resource_start(dev
, 0));
573 * Check to see the state of the memory
575 pci_read_config_dword(dev
, PMC551_DRAM_BLK0
, &dcmd
);
576 printk(KERN_DEBUG
"pmc551: DRAM_BLK0 Flags: %s,%s\n"
577 "pmc551: DRAM_BLK0 Size: %d at %d\n"
578 "pmc551: DRAM_BLK0 Row MUX: %d, Col MUX: %d\n",
579 (((0x1 << 1) & dcmd
) == 0) ? "RW" : "RO",
580 (((0x1 << 0) & dcmd
) == 0) ? "Off" : "On",
581 PMC551_DRAM_BLK_GET_SIZE(dcmd
),
582 ((dcmd
>> 20) & 0x7FF), ((dcmd
>> 13) & 0x7),
583 ((dcmd
>> 9) & 0xF));
585 pci_read_config_dword(dev
, PMC551_DRAM_BLK1
, &dcmd
);
586 printk(KERN_DEBUG
"pmc551: DRAM_BLK1 Flags: %s,%s\n"
587 "pmc551: DRAM_BLK1 Size: %d at %d\n"
588 "pmc551: DRAM_BLK1 Row MUX: %d, Col MUX: %d\n",
589 (((0x1 << 1) & dcmd
) == 0) ? "RW" : "RO",
590 (((0x1 << 0) & dcmd
) == 0) ? "Off" : "On",
591 PMC551_DRAM_BLK_GET_SIZE(dcmd
),
592 ((dcmd
>> 20) & 0x7FF), ((dcmd
>> 13) & 0x7),
593 ((dcmd
>> 9) & 0xF));
595 pci_read_config_dword(dev
, PMC551_DRAM_BLK2
, &dcmd
);
596 printk(KERN_DEBUG
"pmc551: DRAM_BLK2 Flags: %s,%s\n"
597 "pmc551: DRAM_BLK2 Size: %d at %d\n"
598 "pmc551: DRAM_BLK2 Row MUX: %d, Col MUX: %d\n",
599 (((0x1 << 1) & dcmd
) == 0) ? "RW" : "RO",
600 (((0x1 << 0) & dcmd
) == 0) ? "Off" : "On",
601 PMC551_DRAM_BLK_GET_SIZE(dcmd
),
602 ((dcmd
>> 20) & 0x7FF), ((dcmd
>> 13) & 0x7),
603 ((dcmd
>> 9) & 0xF));
605 pci_read_config_dword(dev
, PMC551_DRAM_BLK3
, &dcmd
);
606 printk(KERN_DEBUG
"pmc551: DRAM_BLK3 Flags: %s,%s\n"
607 "pmc551: DRAM_BLK3 Size: %d at %d\n"
608 "pmc551: DRAM_BLK3 Row MUX: %d, Col MUX: %d\n",
609 (((0x1 << 1) & dcmd
) == 0) ? "RW" : "RO",
610 (((0x1 << 0) & dcmd
) == 0) ? "Off" : "On",
611 PMC551_DRAM_BLK_GET_SIZE(dcmd
),
612 ((dcmd
>> 20) & 0x7FF), ((dcmd
>> 13) & 0x7),
613 ((dcmd
>> 9) & 0xF));
615 pci_read_config_word(dev
, PCI_COMMAND
, &cmd
);
616 printk(KERN_DEBUG
"pmc551: Memory Access %s\n",
617 (((0x1 << 1) & cmd
) == 0) ? "off" : "on");
618 printk(KERN_DEBUG
"pmc551: I/O Access %s\n",
619 (((0x1 << 0) & cmd
) == 0) ? "off" : "on");
621 pci_read_config_word(dev
, PCI_STATUS
, &cmd
);
622 printk(KERN_DEBUG
"pmc551: Devsel %s\n",
623 ((PCI_STATUS_DEVSEL_MASK
& cmd
) == 0x000) ? "Fast" :
624 ((PCI_STATUS_DEVSEL_MASK
& cmd
) == 0x200) ? "Medium" :
625 ((PCI_STATUS_DEVSEL_MASK
& cmd
) == 0x400) ? "Slow" : "Invalid");
627 printk(KERN_DEBUG
"pmc551: %sFast Back-to-Back\n",
628 ((PCI_COMMAND_FAST_BACK
& cmd
) == 0) ? "Not " : "");
630 pci_read_config_byte(dev
, PMC551_SYS_CTRL_REG
, &bcmd
);
631 printk(KERN_DEBUG
"pmc551: EEPROM is under %s control\n"
632 "pmc551: System Control Register is %slocked to PCI access\n"
633 "pmc551: System Control Register is %slocked to EEPROM access\n",
634 (bcmd
& 0x1) ? "software" : "hardware",
635 (bcmd
& 0x20) ? "" : "un", (bcmd
& 0x40) ? "" : "un");
641 * Kernel version specific module stuffages
644 MODULE_LICENSE("GPL");
645 MODULE_AUTHOR("Mark Ferrell <mferrell@mvista.com>");
646 MODULE_DESCRIPTION(PMC551_VERSION
);
649 * Stuff these outside the ifdef so as to not bust compiled in driver support
651 static int msize
= 0;
652 static int asize
= 0;
654 module_param(msize
, int, 0);
655 MODULE_PARM_DESC(msize
, "memory size in MiB [1 - 1024]");
656 module_param(asize
, int, 0);
657 MODULE_PARM_DESC(asize
, "aperture size, must be <= memsize [1-1024]");
660 * PMC551 Card Initialization
662 static int __init
init_pmc551(void)
664 struct pci_dev
*PCI_Device
= NULL
;
666 int count
, found
= 0;
667 struct mtd_info
*mtd
;
671 msize
= (1 << (ffs(msize
) - 1)) << 20;
672 if (msize
> (1 << 30)) {
673 printk(KERN_NOTICE
"pmc551: Invalid memory size [%d]\n",
680 asize
= (1 << (ffs(asize
) - 1)) << 20;
681 if (asize
> (1 << 30)) {
682 printk(KERN_NOTICE
"pmc551: Invalid aperture size "
688 printk(KERN_INFO PMC551_VERSION
);
691 * PCU-bus chipset probe.
693 for (count
= 0; count
< MAX_MTD_DEVICES
; count
++) {
695 if ((PCI_Device
= pci_get_device(PCI_VENDOR_ID_V3_SEMI
,
696 PCI_DEVICE_ID_V3_SEMI_V370PDC
,
697 PCI_Device
)) == NULL
) {
701 printk(KERN_NOTICE
"pmc551: Found PCI V370PDC at 0x%llx\n",
702 (unsigned long long)pci_resource_start(PCI_Device
, 0));
705 * The PMC551 device acts VERY weird if you don't init it
706 * first. i.e. it will not correctly report devsel. If for
707 * some reason the sdram is in a wrote-protected state the
708 * device will DEVSEL when it is written to causing problems
709 * with the oldproc.c driver in
710 * some kernels (2.2.*)
712 if ((length
= fixup_pmc551(PCI_Device
)) <= 0) {
713 printk(KERN_NOTICE
"pmc551: Cannot init SDRAM\n");
718 * This is needed until the driver is capable of reading the
719 * onboard I2C SROM to discover the "real" memory size.
723 printk(KERN_NOTICE
"pmc551: Using specified memory "
724 "size 0x%x\n", length
);
729 mtd
= kzalloc(sizeof(struct mtd_info
), GFP_KERNEL
);
731 printk(KERN_NOTICE
"pmc551: Cannot allocate new MTD "
736 priv
= kzalloc(sizeof(struct mypriv
), GFP_KERNEL
);
738 printk(KERN_NOTICE
"pmc551: Cannot allocate new MTD "
744 priv
->dev
= PCI_Device
;
746 if (asize
> length
) {
747 printk(KERN_NOTICE
"pmc551: reducing aperture size to "
748 "fit %dM\n", length
>> 20);
749 priv
->asize
= asize
= length
;
750 } else if (asize
== 0 || asize
== length
) {
751 printk(KERN_NOTICE
"pmc551: Using existing aperture "
752 "size %dM\n", length
>> 20);
753 priv
->asize
= asize
= length
;
755 printk(KERN_NOTICE
"pmc551: Using specified aperture "
756 "size %dM\n", asize
>> 20);
759 priv
->start
= pci_iomap(PCI_Device
, 0, priv
->asize
);
762 printk(KERN_NOTICE
"pmc551: Unable to map IO space\n");
767 #ifdef CONFIG_MTD_PMC551_DEBUG
768 printk(KERN_DEBUG
"pmc551: setting aperture to %d\n",
769 ffs(priv
->asize
>> 20) - 1);
772 priv
->base_map0
= (PMC551_PCI_MEM_MAP_REG_EN
773 | PMC551_PCI_MEM_MAP_ENABLE
774 | (ffs(priv
->asize
>> 20) - 1) << 4);
775 priv
->curr_map0
= priv
->base_map0
;
776 pci_write_config_dword(priv
->dev
, PMC551_PCI_MEM_MAP0
,
779 #ifdef CONFIG_MTD_PMC551_DEBUG
780 printk(KERN_DEBUG
"pmc551: aperture set to %d\n",
781 (priv
->base_map0
& 0xF0) >> 4);
785 mtd
->flags
= MTD_CAP_RAM
;
786 mtd
->erase
= pmc551_erase
;
787 mtd
->read
= pmc551_read
;
788 mtd
->write
= pmc551_write
;
789 mtd
->point
= pmc551_point
;
790 mtd
->unpoint
= pmc551_unpoint
;
792 mtd
->name
= "PMC551 RAM board";
793 mtd
->erasesize
= 0x10000;
795 mtd
->owner
= THIS_MODULE
;
797 if (add_mtd_device(mtd
)) {
798 printk(KERN_NOTICE
"pmc551: Failed to register new device\n");
799 pci_iounmap(PCI_Device
, priv
->start
);
805 /* Keep a reference as the add_mtd_device worked */
806 pci_dev_get(PCI_Device
);
808 printk(KERN_NOTICE
"Registered pmc551 memory device.\n");
809 printk(KERN_NOTICE
"Mapped %dMiB of memory from 0x%p to 0x%p\n",
811 priv
->start
, priv
->start
+ priv
->asize
);
812 printk(KERN_NOTICE
"Total memory is %d%sB\n",
813 (length
< 1024) ? length
:
814 (length
< 1048576) ? length
>> 10 : length
>> 20,
815 (length
< 1024) ? "" : (length
< 1048576) ? "Ki" : "Mi");
816 priv
->nextpmc551
= pmc551list
;
821 /* Exited early, reference left over */
823 pci_dev_put(PCI_Device
);
826 printk(KERN_NOTICE
"pmc551: not detected\n");
829 printk(KERN_NOTICE
"pmc551: %d pmc551 devices loaded\n", found
);
835 * PMC551 Card Cleanup
837 static void __exit
cleanup_pmc551(void)
840 struct mtd_info
*mtd
;
843 while ((mtd
= pmc551list
)) {
845 pmc551list
= priv
->nextpmc551
;
848 printk(KERN_DEBUG
"pmc551: unmapping %dMiB starting at "
849 "0x%p\n", priv
->asize
>> 20, priv
->start
);
850 pci_iounmap(priv
->dev
, priv
->start
);
852 pci_dev_put(priv
->dev
);
860 printk(KERN_NOTICE
"pmc551: %d pmc551 devices unloaded\n", found
);
863 module_init(init_pmc551
);
864 module_exit(cleanup_pmc551
);