arch/mips/lemote/lm2e/dbg_io.c

   1 /*
   2  * Copyright 2001 MontaVista Software Inc.
   3  * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
   4  * Copyright (C) 2000, 2001 Ralf Baechle (ralf@gnu.org)
   5  *
   6  * Copyright (C) 2007 Lemote Inc. & Insititute of Computing Technology
   7  * Author: Fuxin Zhang, zhangfx@lemote.com
   8  *
   9  *  This program is free software; you can redistribute  it and/or modify it
  10  *  under  the terms of  the GNU General  Public License as published by the
  11  *  Free Software Foundation;  either version 2 of the  License, or (at your
  12  *  option) any later version.
  13  *
  14  *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
  15  *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
  16  *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
  17  *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
  18  *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  19  *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
  20  *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
  21  *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
  22  *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  23  *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  24  *
  25  *  You should have received a copy of the  GNU General Public License along
  26  *  with this program; if not, write  to the Free Software Foundation, Inc.,
  27  *  675 Mass Ave, Cambridge, MA 02139, USA.
  28  *
  29  */
  30
  31 #include <linux/io.h>
  32 #include <linux/init.h>
  33 #include <linux/types.h>
  34
  35 #include <asm/serial.h>
  36
  37 #define         UART16550_BAUD_2400             2400
  38 #define         UART16550_BAUD_4800             4800
  39 #define         UART16550_BAUD_9600             9600
  40 #define         UART16550_BAUD_19200            19200
  41 #define         UART16550_BAUD_38400            38400
  42 #define         UART16550_BAUD_57600            57600
  43 #define         UART16550_BAUD_115200           115200
  44
  45 #define         UART16550_PARITY_NONE           0
  46 #define         UART16550_PARITY_ODD            0x08
  47 #define         UART16550_PARITY_EVEN           0x18
  48 #define         UART16550_PARITY_MARK           0x28
  49 #define         UART16550_PARITY_SPACE          0x38
  50
  51 #define         UART16550_DATA_5BIT             0x0
  52 #define         UART16550_DATA_6BIT             0x1
  53 #define         UART16550_DATA_7BIT             0x2
  54 #define         UART16550_DATA_8BIT             0x3
  55
  56 #define         UART16550_STOP_1BIT             0x0
  57 #define         UART16550_STOP_2BIT             0x4
  58
  59 /* ----------------------------------------------------- */
  60
  61 /* === CONFIG === */
  62 #ifdef CONFIG_64BIT
  63 #define         BASE                    (0xffffffffbfd003f8)
  64 #else
  65 #define         BASE                    (0xbfd003f8)
  66 #endif
  67
  68 #define         MAX_BAUD                BASE_BAUD
  69 /* === END OF CONFIG === */
  70
  71 #define         REG_OFFSET              1
  72
  73 /* register offset */
  74 #define         OFS_RCV_BUFFER          0
  75 #define         OFS_TRANS_HOLD          0
  76 #define         OFS_SEND_BUFFER         0
  77 #define         OFS_INTR_ENABLE         (1*REG_OFFSET)
  78 #define         OFS_INTR_ID             (2*REG_OFFSET)
  79 #define         OFS_DATA_FORMAT         (3*REG_OFFSET)
  80 #define         OFS_LINE_CONTROL        (3*REG_OFFSET)
  81 #define         OFS_MODEM_CONTROL       (4*REG_OFFSET)
  82 #define         OFS_RS232_OUTPUT        (4*REG_OFFSET)
  83 #define         OFS_LINE_STATUS         (5*REG_OFFSET)
  84 #define         OFS_MODEM_STATUS        (6*REG_OFFSET)
  85 #define         OFS_RS232_INPUT         (6*REG_OFFSET)
  86 #define         OFS_SCRATCH_PAD         (7*REG_OFFSET)
  87
  88 #define         OFS_DIVISOR_LSB         (0*REG_OFFSET)
  89 #define         OFS_DIVISOR_MSB         (1*REG_OFFSET)
  90
  91 /* memory-mapped read/write of the port */
  92 #define         UART16550_READ(y)       readb((char *)BASE + (y))
  93 #define         UART16550_WRITE(y, z)   writeb(z, (char *)BASE + (y))
  94
  95 void debugInit(u32 baud, u8 data, u8 parity, u8 stop)
  96 {
  97         u32 divisor;
  98
  99         /* disable interrupts */
 100         UART16550_WRITE(OFS_INTR_ENABLE, 0);
 101
 102         /* set up buad rate */
 103         /* set DIAB bit */
 104         UART16550_WRITE(OFS_LINE_CONTROL, 0x80);
 105
 106         /* set divisor */
 107         divisor = MAX_BAUD / baud;
 108         UART16550_WRITE(OFS_DIVISOR_LSB, divisor & 0xff);
 109         UART16550_WRITE(OFS_DIVISOR_MSB, (divisor & 0xff00) >> 8);
 110
 111         /* clear DIAB bit */
 112         UART16550_WRITE(OFS_LINE_CONTROL, 0x0);
 113
 114         /* set data format */
 115         UART16550_WRITE(OFS_DATA_FORMAT, data | parity | stop);
 116 }
 117
 118 static int remoteDebugInitialized;
 119
 120 u8 getDebugChar(void)
 121 {
 122         if (!remoteDebugInitialized) {
 123                 remoteDebugInitialized = 1;
 124                 debugInit(UART16550_BAUD_115200,
 125                           UART16550_DATA_8BIT,
 126                           UART16550_PARITY_NONE, UART16550_STOP_1BIT);
 127         }
 128
 129         while ((UART16550_READ(OFS_LINE_STATUS) & 0x1) == 0) ;
 130         return UART16550_READ(OFS_RCV_BUFFER);
 131 }
 132
 133 int putDebugChar(u8 byte)
 134 {
 135         if (!remoteDebugInitialized) {
 136                 remoteDebugInitialized = 1;
 137                 /*
 138                    debugInit(UART16550_BAUD_115200,
 139                    UART16550_DATA_8BIT,
 140                    UART16550_PARITY_NONE, UART16550_STOP_1BIT); */
 141         }
 142
 143         while ((UART16550_READ(OFS_LINE_STATUS) & 0x20) == 0) ;
 144         UART16550_WRITE(OFS_SEND_BUFFER, byte);
 145         return 1;
 146 }