arch/mips/pci/ops-titan-ht.c

   1 /*
   2  * Copyright 2003 PMC-Sierra
   3  * Author: Manish Lachwani (lachwani@pmc-sierra.com)
   4  *
   5  *  This program is free software; you can redistribute  it and/or modify it
   6  *  under  the terms of  the GNU General  Public License as published by the
   7  *  Free Software Foundation;  either version 2 of the  License, or (at your
   8  *  option) any later version.
   9  *
  10  *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
  11  *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
  12  *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
  13  *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
  14  *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  15  *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
  16  *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
  17  *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
  18  *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  19  *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  20  *
  21  *  You should have received a copy of the  GNU General Public License along
  22  *  with this program; if not, write  to the Free Software Foundation, Inc.,
  23  *  675 Mass Ave, Cambridge, MA 02139, USA.
  24  */
  25
  26 #include <linux/types.h>
  27 #include <linux/pci.h>
  28 #include <linux/kernel.h>
  29 #include <linux/slab.h>
  30 #include <linux/delay.h>
  31 #include <asm/io.h>
  32
  33 #include <asm/titan_dep.h>
  34
  35 static int titan_ht_config_read_dword(struct pci_bus *bus, unsigned int devfn,
  36         int offset, u32 * val)
  37 {
  38         volatile uint32_t address;
  39         int busno;
  40
  41         busno = bus->number;
  42
  43         address = (busno << 16) | (devfn << 8) | (offset & 0xfc) | 0x80000000;
  44         if (busno != 0)
  45                 address |= 1;
  46
  47         /*
  48          * RM9000 HT Errata: Issue back to back HT config
  49          * transcations. Issue a BIU sync before and
  50          * after the HT cycle
  51          */
  52
  53         *(volatile int32_t *) 0xfb0000f0 |= 0x2;
  54
  55         udelay(30);
  56
  57         *(volatile int32_t *) 0xfb0006f8 = address;
  58         *(val) = *(volatile int32_t *) 0xfb0006fc;
  59
  60         udelay(30);
  61
  62         * (volatile int32_t *) 0xfb0000f0 |= 0x2;
  63
  64         return PCIBIOS_SUCCESSFUL;
  65 }
  66
  67 static int titan_ht_config_read(struct pci_bus *bus, unsigned int devfn,
  68         int offset, int size, u32 * val)
  69 {
  70         uint32_t dword;
  71
  72         titan_ht_config_read_dword(bus, devfn, offset, &dword);
  73
  74         dword >>= ((offset & 3) << 3);
  75         dword &= (0xffffffffU >> ((4 - size) << 8));
  76
  77         return PCIBIOS_SUCCESSFUL;
  78 }
  79
  80 static inline int titan_ht_config_write_dword(struct pci_bus *bus,
  81         unsigned int devfn, int offset, u32 val)
  82 {
  83         volatile uint32_t address;
  84         int busno;
  85
  86         busno = bus->number;
  87
  88         address = (busno << 16) | (devfn << 8) | (offset & 0xfc) | 0x80000000;
  89         if (busno != 0)
  90                 address |= 1;
  91
  92         *(volatile int32_t *) 0xfb0000f0 |= 0x2;
  93
  94         udelay(30);
  95
  96         *(volatile int32_t *) 0xfb0006f8 = address;
  97         *(volatile int32_t *) 0xfb0006fc = val;
  98
  99         udelay(30);
 100
 101         *(volatile int32_t *) 0xfb0000f0 |= 0x2;
 102
 103         return PCIBIOS_SUCCESSFUL;
 104 }
 105
 106 static int titan_ht_config_write(struct pci_bus *bus, unsigned int devfn,
 107         int offset, int size, u32 val)
 108 {
 109         uint32_t val1, val2, mask;
 110
 111         titan_ht_config_read_dword(bus, devfn, offset, &val2);
 112
 113         val1 = val << ((offset & 3) << 3);
 114         mask = ~(0xffffffffU >> ((4 - size) << 8));
 115         val2 &= ~(mask << ((offset & 3) << 8));
 116
 117         titan_ht_config_write_dword(bus, devfn, offset, val1 | val2);
 118
 119         return PCIBIOS_SUCCESSFUL;
 120 }
 121
 122 struct pci_ops titan_ht_pci_ops = {
 123         .read   = titan_ht_config_read,
 124         .write  = titan_ht_config_write,
 125 };