au1550_spi: fix prototype of irq handler
[wrt350n-kernel.git] / arch / mips / pci / pci-emma2rh.c
blobd99591a0cdfe7abdfdeaf99a5a7218395edbfb82
1 /*
2 * arch/mips/pci/pci-emma2rh.c
3 * This file defines the PCI configration.
5 * Copyright (C) NEC Electronics Corporation 2004-2006
7 * This file is based on the arch/mips/ddb5xxx/ddb5477/pci.c
9 * Copyright 2001 MontaVista Software Inc.
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
26 #include <linux/kernel.h>
27 #include <linux/init.h>
28 #include <linux/types.h>
29 #include <linux/pci.h>
31 #include <asm/bootinfo.h>
32 #include <asm/debug.h>
34 #include <asm/emma2rh/emma2rh.h>
36 static struct resource pci_io_resource = {
37 .name = "pci IO space",
38 .start = EMMA2RH_PCI_IO_BASE,
39 .end = EMMA2RH_PCI_IO_BASE + EMMA2RH_PCI_IO_SIZE - 1,
40 .flags = IORESOURCE_IO,
43 static struct resource pci_mem_resource = {
44 .name = "pci memory space",
45 .start = EMMA2RH_PCI_MEM_BASE,
46 .end = EMMA2RH_PCI_MEM_BASE + EMMA2RH_PCI_MEM_SIZE - 1,
47 .flags = IORESOURCE_MEM,
50 extern struct pci_ops emma2rh_pci_ops;
52 static struct pci_controller emma2rh_pci_controller = {
53 .pci_ops = &emma2rh_pci_ops,
54 .mem_resource = &pci_mem_resource,
55 .io_resource = &pci_io_resource,
56 .mem_offset = -0x04000000,
57 .io_offset = 0,
60 static void __init emma2rh_pci_init(void)
62 /* setup PCI interface */
63 emma2rh_out32(EMMA2RH_PCI_ARBIT_CTR, 0x70f);
65 emma2rh_out32(EMMA2RH_PCI_IWIN0_CTR, 0x80000a18);
66 emma2rh_out32(EMMA2RH_PCI_CONFIG_BASE + PCI_COMMAND,
67 PCI_STATUS_DEVSEL_MEDIUM | PCI_STATUS_CAP_LIST |
68 PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY);
69 emma2rh_out32(EMMA2RH_PCI_CONFIG_BASE + PCI_BASE_ADDRESS_0, 0x10000000);
70 emma2rh_out32(EMMA2RH_PCI_CONFIG_BASE + PCI_BASE_ADDRESS_1, 0x00000000);
72 emma2rh_out32(EMMA2RH_PCI_IWIN0_CTR, 0x12000000 | 0x218);
73 emma2rh_out32(EMMA2RH_PCI_IWIN1_CTR, 0x18000000 | 0x600);
74 emma2rh_out32(EMMA2RH_PCI_INIT_ESWP, 0x00000200);
76 emma2rh_out32(EMMA2RH_PCI_TWIN_CTR, 0x00009200);
77 emma2rh_out32(EMMA2RH_PCI_TWIN_BADR, 0x00000000);
78 emma2rh_out32(EMMA2RH_PCI_TWIN0_DADR, 0x00000000);
79 emma2rh_out32(EMMA2RH_PCI_TWIN1_DADR, 0x00000000);
82 static int __init emma2rh_pci_setup(void)
84 emma2rh_pci_init();
85 register_pci_controller(&emma2rh_pci_controller);
86 return 0;
89 arch_initcall(emma2rh_pci_setup);