au1550_spi: fix prototype of irq handler
[wrt350n-kernel.git] / arch / ppc / platforms / 4xx / luan.h
blob68dd46b0a5c43d257de0ab3cd46fbf16f44a4748
1 /*
2 * Luan board definitions
4 * Matt Porter <mporter@kernel.crashing.org>
6 * Copyright 2004-2005 MontaVista Software Inc.
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
15 #ifdef __KERNEL__
16 #ifndef __ASM_LUAN_H__
17 #define __ASM_LUAN_H__
19 #include <platforms/4xx/ibm440sp.h>
21 /* F/W TLB mapping used in bootloader glue to reset EMAC */
22 #define PPC44x_EMAC0_MR0 0xa0000800
24 /* Location of MAC addresses in PIBS image */
25 #define PIBS_FLASH_BASE 0xffe00000
26 #define PIBS_MAC_BASE (PIBS_FLASH_BASE+0x1b0400)
28 /* External timer clock frequency */
29 #define LUAN_TMR_CLK 25000000
31 /* Flash */
32 #define LUAN_FPGA_REG_0 0x0000000148300000ULL
33 #define LUAN_BOOT_LARGE_FLASH(x) (x & 0x40)
34 #define LUAN_SMALL_FLASH_LOW 0x00000001ff900000ULL
35 #define LUAN_SMALL_FLASH_HIGH 0x00000001ffe00000ULL
36 #define LUAN_SMALL_FLASH_SIZE 0x100000
37 #define LUAN_LARGE_FLASH_LOW 0x00000001ff800000ULL
38 #define LUAN_LARGE_FLASH_HIGH 0x00000001ffc00000ULL
39 #define LUAN_LARGE_FLASH_SIZE 0x400000
42 * Serial port defines
44 #define RS_TABLE_SIZE 3
46 /* PIBS defined UART mappings, used before early_serial_setup */
47 #define UART0_IO_BASE 0xa0000200
48 #define UART1_IO_BASE 0xa0000300
49 #define UART2_IO_BASE 0xa0000600
51 #define BASE_BAUD 11059200
52 #define STD_UART_OP(num) \
53 { 0, BASE_BAUD, 0, UART##num##_INT, \
54 (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST), \
55 iomem_base: (void*)UART##num##_IO_BASE, \
56 io_type: SERIAL_IO_MEM},
58 #define SERIAL_PORT_DFNS \
59 STD_UART_OP(0) \
60 STD_UART_OP(1) \
61 STD_UART_OP(2)
63 /* PCI support */
64 #define LUAN_PCIX_LOWER_IO 0x00000000
65 #define LUAN_PCIX_UPPER_IO 0x0000ffff
66 #define LUAN_PCIX0_LOWER_MEM 0x80000000
67 #define LUAN_PCIX0_UPPER_MEM 0x9fffffff
68 #define LUAN_PCIX1_LOWER_MEM 0xa0000000
69 #define LUAN_PCIX1_UPPER_MEM 0xbfffffff
70 #define LUAN_PCIX2_LOWER_MEM 0xc0000000
71 #define LUAN_PCIX2_UPPER_MEM 0xdfffffff
73 #define LUAN_PCIX_MEM_SIZE 0x20000000
74 #define LUAN_PCIX_MEM_OFFSET 0x00000000
76 #endif /* __ASM_LUAN_H__ */
77 #endif /* __KERNEL__ */