au1550_spi: fix prototype of irq handler
[wrt350n-kernel.git] / arch / ppc / platforms / rpxlite.h
blobb615501d55fc468a047665a5881b52291638798e
1 /*
2 * A collection of structures, addresses, and values associated with
3 * the RPCG RPX-Lite board. Copied from the MBX stuff.
5 * Copyright (c) 1998 Dan Malek (dmalek@jlc.net)
6 */
7 #ifdef __KERNEL__
8 #ifndef __MACH_RPX_DEFS
9 #define __MACH_RPX_DEFS
12 #ifndef __ASSEMBLY__
13 /* A Board Information structure that is given to a program when
14 * prom starts it up.
16 typedef struct bd_info {
17 unsigned int bi_memstart; /* Memory start address */
18 unsigned int bi_memsize; /* Memory (end) size in bytes */
19 unsigned int bi_intfreq; /* Internal Freq, in Hz */
20 unsigned int bi_busfreq; /* Bus Freq, in Hz */
21 unsigned char bi_enetaddr[6];
22 unsigned int bi_baudrate;
23 } bd_t;
25 extern bd_t m8xx_board_info;
27 /* Memory map is configured by the PROM startup.
28 * We just map a few things we need. The CSR is actually 4 byte-wide
29 * registers that can be accessed as 8-, 16-, or 32-bit values.
31 #define RPX_CSR_ADDR ((uint)0xfa400000)
32 #define RPX_CSR_SIZE ((uint)(4 * 1024))
33 #define IMAP_ADDR ((uint)0xfa200000)
34 #define IMAP_SIZE ((uint)(64 * 1024))
35 #define PCMCIA_MEM_ADDR ((uint)0x04000000)
36 #define PCMCIA_MEM_SIZE ((uint)(64 * 1024))
37 #define PCMCIA_IO_ADDR ((uint)0x04400000)
38 #define PCMCIA_IO_SIZE ((uint)(4 * 1024))
40 /* Things of interest in the CSR.
42 #define BCSR0_ETHEN ((uint)0x80000000)
43 #define BCSR0_ETHLPBK ((uint)0x40000000)
44 #define BCSR0_COLTESTDIS ((uint)0x20000000)
45 #define BCSR0_FULLDPLXDIS ((uint)0x10000000)
46 #define BCSR0_LEDOFF ((uint)0x08000000)
47 #define BCSR0_USBDISABLE ((uint)0x04000000)
48 #define BCSR0_USBHISPEED ((uint)0x02000000)
49 #define BCSR0_USBPWREN ((uint)0x01000000)
50 #define BCSR0_PCMCIAVOLT ((uint)0x000f0000)
51 #define BCSR0_PCMCIA3VOLT ((uint)0x000a0000)
52 #define BCSR0_PCMCIA5VOLT ((uint)0x00060000)
54 #define BCSR1_IPB5SEL ((uint)0x00100000)
55 #define BCSR1_PCVCTL4 ((uint)0x00080000)
56 #define BCSR1_PCVCTL5 ((uint)0x00040000)
57 #define BCSR1_PCVCTL6 ((uint)0x00020000)
58 #define BCSR1_PCVCTL7 ((uint)0x00010000)
60 /* define IO_BASE for pcmcia */
61 #define _IO_BASE 0x80000000
62 #define _IO_BASE_SIZE 0x1000
64 #ifdef CONFIG_IDE
65 # define MAX_HWIFS 1
66 #endif
68 /* CPM Ethernet through SCCx.
70 * This ENET stuff is for the MPC850 with ethernet on SCC2. Some of
71 * this may be unique to the RPX-Lite configuration.
72 * Note TENA is on Port B.
74 #define PA_ENET_RXD ((ushort)0x0004)
75 #define PA_ENET_TXD ((ushort)0x0008)
76 #define PA_ENET_TCLK ((ushort)0x0200)
77 #define PA_ENET_RCLK ((ushort)0x0800)
78 #define PB_ENET_TENA ((uint)0x00002000)
79 #define PC_ENET_CLSN ((ushort)0x0040)
80 #define PC_ENET_RENA ((ushort)0x0080)
82 #define SICR_ENET_MASK ((uint)0x0000ff00)
83 #define SICR_ENET_CLKRT ((uint)0x00003d00)
85 /* We don't use the 8259.
87 #define NR_8259_INTS 0
89 #endif /* !__ASSEMBLY__ */
90 #endif /* __MACH_RPX_DEFS */
91 #endif /* __KERNEL__ */