au1550_spi: fix prototype of irq handler
[wrt350n-kernel.git] / arch / ppc / platforms / spruce.h
blobf1f96f1de72a088f4f6be118ad046ee16ba8a7c4
1 /*
2 * arch/ppc/platforms/spruce.h
4 * Definitions for IBM Spruce reference board support
6 * Authors: Matt Porter and Johnnie Peters
7 * mporter@mvista.com
8 * jpeters@mvista.com
10 * 2001 (c) MontaVista, Software, Inc. This file is licensed under
11 * the terms of the GNU General Public License version 2. This program
12 * is licensed "as is" without any warranty of any kind, whether express
13 * or implied.
16 #ifdef __KERNEL__
17 #ifndef __ASM_SPRUCE_H__
18 #define __ASM_SPRUCE_H__
20 #define SPRUCE_PCI_CONFIG_ADDR 0xfec00000
21 #define SPRUCE_PCI_CONFIG_DATA 0xfec00004
23 #define SPRUCE_PCI_PHY_IO_BASE 0xf8000000
24 #define SPRUCE_PCI_IO_BASE SPRUCE_PCI_PHY_IO_BASE
26 #define SPRUCE_PCI_SYS_MEM_BASE 0x00000000
28 #define SPRUCE_PCI_LOWER_MEM 0x80000000
29 #define SPRUCE_PCI_UPPER_MEM 0x9fffffff
30 #define SPRUCE_PCI_LOWER_IO 0x00000000
31 #define SPRUCE_PCI_UPPER_IO 0x03ffffff
33 #define SPRUCE_ISA_IO_BASE SPRUCE_PCI_IO_BASE
35 #define SPRUCE_MEM_SIZE 0x04000000
36 #define SPRUCE_BUS_SPEED 66666667
38 #define SPRUCE_NVRAM_BASE_ADDR 0xff800000
39 #define SPRUCE_RTC_BASE_ADDR SPRUCE_NVRAM_BASE_ADDR
42 * Serial port defines
44 #define SPRUCE_FPGA_REG_A 0xff820000
45 #define SPRUCE_UARTCLK_33M 0x02
46 #define SPRUCE_UARTCLK_IS_33M(reg) (reg & SPRUCE_UARTCLK_33M)
48 #define UART0_IO_BASE 0xff600300
49 #define UART1_IO_BASE 0xff600400
51 #define RS_TABLE_SIZE 2
53 #define SPRUCE_BAUD_33M (33000000/64)
54 #define SPRUCE_BAUD_30M (30000000/64)
55 #define BASE_BAUD SPRUCE_BAUD_33M
57 #define UART0_INT 3
58 #define UART1_INT 4
60 #define STD_UART_OP(num) \
61 { 0, BASE_BAUD, 0, UART##num##_INT, \
62 ASYNC_BOOT_AUTOCONF, \
63 iomem_base: (unsigned char *) UART##num##_IO_BASE, \
64 io_type: SERIAL_IO_MEM},
66 #define SERIAL_PORT_DFNS \
67 STD_UART_OP(0) \
68 STD_UART_OP(1)
70 #endif /* __ASM_SPRUCE_H__ */
71 #endif /* __KERNEL__ */