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au1550_spi: fix prototype of irq handler
[wrt350n-kernel.git] / drivers / scsi / aacraid / aacraid.h
blobace0b751c131e311fd9e012077571889c8fafd66
1 #ifndef dprintk
2 # define dprintk(x)
3 #endif
4 /* eg: if (nblank(dprintk(x))) */
5 #define _nblank(x) #x
6 #define nblank(x) _nblank(x)[0]
7
8 #include <linux/interrupt.h>
9
10 /*------------------------------------------------------------------------------
11 * D E F I N E S
12 *----------------------------------------------------------------------------*/
13
14 #ifndef AAC_DRIVER_BUILD
15 # define AAC_DRIVER_BUILD 2455
16 # define AAC_DRIVER_BRANCH "-ms"
17 #endif
18 #define MAXIMUM_NUM_CONTAINERS 32
19
20 #define AAC_NUM_MGT_FIB 8
21 #define AAC_NUM_IO_FIB (512 - AAC_NUM_MGT_FIB)
22 #define AAC_NUM_FIB (AAC_NUM_IO_FIB + AAC_NUM_MGT_FIB)
23
24 #define AAC_MAX_LUN (8)
25
26 #define AAC_MAX_HOSTPHYSMEMPAGES (0xfffff)
27 #define AAC_MAX_32BIT_SGBCOUNT ((unsigned short)256)
28
29 /*
30 * These macros convert from physical channels to virtual channels
31 */
32 #define CONTAINER_CHANNEL (0)
33 #define CONTAINER_TO_CHANNEL(cont) (CONTAINER_CHANNEL)
34 #define CONTAINER_TO_ID(cont) (cont)
35 #define CONTAINER_TO_LUN(cont) (0)
36
37 #define aac_phys_to_logical(x) (x+1)
38 #define aac_logical_to_phys(x) (x?x-1:0)
39
40 /* #define AAC_DETAILED_STATUS_INFO */
41
42 struct diskparm
43 {
44 int heads;
45 int sectors;
46 int cylinders;
47 };
48
49
50 /*
51 * Firmware constants
52 */
53
54 #define CT_NONE 0
55 #define CT_OK 218
56 #define FT_FILESYS 8 /* ADAPTEC's "FSA"(tm) filesystem */
57 #define FT_DRIVE 9 /* physical disk - addressable in scsi by bus/id/lun */
58
59 /*
60 * Host side memory scatter gather list
61 * Used by the adapter for read, write, and readdirplus operations
62 * We have separate 32 and 64 bit version because even
63 * on 64 bit systems not all cards support the 64 bit version
64 */
65 struct sgentry {
66 __le32 addr; /* 32-bit address. */
67 __le32 count; /* Length. */
68 };
69
70 struct user_sgentry {
71 u32 addr; /* 32-bit address. */
72 u32 count; /* Length. */
73 };
74
75 struct sgentry64 {
76 __le32 addr[2]; /* 64-bit addr. 2 pieces for data alignment */
77 __le32 count; /* Length. */
78 };
79
80 struct user_sgentry64 {
81 u32 addr[2]; /* 64-bit addr. 2 pieces for data alignment */
82 u32 count; /* Length. */
83 };
84
85 struct sgentryraw {
86 __le32 next; /* reserved for F/W use */
87 __le32 prev; /* reserved for F/W use */
88 __le32 addr[2];
89 __le32 count;
90 __le32 flags; /* reserved for F/W use */
91 };
92
93 struct user_sgentryraw {
94 u32 next; /* reserved for F/W use */
95 u32 prev; /* reserved for F/W use */
96 u32 addr[2];
97 u32 count;
98 u32 flags; /* reserved for F/W use */
99 };
100
101 /*
102 * SGMAP
103 *
104 * This is the SGMAP structure for all commands that use
105 * 32-bit addressing.
106 */
107
108 struct sgmap {
109 __le32 count;
110 struct sgentry sg[1];
111 };
112
113 struct user_sgmap {
114 u32 count;
115 struct user_sgentry sg[1];
116 };
117
118 struct sgmap64 {
119 __le32 count;
120 struct sgentry64 sg[1];
121 };
122
123 struct user_sgmap64 {
124 u32 count;
125 struct user_sgentry64 sg[1];
126 };
127
128 struct sgmapraw {
129 __le32 count;
130 struct sgentryraw sg[1];
131 };
132
133 struct user_sgmapraw {
134 u32 count;
135 struct user_sgentryraw sg[1];
136 };
137
138 struct creation_info
139 {
140 u8 buildnum; /* e.g., 588 */
141 u8 usec; /* e.g., 588 */
142 u8 via; /* e.g., 1 = FSU,
143 * 2 = API
144 */
145 u8 year; /* e.g., 1997 = 97 */
146 __le32 date; /*
147 * unsigned Month :4; // 1 - 12
148 * unsigned Day :6; // 1 - 32
149 * unsigned Hour :6; // 0 - 23
150 * unsigned Minute :6; // 0 - 60
151 * unsigned Second :6; // 0 - 60
152 */
153 __le32 serial[2]; /* e.g., 0x1DEADB0BFAFAF001 */
154 };
155
156
157 /*
158 * Define all the constants needed for the communication interface
159 */
160
161 /*
162 * Define how many queue entries each queue will have and the total
163 * number of entries for the entire communication interface. Also define
164 * how many queues we support.
165 *
166 * This has to match the controller
167 */
168
169 #define NUMBER_OF_COMM_QUEUES 8 // 4 command; 4 response
170 #define HOST_HIGH_CMD_ENTRIES 4
171 #define HOST_NORM_CMD_ENTRIES 8
172 #define ADAP_HIGH_CMD_ENTRIES 4
173 #define ADAP_NORM_CMD_ENTRIES 512
174 #define HOST_HIGH_RESP_ENTRIES 4
175 #define HOST_NORM_RESP_ENTRIES 512
176 #define ADAP_HIGH_RESP_ENTRIES 4
177 #define ADAP_NORM_RESP_ENTRIES 8
178
179 #define TOTAL_QUEUE_ENTRIES \
180 (HOST_NORM_CMD_ENTRIES + HOST_HIGH_CMD_ENTRIES + ADAP_NORM_CMD_ENTRIES + ADAP_HIGH_CMD_ENTRIES + \
181 HOST_NORM_RESP_ENTRIES + HOST_HIGH_RESP_ENTRIES + ADAP_NORM_RESP_ENTRIES + ADAP_HIGH_RESP_ENTRIES)
182
183
184 /*
185 * Set the queues on a 16 byte alignment
186 */
187
188 #define QUEUE_ALIGNMENT 16
189
190 /*
191 * The queue headers define the Communication Region queues. These
192 * are physically contiguous and accessible by both the adapter and the
193 * host. Even though all queue headers are in the same contiguous block
194 * they will be represented as individual units in the data structures.
195 */
196
197 struct aac_entry {
198 __le32 size; /* Size in bytes of Fib which this QE points to */
199 __le32 addr; /* Receiver address of the FIB */
200 };
201
202 /*
203 * The adapter assumes the ProducerIndex and ConsumerIndex are grouped
204 * adjacently and in that order.
205 */
206
207 struct aac_qhdr {
208 __le64 header_addr;/* Address to hand the adapter to access
209 to this queue head */
210 __le32 *producer; /* The producer index for this queue (host address) */
211 __le32 *consumer; /* The consumer index for this queue (host address) */
212 };
213
214 /*
215 * Define all the events which the adapter would like to notify
216 * the host of.
217 */
218
219 #define HostNormCmdQue 1 /* Change in host normal priority command queue */
220 #define HostHighCmdQue 2 /* Change in host high priority command queue */
221 #define HostNormRespQue 3 /* Change in host normal priority response queue */
222 #define HostHighRespQue 4 /* Change in host high priority response queue */
223 #define AdapNormRespNotFull 5
224 #define AdapHighRespNotFull 6
225 #define AdapNormCmdNotFull 7
226 #define AdapHighCmdNotFull 8
227 #define SynchCommandComplete 9
228 #define AdapInternalError 0xfe /* The adapter detected an internal error shutting down */
229
230 /*
231 * Define all the events the host wishes to notify the
232 * adapter of. The first four values much match the Qid the
233 * corresponding queue.
234 */
235
236 #define AdapNormCmdQue 2
237 #define AdapHighCmdQue 3
238 #define AdapNormRespQue 6
239 #define AdapHighRespQue 7
240 #define HostShutdown 8
241 #define HostPowerFail 9
242 #define FatalCommError 10
243 #define HostNormRespNotFull 11
244 #define HostHighRespNotFull 12
245 #define HostNormCmdNotFull 13
246 #define HostHighCmdNotFull 14
247 #define FastIo 15
248 #define AdapPrintfDone 16
249
250 /*
251 * Define all the queues that the adapter and host use to communicate
252 * Number them to match the physical queue layout.
253 */
254
255 enum aac_queue_types {
256 HostNormCmdQueue = 0, /* Adapter to host normal priority command traffic */
257 HostHighCmdQueue, /* Adapter to host high priority command traffic */
258 AdapNormCmdQueue, /* Host to adapter normal priority command traffic */
259 AdapHighCmdQueue, /* Host to adapter high priority command traffic */
260 HostNormRespQueue, /* Adapter to host normal priority response traffic */
261 HostHighRespQueue, /* Adapter to host high priority response traffic */
262 AdapNormRespQueue, /* Host to adapter normal priority response traffic */
263 AdapHighRespQueue /* Host to adapter high priority response traffic */
264 };
265
266 /*
267 * Assign type values to the FSA communication data structures
268 */
269
270 #define FIB_MAGIC 0x0001
271
272 /*
273 * Define the priority levels the FSA communication routines support.
274 */
275
276 #define FsaNormal 1
277
278 /*
279 * Define the FIB. The FIB is the where all the requested data and
280 * command information are put to the application on the FSA adapter.
281 */
282
283 struct aac_fibhdr {
284 __le32 XferState; /* Current transfer state for this CCB */
285 __le16 Command; /* Routing information for the destination */
286 u8 StructType; /* Type FIB */
287 u8 Flags; /* Flags for FIB */
288 __le16 Size; /* Size of this FIB in bytes */
289 __le16 SenderSize; /* Size of the FIB in the sender
290 (for response sizing) */
291 __le32 SenderFibAddress; /* Host defined data in the FIB */
292 __le32 ReceiverFibAddress;/* Logical address of this FIB for
293 the adapter */
294 u32 SenderData; /* Place holder for the sender to store data */
295 union {
296 struct {
297 __le32 _ReceiverTimeStart; /* Timestamp for
298 receipt of fib */
299 __le32 _ReceiverTimeDone; /* Timestamp for
300 completion of fib */
301 } _s;
302 } _u;
303 };
304
305 struct hw_fib {
306 struct aac_fibhdr header;
307 u8 data[512-sizeof(struct aac_fibhdr)]; // Command specific data
308 };
309
310 /*
311 * FIB commands
312 */
313
314 #define TestCommandResponse 1
315 #define TestAdapterCommand 2
316 /*
317 * Lowlevel and comm commands
318 */
319 #define LastTestCommand 100
320 #define ReinitHostNormCommandQueue 101
321 #define ReinitHostHighCommandQueue 102
322 #define ReinitHostHighRespQueue 103
323 #define ReinitHostNormRespQueue 104
324 #define ReinitAdapNormCommandQueue 105
325 #define ReinitAdapHighCommandQueue 107
326 #define ReinitAdapHighRespQueue 108
327 #define ReinitAdapNormRespQueue 109
328 #define InterfaceShutdown 110
329 #define DmaCommandFib 120
330 #define StartProfile 121
331 #define TermProfile 122
332 #define SpeedTest 123
333 #define TakeABreakPt 124
334 #define RequestPerfData 125
335 #define SetInterruptDefTimer 126
336 #define SetInterruptDefCount 127
337 #define GetInterruptDefStatus 128
338 #define LastCommCommand 129
339 /*
340 * Filesystem commands
341 */
342 #define NuFileSystem 300
343 #define UFS 301
344 #define HostFileSystem 302
345 #define LastFileSystemCommand 303
346 /*
347 * Container Commands
348 */
349 #define ContainerCommand 500
350 #define ContainerCommand64 501
351 #define ContainerRawIo 502
352 /*
353 * Scsi Port commands (scsi passthrough)
354 */
355 #define ScsiPortCommand 600
356 #define ScsiPortCommand64 601
357 /*
358 * Misc house keeping and generic adapter initiated commands
359 */
360 #define AifRequest 700
361 #define CheckRevision 701
362 #define FsaHostShutdown 702
363 #define RequestAdapterInfo 703
364 #define IsAdapterPaused 704
365 #define SendHostTime 705
366 #define RequestSupplementAdapterInfo 706
367 #define LastMiscCommand 707
368
369 /*
370 * Commands that will target the failover level on the FSA adapter
371 */
372
373 enum fib_xfer_state {
374 HostOwned = (1<<0),
375 AdapterOwned = (1<<1),
376 FibInitialized = (1<<2),
377 FibEmpty = (1<<3),
378 AllocatedFromPool = (1<<4),
379 SentFromHost = (1<<5),
380 SentFromAdapter = (1<<6),
381 ResponseExpected = (1<<7),
382 NoResponseExpected = (1<<8),
383 AdapterProcessed = (1<<9),
384 HostProcessed = (1<<10),
385 HighPriority = (1<<11),
386 NormalPriority = (1<<12),
387 Async = (1<<13),
388 AsyncIo = (1<<13), // rpbfix: remove with new regime
389 PageFileIo = (1<<14), // rpbfix: remove with new regime
390 ShutdownRequest = (1<<15),
391 LazyWrite = (1<<16), // rpbfix: remove with new regime
392 AdapterMicroFib = (1<<17),
393 BIOSFibPath = (1<<18),
394 FastResponseCapable = (1<<19),
395 ApiFib = (1<<20) // Its an API Fib.
396 };
397
398 /*
399 * The following defines needs to be updated any time there is an
400 * incompatible change made to the aac_init structure.
401 */
402
403 #define ADAPTER_INIT_STRUCT_REVISION 3
404 #define ADAPTER_INIT_STRUCT_REVISION_4 4 // rocket science
405
406 struct aac_init
407 {
408 __le32 InitStructRevision;
409 __le32 MiniPortRevision;
410 __le32 fsrev;
411 __le32 CommHeaderAddress;
412 __le32 FastIoCommAreaAddress;
413 __le32 AdapterFibsPhysicalAddress;
414 __le32 AdapterFibsVirtualAddress;
415 __le32 AdapterFibsSize;
416 __le32 AdapterFibAlign;
417 __le32 printfbuf;
418 __le32 printfbufsiz;
419 __le32 HostPhysMemPages; /* number of 4k pages of host
420 physical memory */
421 __le32 HostElapsedSeconds; /* number of seconds since 1970. */
422 /*
423 * ADAPTER_INIT_STRUCT_REVISION_4 begins here
424 */
425 __le32 InitFlags; /* flags for supported features */
426 #define INITFLAGS_NEW_COMM_SUPPORTED 0x00000001
427 __le32 MaxIoCommands; /* max outstanding commands */
428 __le32 MaxIoSize; /* largest I/O command */
429 __le32 MaxFibSize; /* largest FIB to adapter */
430 };
431
432 enum aac_log_level {
433 LOG_AAC_INIT = 10,
434 LOG_AAC_INFORMATIONAL = 20,
435 LOG_AAC_WARNING = 30,
436 LOG_AAC_LOW_ERROR = 40,
437 LOG_AAC_MEDIUM_ERROR = 50,
438 LOG_AAC_HIGH_ERROR = 60,
439 LOG_AAC_PANIC = 70,
440 LOG_AAC_DEBUG = 80,
441 LOG_AAC_WINDBG_PRINT = 90
442 };
443
444 #define FSAFS_NTC_GET_ADAPTER_FIB_CONTEXT 0x030b
445 #define FSAFS_NTC_FIB_CONTEXT 0x030c
446
447 struct aac_dev;
448 struct fib;
449 struct scsi_cmnd;
450
451 struct adapter_ops
452 {
453 /* Low level operations */
454 void (*adapter_interrupt)(struct aac_dev *dev);
455 void (*adapter_notify)(struct aac_dev *dev, u32 event);
456 void (*adapter_disable_int)(struct aac_dev *dev);
457 void (*adapter_enable_int)(struct aac_dev *dev);
458 int (*adapter_sync_cmd)(struct aac_dev *dev, u32 command, u32 p1, u32 p2, u32 p3, u32 p4, u32 p5, u32 p6, u32 *status, u32 *r1, u32 *r2, u32 *r3, u32 *r4);
459 int (*adapter_check_health)(struct aac_dev *dev);
460 int (*adapter_restart)(struct aac_dev *dev, int bled);
461 /* Transport operations */
462 int (*adapter_ioremap)(struct aac_dev * dev, u32 size);
463 irq_handler_t adapter_intr;
464 /* Packet operations */
465 int (*adapter_deliver)(struct fib * fib);
466 int (*adapter_bounds)(struct aac_dev * dev, struct scsi_cmnd * cmd, u64 lba);
467 int (*adapter_read)(struct fib * fib, struct scsi_cmnd * cmd, u64 lba, u32 count);
468 int (*adapter_write)(struct fib * fib, struct scsi_cmnd * cmd, u64 lba, u32 count, int fua);
469 int (*adapter_scsi)(struct fib * fib, struct scsi_cmnd * cmd);
470 /* Administrative operations */
471 int (*adapter_comm)(struct aac_dev * dev, int comm);
472 };
473
474 /*
475 * Define which interrupt handler needs to be installed
476 */
477
478 struct aac_driver_ident
479 {
480 int (*init)(struct aac_dev *dev);
481 char * name;
482 char * vname;
483 char * model;
484 u16 channels;
485 int quirks;
486 };
487 /*
488 * Some adapter firmware needs communication memory
489 * below 2gig. This tells the init function to set the
490 * dma mask such that fib memory will be allocated where the
491 * adapter firmware can get to it.
492 */
493 #define AAC_QUIRK_31BIT 0x0001
494
495 /*
496 * Some adapter firmware, when the raid card's cache is turned off, can not
497 * split up scatter gathers in order to deal with the limits of the
498 * underlying CHIM. This limit is 34 scatter gather elements.
499 */
500 #define AAC_QUIRK_34SG 0x0002
501
502 /*
503 * This adapter is a slave (no Firmware)
504 */
505 #define AAC_QUIRK_SLAVE 0x0004
506
507 /*
508 * This adapter is a master.
509 */
510 #define AAC_QUIRK_MASTER 0x0008
511
512 /*
513 * Some adapter firmware perform poorly when it must split up scatter gathers
514 * in order to deal with the limits of the underlying CHIM. This limit in this
515 * class of adapters is 17 scatter gather elements.
516 */
517 #define AAC_QUIRK_17SG 0x0010
518
519 /*
520 * Some adapter firmware does not support 64 bit scsi passthrough
521 * commands.
522 */
523 #define AAC_QUIRK_SCSI_32 0x0020
524
525 /*
526 * The adapter interface specs all queues to be located in the same
527 * physically contigous block. The host structure that defines the
528 * commuication queues will assume they are each a separate physically
529 * contigous memory region that will support them all being one big
530 * contigous block.
531 * There is a command and response queue for each level and direction of
532 * commuication. These regions are accessed by both the host and adapter.
533 */
534
535 struct aac_queue {
536 u64 logical; /*address we give the adapter */
537 struct aac_entry *base; /*system virtual address */
538 struct aac_qhdr headers; /*producer,consumer q headers*/
539 u32 entries; /*Number of queue entries */
540 wait_queue_head_t qfull; /*Event to wait on if q full */
541 wait_queue_head_t cmdready; /*Cmd ready from the adapter */
542 /* This is only valid for adapter to host command queues. */
543 spinlock_t *lock; /* Spinlock for this queue must take this lock before accessing the lock */
544 spinlock_t lockdata; /* Actual lock (used only on one side of the lock) */
545 struct list_head cmdq; /* A queue of FIBs which need to be prcessed by the FS thread. This is */
546 /* only valid for command queues which receive entries from the adapter. */
547 u32 numpending; /* Number of entries on outstanding queue. */
548 struct aac_dev * dev; /* Back pointer to adapter structure */
549 };
550
551 /*
552 * Message queues. The order here is important, see also the
553 * queue type ordering
554 */
555
556 struct aac_queue_block
557 {
558 struct aac_queue queue[8];
559 };
560
561 /*
562 * SaP1 Message Unit Registers
563 */
564
565 struct sa_drawbridge_CSR {
566 /* Offset | Name */
567 __le32 reserved[10]; /* 00h-27h | Reserved */
568 u8 LUT_Offset; /* 28h | Lookup Table Offset */
569 u8 reserved1[3]; /* 29h-2bh | Reserved */
570 __le32 LUT_Data; /* 2ch | Looup Table Data */
571 __le32 reserved2[26]; /* 30h-97h | Reserved */
572 __le16 PRICLEARIRQ; /* 98h | Primary Clear Irq */
573 __le16 SECCLEARIRQ; /* 9ah | Secondary Clear Irq */
574 __le16 PRISETIRQ; /* 9ch | Primary Set Irq */
575 __le16 SECSETIRQ; /* 9eh | Secondary Set Irq */
576 __le16 PRICLEARIRQMASK;/* a0h | Primary Clear Irq Mask */
577 __le16 SECCLEARIRQMASK;/* a2h | Secondary Clear Irq Mask */
578 __le16 PRISETIRQMASK; /* a4h | Primary Set Irq Mask */
579 __le16 SECSETIRQMASK; /* a6h | Secondary Set Irq Mask */
580 __le32 MAILBOX0; /* a8h | Scratchpad 0 */
581 __le32 MAILBOX1; /* ach | Scratchpad 1 */
582 __le32 MAILBOX2; /* b0h | Scratchpad 2 */
583 __le32 MAILBOX3; /* b4h | Scratchpad 3 */
584 __le32 MAILBOX4; /* b8h | Scratchpad 4 */
585 __le32 MAILBOX5; /* bch | Scratchpad 5 */
586 __le32 MAILBOX6; /* c0h | Scratchpad 6 */
587 __le32 MAILBOX7; /* c4h | Scratchpad 7 */
588 __le32 ROM_Setup_Data; /* c8h | Rom Setup and Data */
589 __le32 ROM_Control_Addr;/* cch | Rom Control and Address */
590 __le32 reserved3[12]; /* d0h-ffh | reserved */
591 __le32 LUT[64]; /* 100h-1ffh | Lookup Table Entries */
592 };
593
594 #define Mailbox0 SaDbCSR.MAILBOX0
595 #define Mailbox1 SaDbCSR.MAILBOX1
596 #define Mailbox2 SaDbCSR.MAILBOX2
597 #define Mailbox3 SaDbCSR.MAILBOX3
598 #define Mailbox4 SaDbCSR.MAILBOX4
599 #define Mailbox5 SaDbCSR.MAILBOX5
600 #define Mailbox6 SaDbCSR.MAILBOX6
601 #define Mailbox7 SaDbCSR.MAILBOX7
602
603 #define DoorbellReg_p SaDbCSR.PRISETIRQ
604 #define DoorbellReg_s SaDbCSR.SECSETIRQ
605 #define DoorbellClrReg_p SaDbCSR.PRICLEARIRQ
606
607
608 #define DOORBELL_0 0x0001
609 #define DOORBELL_1 0x0002
610 #define DOORBELL_2 0x0004
611 #define DOORBELL_3 0x0008
612 #define DOORBELL_4 0x0010
613 #define DOORBELL_5 0x0020
614 #define DOORBELL_6 0x0040
615
616
617 #define PrintfReady DOORBELL_5
618 #define PrintfDone DOORBELL_5
619
620 struct sa_registers {
621 struct sa_drawbridge_CSR SaDbCSR; /* 98h - c4h */
622 };
623
624
625 #define Sa_MINIPORT_REVISION 1
626
627 #define sa_readw(AEP, CSR) readl(&((AEP)->regs.sa->CSR))
628 #define sa_readl(AEP, CSR) readl(&((AEP)->regs.sa->CSR))
629 #define sa_writew(AEP, CSR, value) writew(value, &((AEP)->regs.sa->CSR))
630 #define sa_writel(AEP, CSR, value) writel(value, &((AEP)->regs.sa->CSR))
631
632 /*
633 * Rx Message Unit Registers
634 */
635
636 struct rx_mu_registers {
637 /* Local | PCI*| Name */
638 __le32 ARSR; /* 1300h | 00h | APIC Register Select Register */
639 __le32 reserved0; /* 1304h | 04h | Reserved */
640 __le32 AWR; /* 1308h | 08h | APIC Window Register */
641 __le32 reserved1; /* 130Ch | 0Ch | Reserved */
642 __le32 IMRx[2]; /* 1310h | 10h | Inbound Message Registers */
643 __le32 OMRx[2]; /* 1318h | 18h | Outbound Message Registers */
644 __le32 IDR; /* 1320h | 20h | Inbound Doorbell Register */
645 __le32 IISR; /* 1324h | 24h | Inbound Interrupt
646 Status Register */
647 __le32 IIMR; /* 1328h | 28h | Inbound Interrupt
648 Mask Register */
649 __le32 ODR; /* 132Ch | 2Ch | Outbound Doorbell Register */
650 __le32 OISR; /* 1330h | 30h | Outbound Interrupt
651 Status Register */
652 __le32 OIMR; /* 1334h | 34h | Outbound Interrupt
653 Mask Register */
654 __le32 reserved2; /* 1338h | 38h | Reserved */
655 __le32 reserved3; /* 133Ch | 3Ch | Reserved */
656 __le32 InboundQueue;/* 1340h | 40h | Inbound Queue Port relative to firmware */
657 __le32 OutboundQueue;/*1344h | 44h | Outbound Queue Port relative to firmware */
658 /* * Must access through ATU Inbound
659 Translation Window */
660 };
661
662 struct rx_inbound {
663 __le32 Mailbox[8];
664 };
665
666 #define INBOUNDDOORBELL_0 0x00000001
667 #define INBOUNDDOORBELL_1 0x00000002
668 #define INBOUNDDOORBELL_2 0x00000004
669 #define INBOUNDDOORBELL_3 0x00000008
670 #define INBOUNDDOORBELL_4 0x00000010
671 #define INBOUNDDOORBELL_5 0x00000020
672 #define INBOUNDDOORBELL_6 0x00000040
673
674 #define OUTBOUNDDOORBELL_0 0x00000001
675 #define OUTBOUNDDOORBELL_1 0x00000002
676 #define OUTBOUNDDOORBELL_2 0x00000004
677 #define OUTBOUNDDOORBELL_3 0x00000008
678 #define OUTBOUNDDOORBELL_4 0x00000010
679
680 #define InboundDoorbellReg MUnit.IDR
681 #define OutboundDoorbellReg MUnit.ODR
682
683 struct rx_registers {
684 struct rx_mu_registers MUnit; /* 1300h - 1344h */
685 __le32 reserved1[2]; /* 1348h - 134ch */
686 struct rx_inbound IndexRegs;
687 };
688
689 #define rx_readb(AEP, CSR) readb(&((AEP)->regs.rx->CSR))
690 #define rx_readl(AEP, CSR) readl(&((AEP)->regs.rx->CSR))
691 #define rx_writeb(AEP, CSR, value) writeb(value, &((AEP)->regs.rx->CSR))
692 #define rx_writel(AEP, CSR, value) writel(value, &((AEP)->regs.rx->CSR))
693
694 /*
695 * Rkt Message Unit Registers (same as Rx, except a larger reserve region)
696 */
697
698 #define rkt_mu_registers rx_mu_registers
699 #define rkt_inbound rx_inbound
700
701 struct rkt_registers {
702 struct rkt_mu_registers MUnit; /* 1300h - 1344h */
703 __le32 reserved1[1006]; /* 1348h - 22fch */
704 struct rkt_inbound IndexRegs; /* 2300h - */
705 };
706
707 #define rkt_readb(AEP, CSR) readb(&((AEP)->regs.rkt->CSR))
708 #define rkt_readl(AEP, CSR) readl(&((AEP)->regs.rkt->CSR))
709 #define rkt_writeb(AEP, CSR, value) writeb(value, &((AEP)->regs.rkt->CSR))
710 #define rkt_writel(AEP, CSR, value) writel(value, &((AEP)->regs.rkt->CSR))
711
712 typedef void (*fib_callback)(void *ctxt, struct fib *fibctx);
713
714 struct aac_fib_context {
715 s16 type; // used for verification of structure
716 s16 size;
717 u32 unique; // unique value representing this context
718 ulong jiffies; // used for cleanup - dmb changed to ulong
719 struct list_head next; // used to link context's into a linked list
720 struct semaphore wait_sem; // this is used to wait for the next fib to arrive.
721 int wait; // Set to true when thread is in WaitForSingleObject
722 unsigned long count; // total number of FIBs on FibList
723 struct list_head fib_list; // this holds fibs and their attachd hw_fibs
724 };
725
726 struct sense_data {
727 u8 error_code; /* 70h (current errors), 71h(deferred errors) */
728 u8 valid:1; /* A valid bit of one indicates that the information */
729 /* field contains valid information as defined in the
730 * SCSI-2 Standard.
731 */
732 u8 segment_number; /* Only used for COPY, COMPARE, or COPY AND VERIFY Commands */
733 u8 sense_key:4; /* Sense Key */
734 u8 reserved:1;
735 u8 ILI:1; /* Incorrect Length Indicator */
736 u8 EOM:1; /* End Of Medium - reserved for random access devices */
737 u8 filemark:1; /* Filemark - reserved for random access devices */
738
739 u8 information[4]; /* for direct-access devices, contains the unsigned
740 * logical block address or residue associated with
741 * the sense key
742 */
743 u8 add_sense_len; /* number of additional sense bytes to follow this field */
744 u8 cmnd_info[4]; /* not used */
745 u8 ASC; /* Additional Sense Code */
746 u8 ASCQ; /* Additional Sense Code Qualifier */
747 u8 FRUC; /* Field Replaceable Unit Code - not used */
748 u8 bit_ptr:3; /* indicates which byte of the CDB or parameter data
749 * was in error
750 */
751 u8 BPV:1; /* bit pointer valid (BPV): 1- indicates that
752 * the bit_ptr field has valid value
753 */
754 u8 reserved2:2;
755 u8 CD:1; /* command data bit: 1- illegal parameter in CDB.
756 * 0- illegal parameter in data.
757 */
758 u8 SKSV:1;
759 u8 field_ptr[2]; /* byte of the CDB or parameter data in error */
760 };
761
762 struct fsa_dev_info {
763 u64 last;
764 u64 size;
765 u32 type;
766 u32 config_waiting_on;
767 unsigned long config_waiting_stamp;
768 u16 queue_depth;
769 u8 config_needed;
770 u8 valid;
771 u8 ro;
772 u8 locked;
773 u8 deleted;
774 char devname[8];
775 struct sense_data sense_data;
776 };
777
778 struct fib {
779 void *next; /* this is used by the allocator */
780 s16 type;
781 s16 size;
782 /*
783 * The Adapter that this I/O is destined for.
784 */
785 struct aac_dev *dev;
786 /*
787 * This is the event the sendfib routine will wait on if the
788 * caller did not pass one and this is synch io.
789 */
790 struct semaphore event_wait;
791 spinlock_t event_lock;
792
793 u32 done; /* gets set to 1 when fib is complete */
794 fib_callback callback;
795 void *callback_data;
796 u32 flags; // u32 dmb was ulong
797 /*
798 * And for the internal issue/reply queues (we may be able
799 * to merge these two)
800 */
801 struct list_head fiblink;
802 void *data;
803 struct hw_fib *hw_fib_va; /* Actual shared object */
804 dma_addr_t hw_fib_pa; /* physical address of hw_fib*/
805 };
806
807 /*
808 * Adapter Information Block
809 *
810 * This is returned by the RequestAdapterInfo block
811 */
812
813 struct aac_adapter_info
814 {
815 __le32 platform;
816 __le32 cpu;
817 __le32 subcpu;
818 __le32 clock;
819 __le32 execmem;
820 __le32 buffermem;
821 __le32 totalmem;
822 __le32 kernelrev;
823 __le32 kernelbuild;
824 __le32 monitorrev;
825 __le32 monitorbuild;
826 __le32 hwrev;
827 __le32 hwbuild;
828 __le32 biosrev;
829 __le32 biosbuild;
830 __le32 cluster;
831 __le32 clusterchannelmask;
832 __le32 serial[2];
833 __le32 battery;
834 __le32 options;
835 __le32 OEM;
836 };
837
838 struct aac_supplement_adapter_info
839 {
840 u8 AdapterTypeText[17+1];
841 u8 Pad[2];
842 __le32 FlashMemoryByteSize;
843 __le32 FlashImageId;
844 __le32 MaxNumberPorts;
845 __le32 Version;
846 __le32 FeatureBits;
847 u8 SlotNumber;
848 u8 ReservedPad0[3];
849 u8 BuildDate[12];
850 __le32 CurrentNumberPorts;
851 struct {
852 u8 AssemblyPn[8];
853 u8 FruPn[8];
854 u8 BatteryFruPn[8];
855 u8 EcVersionString[8];
856 u8 Tsid[12];
857 } VpdInfo;
858 __le32 FlashFirmwareRevision;
859 __le32 FlashFirmwareBuild;
860 __le32 RaidTypeMorphOptions;
861 __le32 FlashFirmwareBootRevision;
862 __le32 FlashFirmwareBootBuild;
863 u8 MfgPcbaSerialNo[12];
864 u8 MfgWWNName[8];
865 __le32 SupportedOptions2;
866 __le32 ReservedGrowth[1];
867 };
868 #define AAC_FEATURE_FALCON cpu_to_le32(0x00000010)
869 #define AAC_FEATURE_JBOD cpu_to_le32(0x08000000)
870 #define AAC_OPTION_MU_RESET cpu_to_le32(0x00000001)
871 #define AAC_OPTION_IGNORE_RESET cpu_to_le32(0x00000002)
872 #define AAC_SIS_VERSION_V3 3
873 #define AAC_SIS_SLOT_UNKNOWN 0xFF
874
875 #define GetBusInfo 0x00000009
876 struct aac_bus_info {
877 __le32 Command; /* VM_Ioctl */
878 __le32 ObjType; /* FT_DRIVE */
879 __le32 MethodId; /* 1 = SCSI Layer */
880 __le32 ObjectId; /* Handle */
881 __le32 CtlCmd; /* GetBusInfo */
882 };
883
884 struct aac_bus_info_response {
885 __le32 Status; /* ST_OK */
886 __le32 ObjType;
887 __le32 MethodId; /* unused */
888 __le32 ObjectId; /* unused */
889 __le32 CtlCmd; /* unused */
890 __le32 ProbeComplete;
891 __le32 BusCount;
892 __le32 TargetsPerBus;
893 u8 InitiatorBusId[10];
894 u8 BusValid[10];
895 };
896
897 /*
898 * Battery platforms
899 */
900 #define AAC_BAT_REQ_PRESENT (1)
901 #define AAC_BAT_REQ_NOTPRESENT (2)
902 #define AAC_BAT_OPT_PRESENT (3)
903 #define AAC_BAT_OPT_NOTPRESENT (4)
904 #define AAC_BAT_NOT_SUPPORTED (5)
905 /*
906 * cpu types
907 */
908 #define AAC_CPU_SIMULATOR (1)
909 #define AAC_CPU_I960 (2)
910 #define AAC_CPU_STRONGARM (3)
911
912 /*
913 * Supported Options
914 */
915 #define AAC_OPT_SNAPSHOT cpu_to_le32(1)
916 #define AAC_OPT_CLUSTERS cpu_to_le32(1<<1)
917 #define AAC_OPT_WRITE_CACHE cpu_to_le32(1<<2)
918 #define AAC_OPT_64BIT_DATA cpu_to_le32(1<<3)
919 #define AAC_OPT_HOST_TIME_FIB cpu_to_le32(1<<4)
920 #define AAC_OPT_RAID50 cpu_to_le32(1<<5)
921 #define AAC_OPT_4GB_WINDOW cpu_to_le32(1<<6)
922 #define AAC_OPT_SCSI_UPGRADEABLE cpu_to_le32(1<<7)
923 #define AAC_OPT_SOFT_ERR_REPORT cpu_to_le32(1<<8)
924 #define AAC_OPT_SUPPORTED_RECONDITION cpu_to_le32(1<<9)
925 #define AAC_OPT_SGMAP_HOST64 cpu_to_le32(1<<10)
926 #define AAC_OPT_ALARM cpu_to_le32(1<<11)
927 #define AAC_OPT_NONDASD cpu_to_le32(1<<12)
928 #define AAC_OPT_SCSI_MANAGED cpu_to_le32(1<<13)
929 #define AAC_OPT_RAID_SCSI_MODE cpu_to_le32(1<<14)
930 #define AAC_OPT_SUPPLEMENT_ADAPTER_INFO cpu_to_le32(1<<16)
931 #define AAC_OPT_NEW_COMM cpu_to_le32(1<<17)
932 #define AAC_OPT_NEW_COMM_64 cpu_to_le32(1<<18)
933
934 struct aac_dev
935 {
936 struct list_head entry;
937 const char *name;
938 int id;
939
940 /*
941 * negotiated FIB settings
942 */
943 unsigned max_fib_size;
944 unsigned sg_tablesize;
945
946 /*
947 * Map for 128 fib objects (64k)
948 */
949 dma_addr_t hw_fib_pa;
950 struct hw_fib *hw_fib_va;
951 struct hw_fib *aif_base_va;
952 /*
953 * Fib Headers
954 */
955 struct fib *fibs;
956
957 struct fib *free_fib;
958 spinlock_t fib_lock;
959
960 struct aac_queue_block *queues;
961 /*
962 * The user API will use an IOCTL to register itself to receive
963 * FIBs from the adapter. The following list is used to keep
964 * track of all the threads that have requested these FIBs. The
965 * mutex is used to synchronize access to all data associated
966 * with the adapter fibs.
967 */
968 struct list_head fib_list;
969
970 struct adapter_ops a_ops;
971 unsigned long fsrev; /* Main driver's revision number */
972
973 unsigned base_size; /* Size of mapped in region */
974 struct aac_init *init; /* Holds initialization info to communicate with adapter */
975 dma_addr_t init_pa; /* Holds physical address of the init struct */
976
977 struct pci_dev *pdev; /* Our PCI interface */
978 void * printfbuf; /* pointer to buffer used for printf's from the adapter */
979 void * comm_addr; /* Base address of Comm area */
980 dma_addr_t comm_phys; /* Physical Address of Comm area */
981 size_t comm_size;
982
983 struct Scsi_Host *scsi_host_ptr;
984 int maximum_num_containers;
985 int maximum_num_physicals;
986 int maximum_num_channels;
987 struct fsa_dev_info *fsa_dev;
988 struct task_struct *thread;
989 int cardtype;
990
991 /*
992 * The following is the device specific extension.
993 */
994 #ifndef AAC_MIN_FOOTPRINT_SIZE
995 # define AAC_MIN_FOOTPRINT_SIZE 8192
996 #endif
997 union
998 {
999 struct sa_registers __iomem *sa;
1000 struct rx_registers __iomem *rx;
1001 struct rkt_registers __iomem *rkt;
1002 } regs;
1003 volatile void __iomem *base;
1004 volatile struct rx_inbound __iomem *IndexRegs;
1005 u32 OIMR; /* Mask Register Cache */
1006 /*
1007 * AIF thread states
1008 */
1009 u32 aif_thread;
1010 struct aac_adapter_info adapter_info;
1011 struct aac_supplement_adapter_info supplement_adapter_info;
1012 /* These are in adapter info but they are in the io flow so
1013 * lets break them out so we don't have to do an AND to check them
1014 */
1015 u8 nondasd_support;
1016 u8 jbod;
1017 u8 cache_protected;
1018 u8 dac_support;
1019 u8 raid_scsi_mode;
1020 u8 comm_interface;
1021 # define AAC_COMM_PRODUCER 0
1022 # define AAC_COMM_MESSAGE 1
1023 /* macro side-effects BEWARE */
1024 # define raw_io_interface \
1025 init->InitStructRevision==cpu_to_le32(ADAPTER_INIT_STRUCT_REVISION_4)
1026 u8 raw_io_64;
1027 u8 printf_enabled;
1028 u8 in_reset;
1029 u8 msi;
1030 };
1031
1032 #define aac_adapter_interrupt(dev) \
1033 (dev)->a_ops.adapter_interrupt(dev)
1034
1035 #define aac_adapter_notify(dev, event) \
1036 (dev)->a_ops.adapter_notify(dev, event)
1037
1038 #define aac_adapter_disable_int(dev) \
1039 (dev)->a_ops.adapter_disable_int(dev)
1040
1041 #define aac_adapter_enable_int(dev) \
1042 (dev)->a_ops.adapter_enable_int(dev)
1043
1044 #define aac_adapter_sync_cmd(dev, command, p1, p2, p3, p4, p5, p6, status, r1, r2, r3, r4) \
1045 (dev)->a_ops.adapter_sync_cmd(dev, command, p1, p2, p3, p4, p5, p6, status, r1, r2, r3, r4)
1046
1047 #define aac_adapter_check_health(dev) \
1048 (dev)->a_ops.adapter_check_health(dev)
1049
1050 #define aac_adapter_restart(dev,bled) \
1051 (dev)->a_ops.adapter_restart(dev,bled)
1052
1053 #define aac_adapter_ioremap(dev, size) \
1054 (dev)->a_ops.adapter_ioremap(dev, size)
1055
1056 #define aac_adapter_deliver(fib) \
1057 ((fib)->dev)->a_ops.adapter_deliver(fib)
1058
1059 #define aac_adapter_bounds(dev,cmd,lba) \
1060 dev->a_ops.adapter_bounds(dev,cmd,lba)
1061
1062 #define aac_adapter_read(fib,cmd,lba,count) \
1063 ((fib)->dev)->a_ops.adapter_read(fib,cmd,lba,count)
1064
1065 #define aac_adapter_write(fib,cmd,lba,count,fua) \
1066 ((fib)->dev)->a_ops.adapter_write(fib,cmd,lba,count,fua)
1067
1068 #define aac_adapter_scsi(fib,cmd) \
1069 ((fib)->dev)->a_ops.adapter_scsi(fib,cmd)
1070
1071 #define aac_adapter_comm(dev,comm) \
1072 (dev)->a_ops.adapter_comm(dev, comm)
1073
1074 #define FIB_CONTEXT_FLAG_TIMED_OUT (0x00000001)
1075 #define FIB_CONTEXT_FLAG (0x00000002)
1076
1077 /*
1078 * Define the command values
1079 */
1080
1081 #define Null 0
1082 #define GetAttributes 1
1083 #define SetAttributes 2
1084 #define Lookup 3
1085 #define ReadLink 4
1086 #define Read 5
1087 #define Write 6
1088 #define Create 7
1089 #define MakeDirectory 8
1090 #define SymbolicLink 9
1091 #define MakeNode 10
1092 #define Removex 11
1093 #define RemoveDirectoryx 12
1094 #define Rename 13
1095 #define Link 14
1096 #define ReadDirectory 15
1097 #define ReadDirectoryPlus 16
1098 #define FileSystemStatus 17
1099 #define FileSystemInfo 18
1100 #define PathConfigure 19
1101 #define Commit 20
1102 #define Mount 21
1103 #define UnMount 22
1104 #define Newfs 23
1105 #define FsCheck 24
1106 #define FsSync 25
1107 #define SimReadWrite 26
1108 #define SetFileSystemStatus 27
1109 #define BlockRead 28
1110 #define BlockWrite 29
1111 #define NvramIoctl 30
1112 #define FsSyncWait 31
1113 #define ClearArchiveBit 32
1114 #define SetAcl 33
1115 #define GetAcl 34
1116 #define AssignAcl 35
1117 #define FaultInsertion 36 /* Fault Insertion Command */
1118 #define CrazyCache 37 /* Crazycache */
1119
1120 #define MAX_FSACOMMAND_NUM 38
1121
1122
1123 /*
1124 * Define the status returns. These are very unixlike although
1125 * most are not in fact used
1126 */
1127
1128 #define ST_OK 0
1129 #define ST_PERM 1
1130 #define ST_NOENT 2
1131 #define ST_IO 5
1132 #define ST_NXIO 6
1133 #define ST_E2BIG 7
1134 #define ST_ACCES 13
1135 #define ST_EXIST 17
1136 #define ST_XDEV 18
1137 #define ST_NODEV 19
1138 #define ST_NOTDIR 20
1139 #define ST_ISDIR 21
1140 #define ST_INVAL 22
1141 #define ST_FBIG 27
1142 #define ST_NOSPC 28
1143 #define ST_ROFS 30
1144 #define ST_MLINK 31
1145 #define ST_WOULDBLOCK 35
1146 #define ST_NAMETOOLONG 63
1147 #define ST_NOTEMPTY 66
1148 #define ST_DQUOT 69
1149 #define ST_STALE 70
1150 #define ST_REMOTE 71
1151 #define ST_BADHANDLE 10001
1152 #define ST_NOT_SYNC 10002
1153 #define ST_BAD_COOKIE 10003
1154 #define ST_NOTSUPP 10004
1155 #define ST_TOOSMALL 10005
1156 #define ST_SERVERFAULT 10006
1157 #define ST_BADTYPE 10007
1158 #define ST_JUKEBOX 10008
1159 #define ST_NOTMOUNTED 10009
1160 #define ST_MAINTMODE 10010
1161 #define ST_STALEACL 10011
1162
1163 /*
1164 * On writes how does the client want the data written.
1165 */
1166
1167 #define CACHE_CSTABLE 1
1168 #define CACHE_UNSTABLE 2
1169
1170 /*
1171 * Lets the client know at which level the data was commited on
1172 * a write request
1173 */
1174
1175 #define CMFILE_SYNCH_NVRAM 1
1176 #define CMDATA_SYNCH_NVRAM 2
1177 #define CMFILE_SYNCH 3
1178 #define CMDATA_SYNCH 4
1179 #define CMUNSTABLE 5
1180
1181 struct aac_read
1182 {
1183 __le32 command;
1184 __le32 cid;
1185 __le32 block;
1186 __le32 count;
1187 struct sgmap sg; // Must be last in struct because it is variable
1188 };
1189
1190 struct aac_read64
1191 {
1192 __le32 command;
1193 __le16 cid;
1194 __le16 sector_count;
1195 __le32 block;
1196 __le16 pad;
1197 __le16 flags;
1198 struct sgmap64 sg; // Must be last in struct because it is variable
1199 };
1200
1201 struct aac_read_reply
1202 {
1203 __le32 status;
1204 __le32 count;
1205 };
1206
1207 struct aac_write
1208 {
1209 __le32 command;
1210 __le32 cid;
1211 __le32 block;
1212 __le32 count;
1213 __le32 stable; // Not used
1214 struct sgmap sg; // Must be last in struct because it is variable
1215 };
1216
1217 struct aac_write64
1218 {
1219 __le32 command;
1220 __le16 cid;
1221 __le16 sector_count;
1222 __le32 block;
1223 __le16 pad;
1224 __le16 flags;
1225 #define IO_TYPE_WRITE 0x00000000
1226 #define IO_TYPE_READ 0x00000001
1227 #define IO_SUREWRITE 0x00000008
1228 struct sgmap64 sg; // Must be last in struct because it is variable
1229 };
1230 struct aac_write_reply
1231 {
1232 __le32 status;
1233 __le32 count;
1234 __le32 committed;
1235 };
1236
1237 struct aac_raw_io
1238 {
1239 __le32 block[2];
1240 __le32 count;
1241 __le16 cid;
1242 __le16 flags; /* 00 W, 01 R */
1243 __le16 bpTotal; /* reserved for F/W use */
1244 __le16 bpComplete; /* reserved for F/W use */
1245 struct sgmapraw sg;
1246 };
1247
1248 #define CT_FLUSH_CACHE 129
1249 struct aac_synchronize {
1250 __le32 command; /* VM_ContainerConfig */
1251 __le32 type; /* CT_FLUSH_CACHE */
1252 __le32 cid;
1253 __le32 parm1;
1254 __le32 parm2;
1255 __le32 parm3;
1256 __le32 parm4;
1257 __le32 count; /* sizeof(((struct aac_synchronize_reply *)NULL)->data) */
1258 };
1259
1260 struct aac_synchronize_reply {
1261 __le32 dummy0;
1262 __le32 dummy1;
1263 __le32 status; /* CT_OK */
1264 __le32 parm1;
1265 __le32 parm2;
1266 __le32 parm3;
1267 __le32 parm4;
1268 __le32 parm5;
1269 u8 data[16];
1270 };
1271
1272 #define CT_PAUSE_IO 65
1273 #define CT_RELEASE_IO 66
1274 struct aac_pause {
1275 __le32 command; /* VM_ContainerConfig */
1276 __le32 type; /* CT_PAUSE_IO */
1277 __le32 timeout; /* 10ms ticks */
1278 __le32 min;
1279 __le32 noRescan;
1280 __le32 parm3;
1281 __le32 parm4;
1282 __le32 count; /* sizeof(((struct aac_pause_reply *)NULL)->data) */
1283 };
1284
1285 struct aac_srb
1286 {
1287 __le32 function;
1288 __le32 channel;
1289 __le32 id;
1290 __le32 lun;
1291 __le32 timeout;
1292 __le32 flags;
1293 __le32 count; // Data xfer size
1294 __le32 retry_limit;
1295 __le32 cdb_size;
1296 u8 cdb[16];
1297 struct sgmap sg;
1298 };
1299
1300 /*
1301 * This and associated data structs are used by the
1302 * ioctl caller and are in cpu order.
1303 */
1304 struct user_aac_srb
1305 {
1306 u32 function;
1307 u32 channel;
1308 u32 id;
1309 u32 lun;
1310 u32 timeout;
1311 u32 flags;
1312 u32 count; // Data xfer size
1313 u32 retry_limit;
1314 u32 cdb_size;
1315 u8 cdb[16];
1316 struct user_sgmap sg;
1317 };
1318
1319 #define AAC_SENSE_BUFFERSIZE 30
1320
1321 struct aac_srb_reply
1322 {
1323 __le32 status;
1324 __le32 srb_status;
1325 __le32 scsi_status;
1326 __le32 data_xfer_length;
1327 __le32 sense_data_size;
1328 u8 sense_data[AAC_SENSE_BUFFERSIZE]; // Can this be SCSI_SENSE_BUFFERSIZE
1329 };
1330 /*
1331 * SRB Flags
1332 */
1333 #define SRB_NoDataXfer 0x0000
1334 #define SRB_DisableDisconnect 0x0004
1335 #define SRB_DisableSynchTransfer 0x0008
1336 #define SRB_BypassFrozenQueue 0x0010
1337 #define SRB_DisableAutosense 0x0020
1338 #define SRB_DataIn 0x0040
1339 #define SRB_DataOut 0x0080
1340
1341 /*
1342 * SRB Functions - set in aac_srb->function
1343 */
1344 #define SRBF_ExecuteScsi 0x0000
1345 #define SRBF_ClaimDevice 0x0001
1346 #define SRBF_IO_Control 0x0002
1347 #define SRBF_ReceiveEvent 0x0003
1348 #define SRBF_ReleaseQueue 0x0004
1349 #define SRBF_AttachDevice 0x0005
1350 #define SRBF_ReleaseDevice 0x0006
1351 #define SRBF_Shutdown 0x0007
1352 #define SRBF_Flush 0x0008
1353 #define SRBF_AbortCommand 0x0010
1354 #define SRBF_ReleaseRecovery 0x0011
1355 #define SRBF_ResetBus 0x0012
1356 #define SRBF_ResetDevice 0x0013
1357 #define SRBF_TerminateIO 0x0014
1358 #define SRBF_FlushQueue 0x0015
1359 #define SRBF_RemoveDevice 0x0016
1360 #define SRBF_DomainValidation 0x0017
1361
1362 /*
1363 * SRB SCSI Status - set in aac_srb->scsi_status
1364 */
1365 #define SRB_STATUS_PENDING 0x00
1366 #define SRB_STATUS_SUCCESS 0x01
1367 #define SRB_STATUS_ABORTED 0x02
1368 #define SRB_STATUS_ABORT_FAILED 0x03
1369 #define SRB_STATUS_ERROR 0x04
1370 #define SRB_STATUS_BUSY 0x05
1371 #define SRB_STATUS_INVALID_REQUEST 0x06
1372 #define SRB_STATUS_INVALID_PATH_ID 0x07
1373 #define SRB_STATUS_NO_DEVICE 0x08
1374 #define SRB_STATUS_TIMEOUT 0x09
1375 #define SRB_STATUS_SELECTION_TIMEOUT 0x0A
1376 #define SRB_STATUS_COMMAND_TIMEOUT 0x0B
1377 #define SRB_STATUS_MESSAGE_REJECTED 0x0D
1378 #define SRB_STATUS_BUS_RESET 0x0E
1379 #define SRB_STATUS_PARITY_ERROR 0x0F
1380 #define SRB_STATUS_REQUEST_SENSE_FAILED 0x10
1381 #define SRB_STATUS_NO_HBA 0x11
1382 #define SRB_STATUS_DATA_OVERRUN 0x12
1383 #define SRB_STATUS_UNEXPECTED_BUS_FREE 0x13
1384 #define SRB_STATUS_PHASE_SEQUENCE_FAILURE 0x14
1385 #define SRB_STATUS_BAD_SRB_BLOCK_LENGTH 0x15
1386 #define SRB_STATUS_REQUEST_FLUSHED 0x16
1387 #define SRB_STATUS_DELAYED_RETRY 0x17
1388 #define SRB_STATUS_INVALID_LUN 0x20
1389 #define SRB_STATUS_INVALID_TARGET_ID 0x21
1390 #define SRB_STATUS_BAD_FUNCTION 0x22
1391 #define SRB_STATUS_ERROR_RECOVERY 0x23
1392 #define SRB_STATUS_NOT_STARTED 0x24
1393 #define SRB_STATUS_NOT_IN_USE 0x30
1394 #define SRB_STATUS_FORCE_ABORT 0x31
1395 #define SRB_STATUS_DOMAIN_VALIDATION_FAIL 0x32
1396
1397 /*
1398 * Object-Server / Volume-Manager Dispatch Classes
1399 */
1400
1401 #define VM_Null 0
1402 #define VM_NameServe 1
1403 #define VM_ContainerConfig 2
1404 #define VM_Ioctl 3
1405 #define VM_FilesystemIoctl 4
1406 #define VM_CloseAll 5
1407 #define VM_CtBlockRead 6
1408 #define VM_CtBlockWrite 7
1409 #define VM_SliceBlockRead 8 /* raw access to configured "storage objects" */
1410 #define VM_SliceBlockWrite 9
1411 #define VM_DriveBlockRead 10 /* raw access to physical devices */
1412 #define VM_DriveBlockWrite 11
1413 #define VM_EnclosureMgt 12 /* enclosure management */
1414 #define VM_Unused 13 /* used to be diskset management */
1415 #define VM_CtBlockVerify 14
1416 #define VM_CtPerf 15 /* performance test */
1417 #define VM_CtBlockRead64 16
1418 #define VM_CtBlockWrite64 17
1419 #define VM_CtBlockVerify64 18
1420 #define VM_CtHostRead64 19
1421 #define VM_CtHostWrite64 20
1422 #define VM_DrvErrTblLog 21
1423 #define VM_NameServe64 22
1424
1425 #define MAX_VMCOMMAND_NUM 23 /* used for sizing stats array - leave last */
1426
1427 /*
1428 * Descriptive information (eg, vital stats)
1429 * that a content manager might report. The
1430 * FileArray filesystem component is one example
1431 * of a content manager. Raw mode might be
1432 * another.
1433 */
1434
1435 struct aac_fsinfo {
1436 __le32 fsTotalSize; /* Consumed by fs, incl. metadata */
1437 __le32 fsBlockSize;
1438 __le32 fsFragSize;
1439 __le32 fsMaxExtendSize;
1440 __le32 fsSpaceUnits;
1441 __le32 fsMaxNumFiles;
1442 __le32 fsNumFreeFiles;
1443 __le32 fsInodeDensity;
1444 }; /* valid iff ObjType == FT_FILESYS && !(ContentState & FSCS_NOTCLEAN) */
1445
1446 union aac_contentinfo {
1447 struct aac_fsinfo filesys; /* valid iff ObjType == FT_FILESYS && !(ContentState & FSCS_NOTCLEAN) */
1448 };
1449
1450 /*
1451 * Query for Container Configuration Status
1452 */
1453
1454 #define CT_GET_CONFIG_STATUS 147
1455 struct aac_get_config_status {
1456 __le32 command; /* VM_ContainerConfig */
1457 __le32 type; /* CT_GET_CONFIG_STATUS */
1458 __le32 parm1;
1459 __le32 parm2;
1460 __le32 parm3;
1461 __le32 parm4;
1462 __le32 parm5;
1463 __le32 count; /* sizeof(((struct aac_get_config_status_resp *)NULL)->data) */
1464 };
1465
1466 #define CFACT_CONTINUE 0
1467 #define CFACT_PAUSE 1
1468 #define CFACT_ABORT 2
1469 struct aac_get_config_status_resp {
1470 __le32 response; /* ST_OK */
1471 __le32 dummy0;
1472 __le32 status; /* CT_OK */
1473 __le32 parm1;
1474 __le32 parm2;
1475 __le32 parm3;
1476 __le32 parm4;
1477 __le32 parm5;
1478 struct {
1479 __le32 action; /* CFACT_CONTINUE, CFACT_PAUSE or CFACT_ABORT */
1480 __le16 flags;
1481 __le16 count;
1482 } data;
1483 };
1484
1485 /*
1486 * Accept the configuration as-is
1487 */
1488
1489 #define CT_COMMIT_CONFIG 152
1490
1491 struct aac_commit_config {
1492 __le32 command; /* VM_ContainerConfig */
1493 __le32 type; /* CT_COMMIT_CONFIG */
1494 };
1495
1496 /*
1497 * Query for Container Configuration Status
1498 */
1499
1500 #define CT_GET_CONTAINER_COUNT 4
1501 struct aac_get_container_count {
1502 __le32 command; /* VM_ContainerConfig */
1503 __le32 type; /* CT_GET_CONTAINER_COUNT */
1504 };
1505
1506 struct aac_get_container_count_resp {
1507 __le32 response; /* ST_OK */
1508 __le32 dummy0;
1509 __le32 MaxContainers;
1510 __le32 ContainerSwitchEntries;
1511 __le32 MaxPartitions;
1512 };
1513
1514
1515 /*
1516 * Query for "mountable" objects, ie, objects that are typically
1517 * associated with a drive letter on the client (host) side.
1518 */
1519
1520 struct aac_mntent {
1521 __le32 oid;
1522 u8 name[16]; /* if applicable */
1523 struct creation_info create_info; /* if applicable */
1524 __le32 capacity;
1525 __le32 vol; /* substrate structure */
1526 __le32 obj; /* FT_FILESYS, etc. */
1527 __le32 state; /* unready for mounting,
1528 readonly, etc. */
1529 union aac_contentinfo fileinfo; /* Info specific to content
1530 manager (eg, filesystem) */
1531 __le32 altoid; /* != oid <==> snapshot or
1532 broken mirror exists */
1533 __le32 capacityhigh;
1534 };
1535
1536 #define FSCS_NOTCLEAN 0x0001 /* fsck is necessary before mounting */
1537 #define FSCS_READONLY 0x0002 /* possible result of broken mirror */
1538 #define FSCS_HIDDEN 0x0004 /* should be ignored - set during a clear */
1539
1540 struct aac_query_mount {
1541 __le32 command;
1542 __le32 type;
1543 __le32 count;
1544 };
1545
1546 struct aac_mount {
1547 __le32 status;
1548 __le32 type; /* should be same as that requested */
1549 __le32 count;
1550 struct aac_mntent mnt[1];
1551 };
1552
1553 #define CT_READ_NAME 130
1554 struct aac_get_name {
1555 __le32 command; /* VM_ContainerConfig */
1556 __le32 type; /* CT_READ_NAME */
1557 __le32 cid;
1558 __le32 parm1;
1559 __le32 parm2;
1560 __le32 parm3;
1561 __le32 parm4;
1562 __le32 count; /* sizeof(((struct aac_get_name_resp *)NULL)->data) */
1563 };
1564
1565 struct aac_get_name_resp {
1566 __le32 dummy0;
1567 __le32 dummy1;
1568 __le32 status; /* CT_OK */
1569 __le32 parm1;
1570 __le32 parm2;
1571 __le32 parm3;
1572 __le32 parm4;
1573 __le32 parm5;
1574 u8 data[16];
1575 };
1576
1577 #define CT_CID_TO_32BITS_UID 165
1578 struct aac_get_serial {
1579 __le32 command; /* VM_ContainerConfig */
1580 __le32 type; /* CT_CID_TO_32BITS_UID */
1581 __le32 cid;
1582 };
1583
1584 struct aac_get_serial_resp {
1585 __le32 dummy0;
1586 __le32 dummy1;
1587 __le32 status; /* CT_OK */
1588 __le32 uid;
1589 };
1590
1591 /*
1592 * The following command is sent to shut down each container.
1593 */
1594
1595 struct aac_close {
1596 __le32 command;
1597 __le32 cid;
1598 };
1599
1600 struct aac_query_disk
1601 {
1602 s32 cnum;
1603 s32 bus;
1604 s32 id;
1605 s32 lun;
1606 u32 valid;
1607 u32 locked;
1608 u32 deleted;
1609 s32 instance;
1610 s8 name[10];
1611 u32 unmapped;
1612 };
1613
1614 struct aac_delete_disk {
1615 u32 disknum;
1616 u32 cnum;
1617 };
1618
1619 struct fib_ioctl
1620 {
1621 u32 fibctx;
1622 s32 wait;
1623 char __user *fib;
1624 };
1625
1626 struct revision
1627 {
1628 u32 compat;
1629 __le32 version;
1630 __le32 build;
1631 };
1632
1633
1634 /*
1635 * Ugly - non Linux like ioctl coding for back compat.
1636 */
1637
1638 #define CTL_CODE(function, method) ( \
1639 (4<< 16) | ((function) << 2) | (method) \
1640 )
1641
1642 /*
1643 * Define the method codes for how buffers are passed for I/O and FS
1644 * controls
1645 */
1646
1647 #define METHOD_BUFFERED 0
1648 #define METHOD_NEITHER 3
1649
1650 /*
1651 * Filesystem ioctls
1652 */
1653
1654 #define FSACTL_SENDFIB CTL_CODE(2050, METHOD_BUFFERED)
1655 #define FSACTL_SEND_RAW_SRB CTL_CODE(2067, METHOD_BUFFERED)
1656 #define FSACTL_DELETE_DISK 0x163
1657 #define FSACTL_QUERY_DISK 0x173
1658 #define FSACTL_OPEN_GET_ADAPTER_FIB CTL_CODE(2100, METHOD_BUFFERED)
1659 #define FSACTL_GET_NEXT_ADAPTER_FIB CTL_CODE(2101, METHOD_BUFFERED)
1660 #define FSACTL_CLOSE_GET_ADAPTER_FIB CTL_CODE(2102, METHOD_BUFFERED)
1661 #define FSACTL_MINIPORT_REV_CHECK CTL_CODE(2107, METHOD_BUFFERED)
1662 #define FSACTL_GET_PCI_INFO CTL_CODE(2119, METHOD_BUFFERED)
1663 #define FSACTL_FORCE_DELETE_DISK CTL_CODE(2120, METHOD_NEITHER)
1664 #define FSACTL_GET_CONTAINERS 2131
1665 #define FSACTL_SEND_LARGE_FIB CTL_CODE(2138, METHOD_BUFFERED)
1666
1667
1668 struct aac_common
1669 {
1670 /*
1671 * If this value is set to 1 then interrupt moderation will occur
1672 * in the base commuication support.
1673 */
1674 u32 irq_mod;
1675 u32 peak_fibs;
1676 u32 zero_fibs;
1677 u32 fib_timeouts;
1678 /*
1679 * Statistical counters in debug mode
1680 */
1681 #ifdef DBG
1682 u32 FibsSent;
1683 u32 FibRecved;
1684 u32 NoResponseSent;
1685 u32 NoResponseRecved;
1686 u32 AsyncSent;
1687 u32 AsyncRecved;
1688 u32 NormalSent;
1689 u32 NormalRecved;
1690 #endif
1691 };
1692
1693 extern struct aac_common aac_config;
1694
1695
1696 /*
1697 * The following macro is used when sending and receiving FIBs. It is
1698 * only used for debugging.
1699 */
1700
1701 #ifdef DBG
1702 #define FIB_COUNTER_INCREMENT(counter) (counter)++
1703 #else
1704 #define FIB_COUNTER_INCREMENT(counter)
1705 #endif
1706
1707 /*
1708 * Adapter direct commands
1709 * Monitor/Kernel API
1710 */
1711
1712 #define BREAKPOINT_REQUEST 0x00000004
1713 #define INIT_STRUCT_BASE_ADDRESS 0x00000005
1714 #define READ_PERMANENT_PARAMETERS 0x0000000a
1715 #define WRITE_PERMANENT_PARAMETERS 0x0000000b
1716 #define HOST_CRASHING 0x0000000d
1717 #define SEND_SYNCHRONOUS_FIB 0x0000000c
1718 #define COMMAND_POST_RESULTS 0x00000014
1719 #define GET_ADAPTER_PROPERTIES 0x00000019
1720 #define GET_DRIVER_BUFFER_PROPERTIES 0x00000023
1721 #define RCV_TEMP_READINGS 0x00000025
1722 #define GET_COMM_PREFERRED_SETTINGS 0x00000026
1723 #define IOP_RESET 0x00001000
1724 #define IOP_RESET_ALWAYS 0x00001001
1725 #define RE_INIT_ADAPTER 0x000000ee
1726
1727 /*
1728 * Adapter Status Register
1729 *
1730 * Phase Staus mailbox is 32bits:
1731 * <31:16> = Phase Status
1732 * <15:0> = Phase
1733 *
1734 * The adapter reports is present state through the phase. Only
1735 * a single phase should be ever be set. Each phase can have multiple
1736 * phase status bits to provide more detailed information about the
1737 * state of the board. Care should be taken to ensure that any phase
1738 * status bits that are set when changing the phase are also valid
1739 * for the new phase or be cleared out. Adapter software (monitor,
1740 * iflash, kernel) is responsible for properly maintining the phase
1741 * status mailbox when it is running.
1742 *
1743 * MONKER_API Phases
1744 *
1745 * Phases are bit oriented. It is NOT valid to have multiple bits set
1746 */
1747
1748 #define SELF_TEST_FAILED 0x00000004
1749 #define MONITOR_PANIC 0x00000020
1750 #define KERNEL_UP_AND_RUNNING 0x00000080
1751 #define KERNEL_PANIC 0x00000100
1752
1753 /*
1754 * Doorbell bit defines
1755 */
1756
1757 #define DoorBellSyncCmdAvailable (1<<0) /* Host -> Adapter */
1758 #define DoorBellPrintfDone (1<<5) /* Host -> Adapter */
1759 #define DoorBellAdapterNormCmdReady (1<<1) /* Adapter -> Host */
1760 #define DoorBellAdapterNormRespReady (1<<2) /* Adapter -> Host */
1761 #define DoorBellAdapterNormCmdNotFull (1<<3) /* Adapter -> Host */
1762 #define DoorBellAdapterNormRespNotFull (1<<4) /* Adapter -> Host */
1763 #define DoorBellPrintfReady (1<<5) /* Adapter -> Host */
1764
1765 /*
1766 * For FIB communication, we need all of the following things
1767 * to send back to the user.
1768 */
1769
1770 #define AifCmdEventNotify 1 /* Notify of event */
1771 #define AifEnConfigChange 3 /* Adapter configuration change */
1772 #define AifEnContainerChange 4 /* Container configuration change */
1773 #define AifEnDeviceFailure 5 /* SCSI device failed */
1774 #define AifEnEnclosureManagement 13 /* EM_DRIVE_* */
1775 #define EM_DRIVE_INSERTION 31
1776 #define EM_DRIVE_REMOVAL 32
1777 #define AifEnBatteryEvent 14 /* Change in Battery State */
1778 #define AifEnAddContainer 15 /* A new array was created */
1779 #define AifEnDeleteContainer 16 /* A container was deleted */
1780 #define AifEnExpEvent 23 /* Firmware Event Log */
1781 #define AifExeFirmwarePanic 3 /* Firmware Event Panic */
1782 #define AifHighPriority 3 /* Highest Priority Event */
1783 #define AifEnAddJBOD 30 /* JBOD created */
1784 #define AifEnDeleteJBOD 31 /* JBOD deleted */
1785
1786 #define AifCmdJobProgress 2 /* Progress report */
1787 #define AifJobCtrZero 101 /* Array Zero progress */
1788 #define AifJobStsSuccess 1 /* Job completes */
1789 #define AifJobStsRunning 102 /* Job running */
1790 #define AifCmdAPIReport 3 /* Report from other user of API */
1791 #define AifCmdDriverNotify 4 /* Notify host driver of event */
1792 #define AifDenMorphComplete 200 /* A morph operation completed */
1793 #define AifDenVolumeExtendComplete 201 /* A volume extend completed */
1794 #define AifReqJobList 100 /* Gets back complete job list */
1795 #define AifReqJobsForCtr 101 /* Gets back jobs for specific container */
1796 #define AifReqJobsForScsi 102 /* Gets back jobs for specific SCSI device */
1797 #define AifReqJobReport 103 /* Gets back a specific job report or list of them */
1798 #define AifReqTerminateJob 104 /* Terminates job */
1799 #define AifReqSuspendJob 105 /* Suspends a job */
1800 #define AifReqResumeJob 106 /* Resumes a job */
1801 #define AifReqSendAPIReport 107 /* API generic report requests */
1802 #define AifReqAPIJobStart 108 /* Start a job from the API */
1803 #define AifReqAPIJobUpdate 109 /* Update a job report from the API */
1804 #define AifReqAPIJobFinish 110 /* Finish a job from the API */
1805
1806 /*
1807 * Adapter Initiated FIB command structures. Start with the adapter
1808 * initiated FIBs that really come from the adapter, and get responded
1809 * to by the host.
1810 */
1811
1812 struct aac_aifcmd {
1813 __le32 command; /* Tell host what type of notify this is */
1814 __le32 seqnum; /* To allow ordering of reports (if necessary) */
1815 u8 data[1]; /* Undefined length (from kernel viewpoint) */
1816 };
1817
1818 /**
1819 * Convert capacity to cylinders
1820 * accounting for the fact capacity could be a 64 bit value
1821 *
1822 */
1823 static inline unsigned int cap_to_cyls(sector_t capacity, unsigned divisor)
1824 {
1825 sector_div(capacity, divisor);
1826 return capacity;
1827 }
1828
1829 /* SCp.phase values */
1830 #define AAC_OWNER_MIDLEVEL 0x101
1831 #define AAC_OWNER_LOWLEVEL 0x102
1832 #define AAC_OWNER_ERROR_HANDLER 0x103
1833 #define AAC_OWNER_FIRMWARE 0x106
1834
1835 const char *aac_driverinfo(struct Scsi_Host *);
1836 struct fib *aac_fib_alloc(struct aac_dev *dev);
1837 int aac_fib_setup(struct aac_dev *dev);
1838 void aac_fib_map_free(struct aac_dev *dev);
1839 void aac_fib_free(struct fib * context);
1840 void aac_fib_init(struct fib * context);
1841 void aac_printf(struct aac_dev *dev, u32 val);
1842 int aac_fib_send(u16 command, struct fib * context, unsigned long size, int priority, int wait, int reply, fib_callback callback, void *ctxt);
1843 int aac_consumer_get(struct aac_dev * dev, struct aac_queue * q, struct aac_entry **entry);
1844 void aac_consumer_free(struct aac_dev * dev, struct aac_queue * q, u32 qnum);
1845 int aac_fib_complete(struct fib * context);
1846 #define fib_data(fibctx) ((void *)(fibctx)->hw_fib_va->data)
1847 struct aac_dev *aac_init_adapter(struct aac_dev *dev);
1848 int aac_get_config_status(struct aac_dev *dev, int commit_flag);
1849 int aac_get_containers(struct aac_dev *dev);
1850 int aac_scsi_cmd(struct scsi_cmnd *cmd);
1851 int aac_dev_ioctl(struct aac_dev *dev, int cmd, void __user *arg);
1852 #ifndef shost_to_class
1853 #define shost_to_class(shost) &shost->shost_classdev
1854 #endif
1855 ssize_t aac_show_serial_number(struct class_device *class_dev, char *buf);
1856 int aac_do_ioctl(struct aac_dev * dev, int cmd, void __user *arg);
1857 int aac_rx_init(struct aac_dev *dev);
1858 int aac_rkt_init(struct aac_dev *dev);
1859 int aac_nark_init(struct aac_dev *dev);
1860 int aac_sa_init(struct aac_dev *dev);
1861 int aac_queue_get(struct aac_dev * dev, u32 * index, u32 qid, struct hw_fib * hw_fib, int wait, struct fib * fibptr, unsigned long *nonotify);
1862 unsigned int aac_response_normal(struct aac_queue * q);
1863 unsigned int aac_command_normal(struct aac_queue * q);
1864 unsigned int aac_intr_normal(struct aac_dev * dev, u32 Index);
1865 int aac_reset_adapter(struct aac_dev * dev, int forced);
1866 int aac_check_health(struct aac_dev * dev);
1867 int aac_command_thread(void *data);
1868 int aac_close_fib_context(struct aac_dev * dev, struct aac_fib_context *fibctx);
1869 int aac_fib_adapter_complete(struct fib * fibptr, unsigned short size);
1870 struct aac_driver_ident* aac_get_driver_ident(int devtype);
1871 int aac_get_adapter_info(struct aac_dev* dev);
1872 int aac_send_shutdown(struct aac_dev *dev);
1873 int aac_probe_container(struct aac_dev *dev, int cid);
1874 int _aac_rx_init(struct aac_dev *dev);
1875 int aac_rx_select_comm(struct aac_dev *dev, int comm);
1876 int aac_rx_deliver_producer(struct fib * fib);
1877 char * get_container_type(unsigned type);
1878 extern int numacb;
1879 extern int acbsize;
1880 extern char aac_driver_version[];
1881 extern int startup_timeout;
1882 extern int aif_timeout;
1883 extern int expose_physicals;
1884 extern int aac_reset_devices;
1885 extern int aac_msi;
1886 extern int aac_commit;
1887 extern int update_interval;
1888 extern int check_interval;
1889 extern int aac_check_reset;
WRT350N Kernel Patches