2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
6 * Copyright (C) 2006 Silicon Graphics, Inc. All Rights Reserved.
9 #include <linux/types.h>
10 #include <linux/irq.h>
11 #include <linux/pci.h>
12 #include <linux/cpumask.h>
13 #include <linux/msi.h>
15 #include <asm/sn/addrs.h>
16 #include <asm/sn/intr.h>
17 #include <asm/sn/pcibus_provider_defs.h>
18 #include <asm/sn/pcidev.h>
19 #include <asm/sn/nodepda.h>
23 struct sn_irq_info
*sn_irq_info
;
26 static struct sn_msi_info sn_msi_info
[NR_IRQS
];
28 static struct irq_chip sn_msi_chip
;
30 void sn_teardown_msi_irq(unsigned int irq
)
35 struct pcidev_info
*sn_pdev
;
36 struct sn_irq_info
*sn_irq_info
;
37 struct pcibus_bussoft
*bussoft
;
38 struct sn_pcibus_provider
*provider
;
40 sn_irq_info
= sn_msi_info
[irq
].sn_irq_info
;
41 if (sn_irq_info
== NULL
|| sn_irq_info
->irq_int_bit
>= 0)
44 sn_pdev
= (struct pcidev_info
*)sn_irq_info
->irq_pciioinfo
;
45 pdev
= sn_pdev
->pdi_linux_pcidev
;
46 provider
= SN_PCIDEV_BUSPROVIDER(pdev
);
48 (*provider
->dma_unmap
)(pdev
,
49 sn_msi_info
[irq
].pci_addr
,
51 sn_msi_info
[irq
].pci_addr
= 0;
53 bussoft
= SN_PCIDEV_BUSSOFT(pdev
);
54 nasid
= NASID_GET(bussoft
->bs_base
);
55 widget
= (nasid
& 1) ?
56 TIO_SWIN_WIDGETNUM(bussoft
->bs_base
) :
57 SWIN_WIDGETNUM(bussoft
->bs_base
);
59 sn_intr_free(nasid
, widget
, sn_irq_info
);
60 sn_msi_info
[irq
].sn_irq_info
= NULL
;
65 int sn_setup_msi_irq(struct pci_dev
*pdev
, struct msi_desc
*entry
)
72 struct sn_irq_info
*sn_irq_info
;
73 struct pcibus_bussoft
*bussoft
= SN_PCIDEV_BUSSOFT(pdev
);
74 struct sn_pcibus_provider
*provider
= SN_PCIDEV_BUSPROVIDER(pdev
);
77 if (!entry
->msi_attrib
.is_64
)
83 if (provider
== NULL
|| provider
->dma_map_consistent
== NULL
)
91 * Set up the vector plumbing. Let the prom (via sn_intr_alloc)
92 * decide which cpu to direct this msi at by default.
95 nasid
= NASID_GET(bussoft
->bs_base
);
96 widget
= (nasid
& 1) ?
97 TIO_SWIN_WIDGETNUM(bussoft
->bs_base
) :
98 SWIN_WIDGETNUM(bussoft
->bs_base
);
100 sn_irq_info
= kzalloc(sizeof(struct sn_irq_info
), GFP_KERNEL
);
106 status
= sn_intr_alloc(nasid
, widget
, sn_irq_info
, irq
, -1, -1);
113 sn_irq_info
->irq_int_bit
= -1; /* mark this as an MSI irq */
114 sn_irq_fixup(pdev
, sn_irq_info
);
116 /* Prom probably should fill these in, but doesn't ... */
117 sn_irq_info
->irq_bridge_type
= bussoft
->bs_asic_type
;
118 sn_irq_info
->irq_bridge
= (void *)bussoft
->bs_base
;
121 * Map the xio address into bus space
123 bus_addr
= (*provider
->dma_map_consistent
)(pdev
,
124 sn_irq_info
->irq_xtalkaddr
,
125 sizeof(sn_irq_info
->irq_xtalkaddr
),
126 SN_DMA_MSI
|SN_DMA_ADDR_XIO
);
128 sn_intr_free(nasid
, widget
, sn_irq_info
);
134 sn_msi_info
[irq
].sn_irq_info
= sn_irq_info
;
135 sn_msi_info
[irq
].pci_addr
= bus_addr
;
137 msg
.address_hi
= (u32
)(bus_addr
>> 32);
138 msg
.address_lo
= (u32
)(bus_addr
& 0x00000000ffffffff);
141 * In the SN platform, bit 16 is a "send vector" bit which
142 * must be present in order to move the vector through the system.
144 msg
.data
= 0x100 + irq
;
146 set_irq_msi(irq
, entry
);
147 write_msi_msg(irq
, &msg
);
148 set_irq_chip_and_handler(irq
, &sn_msi_chip
, handle_edge_irq
);
154 static void sn_set_msi_irq_affinity(unsigned int irq
, cpumask_t cpu_mask
)
160 struct pci_dev
*pdev
;
161 struct pcidev_info
*sn_pdev
;
162 struct sn_irq_info
*sn_irq_info
;
163 struct sn_irq_info
*new_irq_info
;
164 struct sn_pcibus_provider
*provider
;
167 cpu
= first_cpu(cpu_mask
);
168 sn_irq_info
= sn_msi_info
[irq
].sn_irq_info
;
169 if (sn_irq_info
== NULL
|| sn_irq_info
->irq_int_bit
>= 0)
173 * Release XIO resources for the old MSI PCI address
176 read_msi_msg(irq
, &msg
);
177 sn_pdev
= (struct pcidev_info
*)sn_irq_info
->irq_pciioinfo
;
178 pdev
= sn_pdev
->pdi_linux_pcidev
;
179 provider
= SN_PCIDEV_BUSPROVIDER(pdev
);
181 bus_addr
= (u64
)(msg
.address_hi
) << 32 | (u64
)(msg
.address_lo
);
182 (*provider
->dma_unmap
)(pdev
, bus_addr
, PCI_DMA_FROMDEVICE
);
183 sn_msi_info
[irq
].pci_addr
= 0;
185 nasid
= cpuid_to_nasid(cpu
);
186 slice
= cpuid_to_slice(cpu
);
188 new_irq_info
= sn_retarget_vector(sn_irq_info
, nasid
, slice
);
189 sn_msi_info
[irq
].sn_irq_info
= new_irq_info
;
190 if (new_irq_info
== NULL
)
194 * Map the xio address into bus space
197 bus_addr
= (*provider
->dma_map_consistent
)(pdev
,
198 new_irq_info
->irq_xtalkaddr
,
199 sizeof(new_irq_info
->irq_xtalkaddr
),
200 SN_DMA_MSI
|SN_DMA_ADDR_XIO
);
202 sn_msi_info
[irq
].pci_addr
= bus_addr
;
203 msg
.address_hi
= (u32
)(bus_addr
>> 32);
204 msg
.address_lo
= (u32
)(bus_addr
& 0x00000000ffffffff);
206 write_msi_msg(irq
, &msg
);
207 irq_desc
[irq
].affinity
= cpu_mask
;
209 #endif /* CONFIG_SMP */
211 static void sn_ack_msi_irq(unsigned int irq
)
213 move_native_irq(irq
);
217 static int sn_msi_retrigger_irq(unsigned int irq
)
219 unsigned int vector
= irq
;
220 ia64_resend_irq(vector
);
225 static struct irq_chip sn_msi_chip
= {
227 .mask
= mask_msi_irq
,
228 .unmask
= unmask_msi_irq
,
229 .ack
= sn_ack_msi_irq
,
231 .set_affinity
= sn_set_msi_irq_affinity
,
233 .retrigger
= sn_msi_retrigger_irq
,