[PATCH] ocfs2: zero_user_page conversion
[wrt350n-kernel.git] / arch / mips / sibyte / bcm1480 / time.c
blob6f3f71bf4244f0c5679c4099660e3b30c90aa27d
1 /*
2 * Copyright (C) 2000,2001,2004 Broadcom Corporation
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version 2
7 * of the License, or (at your option) any later version.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
20 * These are routines to set up and handle interrupts from the
21 * bcm1480 general purpose timer 0. We're using the timer as a
22 * system clock, so we set it up to run at 100 Hz. On every
23 * interrupt, we update our idea of what the time of day is,
24 * then call do_timer() in the architecture-independent kernel
25 * code to do general bookkeeping (e.g. update jiffies, run
26 * bottom halves, etc.)
28 #include <linux/interrupt.h>
29 #include <linux/sched.h>
30 #include <linux/spinlock.h>
31 #include <linux/kernel_stat.h>
33 #include <asm/irq.h>
34 #include <asm/addrspace.h>
35 #include <asm/time.h>
36 #include <asm/io.h>
38 #include <asm/sibyte/bcm1480_regs.h>
39 #include <asm/sibyte/sb1250_regs.h>
40 #include <asm/sibyte/bcm1480_int.h>
41 #include <asm/sibyte/bcm1480_scd.h>
43 #include <asm/sibyte/sb1250.h>
46 #define IMR_IP2_VAL K_BCM1480_INT_MAP_I0
47 #define IMR_IP3_VAL K_BCM1480_INT_MAP_I1
48 #define IMR_IP4_VAL K_BCM1480_INT_MAP_I2
50 #ifdef CONFIG_SIMULATION
51 #define BCM1480_HPT_VALUE 50000
52 #else
53 #define BCM1480_HPT_VALUE 1000000
54 #endif
56 extern int bcm1480_steal_irq(int irq);
58 void bcm1480_time_init(void)
60 int cpu = smp_processor_id();
61 int irq = K_BCM1480_INT_TIMER_0+cpu;
63 /* Only have 4 general purpose timers */
64 if (cpu > 3) {
65 BUG();
68 bcm1480_mask_irq(cpu, irq);
70 /* Map the timer interrupt to ip[4] of this cpu */
71 __raw_writeq(IMR_IP4_VAL, IOADDR(A_BCM1480_IMR_REGISTER(cpu, R_BCM1480_IMR_INTERRUPT_MAP_BASE_H)
72 + (irq<<3)));
74 /* the general purpose timer ticks at 1 Mhz independent of the rest of the system */
75 /* Disable the timer and set up the count */
76 __raw_writeq(0, IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG)));
77 __raw_writeq(
78 BCM1480_HPT_VALUE/HZ
79 , IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_INIT)));
81 /* Set the timer running */
82 __raw_writeq(M_SCD_TIMER_ENABLE|M_SCD_TIMER_MODE_CONTINUOUS,
83 IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG)));
85 bcm1480_unmask_irq(cpu, irq);
86 bcm1480_steal_irq(irq);
88 * This interrupt is "special" in that it doesn't use the request_irq
89 * way to hook the irq line. The timer interrupt is initialized early
90 * enough to make this a major pain, and it's also firing enough to
91 * warrant a bit of special case code. bcm1480_timer_interrupt is
92 * called directly from irq_handler.S when IP[4] is set during an
93 * interrupt
97 void bcm1480_timer_interrupt(void)
99 int cpu = smp_processor_id();
100 int irq = K_BCM1480_INT_TIMER_0 + cpu;
102 /* Reset the timer */
103 __raw_writeq(M_SCD_TIMER_ENABLE|M_SCD_TIMER_MODE_CONTINUOUS,
104 IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG)));
106 if (cpu == 0) {
108 * CPU 0 handles the global timer interrupt job
110 ll_timer_interrupt(irq);
112 else {
114 * other CPUs should just do profiling and process accounting
116 ll_local_timer_interrupt(irq);
120 static cycle_t bcm1480_hpt_read(void)
122 /* We assume this function is called xtime_lock held. */
123 unsigned long count =
124 __raw_readq(IOADDR(A_SCD_TIMER_REGISTER(0, R_SCD_TIMER_CNT)));
125 return (jiffies + 1) * (BCM1480_HPT_VALUE / HZ) - count;
128 void __init bcm1480_hpt_setup(void)
130 clocksource_mips.read = bcm1480_hpt_read;
131 mips_hpt_frequency = BCM1480_HPT_VALUE;