x86: cpa self-test, WARN_ON()
[wrt350n-kernel.git] / arch / mips / lib / dump_tlb.c
blob465ff0ec85b9316d151cca44786a92f0b41c85d7
1 /*
2 * Dump R4x00 TLB for debugging purposes.
4 * Copyright (C) 1994, 1995 by Waldorf Electronics, written by Ralf Baechle.
5 * Copyright (C) 1999 by Silicon Graphics, Inc.
6 */
7 #include <linux/kernel.h>
8 #include <linux/mm.h>
10 #include <asm/mipsregs.h>
11 #include <asm/page.h>
12 #include <asm/pgtable.h>
13 #include <asm/tlbdebug.h>
15 static inline const char *msk2str(unsigned int mask)
17 switch (mask) {
18 case PM_4K: return "4kb";
19 case PM_16K: return "16kb";
20 case PM_64K: return "64kb";
21 case PM_256K: return "256kb";
22 #ifndef CONFIG_CPU_VR41XX
23 case PM_1M: return "1Mb";
24 case PM_4M: return "4Mb";
25 case PM_16M: return "16Mb";
26 case PM_64M: return "64Mb";
27 case PM_256M: return "256Mb";
28 #endif
30 return "";
33 #define BARRIER() \
34 __asm__ __volatile__( \
35 ".set\tnoreorder\n\t" \
36 "nop;nop;nop;nop;nop;nop;nop\n\t" \
37 ".set\treorder");
39 static void dump_tlb(int first, int last)
41 unsigned long s_entryhi, entryhi, asid;
42 unsigned long long entrylo0, entrylo1;
43 unsigned int s_index, pagemask, c0, c1, i;
45 s_entryhi = read_c0_entryhi();
46 s_index = read_c0_index();
47 asid = s_entryhi & 0xff;
49 for (i = first; i <= last; i++) {
50 write_c0_index(i);
51 BARRIER();
52 tlb_read();
53 BARRIER();
54 pagemask = read_c0_pagemask();
55 entryhi = read_c0_entryhi();
56 entrylo0 = read_c0_entrylo0();
57 entrylo1 = read_c0_entrylo1();
59 /* Unused entries have a virtual address of CKSEG0. */
60 if ((entryhi & ~0x1ffffUL) != CKSEG0
61 && (entryhi & 0xff) == asid) {
62 #ifdef CONFIG_32BIT
63 int width = 8;
64 #else
65 int width = 11;
66 #endif
68 * Only print entries in use
70 printk("Index: %2d pgmask=%s ", i, msk2str(pagemask));
72 c0 = (entrylo0 >> 3) & 7;
73 c1 = (entrylo1 >> 3) & 7;
75 printk("va=%0*lx asid=%02lx\n",
76 width, (entryhi & ~0x1fffUL),
77 entryhi & 0xff);
78 printk("\t[pa=%0*llx c=%d d=%d v=%d g=%d] ",
79 width,
80 (entrylo0 << 6) & PAGE_MASK, c0,
81 (entrylo0 & 4) ? 1 : 0,
82 (entrylo0 & 2) ? 1 : 0,
83 (entrylo0 & 1) ? 1 : 0);
84 printk("[pa=%0*llx c=%d d=%d v=%d g=%d]\n",
85 width,
86 (entrylo1 << 6) & PAGE_MASK, c1,
87 (entrylo1 & 4) ? 1 : 0,
88 (entrylo1 & 2) ? 1 : 0,
89 (entrylo1 & 1) ? 1 : 0);
92 printk("\n");
94 write_c0_entryhi(s_entryhi);
95 write_c0_index(s_index);
98 void dump_tlb_all(void)
100 dump_tlb(0, current_cpu_data.tlbsize - 1);