arch/powerpc/platforms/83xx/mpc832x_rdb.c

   1 /*
   2  * arch/powerpc/platforms/83xx/mpc832x_rdb.c
   3  *
   4  * Copyright (C) Freescale Semiconductor, Inc. 2007. All rights reserved.
   5  *
   6  * Description:
   7  * MPC832x RDB board specific routines.
   8  * This file is based on mpc832x_mds.c and mpc8313_rdb.c
   9  * Author: Michael Barkowski <michael.barkowski@freescale.com>
  10  *
  11  * This program is free software; you can redistribute  it and/or modify it
  12  * under  the terms of  the GNU General  Public License as published by the
  13  * Free Software Foundation;  either version 2 of the  License, or (at your
  14  * option) any later version.
  15  */
  16
  17 #include <linux/pci.h>
  18 #include <linux/interrupt.h>
  19 #include <linux/spi/spi.h>
  20 #include <linux/spi/mmc_spi.h>
  21 #include <linux/mmc/host.h>
  22
  23 #include <asm/of_platform.h>
  24 #include <asm/time.h>
  25 #include <asm/ipic.h>
  26 #include <asm/udbg.h>
  27 #include <asm/qe.h>
  28 #include <asm/qe_ic.h>
  29 #include <sysdev/fsl_soc.h>
  30
  31 #include "mpc83xx.h"
  32
  33 #undef DEBUG
  34 #ifdef DEBUG
  35 #define DBG(fmt...) udbg_printf(fmt)
  36 #else
  37 #define DBG(fmt...)
  38 #endif
  39
  40 static void mpc83xx_spi_activate_cs(u8 cs, u8 polarity)
  41 {
  42         pr_debug("%s %d %d\n", __func__, cs, polarity);
  43         par_io_data_set(3, 13, polarity);
  44 }
  45
  46 static void mpc83xx_spi_deactivate_cs(u8 cs, u8 polarity)
  47 {
  48         pr_debug("%s %d %d\n", __func__, cs, polarity);
  49         par_io_data_set(3, 13, !polarity);
  50 }
  51
  52 static struct mmc_spi_platform_data mpc832x_mmc_pdata = {
  53         .ocr_mask = MMC_VDD_33_34,
  54 };
  55
  56 static struct spi_board_info mpc832x_spi_boardinfo = {
  57         .bus_num = 0x4c0,
  58         .chip_select = 0,
  59         .max_speed_hz = 50000000,
  60         .modalias = "mmc_spi",
  61         .platform_data = &mpc832x_mmc_pdata,
  62 };
  63
  64 static int __init mpc832x_spi_init(void)
  65 {
  66         if (!machine_is(mpc832x_rdb))
  67                 return 0;
  68
  69         par_io_config_pin(3,  0, 3, 0, 1, 0); /* SPI1 MOSI, I/O */
  70         par_io_config_pin(3,  1, 3, 0, 1, 0); /* SPI1 MISO, I/O */
  71         par_io_config_pin(3,  2, 3, 0, 1, 0); /* SPI1 CLK,  I/O */
  72         par_io_config_pin(3,  3, 2, 0, 1, 0); /* SPI1 SEL,  I   */
  73
  74         par_io_config_pin(3, 13, 1, 0, 0, 0); /* !SD_CS,    O */
  75         par_io_config_pin(3, 14, 2, 0, 0, 0); /* SD_INSERT, I */
  76         par_io_config_pin(3, 15, 2, 0, 0, 0); /* SD_PROTECT,I */
  77
  78         return fsl_spi_init(&mpc832x_spi_boardinfo, 1,
  79                             mpc83xx_spi_activate_cs,
  80                             mpc83xx_spi_deactivate_cs);
  81 }
  82
  83 device_initcall(mpc832x_spi_init);
  84
  85 /* ************************************************************************
  86  *
  87  * Setup the architecture
  88  *
  89  */
  90 static void __init mpc832x_rdb_setup_arch(void)
  91 {
  92 #if defined(CONFIG_PCI) || defined(CONFIG_QUICC_ENGINE)
  93         struct device_node *np;
  94 #endif
  95
  96         if (ppc_md.progress)
  97                 ppc_md.progress("mpc832x_rdb_setup_arch()", 0);
  98
  99 #ifdef CONFIG_PCI
 100         for_each_compatible_node(np, "pci", "fsl,mpc8349-pci")
 101                 mpc83xx_add_bridge(np);
 102 #endif
 103
 104 #ifdef CONFIG_QUICC_ENGINE
 105         qe_reset();
 106
 107         if ((np = of_find_node_by_name(np, "par_io")) != NULL) {
 108                 par_io_init(np);
 109                 of_node_put(np);
 110
 111                 for (np = NULL; (np = of_find_node_by_name(np, "ucc")) != NULL;)
 112                         par_io_of_config(np);
 113         }
 114 #endif                          /* CONFIG_QUICC_ENGINE */
 115 }
 116
 117 static struct of_device_id mpc832x_ids[] = {
 118         { .type = "soc", },
 119         { .compatible = "soc", },
 120         { .type = "qe", },
 121         {},
 122 };
 123
 124 static int __init mpc832x_declare_of_platform_devices(void)
 125 {
 126         if (!machine_is(mpc832x_rdb))
 127                 return 0;
 128
 129         /* Publish the QE devices */
 130         of_platform_bus_probe(NULL, mpc832x_ids, NULL);
 131
 132         return 0;
 133 }
 134 device_initcall(mpc832x_declare_of_platform_devices);
 135
 136 void __init mpc832x_rdb_init_IRQ(void)
 137 {
 138
 139         struct device_node *np;
 140
 141         np = of_find_node_by_type(NULL, "ipic");
 142         if (!np)
 143                 return;
 144
 145         ipic_init(np, 0);
 146
 147         /* Initialize the default interrupt mapping priorities,
 148          * in case the boot rom changed something on us.
 149          */
 150         ipic_set_default_priority();
 151         of_node_put(np);
 152
 153 #ifdef CONFIG_QUICC_ENGINE
 154         np = of_find_node_by_type(NULL, "qeic");
 155         if (!np)
 156                 return;
 157
 158         qe_ic_init(np, 0, qe_ic_cascade_low_ipic, qe_ic_cascade_high_ipic);
 159         of_node_put(np);
 160 #endif                          /* CONFIG_QUICC_ENGINE */
 161 }
 162
 163 /*
 164  * Called very early, MMU is off, device-tree isn't unflattened
 165  */
 166 static int __init mpc832x_rdb_probe(void)
 167 {
 168         unsigned long root = of_get_flat_dt_root();
 169
 170         return of_flat_dt_is_compatible(root, "MPC832xRDB");
 171 }
 172
 173 define_machine(mpc832x_rdb) {
 174         .name           = "MPC832x RDB",
 175         .probe          = mpc832x_rdb_probe,
 176         .setup_arch     = mpc832x_rdb_setup_arch,
 177         .init_IRQ       = mpc832x_rdb_init_IRQ,
 178         .get_irq        = ipic_get_irq,
 179         .restart        = mpc83xx_restart,
 180         .time_init      = mpc83xx_time_init,
 181         .calibrate_decr = generic_calibrate_decr,
 182         .progress       = udbg_progress,
 183 };