x86: cpa self-test, WARN_ON()
[wrt350n-kernel.git] / arch / powerpc / platforms / pasemi / cpufreq.c
blob1cfb8b0c8fecd512f6b26564138a9df52b148c17
1 /*
2 * Copyright (C) 2007 PA Semi, Inc
4 * Authors: Egor Martovetsky <egor@pasemi.com>
5 * Olof Johansson <olof@lixom.net>
7 * Maintained by: Olof Johansson <olof@lixom.net>
9 * Based on arch/powerpc/platforms/cell/cbe_cpufreq.c:
10 * (C) Copyright IBM Deutschland Entwicklung GmbH 2005
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2, or (at your option)
15 * any later version.
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
28 #include <linux/cpufreq.h>
29 #include <linux/timer.h>
31 #include <asm/hw_irq.h>
32 #include <asm/io.h>
33 #include <asm/prom.h>
34 #include <asm/time.h>
36 #define SDCASR_REG 0x0100
37 #define SDCASR_REG_STRIDE 0x1000
38 #define SDCPWR_CFGA0_REG 0x0100
39 #define SDCPWR_PWST0_REG 0x0000
40 #define SDCPWR_GIZTIME_REG 0x0440
42 /* SDCPWR_GIZTIME_REG fields */
43 #define SDCPWR_GIZTIME_GR 0x80000000
44 #define SDCPWR_GIZTIME_LONGLOCK 0x000000ff
46 /* Offset of ASR registers from SDC base */
47 #define SDCASR_OFFSET 0x120000
49 static void __iomem *sdcpwr_mapbase;
50 static void __iomem *sdcasr_mapbase;
52 static DEFINE_MUTEX(pas_switch_mutex);
54 /* Current astate, is used when waking up from power savings on
55 * one core, in case the other core has switched states during
56 * the idle time.
58 static int current_astate;
60 /* We support 5(A0-A4) power states excluding turbo(A5-A6) modes */
61 static struct cpufreq_frequency_table pas_freqs[] = {
62 {0, 0},
63 {1, 0},
64 {2, 0},
65 {3, 0},
66 {4, 0},
67 {0, CPUFREQ_TABLE_END},
70 static struct freq_attr *pas_cpu_freqs_attr[] = {
71 &cpufreq_freq_attr_scaling_available_freqs,
72 NULL,
76 * hardware specific functions
79 static int get_astate_freq(int astate)
81 u32 ret;
82 ret = in_le32(sdcpwr_mapbase + SDCPWR_CFGA0_REG + (astate * 0x10));
84 return ret & 0x3f;
87 static int get_cur_astate(int cpu)
89 u32 ret;
91 ret = in_le32(sdcpwr_mapbase + SDCPWR_PWST0_REG);
92 ret = (ret >> (cpu * 4)) & 0x7;
94 return ret;
97 static int get_gizmo_latency(void)
99 u32 giztime, ret;
101 giztime = in_le32(sdcpwr_mapbase + SDCPWR_GIZTIME_REG);
103 /* just provide the upper bound */
104 if (giztime & SDCPWR_GIZTIME_GR)
105 ret = (giztime & SDCPWR_GIZTIME_LONGLOCK) * 128000;
106 else
107 ret = (giztime & SDCPWR_GIZTIME_LONGLOCK) * 1000;
109 return ret;
112 static void set_astate(int cpu, unsigned int astate)
114 u64 flags;
116 /* Return if called before init has run */
117 if (unlikely(!sdcasr_mapbase))
118 return;
120 local_irq_save(flags);
122 out_le32(sdcasr_mapbase + SDCASR_REG + SDCASR_REG_STRIDE*cpu, astate);
124 local_irq_restore(flags);
127 void restore_astate(int cpu)
129 set_astate(cpu, current_astate);
133 * cpufreq functions
136 static int pas_cpufreq_cpu_init(struct cpufreq_policy *policy)
138 const u32 *max_freqp;
139 u32 max_freq;
140 int i, cur_astate;
141 struct resource res;
142 struct device_node *cpu, *dn;
143 int err = -ENODEV;
145 cpu = of_get_cpu_node(policy->cpu, NULL);
147 if (!cpu)
148 goto out;
150 dn = of_find_compatible_node(NULL, "sdc", "1682m-sdc");
151 if (!dn)
152 goto out;
153 err = of_address_to_resource(dn, 0, &res);
154 of_node_put(dn);
155 if (err)
156 goto out;
157 sdcasr_mapbase = ioremap(res.start + SDCASR_OFFSET, 0x2000);
158 if (!sdcasr_mapbase) {
159 err = -EINVAL;
160 goto out;
163 dn = of_find_compatible_node(NULL, "gizmo", "1682m-gizmo");
164 if (!dn) {
165 err = -ENODEV;
166 goto out_unmap_sdcasr;
168 err = of_address_to_resource(dn, 0, &res);
169 of_node_put(dn);
170 if (err)
171 goto out_unmap_sdcasr;
172 sdcpwr_mapbase = ioremap(res.start, 0x1000);
173 if (!sdcpwr_mapbase) {
174 err = -EINVAL;
175 goto out_unmap_sdcasr;
178 pr_debug("init cpufreq on CPU %d\n", policy->cpu);
180 max_freqp = of_get_property(cpu, "clock-frequency", NULL);
181 if (!max_freqp) {
182 err = -EINVAL;
183 goto out_unmap_sdcpwr;
186 /* we need the freq in kHz */
187 max_freq = *max_freqp / 1000;
189 pr_debug("max clock-frequency is at %u kHz\n", max_freq);
190 pr_debug("initializing frequency table\n");
192 /* initialize frequency table */
193 for (i=0; pas_freqs[i].frequency!=CPUFREQ_TABLE_END; i++) {
194 pas_freqs[i].frequency = get_astate_freq(pas_freqs[i].index) * 100000;
195 pr_debug("%d: %d\n", i, pas_freqs[i].frequency);
198 policy->cpuinfo.transition_latency = get_gizmo_latency();
200 cur_astate = get_cur_astate(policy->cpu);
201 pr_debug("current astate is at %d\n",cur_astate);
203 policy->cur = pas_freqs[cur_astate].frequency;
204 policy->cpus = cpu_online_map;
206 ppc_proc_freq = policy->cur * 1000ul;
208 cpufreq_frequency_table_get_attr(pas_freqs, policy->cpu);
210 /* this ensures that policy->cpuinfo_min and policy->cpuinfo_max
211 * are set correctly
213 return cpufreq_frequency_table_cpuinfo(policy, pas_freqs);
215 out_unmap_sdcpwr:
216 iounmap(sdcpwr_mapbase);
218 out_unmap_sdcasr:
219 iounmap(sdcasr_mapbase);
220 out:
221 return err;
224 static int pas_cpufreq_cpu_exit(struct cpufreq_policy *policy)
226 if (sdcasr_mapbase)
227 iounmap(sdcasr_mapbase);
228 if (sdcpwr_mapbase)
229 iounmap(sdcpwr_mapbase);
231 cpufreq_frequency_table_put_attr(policy->cpu);
232 return 0;
235 static int pas_cpufreq_verify(struct cpufreq_policy *policy)
237 return cpufreq_frequency_table_verify(policy, pas_freqs);
240 static int pas_cpufreq_target(struct cpufreq_policy *policy,
241 unsigned int target_freq,
242 unsigned int relation)
244 struct cpufreq_freqs freqs;
245 int pas_astate_new;
246 int i;
248 cpufreq_frequency_table_target(policy,
249 pas_freqs,
250 target_freq,
251 relation,
252 &pas_astate_new);
254 freqs.old = policy->cur;
255 freqs.new = pas_freqs[pas_astate_new].frequency;
256 freqs.cpu = policy->cpu;
258 mutex_lock(&pas_switch_mutex);
259 cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
261 pr_debug("setting frequency for cpu %d to %d kHz, 1/%d of max frequency\n",
262 policy->cpu,
263 pas_freqs[pas_astate_new].frequency,
264 pas_freqs[pas_astate_new].index);
266 current_astate = pas_astate_new;
268 for_each_online_cpu(i)
269 set_astate(i, pas_astate_new);
271 cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
272 mutex_unlock(&pas_switch_mutex);
274 ppc_proc_freq = freqs.new * 1000ul;
275 return 0;
278 static struct cpufreq_driver pas_cpufreq_driver = {
279 .name = "pas-cpufreq",
280 .owner = THIS_MODULE,
281 .flags = CPUFREQ_CONST_LOOPS,
282 .init = pas_cpufreq_cpu_init,
283 .exit = pas_cpufreq_cpu_exit,
284 .verify = pas_cpufreq_verify,
285 .target = pas_cpufreq_target,
286 .attr = pas_cpu_freqs_attr,
290 * module init and destoy
293 static int __init pas_cpufreq_init(void)
295 if (!machine_is_compatible("PA6T-1682M"))
296 return -ENODEV;
298 return cpufreq_register_driver(&pas_cpufreq_driver);
301 static void __exit pas_cpufreq_exit(void)
303 cpufreq_unregister_driver(&pas_cpufreq_driver);
306 module_init(pas_cpufreq_init);
307 module_exit(pas_cpufreq_exit);
309 MODULE_LICENSE("GPL");
310 MODULE_AUTHOR("Egor Martovetsky <egor@pasemi.com>, Olof Johansson <olof@lixom.net>");