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x86: cpa self-test, WARN_ON()
[wrt350n-kernel.git] / drivers / scsi / arcmsr / arcmsr_hba.c
blobd80dba913a750c8e051b16ec28215348cb55ef41
1 /*
2 *******************************************************************************
3 ** O.S : Linux
4 ** FILE NAME : arcmsr_hba.c
5 ** BY : Erich Chen
6 ** Description: SCSI RAID Device Driver for
7 ** ARECA RAID Host adapter
8 *******************************************************************************
9 ** Copyright (C) 2002 - 2005, Areca Technology Corporation All rights reserved
10 **
11 ** Web site: www.areca.com.tw
12 ** E-mail: support@areca.com.tw
13 **
14 ** This program is free software; you can redistribute it and/or modify
15 ** it under the terms of the GNU General Public License version 2 as
16 ** published by the Free Software Foundation.
17 ** This program is distributed in the hope that it will be useful,
18 ** but WITHOUT ANY WARRANTY; without even the implied warranty of
19 ** MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 ** GNU General Public License for more details.
21 *******************************************************************************
22 ** Redistribution and use in source and binary forms, with or without
23 ** modification, are permitted provided that the following conditions
24 ** are met:
25 ** 1. Redistributions of source code must retain the above copyright
26 ** notice, this list of conditions and the following disclaimer.
27 ** 2. Redistributions in binary form must reproduce the above copyright
28 ** notice, this list of conditions and the following disclaimer in the
29 ** documentation and/or other materials provided with the distribution.
30 ** 3. The name of the author may not be used to endorse or promote products
31 ** derived from this software without specific prior written permission.
32 **
33 ** THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
34 ** IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
35 ** OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
36 ** IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
37 ** INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES(INCLUDING,BUT
38 ** NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
39 ** DATA, OR PROFITS; OR BUSINESS INTERRUPTION)HOWEVER CAUSED AND ON ANY
40 ** THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
41 ** (INCLUDING NEGLIGENCE OR OTHERWISE)ARISING IN ANY WAY OUT OF THE USE OF
42 ** THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
43 *******************************************************************************
44 ** For history of changes, see Documentation/scsi/ChangeLog.arcmsr
45 ** Firmware Specification, see Documentation/scsi/arcmsr_spec.txt
46 *******************************************************************************
47 */
48 #include <linux/module.h>
49 #include <linux/reboot.h>
50 #include <linux/spinlock.h>
51 #include <linux/pci_ids.h>
52 #include <linux/interrupt.h>
53 #include <linux/moduleparam.h>
54 #include <linux/errno.h>
55 #include <linux/types.h>
56 #include <linux/delay.h>
57 #include <linux/dma-mapping.h>
58 #include <linux/timer.h>
59 #include <linux/pci.h>
60 #include <linux/aer.h>
61 #include <asm/dma.h>
62 #include <asm/io.h>
63 #include <asm/system.h>
64 #include <asm/uaccess.h>
65 #include <scsi/scsi_host.h>
66 #include <scsi/scsi.h>
67 #include <scsi/scsi_cmnd.h>
68 #include <scsi/scsi_tcq.h>
69 #include <scsi/scsi_device.h>
70 #include <scsi/scsi_transport.h>
71 #include <scsi/scsicam.h>
72 #include "arcmsr.h"
73
74 MODULE_AUTHOR("Erich Chen <support@areca.com.tw>");
75 MODULE_DESCRIPTION("ARECA (ARC11xx/12xx/13xx/16xx) SATA/SAS RAID HOST Adapter");
76 MODULE_LICENSE("Dual BSD/GPL");
77 MODULE_VERSION(ARCMSR_DRIVER_VERSION);
78
79 static int arcmsr_iop_message_xfer(struct AdapterControlBlock *acb,
80 struct scsi_cmnd *cmd);
81 static int arcmsr_iop_confirm(struct AdapterControlBlock *acb);
82 static int arcmsr_abort(struct scsi_cmnd *);
83 static int arcmsr_bus_reset(struct scsi_cmnd *);
84 static int arcmsr_bios_param(struct scsi_device *sdev,
85 struct block_device *bdev, sector_t capacity, int *info);
86 static int arcmsr_queue_command(struct scsi_cmnd *cmd,
87 void (*done) (struct scsi_cmnd *));
88 static int arcmsr_probe(struct pci_dev *pdev,
89 const struct pci_device_id *id);
90 static void arcmsr_remove(struct pci_dev *pdev);
91 static void arcmsr_shutdown(struct pci_dev *pdev);
92 static void arcmsr_iop_init(struct AdapterControlBlock *acb);
93 static void arcmsr_free_ccb_pool(struct AdapterControlBlock *acb);
94 static u32 arcmsr_disable_outbound_ints(struct AdapterControlBlock *acb);
95 static void arcmsr_stop_adapter_bgrb(struct AdapterControlBlock *acb);
96 static void arcmsr_flush_hba_cache(struct AdapterControlBlock *acb);
97 static void arcmsr_flush_hbb_cache(struct AdapterControlBlock *acb);
98 static const char *arcmsr_info(struct Scsi_Host *);
99 static irqreturn_t arcmsr_interrupt(struct AdapterControlBlock *acb);
100 static int arcmsr_adjust_disk_queue_depth(struct scsi_device *sdev,
101 int queue_depth)
102 {
103 if (queue_depth > ARCMSR_MAX_CMD_PERLUN)
104 queue_depth = ARCMSR_MAX_CMD_PERLUN;
105 scsi_adjust_queue_depth(sdev, MSG_ORDERED_TAG, queue_depth);
106 return queue_depth;
107 }
108
109 static struct scsi_host_template arcmsr_scsi_host_template = {
110 .module = THIS_MODULE,
111 .name = "ARCMSR ARECA SATA/SAS RAID HOST Adapter"
112 ARCMSR_DRIVER_VERSION,
113 .info = arcmsr_info,
114 .queuecommand = arcmsr_queue_command,
115 .eh_abort_handler = arcmsr_abort,
116 .eh_bus_reset_handler = arcmsr_bus_reset,
117 .bios_param = arcmsr_bios_param,
118 .change_queue_depth = arcmsr_adjust_disk_queue_depth,
119 .can_queue = ARCMSR_MAX_OUTSTANDING_CMD,
120 .this_id = ARCMSR_SCSI_INITIATOR_ID,
121 .sg_tablesize = ARCMSR_MAX_SG_ENTRIES,
122 .max_sectors = ARCMSR_MAX_XFER_SECTORS,
123 .cmd_per_lun = ARCMSR_MAX_CMD_PERLUN,
124 .use_clustering = ENABLE_CLUSTERING,
125 .use_sg_chaining = ENABLE_SG_CHAINING,
126 .shost_attrs = arcmsr_host_attrs,
127 };
128 #ifdef CONFIG_SCSI_ARCMSR_AER
129 static pci_ers_result_t arcmsr_pci_slot_reset(struct pci_dev *pdev);
130 static pci_ers_result_t arcmsr_pci_error_detected(struct pci_dev *pdev,
131 pci_channel_state_t state);
132
133 static struct pci_error_handlers arcmsr_pci_error_handlers = {
134 .error_detected = arcmsr_pci_error_detected,
135 .slot_reset = arcmsr_pci_slot_reset,
136 };
137 #endif
138 static struct pci_device_id arcmsr_device_id_table[] = {
139 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1110)},
140 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1120)},
141 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1130)},
142 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1160)},
143 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1170)},
144 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1200)},
145 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1201)},
146 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1202)},
147 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1210)},
148 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1220)},
149 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1230)},
150 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1260)},
151 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1270)},
152 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1280)},
153 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1380)},
154 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1381)},
155 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1680)},
156 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1681)},
157 {0, 0}, /* Terminating entry */
158 };
159 MODULE_DEVICE_TABLE(pci, arcmsr_device_id_table);
160 static struct pci_driver arcmsr_pci_driver = {
161 .name = "arcmsr",
162 .id_table = arcmsr_device_id_table,
163 .probe = arcmsr_probe,
164 .remove = arcmsr_remove,
165 .shutdown = arcmsr_shutdown,
166 #ifdef CONFIG_SCSI_ARCMSR_AER
167 .err_handler = &arcmsr_pci_error_handlers,
168 #endif
169 };
170
171 static irqreturn_t arcmsr_do_interrupt(int irq, void *dev_id)
172 {
173 irqreturn_t handle_state;
174 struct AdapterControlBlock *acb = dev_id;
175
176 spin_lock(acb->host->host_lock);
177 handle_state = arcmsr_interrupt(acb);
178 spin_unlock(acb->host->host_lock);
179
180 return handle_state;
181 }
182
183 static int arcmsr_bios_param(struct scsi_device *sdev,
184 struct block_device *bdev, sector_t capacity, int *geom)
185 {
186 int ret, heads, sectors, cylinders, total_capacity;
187 unsigned char *buffer;/* return copy of block device's partition table */
188
189 buffer = scsi_bios_ptable(bdev);
190 if (buffer) {
191 ret = scsi_partsize(buffer, capacity, &geom[2], &geom[0], &geom[1]);
192 kfree(buffer);
193 if (ret != -1)
194 return ret;
195 }
196 total_capacity = capacity;
197 heads = 64;
198 sectors = 32;
199 cylinders = total_capacity / (heads * sectors);
200 if (cylinders > 1024) {
201 heads = 255;
202 sectors = 63;
203 cylinders = total_capacity / (heads * sectors);
204 }
205 geom[0] = heads;
206 geom[1] = sectors;
207 geom[2] = cylinders;
208 return 0;
209 }
210
211 static void arcmsr_define_adapter_type(struct AdapterControlBlock *acb)
212 {
213 struct pci_dev *pdev = acb->pdev;
214 u16 dev_id;
215 pci_read_config_word(pdev, PCI_DEVICE_ID, &dev_id);
216 switch (dev_id) {
217 case 0x1201 : {
218 acb->adapter_type = ACB_ADAPTER_TYPE_B;
219 }
220 break;
221
222 default : acb->adapter_type = ACB_ADAPTER_TYPE_A;
223 }
224 }
225
226 static int arcmsr_alloc_ccb_pool(struct AdapterControlBlock *acb)
227 {
228
229 switch (acb->adapter_type) {
230
231 case ACB_ADAPTER_TYPE_A: {
232 struct pci_dev *pdev = acb->pdev;
233 void *dma_coherent;
234 dma_addr_t dma_coherent_handle, dma_addr;
235 struct CommandControlBlock *ccb_tmp;
236 uint32_t intmask_org;
237 int i, j;
238
239 acb->pmuA = ioremap(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));
240 if (!acb->pmuA) {
241 printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n",
242 acb->host->host_no);
243 return -ENOMEM;
244 }
245
246 dma_coherent = dma_alloc_coherent(&pdev->dev,
247 ARCMSR_MAX_FREECCB_NUM *
248 sizeof (struct CommandControlBlock) + 0x20,
249 &dma_coherent_handle, GFP_KERNEL);
250
251 if (!dma_coherent) {
252 iounmap(acb->pmuA);
253 return -ENOMEM;
254 }
255
256 acb->dma_coherent = dma_coherent;
257 acb->dma_coherent_handle = dma_coherent_handle;
258
259 if (((unsigned long)dma_coherent & 0x1F)) {
260 dma_coherent = dma_coherent +
261 (0x20 - ((unsigned long)dma_coherent & 0x1F));
262 dma_coherent_handle = dma_coherent_handle +
263 (0x20 - ((unsigned long)dma_coherent_handle & 0x1F));
264 }
265
266 dma_addr = dma_coherent_handle;
267 ccb_tmp = (struct CommandControlBlock *)dma_coherent;
268 for (i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++) {
269 ccb_tmp->cdb_shifted_phyaddr = dma_addr >> 5;
270 ccb_tmp->acb = acb;
271 acb->pccb_pool[i] = ccb_tmp;
272 list_add_tail(&ccb_tmp->list, &acb->ccb_free_list);
273 dma_addr = dma_addr + sizeof(struct CommandControlBlock);
274 ccb_tmp++;
275 }
276
277 acb->vir2phy_offset = (unsigned long)ccb_tmp -(unsigned long)dma_addr;
278 for (i = 0; i < ARCMSR_MAX_TARGETID; i++)
279 for (j = 0; j < ARCMSR_MAX_TARGETLUN; j++)
280 acb->devstate[i][j] = ARECA_RAID_GONE;
281
282 /*
283 ** here we need to tell iop 331 our ccb_tmp.HighPart
284 ** if ccb_tmp.HighPart is not zero
285 */
286 intmask_org = arcmsr_disable_outbound_ints(acb);
287 }
288 break;
289
290 case ACB_ADAPTER_TYPE_B: {
291
292 struct pci_dev *pdev = acb->pdev;
293 struct MessageUnit_B *reg;
294 void __iomem *mem_base0, *mem_base1;
295 void *dma_coherent;
296 dma_addr_t dma_coherent_handle, dma_addr;
297 uint32_t intmask_org;
298 struct CommandControlBlock *ccb_tmp;
299 int i, j;
300
301 dma_coherent = dma_alloc_coherent(&pdev->dev,
302 ((ARCMSR_MAX_FREECCB_NUM *
303 sizeof(struct CommandControlBlock) + 0x20) +
304 sizeof(struct MessageUnit_B)),
305 &dma_coherent_handle, GFP_KERNEL);
306 if (!dma_coherent)
307 return -ENOMEM;
308
309 acb->dma_coherent = dma_coherent;
310 acb->dma_coherent_handle = dma_coherent_handle;
311
312 if (((unsigned long)dma_coherent & 0x1F)) {
313 dma_coherent = dma_coherent +
314 (0x20 - ((unsigned long)dma_coherent & 0x1F));
315 dma_coherent_handle = dma_coherent_handle +
316 (0x20 - ((unsigned long)dma_coherent_handle & 0x1F));
317 }
318
319 reg = (struct MessageUnit_B *)(dma_coherent +
320 ARCMSR_MAX_FREECCB_NUM * sizeof(struct CommandControlBlock));
321
322 dma_addr = dma_coherent_handle;
323 ccb_tmp = (struct CommandControlBlock *)dma_coherent;
324 for (i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++) {
325 ccb_tmp->cdb_shifted_phyaddr = dma_addr >> 5;
326 ccb_tmp->acb = acb;
327 acb->pccb_pool[i] = ccb_tmp;
328 list_add_tail(&ccb_tmp->list, &acb->ccb_free_list);
329 dma_addr = dma_addr + sizeof(struct CommandControlBlock);
330 ccb_tmp++;
331 }
332
333 reg = (struct MessageUnit_B *)(dma_coherent +
334 ARCMSR_MAX_FREECCB_NUM * sizeof(struct CommandControlBlock));
335 acb->pmuB = reg;
336 mem_base0 = ioremap(pci_resource_start(pdev, 0),
337 pci_resource_len(pdev, 0));
338 if (!mem_base0)
339 goto out;
340
341 mem_base1 = ioremap(pci_resource_start(pdev, 2),
342 pci_resource_len(pdev, 2));
343 if (!mem_base1) {
344 iounmap(mem_base0);
345 goto out;
346 }
347
348 reg->drv2iop_doorbell_reg = mem_base0 + ARCMSR_DRV2IOP_DOORBELL;
349 reg->drv2iop_doorbell_mask_reg = mem_base0 +
350 ARCMSR_DRV2IOP_DOORBELL_MASK;
351 reg->iop2drv_doorbell_reg = mem_base0 + ARCMSR_IOP2DRV_DOORBELL;
352 reg->iop2drv_doorbell_mask_reg = mem_base0 +
353 ARCMSR_IOP2DRV_DOORBELL_MASK;
354 reg->ioctl_wbuffer_reg = mem_base1 + ARCMSR_IOCTL_WBUFFER;
355 reg->ioctl_rbuffer_reg = mem_base1 + ARCMSR_IOCTL_RBUFFER;
356 reg->msgcode_rwbuffer_reg = mem_base1 + ARCMSR_MSGCODE_RWBUFFER;
357
358 acb->vir2phy_offset = (unsigned long)ccb_tmp -(unsigned long)dma_addr;
359 for (i = 0; i < ARCMSR_MAX_TARGETID; i++)
360 for (j = 0; j < ARCMSR_MAX_TARGETLUN; j++)
361 acb->devstate[i][j] = ARECA_RAID_GOOD;
362
363 /*
364 ** here we need to tell iop 331 our ccb_tmp.HighPart
365 ** if ccb_tmp.HighPart is not zero
366 */
367 intmask_org = arcmsr_disable_outbound_ints(acb);
368 }
369 break;
370 }
371 return 0;
372
373 out:
374 dma_free_coherent(&acb->pdev->dev,
375 ARCMSR_MAX_FREECCB_NUM * sizeof(struct CommandControlBlock) + 0x20,
376 acb->dma_coherent, acb->dma_coherent_handle);
377 return -ENOMEM;
378 }
379
380 static int arcmsr_probe(struct pci_dev *pdev,
381 const struct pci_device_id *id)
382 {
383 struct Scsi_Host *host;
384 struct AdapterControlBlock *acb;
385 uint8_t bus, dev_fun;
386 int error;
387
388 error = pci_enable_device(pdev);
389 if (error)
390 goto out;
391 pci_set_master(pdev);
392
393 host = scsi_host_alloc(&arcmsr_scsi_host_template,
394 sizeof(struct AdapterControlBlock));
395 if (!host) {
396 error = -ENOMEM;
397 goto out_disable_device;
398 }
399 acb = (struct AdapterControlBlock *)host->hostdata;
400 memset(acb, 0, sizeof (struct AdapterControlBlock));
401
402 error = pci_set_dma_mask(pdev, DMA_64BIT_MASK);
403 if (error) {
404 error = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
405 if (error) {
406 printk(KERN_WARNING
407 "scsi%d: No suitable DMA mask available\n",
408 host->host_no);
409 goto out_host_put;
410 }
411 }
412 bus = pdev->bus->number;
413 dev_fun = pdev->devfn;
414 acb->host = host;
415 acb->pdev = pdev;
416 host->max_sectors = ARCMSR_MAX_XFER_SECTORS;
417 host->max_lun = ARCMSR_MAX_TARGETLUN;
418 host->max_id = ARCMSR_MAX_TARGETID;/*16:8*/
419 host->max_cmd_len = 16; /*this is issue of 64bit LBA, over 2T byte*/
420 host->sg_tablesize = ARCMSR_MAX_SG_ENTRIES;
421 host->can_queue = ARCMSR_MAX_FREECCB_NUM; /* max simultaneous cmds */
422 host->cmd_per_lun = ARCMSR_MAX_CMD_PERLUN;
423 host->this_id = ARCMSR_SCSI_INITIATOR_ID;
424 host->unique_id = (bus << 8) | dev_fun;
425 host->irq = pdev->irq;
426 error = pci_request_regions(pdev, "arcmsr");
427 if (error) {
428 goto out_host_put;
429 }
430 arcmsr_define_adapter_type(acb);
431
432 acb->acb_flags |= (ACB_F_MESSAGE_WQBUFFER_CLEARED |
433 ACB_F_MESSAGE_RQBUFFER_CLEARED |
434 ACB_F_MESSAGE_WQBUFFER_READED);
435 acb->acb_flags &= ~ACB_F_SCSISTOPADAPTER;
436 INIT_LIST_HEAD(&acb->ccb_free_list);
437
438 error = arcmsr_alloc_ccb_pool(acb);
439 if (error)
440 goto out_release_regions;
441
442 error = request_irq(pdev->irq, arcmsr_do_interrupt,
443 IRQF_SHARED, "arcmsr", acb);
444 if (error)
445 goto out_free_ccb_pool;
446
447 arcmsr_iop_init(acb);
448 pci_set_drvdata(pdev, host);
449 if (strncmp(acb->firm_version, "V1.42", 5) >= 0)
450 host->max_sectors= ARCMSR_MAX_XFER_SECTORS_B;
451
452 error = scsi_add_host(host, &pdev->dev);
453 if (error)
454 goto out_free_irq;
455
456 error = arcmsr_alloc_sysfs_attr(acb);
457 if (error)
458 goto out_free_sysfs;
459
460 scsi_scan_host(host);
461 #ifdef CONFIG_SCSI_ARCMSR_AER
462 pci_enable_pcie_error_reporting(pdev);
463 #endif
464 return 0;
465 out_free_sysfs:
466 out_free_irq:
467 free_irq(pdev->irq, acb);
468 out_free_ccb_pool:
469 arcmsr_free_ccb_pool(acb);
470 out_release_regions:
471 pci_release_regions(pdev);
472 out_host_put:
473 scsi_host_put(host);
474 out_disable_device:
475 pci_disable_device(pdev);
476 out:
477 return error;
478 }
479
480 static uint8_t arcmsr_hba_wait_msgint_ready(struct AdapterControlBlock *acb)
481 {
482 struct MessageUnit_A __iomem *reg = acb->pmuA;
483 uint32_t Index;
484 uint8_t Retries = 0x00;
485
486 do {
487 for (Index = 0; Index < 100; Index++) {
488 if (readl(&reg->outbound_intstatus) &
489 ARCMSR_MU_OUTBOUND_MESSAGE0_INT) {
490 writel(ARCMSR_MU_OUTBOUND_MESSAGE0_INT,
491 &reg->outbound_intstatus);
492 return 0x00;
493 }
494 msleep(10);
495 }/*max 1 seconds*/
496
497 } while (Retries++ < 20);/*max 20 sec*/
498 return 0xff;
499 }
500
501 static uint8_t arcmsr_hbb_wait_msgint_ready(struct AdapterControlBlock *acb)
502 {
503 struct MessageUnit_B *reg = acb->pmuB;
504 uint32_t Index;
505 uint8_t Retries = 0x00;
506
507 do {
508 for (Index = 0; Index < 100; Index++) {
509 if (readl(reg->iop2drv_doorbell_reg)
510 & ARCMSR_IOP2DRV_MESSAGE_CMD_DONE) {
511 writel(ARCMSR_MESSAGE_INT_CLEAR_PATTERN
512 , reg->iop2drv_doorbell_reg);
513 return 0x00;
514 }
515 msleep(10);
516 }/*max 1 seconds*/
517
518 } while (Retries++ < 20);/*max 20 sec*/
519 return 0xff;
520 }
521
522 static void arcmsr_abort_hba_allcmd(struct AdapterControlBlock *acb)
523 {
524 struct MessageUnit_A __iomem *reg = acb->pmuA;
525
526 writel(ARCMSR_INBOUND_MESG0_ABORT_CMD, &reg->inbound_msgaddr0);
527 if (arcmsr_hba_wait_msgint_ready(acb))
528 printk(KERN_NOTICE
529 "arcmsr%d: wait 'abort all outstanding command' timeout \n"
530 , acb->host->host_no);
531 }
532
533 static void arcmsr_abort_hbb_allcmd(struct AdapterControlBlock *acb)
534 {
535 struct MessageUnit_B *reg = acb->pmuB;
536
537 writel(ARCMSR_MESSAGE_ABORT_CMD, reg->drv2iop_doorbell_reg);
538 if (arcmsr_hbb_wait_msgint_ready(acb))
539 printk(KERN_NOTICE
540 "arcmsr%d: wait 'abort all outstanding command' timeout \n"
541 , acb->host->host_no);
542 }
543
544 static void arcmsr_abort_allcmd(struct AdapterControlBlock *acb)
545 {
546 switch (acb->adapter_type) {
547 case ACB_ADAPTER_TYPE_A: {
548 arcmsr_abort_hba_allcmd(acb);
549 }
550 break;
551
552 case ACB_ADAPTER_TYPE_B: {
553 arcmsr_abort_hbb_allcmd(acb);
554 }
555 }
556 }
557
558 static void arcmsr_pci_unmap_dma(struct CommandControlBlock *ccb)
559 {
560 struct scsi_cmnd *pcmd = ccb->pcmd;
561
562 scsi_dma_unmap(pcmd);
563 }
564
565 static void arcmsr_ccb_complete(struct CommandControlBlock *ccb, int stand_flag)
566 {
567 struct AdapterControlBlock *acb = ccb->acb;
568 struct scsi_cmnd *pcmd = ccb->pcmd;
569
570 arcmsr_pci_unmap_dma(ccb);
571 if (stand_flag == 1)
572 atomic_dec(&acb->ccboutstandingcount);
573 ccb->startdone = ARCMSR_CCB_DONE;
574 ccb->ccb_flags = 0;
575 list_add_tail(&ccb->list, &acb->ccb_free_list);
576 pcmd->scsi_done(pcmd);
577 }
578
579 static void arcmsr_flush_hba_cache(struct AdapterControlBlock *acb)
580 {
581 struct MessageUnit_A __iomem *reg = acb->pmuA;
582 int retry_count = 30;
583
584 writel(ARCMSR_INBOUND_MESG0_FLUSH_CACHE, &reg->inbound_msgaddr0);
585 do {
586 if (!arcmsr_hba_wait_msgint_ready(acb))
587 break;
588 else {
589 retry_count--;
590 printk(KERN_NOTICE "arcmsr%d: wait 'flush adapter cache' \
591 timeout, retry count down = %d \n", acb->host->host_no, retry_count);
592 }
593 } while (retry_count != 0);
594 }
595
596 static void arcmsr_flush_hbb_cache(struct AdapterControlBlock *acb)
597 {
598 struct MessageUnit_B *reg = acb->pmuB;
599 int retry_count = 30;
600
601 writel(ARCMSR_MESSAGE_FLUSH_CACHE, reg->drv2iop_doorbell_reg);
602 do {
603 if (!arcmsr_hbb_wait_msgint_ready(acb))
604 break;
605 else {
606 retry_count--;
607 printk(KERN_NOTICE "arcmsr%d: wait 'flush adapter cache' \
608 timeout,retry count down = %d \n", acb->host->host_no, retry_count);
609 }
610 } while (retry_count != 0);
611 }
612
613 static void arcmsr_flush_adapter_cache(struct AdapterControlBlock *acb)
614 {
615 switch (acb->adapter_type) {
616
617 case ACB_ADAPTER_TYPE_A: {
618 arcmsr_flush_hba_cache(acb);
619 }
620 break;
621
622 case ACB_ADAPTER_TYPE_B: {
623 arcmsr_flush_hbb_cache(acb);
624 }
625 }
626 }
627
628 static void arcmsr_report_sense_info(struct CommandControlBlock *ccb)
629 {
630
631 struct scsi_cmnd *pcmd = ccb->pcmd;
632 struct SENSE_DATA *sensebuffer = (struct SENSE_DATA *)pcmd->sense_buffer;
633
634 pcmd->result = DID_OK << 16;
635 if (sensebuffer) {
636 int sense_data_length =
637 sizeof(struct SENSE_DATA) < SCSI_SENSE_BUFFERSIZE
638 ? sizeof(struct SENSE_DATA) : SCSI_SENSE_BUFFERSIZE;
639 memset(sensebuffer, 0, SCSI_SENSE_BUFFERSIZE);
640 memcpy(sensebuffer, ccb->arcmsr_cdb.SenseData, sense_data_length);
641 sensebuffer->ErrorCode = SCSI_SENSE_CURRENT_ERRORS;
642 sensebuffer->Valid = 1;
643 }
644 }
645
646 static u32 arcmsr_disable_outbound_ints(struct AdapterControlBlock *acb)
647 {
648 u32 orig_mask = 0;
649 switch (acb->adapter_type) {
650
651 case ACB_ADAPTER_TYPE_A : {
652 struct MessageUnit_A __iomem *reg = acb->pmuA;
653 orig_mask = readl(&reg->outbound_intmask)|\
654 ARCMSR_MU_OUTBOUND_MESSAGE0_INTMASKENABLE;
655 writel(orig_mask|ARCMSR_MU_OUTBOUND_ALL_INTMASKENABLE, \
656 &reg->outbound_intmask);
657 }
658 break;
659
660 case ACB_ADAPTER_TYPE_B : {
661 struct MessageUnit_B *reg = acb->pmuB;
662 orig_mask = readl(reg->iop2drv_doorbell_mask_reg) & \
663 (~ARCMSR_IOP2DRV_MESSAGE_CMD_DONE);
664 writel(0, reg->iop2drv_doorbell_mask_reg);
665 }
666 break;
667 }
668 return orig_mask;
669 }
670
671 static void arcmsr_report_ccb_state(struct AdapterControlBlock *acb, \
672 struct CommandControlBlock *ccb, uint32_t flag_ccb)
673 {
674
675 uint8_t id, lun;
676 id = ccb->pcmd->device->id;
677 lun = ccb->pcmd->device->lun;
678 if (!(flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR)) {
679 if (acb->devstate[id][lun] == ARECA_RAID_GONE)
680 acb->devstate[id][lun] = ARECA_RAID_GOOD;
681 ccb->pcmd->result = DID_OK << 16;
682 arcmsr_ccb_complete(ccb, 1);
683 } else {
684 switch (ccb->arcmsr_cdb.DeviceStatus) {
685 case ARCMSR_DEV_SELECT_TIMEOUT: {
686 acb->devstate[id][lun] = ARECA_RAID_GONE;
687 ccb->pcmd->result = DID_NO_CONNECT << 16;
688 arcmsr_ccb_complete(ccb, 1);
689 }
690 break;
691
692 case ARCMSR_DEV_ABORTED:
693
694 case ARCMSR_DEV_INIT_FAIL: {
695 acb->devstate[id][lun] = ARECA_RAID_GONE;
696 ccb->pcmd->result = DID_BAD_TARGET << 16;
697 arcmsr_ccb_complete(ccb, 1);
698 }
699 break;
700
701 case ARCMSR_DEV_CHECK_CONDITION: {
702 acb->devstate[id][lun] = ARECA_RAID_GOOD;
703 arcmsr_report_sense_info(ccb);
704 arcmsr_ccb_complete(ccb, 1);
705 }
706 break;
707
708 default:
709 printk(KERN_NOTICE
710 "arcmsr%d: scsi id = %d lun = %d"
711 " isr get command error done, "
712 "but got unknown DeviceStatus = 0x%x \n"
713 , acb->host->host_no
714 , id
715 , lun
716 , ccb->arcmsr_cdb.DeviceStatus);
717 acb->devstate[id][lun] = ARECA_RAID_GONE;
718 ccb->pcmd->result = DID_NO_CONNECT << 16;
719 arcmsr_ccb_complete(ccb, 1);
720 break;
721 }
722 }
723 }
724
725 static void arcmsr_drain_donequeue(struct AdapterControlBlock *acb, uint32_t flag_ccb)
726
727 {
728 struct CommandControlBlock *ccb;
729
730 ccb = (struct CommandControlBlock *)(acb->vir2phy_offset + (flag_ccb << 5));
731 if ((ccb->acb != acb) || (ccb->startdone != ARCMSR_CCB_START)) {
732 if (ccb->startdone == ARCMSR_CCB_ABORTED) {
733 struct scsi_cmnd *abortcmd = ccb->pcmd;
734 if (abortcmd) {
735 abortcmd->result |= DID_ABORT << 16;
736 arcmsr_ccb_complete(ccb, 1);
737 printk(KERN_NOTICE "arcmsr%d: ccb ='0x%p' \
738 isr got aborted command \n", acb->host->host_no, ccb);
739 }
740 }
741 printk(KERN_NOTICE "arcmsr%d: isr get an illegal ccb command \
742 done acb = '0x%p'"
743 "ccb = '0x%p' ccbacb = '0x%p' startdone = 0x%x"
744 " ccboutstandingcount = %d \n"
745 , acb->host->host_no
746 , acb
747 , ccb
748 , ccb->acb
749 , ccb->startdone
750 , atomic_read(&acb->ccboutstandingcount));
751 }
752 arcmsr_report_ccb_state(acb, ccb, flag_ccb);
753 }
754
755 static void arcmsr_done4abort_postqueue(struct AdapterControlBlock *acb)
756 {
757 int i = 0;
758 uint32_t flag_ccb;
759
760 switch (acb->adapter_type) {
761
762 case ACB_ADAPTER_TYPE_A: {
763 struct MessageUnit_A __iomem *reg = acb->pmuA;
764 uint32_t outbound_intstatus;
765 outbound_intstatus = readl(&reg->outbound_intstatus) &
766 acb->outbound_int_enable;
767 /*clear and abort all outbound posted Q*/
768 writel(outbound_intstatus, &reg->outbound_intstatus);/*clear interrupt*/
769 while (((flag_ccb = readl(&reg->outbound_queueport)) != 0xFFFFFFFF)
770 && (i++ < ARCMSR_MAX_OUTSTANDING_CMD)) {
771 arcmsr_drain_donequeue(acb, flag_ccb);
772 }
773 }
774 break;
775
776 case ACB_ADAPTER_TYPE_B: {
777 struct MessageUnit_B *reg = acb->pmuB;
778 /*clear all outbound posted Q*/
779 for (i = 0; i < ARCMSR_MAX_HBB_POSTQUEUE; i++) {
780 if ((flag_ccb = readl(&reg->done_qbuffer[i])) != 0) {
781 writel(0, &reg->done_qbuffer[i]);
782 arcmsr_drain_donequeue(acb, flag_ccb);
783 }
784 writel(0, &reg->post_qbuffer[i]);
785 }
786 reg->doneq_index = 0;
787 reg->postq_index = 0;
788 }
789 break;
790 }
791 }
792 static void arcmsr_remove(struct pci_dev *pdev)
793 {
794 struct Scsi_Host *host = pci_get_drvdata(pdev);
795 struct AdapterControlBlock *acb =
796 (struct AdapterControlBlock *) host->hostdata;
797 int poll_count = 0;
798
799 arcmsr_free_sysfs_attr(acb);
800 scsi_remove_host(host);
801 arcmsr_stop_adapter_bgrb(acb);
802 arcmsr_flush_adapter_cache(acb);
803 arcmsr_disable_outbound_ints(acb);
804 acb->acb_flags |= ACB_F_SCSISTOPADAPTER;
805 acb->acb_flags &= ~ACB_F_IOP_INITED;
806
807 for (poll_count = 0; poll_count < ARCMSR_MAX_OUTSTANDING_CMD; poll_count++) {
808 if (!atomic_read(&acb->ccboutstandingcount))
809 break;
810 arcmsr_interrupt(acb);/* FIXME: need spinlock */
811 msleep(25);
812 }
813
814 if (atomic_read(&acb->ccboutstandingcount)) {
815 int i;
816
817 arcmsr_abort_allcmd(acb);
818 arcmsr_done4abort_postqueue(acb);
819 for (i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++) {
820 struct CommandControlBlock *ccb = acb->pccb_pool[i];
821 if (ccb->startdone == ARCMSR_CCB_START) {
822 ccb->startdone = ARCMSR_CCB_ABORTED;
823 ccb->pcmd->result = DID_ABORT << 16;
824 arcmsr_ccb_complete(ccb, 1);
825 }
826 }
827 }
828
829 free_irq(pdev->irq, acb);
830 arcmsr_free_ccb_pool(acb);
831 pci_release_regions(pdev);
832
833 scsi_host_put(host);
834
835 pci_disable_device(pdev);
836 pci_set_drvdata(pdev, NULL);
837 }
838
839 static void arcmsr_shutdown(struct pci_dev *pdev)
840 {
841 struct Scsi_Host *host = pci_get_drvdata(pdev);
842 struct AdapterControlBlock *acb =
843 (struct AdapterControlBlock *)host->hostdata;
844
845 arcmsr_stop_adapter_bgrb(acb);
846 arcmsr_flush_adapter_cache(acb);
847 }
848
849 static int arcmsr_module_init(void)
850 {
851 int error = 0;
852
853 error = pci_register_driver(&arcmsr_pci_driver);
854 return error;
855 }
856
857 static void arcmsr_module_exit(void)
858 {
859 pci_unregister_driver(&arcmsr_pci_driver);
860 }
861 module_init(arcmsr_module_init);
862 module_exit(arcmsr_module_exit);
863
864 static void arcmsr_enable_outbound_ints(struct AdapterControlBlock *acb, \
865 u32 intmask_org)
866 {
867 u32 mask;
868
869 switch (acb->adapter_type) {
870
871 case ACB_ADAPTER_TYPE_A : {
872 struct MessageUnit_A __iomem *reg = acb->pmuA;
873 mask = intmask_org & ~(ARCMSR_MU_OUTBOUND_POSTQUEUE_INTMASKENABLE |
874 ARCMSR_MU_OUTBOUND_DOORBELL_INTMASKENABLE);
875 writel(mask, &reg->outbound_intmask);
876 acb->outbound_int_enable = ~(intmask_org & mask) & 0x000000ff;
877 }
878 break;
879
880 case ACB_ADAPTER_TYPE_B : {
881 struct MessageUnit_B *reg = acb->pmuB;
882 mask = intmask_org | (ARCMSR_IOP2DRV_DATA_WRITE_OK | \
883 ARCMSR_IOP2DRV_DATA_READ_OK | ARCMSR_IOP2DRV_CDB_DONE);
884 writel(mask, reg->iop2drv_doorbell_mask_reg);
885 acb->outbound_int_enable = (intmask_org | mask) & 0x0000000f;
886 }
887 }
888 }
889
890 static void arcmsr_build_ccb(struct AdapterControlBlock *acb,
891 struct CommandControlBlock *ccb, struct scsi_cmnd *pcmd)
892 {
893 struct ARCMSR_CDB *arcmsr_cdb = (struct ARCMSR_CDB *)&ccb->arcmsr_cdb;
894 int8_t *psge = (int8_t *)&arcmsr_cdb->u;
895 __le32 address_lo, address_hi;
896 int arccdbsize = 0x30;
897 int nseg;
898
899 ccb->pcmd = pcmd;
900 memset(arcmsr_cdb, 0, sizeof(struct ARCMSR_CDB));
901 arcmsr_cdb->Bus = 0;
902 arcmsr_cdb->TargetID = pcmd->device->id;
903 arcmsr_cdb->LUN = pcmd->device->lun;
904 arcmsr_cdb->Function = 1;
905 arcmsr_cdb->CdbLength = (uint8_t)pcmd->cmd_len;
906 arcmsr_cdb->Context = (unsigned long)arcmsr_cdb;
907 memcpy(arcmsr_cdb->Cdb, pcmd->cmnd, pcmd->cmd_len);
908
909 nseg = scsi_dma_map(pcmd);
910 BUG_ON(nseg < 0);
911
912 if (nseg) {
913 __le32 length;
914 int i, cdb_sgcount = 0;
915 struct scatterlist *sg;
916
917 /* map stor port SG list to our iop SG List. */
918 scsi_for_each_sg(pcmd, sg, nseg, i) {
919 /* Get the physical address of the current data pointer */
920 length = cpu_to_le32(sg_dma_len(sg));
921 address_lo = cpu_to_le32(dma_addr_lo32(sg_dma_address(sg)));
922 address_hi = cpu_to_le32(dma_addr_hi32(sg_dma_address(sg)));
923 if (address_hi == 0) {
924 struct SG32ENTRY *pdma_sg = (struct SG32ENTRY *)psge;
925
926 pdma_sg->address = address_lo;
927 pdma_sg->length = length;
928 psge += sizeof (struct SG32ENTRY);
929 arccdbsize += sizeof (struct SG32ENTRY);
930 } else {
931 struct SG64ENTRY *pdma_sg = (struct SG64ENTRY *)psge;
932
933 pdma_sg->addresshigh = address_hi;
934 pdma_sg->address = address_lo;
935 pdma_sg->length = length|cpu_to_le32(IS_SG64_ADDR);
936 psge += sizeof (struct SG64ENTRY);
937 arccdbsize += sizeof (struct SG64ENTRY);
938 }
939 cdb_sgcount++;
940 }
941 arcmsr_cdb->sgcount = (uint8_t)cdb_sgcount;
942 arcmsr_cdb->DataLength = scsi_bufflen(pcmd);
943 if ( arccdbsize > 256)
944 arcmsr_cdb->Flags |= ARCMSR_CDB_FLAG_SGL_BSIZE;
945 }
946 if (pcmd->sc_data_direction == DMA_TO_DEVICE ) {
947 arcmsr_cdb->Flags |= ARCMSR_CDB_FLAG_WRITE;
948 ccb->ccb_flags |= CCB_FLAG_WRITE;
949 }
950 }
951
952 static void arcmsr_post_ccb(struct AdapterControlBlock *acb, struct CommandControlBlock *ccb)
953 {
954 uint32_t cdb_shifted_phyaddr = ccb->cdb_shifted_phyaddr;
955 struct ARCMSR_CDB *arcmsr_cdb = (struct ARCMSR_CDB *)&ccb->arcmsr_cdb;
956 atomic_inc(&acb->ccboutstandingcount);
957 ccb->startdone = ARCMSR_CCB_START;
958
959 switch (acb->adapter_type) {
960 case ACB_ADAPTER_TYPE_A: {
961 struct MessageUnit_A __iomem *reg = acb->pmuA;
962
963 if (arcmsr_cdb->Flags & ARCMSR_CDB_FLAG_SGL_BSIZE)
964 writel(cdb_shifted_phyaddr | ARCMSR_CCBPOST_FLAG_SGL_BSIZE,
965 &reg->inbound_queueport);
966 else {
967 writel(cdb_shifted_phyaddr, &reg->inbound_queueport);
968 }
969 }
970 break;
971
972 case ACB_ADAPTER_TYPE_B: {
973 struct MessageUnit_B *reg = acb->pmuB;
974 uint32_t ending_index, index = reg->postq_index;
975
976 ending_index = ((index + 1) % ARCMSR_MAX_HBB_POSTQUEUE);
977 writel(0, &reg->post_qbuffer[ending_index]);
978 if (arcmsr_cdb->Flags & ARCMSR_CDB_FLAG_SGL_BSIZE) {
979 writel(cdb_shifted_phyaddr | ARCMSR_CCBPOST_FLAG_SGL_BSIZE,\
980 &reg->post_qbuffer[index]);
981 }
982 else {
983 writel(cdb_shifted_phyaddr, &reg->post_qbuffer[index]);
984 }
985 index++;
986 index %= ARCMSR_MAX_HBB_POSTQUEUE;/*if last index number set it to 0 */
987 reg->postq_index = index;
988 writel(ARCMSR_DRV2IOP_CDB_POSTED, reg->drv2iop_doorbell_reg);
989 }
990 break;
991 }
992 }
993
994 static void arcmsr_stop_hba_bgrb(struct AdapterControlBlock *acb)
995 {
996 struct MessageUnit_A __iomem *reg = acb->pmuA;
997 acb->acb_flags &= ~ACB_F_MSG_START_BGRB;
998 writel(ARCMSR_INBOUND_MESG0_STOP_BGRB, &reg->inbound_msgaddr0);
999
1000 if (arcmsr_hba_wait_msgint_ready(acb)) {
1001 printk(KERN_NOTICE
1002 "arcmsr%d: wait 'stop adapter background rebulid' timeout \n"
1003 , acb->host->host_no);
1004 }
1005 }
1006
1007 static void arcmsr_stop_hbb_bgrb(struct AdapterControlBlock *acb)
1008 {
1009 struct MessageUnit_B *reg = acb->pmuB;
1010 acb->acb_flags &= ~ACB_F_MSG_START_BGRB;
1011 writel(ARCMSR_MESSAGE_STOP_BGRB, reg->drv2iop_doorbell_reg);
1012
1013 if (arcmsr_hbb_wait_msgint_ready(acb)) {
1014 printk(KERN_NOTICE
1015 "arcmsr%d: wait 'stop adapter background rebulid' timeout \n"
1016 , acb->host->host_no);
1017 }
1018 }
1019
1020 static void arcmsr_stop_adapter_bgrb(struct AdapterControlBlock *acb)
1021 {
1022 switch (acb->adapter_type) {
1023 case ACB_ADAPTER_TYPE_A: {
1024 arcmsr_stop_hba_bgrb(acb);
1025 }
1026 break;
1027
1028 case ACB_ADAPTER_TYPE_B: {
1029 arcmsr_stop_hbb_bgrb(acb);
1030 }
1031 break;
1032 }
1033 }
1034
1035 static void arcmsr_free_ccb_pool(struct AdapterControlBlock *acb)
1036 {
1037 switch (acb->adapter_type) {
1038 case ACB_ADAPTER_TYPE_A: {
1039 iounmap(acb->pmuA);
1040 break;
1041 }
1042 case ACB_ADAPTER_TYPE_B: {
1043 struct MessageUnit_B *reg = acb->pmuB;
1044 iounmap(reg->drv2iop_doorbell_reg - ARCMSR_DRV2IOP_DOORBELL);
1045 iounmap(reg->ioctl_wbuffer_reg - ARCMSR_IOCTL_WBUFFER);
1046 }
1047 }
1048 dma_free_coherent(&acb->pdev->dev,
1049 ARCMSR_MAX_FREECCB_NUM * sizeof (struct CommandControlBlock) + 0x20,
1050 acb->dma_coherent,
1051 acb->dma_coherent_handle);
1052 }
1053
1054 void arcmsr_iop_message_read(struct AdapterControlBlock *acb)
1055 {
1056 switch (acb->adapter_type) {
1057 case ACB_ADAPTER_TYPE_A: {
1058 struct MessageUnit_A __iomem *reg = acb->pmuA;
1059 writel(ARCMSR_INBOUND_DRIVER_DATA_READ_OK, &reg->inbound_doorbell);
1060 }
1061 break;
1062
1063 case ACB_ADAPTER_TYPE_B: {
1064 struct MessageUnit_B *reg = acb->pmuB;
1065 writel(ARCMSR_DRV2IOP_DATA_READ_OK, reg->drv2iop_doorbell_reg);
1066 }
1067 break;
1068 }
1069 }
1070
1071 static void arcmsr_iop_message_wrote(struct AdapterControlBlock *acb)
1072 {
1073 switch (acb->adapter_type) {
1074 case ACB_ADAPTER_TYPE_A: {
1075 struct MessageUnit_A __iomem *reg = acb->pmuA;
1076 /*
1077 ** push inbound doorbell tell iop, driver data write ok
1078 ** and wait reply on next hwinterrupt for next Qbuffer post
1079 */
1080 writel(ARCMSR_INBOUND_DRIVER_DATA_WRITE_OK, &reg->inbound_doorbell);
1081 }
1082 break;
1083
1084 case ACB_ADAPTER_TYPE_B: {
1085 struct MessageUnit_B *reg = acb->pmuB;
1086 /*
1087 ** push inbound doorbell tell iop, driver data write ok
1088 ** and wait reply on next hwinterrupt for next Qbuffer post
1089 */
1090 writel(ARCMSR_DRV2IOP_DATA_WRITE_OK, reg->drv2iop_doorbell_reg);
1091 }
1092 break;
1093 }
1094 }
1095
1096 struct QBUFFER __iomem *arcmsr_get_iop_rqbuffer(struct AdapterControlBlock *acb)
1097 {
1098 struct QBUFFER __iomem *qbuffer = NULL;
1099
1100 switch (acb->adapter_type) {
1101
1102 case ACB_ADAPTER_TYPE_A: {
1103 struct MessageUnit_A __iomem *reg = acb->pmuA;
1104 qbuffer = (struct QBUFFER __iomem *)&reg->message_rbuffer;
1105 }
1106 break;
1107
1108 case ACB_ADAPTER_TYPE_B: {
1109 struct MessageUnit_B *reg = acb->pmuB;
1110 qbuffer = (struct QBUFFER __iomem *)reg->ioctl_rbuffer_reg;
1111 }
1112 break;
1113 }
1114 return qbuffer;
1115 }
1116
1117 static struct QBUFFER __iomem *arcmsr_get_iop_wqbuffer(struct AdapterControlBlock *acb)
1118 {
1119 struct QBUFFER __iomem *pqbuffer = NULL;
1120
1121 switch (acb->adapter_type) {
1122
1123 case ACB_ADAPTER_TYPE_A: {
1124 struct MessageUnit_A __iomem *reg = acb->pmuA;
1125 pqbuffer = (struct QBUFFER __iomem *) &reg->message_wbuffer;
1126 }
1127 break;
1128
1129 case ACB_ADAPTER_TYPE_B: {
1130 struct MessageUnit_B *reg = acb->pmuB;
1131 pqbuffer = (struct QBUFFER __iomem *)reg->ioctl_wbuffer_reg;
1132 }
1133 break;
1134 }
1135 return pqbuffer;
1136 }
1137
1138 static void arcmsr_iop2drv_data_wrote_handle(struct AdapterControlBlock *acb)
1139 {
1140 struct QBUFFER __iomem *prbuffer;
1141 struct QBUFFER *pQbuffer;
1142 uint8_t __iomem *iop_data;
1143 int32_t my_empty_len, iop_len, rqbuf_firstindex, rqbuf_lastindex;
1144
1145 rqbuf_lastindex = acb->rqbuf_lastindex;
1146 rqbuf_firstindex = acb->rqbuf_firstindex;
1147 prbuffer = arcmsr_get_iop_rqbuffer(acb);
1148 iop_data = (uint8_t __iomem *)prbuffer->data;
1149 iop_len = prbuffer->data_len;
1150 my_empty_len = (rqbuf_firstindex - rqbuf_lastindex -1)&(ARCMSR_MAX_QBUFFER -1);
1151
1152 if (my_empty_len >= iop_len)
1153 {
1154 while (iop_len > 0) {
1155 pQbuffer = (struct QBUFFER *)&acb->rqbuffer[rqbuf_lastindex];
1156 memcpy(pQbuffer, iop_data,1);
1157 rqbuf_lastindex++;
1158 rqbuf_lastindex %= ARCMSR_MAX_QBUFFER;
1159 iop_data++;
1160 iop_len--;
1161 }
1162 acb->rqbuf_lastindex = rqbuf_lastindex;
1163 arcmsr_iop_message_read(acb);
1164 }
1165
1166 else {
1167 acb->acb_flags |= ACB_F_IOPDATA_OVERFLOW;
1168 }
1169 }
1170
1171 static void arcmsr_iop2drv_data_read_handle(struct AdapterControlBlock *acb)
1172 {
1173 acb->acb_flags |= ACB_F_MESSAGE_WQBUFFER_READED;
1174 if (acb->wqbuf_firstindex != acb->wqbuf_lastindex) {
1175 uint8_t *pQbuffer;
1176 struct QBUFFER __iomem *pwbuffer;
1177 uint8_t __iomem *iop_data;
1178 int32_t allxfer_len = 0;
1179
1180 acb->acb_flags &= (~ACB_F_MESSAGE_WQBUFFER_READED);
1181 pwbuffer = arcmsr_get_iop_wqbuffer(acb);
1182 iop_data = (uint8_t __iomem *)pwbuffer->data;
1183
1184 while ((acb->wqbuf_firstindex != acb->wqbuf_lastindex) && \
1185 (allxfer_len < 124)) {
1186 pQbuffer = &acb->wqbuffer[acb->wqbuf_firstindex];
1187 memcpy(iop_data, pQbuffer, 1);
1188 acb->wqbuf_firstindex++;
1189 acb->wqbuf_firstindex %= ARCMSR_MAX_QBUFFER;
1190 iop_data++;
1191 allxfer_len++;
1192 }
1193 pwbuffer->data_len = allxfer_len;
1194
1195 arcmsr_iop_message_wrote(acb);
1196 }
1197
1198 if (acb->wqbuf_firstindex == acb->wqbuf_lastindex) {
1199 acb->acb_flags |= ACB_F_MESSAGE_WQBUFFER_CLEARED;
1200 }
1201 }
1202
1203 static void arcmsr_hba_doorbell_isr(struct AdapterControlBlock *acb)
1204 {
1205 uint32_t outbound_doorbell;
1206 struct MessageUnit_A __iomem *reg = acb->pmuA;
1207
1208 outbound_doorbell = readl(&reg->outbound_doorbell);
1209 writel(outbound_doorbell, &reg->outbound_doorbell);
1210 if (outbound_doorbell & ARCMSR_OUTBOUND_IOP331_DATA_WRITE_OK) {
1211 arcmsr_iop2drv_data_wrote_handle(acb);
1212 }
1213
1214 if (outbound_doorbell & ARCMSR_OUTBOUND_IOP331_DATA_READ_OK) {
1215 arcmsr_iop2drv_data_read_handle(acb);
1216 }
1217 }
1218
1219 static void arcmsr_hba_postqueue_isr(struct AdapterControlBlock *acb)
1220 {
1221 uint32_t flag_ccb;
1222 struct MessageUnit_A __iomem *reg = acb->pmuA;
1223
1224 while ((flag_ccb = readl(&reg->outbound_queueport)) != 0xFFFFFFFF) {
1225 arcmsr_drain_donequeue(acb, flag_ccb);
1226 }
1227 }
1228
1229 static void arcmsr_hbb_postqueue_isr(struct AdapterControlBlock *acb)
1230 {
1231 uint32_t index;
1232 uint32_t flag_ccb;
1233 struct MessageUnit_B *reg = acb->pmuB;
1234
1235 index = reg->doneq_index;
1236
1237 while ((flag_ccb = readl(&reg->done_qbuffer[index])) != 0) {
1238 writel(0, &reg->done_qbuffer[index]);
1239 arcmsr_drain_donequeue(acb, flag_ccb);
1240 index++;
1241 index %= ARCMSR_MAX_HBB_POSTQUEUE;
1242 reg->doneq_index = index;
1243 }
1244 }
1245
1246 static int arcmsr_handle_hba_isr(struct AdapterControlBlock *acb)
1247 {
1248 uint32_t outbound_intstatus;
1249 struct MessageUnit_A __iomem *reg = acb->pmuA;
1250
1251 outbound_intstatus = readl(&reg->outbound_intstatus) & \
1252 acb->outbound_int_enable;
1253 if (!(outbound_intstatus & ARCMSR_MU_OUTBOUND_HANDLE_INT)) {
1254 return 1;
1255 }
1256 writel(outbound_intstatus, &reg->outbound_intstatus);
1257 if (outbound_intstatus & ARCMSR_MU_OUTBOUND_DOORBELL_INT) {
1258 arcmsr_hba_doorbell_isr(acb);
1259 }
1260 if (outbound_intstatus & ARCMSR_MU_OUTBOUND_POSTQUEUE_INT) {
1261 arcmsr_hba_postqueue_isr(acb);
1262 }
1263 return 0;
1264 }
1265
1266 static int arcmsr_handle_hbb_isr(struct AdapterControlBlock *acb)
1267 {
1268 uint32_t outbound_doorbell;
1269 struct MessageUnit_B *reg = acb->pmuB;
1270
1271 outbound_doorbell = readl(reg->iop2drv_doorbell_reg) & \
1272 acb->outbound_int_enable;
1273 if (!outbound_doorbell)
1274 return 1;
1275
1276 writel(~outbound_doorbell, reg->iop2drv_doorbell_reg);
1277
1278 if (outbound_doorbell & ARCMSR_IOP2DRV_DATA_WRITE_OK) {
1279 arcmsr_iop2drv_data_wrote_handle(acb);
1280 }
1281 if (outbound_doorbell & ARCMSR_IOP2DRV_DATA_READ_OK) {
1282 arcmsr_iop2drv_data_read_handle(acb);
1283 }
1284 if (outbound_doorbell & ARCMSR_IOP2DRV_CDB_DONE) {
1285 arcmsr_hbb_postqueue_isr(acb);
1286 }
1287
1288 return 0;
1289 }
1290
1291 static irqreturn_t arcmsr_interrupt(struct AdapterControlBlock *acb)
1292 {
1293 switch (acb->adapter_type) {
1294 case ACB_ADAPTER_TYPE_A: {
1295 if (arcmsr_handle_hba_isr(acb)) {
1296 return IRQ_NONE;
1297 }
1298 }
1299 break;
1300
1301 case ACB_ADAPTER_TYPE_B: {
1302 if (arcmsr_handle_hbb_isr(acb)) {
1303 return IRQ_NONE;
1304 }
1305 }
1306 break;
1307 }
1308 return IRQ_HANDLED;
1309 }
1310
1311 static void arcmsr_iop_parking(struct AdapterControlBlock *acb)
1312 {
1313 if (acb) {
1314 /* stop adapter background rebuild */
1315 if (acb->acb_flags & ACB_F_MSG_START_BGRB) {
1316 uint32_t intmask_org;
1317 acb->acb_flags &= ~ACB_F_MSG_START_BGRB;
1318 intmask_org = arcmsr_disable_outbound_ints(acb);
1319 arcmsr_stop_adapter_bgrb(acb);
1320 arcmsr_flush_adapter_cache(acb);
1321 arcmsr_enable_outbound_ints(acb, intmask_org);
1322 }
1323 }
1324 }
1325
1326 void arcmsr_post_ioctldata2iop(struct AdapterControlBlock *acb)
1327 {
1328 int32_t wqbuf_firstindex, wqbuf_lastindex;
1329 uint8_t *pQbuffer;
1330 struct QBUFFER __iomem *pwbuffer;
1331 uint8_t __iomem *iop_data;
1332 int32_t allxfer_len = 0;
1333
1334 pwbuffer = arcmsr_get_iop_wqbuffer(acb);
1335 iop_data = (uint8_t __iomem *)pwbuffer->data;
1336 if (acb->acb_flags & ACB_F_MESSAGE_WQBUFFER_READED) {
1337 acb->acb_flags &= (~ACB_F_MESSAGE_WQBUFFER_READED);
1338 wqbuf_firstindex = acb->wqbuf_firstindex;
1339 wqbuf_lastindex = acb->wqbuf_lastindex;
1340 while ((wqbuf_firstindex != wqbuf_lastindex) && (allxfer_len < 124)) {
1341 pQbuffer = &acb->wqbuffer[wqbuf_firstindex];
1342 memcpy(iop_data, pQbuffer, 1);
1343 wqbuf_firstindex++;
1344 wqbuf_firstindex %= ARCMSR_MAX_QBUFFER;
1345 iop_data++;
1346 allxfer_len++;
1347 }
1348 acb->wqbuf_firstindex = wqbuf_firstindex;
1349 pwbuffer->data_len = allxfer_len;
1350 arcmsr_iop_message_wrote(acb);
1351 }
1352 }
1353
1354 static int arcmsr_iop_message_xfer(struct AdapterControlBlock *acb, \
1355 struct scsi_cmnd *cmd)
1356 {
1357 struct CMD_MESSAGE_FIELD *pcmdmessagefld;
1358 int retvalue = 0, transfer_len = 0;
1359 char *buffer;
1360 struct scatterlist *sg;
1361 uint32_t controlcode = (uint32_t ) cmd->cmnd[5] << 24 |
1362 (uint32_t ) cmd->cmnd[6] << 16 |
1363 (uint32_t ) cmd->cmnd[7] << 8 |
1364 (uint32_t ) cmd->cmnd[8];
1365 /* 4 bytes: Areca io control code */
1366
1367 sg = scsi_sglist(cmd);
1368 buffer = kmap_atomic(sg_page(sg), KM_IRQ0) + sg->offset;
1369 if (scsi_sg_count(cmd) > 1) {
1370 retvalue = ARCMSR_MESSAGE_FAIL;
1371 goto message_out;
1372 }
1373 transfer_len += sg->length;
1374
1375 if (transfer_len > sizeof(struct CMD_MESSAGE_FIELD)) {
1376 retvalue = ARCMSR_MESSAGE_FAIL;
1377 goto message_out;
1378 }
1379 pcmdmessagefld = (struct CMD_MESSAGE_FIELD *) buffer;
1380 switch(controlcode) {
1381
1382 case ARCMSR_MESSAGE_READ_RQBUFFER: {
1383 unsigned long *ver_addr;
1384 dma_addr_t buf_handle;
1385 uint8_t *pQbuffer, *ptmpQbuffer;
1386 int32_t allxfer_len = 0;
1387
1388 ver_addr = pci_alloc_consistent(acb->pdev, 1032, &buf_handle);
1389 if (!ver_addr) {
1390 retvalue = ARCMSR_MESSAGE_FAIL;
1391 goto message_out;
1392 }
1393 ptmpQbuffer = (uint8_t *) ver_addr;
1394 while ((acb->rqbuf_firstindex != acb->rqbuf_lastindex)
1395 && (allxfer_len < 1031)) {
1396 pQbuffer = &acb->rqbuffer[acb->rqbuf_firstindex];
1397 memcpy(ptmpQbuffer, pQbuffer, 1);
1398 acb->rqbuf_firstindex++;
1399 acb->rqbuf_firstindex %= ARCMSR_MAX_QBUFFER;
1400 ptmpQbuffer++;
1401 allxfer_len++;
1402 }
1403 if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) {
1404
1405 struct QBUFFER __iomem *prbuffer;
1406 uint8_t __iomem *iop_data;
1407 int32_t iop_len;
1408
1409 acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW;
1410 prbuffer = arcmsr_get_iop_rqbuffer(acb);
1411 iop_data = prbuffer->data;
1412 iop_len = readl(&prbuffer->data_len);
1413 while (iop_len > 0) {
1414 acb->rqbuffer[acb->rqbuf_lastindex] = readb(iop_data);
1415 acb->rqbuf_lastindex++;
1416 acb->rqbuf_lastindex %= ARCMSR_MAX_QBUFFER;
1417 iop_data++;
1418 iop_len--;
1419 }
1420 arcmsr_iop_message_read(acb);
1421 }
1422 memcpy(pcmdmessagefld->messagedatabuffer, (uint8_t *)ver_addr, allxfer_len);
1423 pcmdmessagefld->cmdmessage.Length = allxfer_len;
1424 pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_OK;
1425 pci_free_consistent(acb->pdev, 1032, ver_addr, buf_handle);
1426 }
1427 break;
1428
1429 case ARCMSR_MESSAGE_WRITE_WQBUFFER: {
1430 unsigned long *ver_addr;
1431 dma_addr_t buf_handle;
1432 int32_t my_empty_len, user_len, wqbuf_firstindex, wqbuf_lastindex;
1433 uint8_t *pQbuffer, *ptmpuserbuffer;
1434
1435 ver_addr = pci_alloc_consistent(acb->pdev, 1032, &buf_handle);
1436 if (!ver_addr) {
1437 retvalue = ARCMSR_MESSAGE_FAIL;
1438 goto message_out;
1439 }
1440 ptmpuserbuffer = (uint8_t *)ver_addr;
1441 user_len = pcmdmessagefld->cmdmessage.Length;
1442 memcpy(ptmpuserbuffer, pcmdmessagefld->messagedatabuffer, user_len);
1443 wqbuf_lastindex = acb->wqbuf_lastindex;
1444 wqbuf_firstindex = acb->wqbuf_firstindex;
1445 if (wqbuf_lastindex != wqbuf_firstindex) {
1446 struct SENSE_DATA *sensebuffer =
1447 (struct SENSE_DATA *)cmd->sense_buffer;
1448 arcmsr_post_ioctldata2iop(acb);
1449 /* has error report sensedata */
1450 sensebuffer->ErrorCode = 0x70;
1451 sensebuffer->SenseKey = ILLEGAL_REQUEST;
1452 sensebuffer->AdditionalSenseLength = 0x0A;
1453 sensebuffer->AdditionalSenseCode = 0x20;
1454 sensebuffer->Valid = 1;
1455 retvalue = ARCMSR_MESSAGE_FAIL;
1456 } else {
1457 my_empty_len = (wqbuf_firstindex-wqbuf_lastindex - 1)
1458 &(ARCMSR_MAX_QBUFFER - 1);
1459 if (my_empty_len >= user_len) {
1460 while (user_len > 0) {
1461 pQbuffer =
1462 &acb->wqbuffer[acb->wqbuf_lastindex];
1463 memcpy(pQbuffer, ptmpuserbuffer, 1);
1464 acb->wqbuf_lastindex++;
1465 acb->wqbuf_lastindex %= ARCMSR_MAX_QBUFFER;
1466 ptmpuserbuffer++;
1467 user_len--;
1468 }
1469 if (acb->acb_flags & ACB_F_MESSAGE_WQBUFFER_CLEARED) {
1470 acb->acb_flags &=
1471 ~ACB_F_MESSAGE_WQBUFFER_CLEARED;
1472 arcmsr_post_ioctldata2iop(acb);
1473 }
1474 } else {
1475 /* has error report sensedata */
1476 struct SENSE_DATA *sensebuffer =
1477 (struct SENSE_DATA *)cmd->sense_buffer;
1478 sensebuffer->ErrorCode = 0x70;
1479 sensebuffer->SenseKey = ILLEGAL_REQUEST;
1480 sensebuffer->AdditionalSenseLength = 0x0A;
1481 sensebuffer->AdditionalSenseCode = 0x20;
1482 sensebuffer->Valid = 1;
1483 retvalue = ARCMSR_MESSAGE_FAIL;
1484 }
1485 }
1486 pci_free_consistent(acb->pdev, 1032, ver_addr, buf_handle);
1487 }
1488 break;
1489
1490 case ARCMSR_MESSAGE_CLEAR_RQBUFFER: {
1491 uint8_t *pQbuffer = acb->rqbuffer;
1492
1493 if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) {
1494 acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW;
1495 arcmsr_iop_message_read(acb);
1496 }
1497 acb->acb_flags |= ACB_F_MESSAGE_RQBUFFER_CLEARED;
1498 acb->rqbuf_firstindex = 0;
1499 acb->rqbuf_lastindex = 0;
1500 memset(pQbuffer, 0, ARCMSR_MAX_QBUFFER);
1501 pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_OK;
1502 }
1503 break;
1504
1505 case ARCMSR_MESSAGE_CLEAR_WQBUFFER: {
1506 uint8_t *pQbuffer = acb->wqbuffer;
1507
1508 if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) {
1509 acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW;
1510 arcmsr_iop_message_read(acb);
1511 }
1512 acb->acb_flags |=
1513 (ACB_F_MESSAGE_WQBUFFER_CLEARED |
1514 ACB_F_MESSAGE_WQBUFFER_READED);
1515 acb->wqbuf_firstindex = 0;
1516 acb->wqbuf_lastindex = 0;
1517 memset(pQbuffer, 0, ARCMSR_MAX_QBUFFER);
1518 pcmdmessagefld->cmdmessage.ReturnCode =
1519 ARCMSR_MESSAGE_RETURNCODE_OK;
1520 }
1521 break;
1522
1523 case ARCMSR_MESSAGE_CLEAR_ALLQBUFFER: {
1524 uint8_t *pQbuffer;
1525
1526 if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) {
1527 acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW;
1528 arcmsr_iop_message_read(acb);
1529 }
1530 acb->acb_flags |=
1531 (ACB_F_MESSAGE_WQBUFFER_CLEARED
1532 | ACB_F_MESSAGE_RQBUFFER_CLEARED
1533 | ACB_F_MESSAGE_WQBUFFER_READED);
1534 acb->rqbuf_firstindex = 0;
1535 acb->rqbuf_lastindex = 0;
1536 acb->wqbuf_firstindex = 0;
1537 acb->wqbuf_lastindex = 0;
1538 pQbuffer = acb->rqbuffer;
1539 memset(pQbuffer, 0, sizeof(struct QBUFFER));
1540 pQbuffer = acb->wqbuffer;
1541 memset(pQbuffer, 0, sizeof(struct QBUFFER));
1542 pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_OK;
1543 }
1544 break;
1545
1546 case ARCMSR_MESSAGE_RETURN_CODE_3F: {
1547 pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_3F;
1548 }
1549 break;
1550
1551 case ARCMSR_MESSAGE_SAY_HELLO: {
1552 int8_t *hello_string = "Hello! I am ARCMSR";
1553
1554 memcpy(pcmdmessagefld->messagedatabuffer, hello_string
1555 , (int16_t)strlen(hello_string));
1556 pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_OK;
1557 }
1558 break;
1559
1560 case ARCMSR_MESSAGE_SAY_GOODBYE:
1561 arcmsr_iop_parking(acb);
1562 break;
1563
1564 case ARCMSR_MESSAGE_FLUSH_ADAPTER_CACHE:
1565 arcmsr_flush_adapter_cache(acb);
1566 break;
1567
1568 default:
1569 retvalue = ARCMSR_MESSAGE_FAIL;
1570 }
1571 message_out:
1572 sg = scsi_sglist(cmd);
1573 kunmap_atomic(buffer - sg->offset, KM_IRQ0);
1574 return retvalue;
1575 }
1576
1577 static struct CommandControlBlock *arcmsr_get_freeccb(struct AdapterControlBlock *acb)
1578 {
1579 struct list_head *head = &acb->ccb_free_list;
1580 struct CommandControlBlock *ccb = NULL;
1581
1582 if (!list_empty(head)) {
1583 ccb = list_entry(head->next, struct CommandControlBlock, list);
1584 list_del(head->next);
1585 }
1586 return ccb;
1587 }
1588
1589 static void arcmsr_handle_virtual_command(struct AdapterControlBlock *acb,
1590 struct scsi_cmnd *cmd)
1591 {
1592 switch (cmd->cmnd[0]) {
1593 case INQUIRY: {
1594 unsigned char inqdata[36];
1595 char *buffer;
1596 struct scatterlist *sg;
1597
1598 if (cmd->device->lun) {
1599 cmd->result = (DID_TIME_OUT << 16);
1600 cmd->scsi_done(cmd);
1601 return;
1602 }
1603 inqdata[0] = TYPE_PROCESSOR;
1604 /* Periph Qualifier & Periph Dev Type */
1605 inqdata[1] = 0;
1606 /* rem media bit & Dev Type Modifier */
1607 inqdata[2] = 0;
1608 /* ISO, ECMA, & ANSI versions */
1609 inqdata[4] = 31;
1610 /* length of additional data */
1611 strncpy(&inqdata[8], "Areca ", 8);
1612 /* Vendor Identification */
1613 strncpy(&inqdata[16], "RAID controller ", 16);
1614 /* Product Identification */
1615 strncpy(&inqdata[32], "R001", 4); /* Product Revision */
1616
1617 sg = scsi_sglist(cmd);
1618 buffer = kmap_atomic(sg_page(sg), KM_IRQ0) + sg->offset;
1619
1620 memcpy(buffer, inqdata, sizeof(inqdata));
1621 sg = scsi_sglist(cmd);
1622 kunmap_atomic(buffer - sg->offset, KM_IRQ0);
1623
1624 cmd->scsi_done(cmd);
1625 }
1626 break;
1627 case WRITE_BUFFER:
1628 case READ_BUFFER: {
1629 if (arcmsr_iop_message_xfer(acb, cmd))
1630 cmd->result = (DID_ERROR << 16);
1631 cmd->scsi_done(cmd);
1632 }
1633 break;
1634 default:
1635 cmd->scsi_done(cmd);
1636 }
1637 }
1638
1639 static int arcmsr_queue_command(struct scsi_cmnd *cmd,
1640 void (* done)(struct scsi_cmnd *))
1641 {
1642 struct Scsi_Host *host = cmd->device->host;
1643 struct AdapterControlBlock *acb = (struct AdapterControlBlock *) host->hostdata;
1644 struct CommandControlBlock *ccb;
1645 int target = cmd->device->id;
1646 int lun = cmd->device->lun;
1647
1648 cmd->scsi_done = done;
1649 cmd->host_scribble = NULL;
1650 cmd->result = 0;
1651 if (acb->acb_flags & ACB_F_BUS_RESET) {
1652 printk(KERN_NOTICE "arcmsr%d: bus reset"
1653 " and return busy \n"
1654 , acb->host->host_no);
1655 return SCSI_MLQUEUE_HOST_BUSY;
1656 }
1657 if (target == 16) {
1658 /* virtual device for iop message transfer */
1659 arcmsr_handle_virtual_command(acb, cmd);
1660 return 0;
1661 }
1662 if (acb->devstate[target][lun] == ARECA_RAID_GONE) {
1663 uint8_t block_cmd;
1664
1665 block_cmd = cmd->cmnd[0] & 0x0f;
1666 if (block_cmd == 0x08 || block_cmd == 0x0a) {
1667 printk(KERN_NOTICE
1668 "arcmsr%d: block 'read/write'"
1669 "command with gone raid volume"
1670 " Cmd = %2x, TargetId = %d, Lun = %d \n"
1671 , acb->host->host_no
1672 , cmd->cmnd[0]
1673 , target, lun);
1674 cmd->result = (DID_NO_CONNECT << 16);
1675 cmd->scsi_done(cmd);
1676 return 0;
1677 }
1678 }
1679 if (atomic_read(&acb->ccboutstandingcount) >=
1680 ARCMSR_MAX_OUTSTANDING_CMD)
1681 return SCSI_MLQUEUE_HOST_BUSY;
1682
1683 ccb = arcmsr_get_freeccb(acb);
1684 if (!ccb)
1685 return SCSI_MLQUEUE_HOST_BUSY;
1686
1687 arcmsr_build_ccb(acb, ccb, cmd);
1688 arcmsr_post_ccb(acb, ccb);
1689 return 0;
1690 }
1691
1692 static void arcmsr_get_hba_config(struct AdapterControlBlock *acb)
1693 {
1694 struct MessageUnit_A __iomem *reg = acb->pmuA;
1695 char *acb_firm_model = acb->firm_model;
1696 char *acb_firm_version = acb->firm_version;
1697 char __iomem *iop_firm_model = (char __iomem *)(&reg->message_rwbuffer[15]);
1698 char __iomem *iop_firm_version = (char __iomem *)(&reg->message_rwbuffer[17]);
1699 int count;
1700
1701 writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, &reg->inbound_msgaddr0);
1702 if (arcmsr_hba_wait_msgint_ready(acb)) {
1703 printk(KERN_NOTICE "arcmsr%d: wait 'get adapter firmware \
1704 miscellaneous data' timeout \n", acb->host->host_no);
1705 }
1706
1707 count = 8;
1708 while (count) {
1709 *acb_firm_model = readb(iop_firm_model);
1710 acb_firm_model++;
1711 iop_firm_model++;
1712 count--;
1713 }
1714
1715 count = 16;
1716 while (count) {
1717 *acb_firm_version = readb(iop_firm_version);
1718 acb_firm_version++;
1719 iop_firm_version++;
1720 count--;
1721 }
1722
1723 printk(KERN_INFO "ARECA RAID ADAPTER%d: FIRMWARE VERSION %s \n"
1724 , acb->host->host_no
1725 , acb->firm_version);
1726
1727 acb->firm_request_len = readl(&reg->message_rwbuffer[1]);
1728 acb->firm_numbers_queue = readl(&reg->message_rwbuffer[2]);
1729 acb->firm_sdram_size = readl(&reg->message_rwbuffer[3]);
1730 acb->firm_hd_channels = readl(&reg->message_rwbuffer[4]);
1731 }
1732
1733 static void arcmsr_get_hbb_config(struct AdapterControlBlock *acb)
1734 {
1735 struct MessageUnit_B *reg = acb->pmuB;
1736 uint32_t __iomem *lrwbuffer = reg->msgcode_rwbuffer_reg;
1737 char *acb_firm_model = acb->firm_model;
1738 char *acb_firm_version = acb->firm_version;
1739 char __iomem *iop_firm_model = (char __iomem *)(&lrwbuffer[15]);
1740 /*firm_model,15,60-67*/
1741 char __iomem *iop_firm_version = (char __iomem *)(&lrwbuffer[17]);
1742 /*firm_version,17,68-83*/
1743 int count;
1744
1745 writel(ARCMSR_MESSAGE_GET_CONFIG, reg->drv2iop_doorbell_reg);
1746 if (arcmsr_hbb_wait_msgint_ready(acb)) {
1747 printk(KERN_NOTICE "arcmsr%d: wait 'get adapter firmware \
1748 miscellaneous data' timeout \n", acb->host->host_no);
1749 }
1750
1751 count = 8;
1752 while (count)
1753 {
1754 *acb_firm_model = readb(iop_firm_model);
1755 acb_firm_model++;
1756 iop_firm_model++;
1757 count--;
1758 }
1759
1760 count = 16;
1761 while (count)
1762 {
1763 *acb_firm_version = readb(iop_firm_version);
1764 acb_firm_version++;
1765 iop_firm_version++;
1766 count--;
1767 }
1768
1769 printk(KERN_INFO "ARECA RAID ADAPTER%d: FIRMWARE VERSION %s \n",
1770 acb->host->host_no,
1771 acb->firm_version);
1772
1773 lrwbuffer++;
1774 acb->firm_request_len = readl(lrwbuffer++);
1775 /*firm_request_len,1,04-07*/
1776 acb->firm_numbers_queue = readl(lrwbuffer++);
1777 /*firm_numbers_queue,2,08-11*/
1778 acb->firm_sdram_size = readl(lrwbuffer++);
1779 /*firm_sdram_size,3,12-15*/
1780 acb->firm_hd_channels = readl(lrwbuffer);
1781 /*firm_ide_channels,4,16-19*/
1782 }
1783
1784 static void arcmsr_get_firmware_spec(struct AdapterControlBlock *acb)
1785 {
1786 switch (acb->adapter_type) {
1787 case ACB_ADAPTER_TYPE_A: {
1788 arcmsr_get_hba_config(acb);
1789 }
1790 break;
1791
1792 case ACB_ADAPTER_TYPE_B: {
1793 arcmsr_get_hbb_config(acb);
1794 }
1795 break;
1796 }
1797 }
1798
1799 static void arcmsr_polling_hba_ccbdone(struct AdapterControlBlock *acb,
1800 struct CommandControlBlock *poll_ccb)
1801 {
1802 struct MessageUnit_A __iomem *reg = acb->pmuA;
1803 struct CommandControlBlock *ccb;
1804 uint32_t flag_ccb, outbound_intstatus, poll_ccb_done = 0, poll_count = 0;
1805
1806 polling_hba_ccb_retry:
1807 poll_count++;
1808 outbound_intstatus = readl(&reg->outbound_intstatus) & acb->outbound_int_enable;
1809 writel(outbound_intstatus, &reg->outbound_intstatus);/*clear interrupt*/
1810 while (1) {
1811 if ((flag_ccb = readl(&reg->outbound_queueport)) == 0xFFFFFFFF) {
1812 if (poll_ccb_done)
1813 break;
1814 else {
1815 msleep(25);
1816 if (poll_count > 100)
1817 break;
1818 goto polling_hba_ccb_retry;
1819 }
1820 }
1821 ccb = (struct CommandControlBlock *)(acb->vir2phy_offset + (flag_ccb << 5));
1822 poll_ccb_done = (ccb == poll_ccb) ? 1:0;
1823 if ((ccb->acb != acb) || (ccb->startdone != ARCMSR_CCB_START)) {
1824 if ((ccb->startdone == ARCMSR_CCB_ABORTED) || (ccb == poll_ccb)) {
1825 printk(KERN_NOTICE "arcmsr%d: scsi id = %d lun = %d ccb = '0x%p'"
1826 " poll command abort successfully \n"
1827 , acb->host->host_no
1828 , ccb->pcmd->device->id
1829 , ccb->pcmd->device->lun
1830 , ccb);
1831 ccb->pcmd->result = DID_ABORT << 16;
1832 arcmsr_ccb_complete(ccb, 1);
1833 poll_ccb_done = 1;
1834 continue;
1835 }
1836 printk(KERN_NOTICE "arcmsr%d: polling get an illegal ccb"
1837 " command done ccb = '0x%p'"
1838 "ccboutstandingcount = %d \n"
1839 , acb->host->host_no
1840 , ccb
1841 , atomic_read(&acb->ccboutstandingcount));
1842 continue;
1843 }
1844 arcmsr_report_ccb_state(acb, ccb, flag_ccb);
1845 }
1846 }
1847
1848 static void arcmsr_polling_hbb_ccbdone(struct AdapterControlBlock *acb, \
1849 struct CommandControlBlock *poll_ccb)
1850 {
1851 struct MessageUnit_B *reg = acb->pmuB;
1852 struct CommandControlBlock *ccb;
1853 uint32_t flag_ccb, poll_ccb_done = 0, poll_count = 0;
1854 int index;
1855
1856 polling_hbb_ccb_retry:
1857 poll_count++;
1858 /* clear doorbell interrupt */
1859 writel(ARCMSR_DOORBELL_INT_CLEAR_PATTERN, reg->iop2drv_doorbell_reg);
1860 while (1) {
1861 index = reg->doneq_index;
1862 if ((flag_ccb = readl(&reg->done_qbuffer[index])) == 0) {
1863 if (poll_ccb_done)
1864 break;
1865 else {
1866 msleep(25);
1867 if (poll_count > 100)
1868 break;
1869 goto polling_hbb_ccb_retry;
1870 }
1871 }
1872 writel(0, &reg->done_qbuffer[index]);
1873 index++;
1874 /*if last index number set it to 0 */
1875 index %= ARCMSR_MAX_HBB_POSTQUEUE;
1876 reg->doneq_index = index;
1877 /* check ifcommand done with no error*/
1878 ccb = (struct CommandControlBlock *)\
1879 (acb->vir2phy_offset + (flag_ccb << 5));/*frame must be 32 bytes aligned*/
1880 poll_ccb_done = (ccb == poll_ccb) ? 1:0;
1881 if ((ccb->acb != acb) || (ccb->startdone != ARCMSR_CCB_START)) {
1882 if (ccb->startdone == ARCMSR_CCB_ABORTED) {
1883 printk(KERN_NOTICE "arcmsr%d: \
1884 scsi id = %d lun = %d ccb = '0x%p' poll command abort successfully \n"
1885 ,acb->host->host_no
1886 ,ccb->pcmd->device->id
1887 ,ccb->pcmd->device->lun
1888 ,ccb);
1889 ccb->pcmd->result = DID_ABORT << 16;
1890 arcmsr_ccb_complete(ccb, 1);
1891 continue;
1892 }
1893 printk(KERN_NOTICE "arcmsr%d: polling get an illegal ccb"
1894 " command done ccb = '0x%p'"
1895 "ccboutstandingcount = %d \n"
1896 , acb->host->host_no
1897 , ccb
1898 , atomic_read(&acb->ccboutstandingcount));
1899 continue;
1900 }
1901 arcmsr_report_ccb_state(acb, ccb, flag_ccb);
1902 } /*drain reply FIFO*/
1903 }
1904
1905 static void arcmsr_polling_ccbdone(struct AdapterControlBlock *acb, \
1906 struct CommandControlBlock *poll_ccb)
1907 {
1908 switch (acb->adapter_type) {
1909
1910 case ACB_ADAPTER_TYPE_A: {
1911 arcmsr_polling_hba_ccbdone(acb,poll_ccb);
1912 }
1913 break;
1914
1915 case ACB_ADAPTER_TYPE_B: {
1916 arcmsr_polling_hbb_ccbdone(acb,poll_ccb);
1917 }
1918 }
1919 }
1920
1921 static int arcmsr_iop_confirm(struct AdapterControlBlock *acb)
1922 {
1923 uint32_t cdb_phyaddr, ccb_phyaddr_hi32;
1924 dma_addr_t dma_coherent_handle;
1925 /*
1926 ********************************************************************
1927 ** here we need to tell iop 331 our freeccb.HighPart
1928 ** if freeccb.HighPart is not zero
1929 ********************************************************************
1930 */
1931 dma_coherent_handle = acb->dma_coherent_handle;
1932 cdb_phyaddr = (uint32_t)(dma_coherent_handle);
1933 ccb_phyaddr_hi32 = (uint32_t)((cdb_phyaddr >> 16) >> 16);
1934 /*
1935 ***********************************************************************
1936 ** if adapter type B, set window of "post command Q"
1937 ***********************************************************************
1938 */
1939 switch (acb->adapter_type) {
1940
1941 case ACB_ADAPTER_TYPE_A: {
1942 if (ccb_phyaddr_hi32 != 0) {
1943 struct MessageUnit_A __iomem *reg = acb->pmuA;
1944 uint32_t intmask_org;
1945 intmask_org = arcmsr_disable_outbound_ints(acb);
1946 writel(ARCMSR_SIGNATURE_SET_CONFIG, \
1947 &reg->message_rwbuffer[0]);
1948 writel(ccb_phyaddr_hi32, &reg->message_rwbuffer[1]);
1949 writel(ARCMSR_INBOUND_MESG0_SET_CONFIG, \
1950 &reg->inbound_msgaddr0);
1951 if (arcmsr_hba_wait_msgint_ready(acb)) {
1952 printk(KERN_NOTICE "arcmsr%d: ""set ccb high \
1953 part physical address timeout\n",
1954 acb->host->host_no);
1955 return 1;
1956 }
1957 arcmsr_enable_outbound_ints(acb, intmask_org);
1958 }
1959 }
1960 break;
1961
1962 case ACB_ADAPTER_TYPE_B: {
1963 unsigned long post_queue_phyaddr;
1964 uint32_t __iomem *rwbuffer;
1965
1966 struct MessageUnit_B *reg = acb->pmuB;
1967 uint32_t intmask_org;
1968 intmask_org = arcmsr_disable_outbound_ints(acb);
1969 reg->postq_index = 0;
1970 reg->doneq_index = 0;
1971 writel(ARCMSR_MESSAGE_SET_POST_WINDOW, reg->drv2iop_doorbell_reg);
1972 if (arcmsr_hbb_wait_msgint_ready(acb)) {
1973 printk(KERN_NOTICE "arcmsr%d:can not set diver mode\n", \
1974 acb->host->host_no);
1975 return 1;
1976 }
1977 post_queue_phyaddr = cdb_phyaddr + ARCMSR_MAX_FREECCB_NUM * \
1978 sizeof(struct CommandControlBlock) + offsetof(struct MessageUnit_B, post_qbuffer) ;
1979 rwbuffer = reg->msgcode_rwbuffer_reg;
1980 /* driver "set config" signature */
1981 writel(ARCMSR_SIGNATURE_SET_CONFIG, rwbuffer++);
1982 /* normal should be zero */
1983 writel(ccb_phyaddr_hi32, rwbuffer++);
1984 /* postQ size (256 + 8)*4 */
1985 writel(post_queue_phyaddr, rwbuffer++);
1986 /* doneQ size (256 + 8)*4 */
1987 writel(post_queue_phyaddr + 1056, rwbuffer++);
1988 /* ccb maxQ size must be --> [(256 + 8)*4]*/
1989 writel(1056, rwbuffer);
1990
1991 writel(ARCMSR_MESSAGE_SET_CONFIG, reg->drv2iop_doorbell_reg);
1992 if (arcmsr_hbb_wait_msgint_ready(acb)) {
1993 printk(KERN_NOTICE "arcmsr%d: 'set command Q window' \
1994 timeout \n",acb->host->host_no);
1995 return 1;
1996 }
1997
1998 writel(ARCMSR_MESSAGE_START_DRIVER_MODE, reg->drv2iop_doorbell_reg);
1999 if (arcmsr_hbb_wait_msgint_ready(acb)) {
2000 printk(KERN_NOTICE "arcmsr%d: 'can not set diver mode \n"\
2001 ,acb->host->host_no);
2002 return 1;
2003 }
2004 arcmsr_enable_outbound_ints(acb, intmask_org);
2005 }
2006 break;
2007 }
2008 return 0;
2009 }
2010
2011 static void arcmsr_wait_firmware_ready(struct AdapterControlBlock *acb)
2012 {
2013 uint32_t firmware_state = 0;
2014
2015 switch (acb->adapter_type) {
2016
2017 case ACB_ADAPTER_TYPE_A: {
2018 struct MessageUnit_A __iomem *reg = acb->pmuA;
2019 do {
2020 firmware_state = readl(&reg->outbound_msgaddr1);
2021 } while ((firmware_state & ARCMSR_OUTBOUND_MESG1_FIRMWARE_OK) == 0);
2022 }
2023 break;
2024
2025 case ACB_ADAPTER_TYPE_B: {
2026 struct MessageUnit_B *reg = acb->pmuB;
2027 do {
2028 firmware_state = readl(reg->iop2drv_doorbell_reg);
2029 } while ((firmware_state & ARCMSR_MESSAGE_FIRMWARE_OK) == 0);
2030 }
2031 break;
2032 }
2033 }
2034
2035 static void arcmsr_start_hba_bgrb(struct AdapterControlBlock *acb)
2036 {
2037 struct MessageUnit_A __iomem *reg = acb->pmuA;
2038 acb->acb_flags |= ACB_F_MSG_START_BGRB;
2039 writel(ARCMSR_INBOUND_MESG0_START_BGRB, &reg->inbound_msgaddr0);
2040 if (arcmsr_hba_wait_msgint_ready(acb)) {
2041 printk(KERN_NOTICE "arcmsr%d: wait 'start adapter background \
2042 rebulid' timeout \n", acb->host->host_no);
2043 }
2044 }
2045
2046 static void arcmsr_start_hbb_bgrb(struct AdapterControlBlock *acb)
2047 {
2048 struct MessageUnit_B *reg = acb->pmuB;
2049 acb->acb_flags |= ACB_F_MSG_START_BGRB;
2050 writel(ARCMSR_MESSAGE_START_BGRB, reg->drv2iop_doorbell_reg);
2051 if (arcmsr_hbb_wait_msgint_ready(acb)) {
2052 printk(KERN_NOTICE "arcmsr%d: wait 'start adapter background \
2053 rebulid' timeout \n",acb->host->host_no);
2054 }
2055 }
2056
2057 static void arcmsr_start_adapter_bgrb(struct AdapterControlBlock *acb)
2058 {
2059 switch (acb->adapter_type) {
2060 case ACB_ADAPTER_TYPE_A:
2061 arcmsr_start_hba_bgrb(acb);
2062 break;
2063 case ACB_ADAPTER_TYPE_B:
2064 arcmsr_start_hbb_bgrb(acb);
2065 break;
2066 }
2067 }
2068
2069 static void arcmsr_clear_doorbell_queue_buffer(struct AdapterControlBlock *acb)
2070 {
2071 switch (acb->adapter_type) {
2072 case ACB_ADAPTER_TYPE_A: {
2073 struct MessageUnit_A __iomem *reg = acb->pmuA;
2074 uint32_t outbound_doorbell;
2075 /* empty doorbell Qbuffer if door bell ringed */
2076 outbound_doorbell = readl(&reg->outbound_doorbell);
2077 /*clear doorbell interrupt */
2078 writel(outbound_doorbell, &reg->outbound_doorbell);
2079 writel(ARCMSR_INBOUND_DRIVER_DATA_READ_OK, &reg->inbound_doorbell);
2080 }
2081 break;
2082
2083 case ACB_ADAPTER_TYPE_B: {
2084 struct MessageUnit_B *reg = acb->pmuB;
2085 /*clear interrupt and message state*/
2086 writel(ARCMSR_MESSAGE_INT_CLEAR_PATTERN, reg->iop2drv_doorbell_reg);
2087 writel(ARCMSR_DRV2IOP_DATA_READ_OK, reg->drv2iop_doorbell_reg);
2088 /* let IOP know data has been read */
2089 }
2090 break;
2091 }
2092 }
2093
2094 static void arcmsr_iop_init(struct AdapterControlBlock *acb)
2095 {
2096 uint32_t intmask_org;
2097
2098 arcmsr_wait_firmware_ready(acb);
2099 arcmsr_iop_confirm(acb);
2100 /* disable all outbound interrupt */
2101 intmask_org = arcmsr_disable_outbound_ints(acb);
2102 arcmsr_get_firmware_spec(acb);
2103 /*start background rebuild*/
2104 arcmsr_start_adapter_bgrb(acb);
2105 /* empty doorbell Qbuffer if door bell ringed */
2106 arcmsr_clear_doorbell_queue_buffer(acb);
2107 /* enable outbound Post Queue,outbound doorbell Interrupt */
2108 arcmsr_enable_outbound_ints(acb, intmask_org);
2109 acb->acb_flags |= ACB_F_IOP_INITED;
2110 }
2111
2112 static void arcmsr_iop_reset(struct AdapterControlBlock *acb)
2113 {
2114 struct CommandControlBlock *ccb;
2115 uint32_t intmask_org;
2116 int i = 0;
2117
2118 if (atomic_read(&acb->ccboutstandingcount) != 0) {
2119 /* talk to iop 331 outstanding command aborted */
2120 arcmsr_abort_allcmd(acb);
2121
2122 /* wait for 3 sec for all command aborted*/
2123 ssleep(3);
2124
2125 /* disable all outbound interrupt */
2126 intmask_org = arcmsr_disable_outbound_ints(acb);
2127 /* clear all outbound posted Q */
2128 arcmsr_done4abort_postqueue(acb);
2129 for (i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++) {
2130 ccb = acb->pccb_pool[i];
2131 if (ccb->startdone == ARCMSR_CCB_START) {
2132 ccb->startdone = ARCMSR_CCB_ABORTED;
2133 arcmsr_ccb_complete(ccb, 1);
2134 }
2135 }
2136 /* enable all outbound interrupt */
2137 arcmsr_enable_outbound_ints(acb, intmask_org);
2138 }
2139 }
2140
2141 static int arcmsr_bus_reset(struct scsi_cmnd *cmd)
2142 {
2143 struct AdapterControlBlock *acb =
2144 (struct AdapterControlBlock *)cmd->device->host->hostdata;
2145 int i;
2146
2147 acb->num_resets++;
2148 acb->acb_flags |= ACB_F_BUS_RESET;
2149 for (i = 0; i < 400; i++) {
2150 if (!atomic_read(&acb->ccboutstandingcount))
2151 break;
2152 arcmsr_interrupt(acb);/* FIXME: need spinlock */
2153 msleep(25);
2154 }
2155 arcmsr_iop_reset(acb);
2156 acb->acb_flags &= ~ACB_F_BUS_RESET;
2157 return SUCCESS;
2158 }
2159
2160 static void arcmsr_abort_one_cmd(struct AdapterControlBlock *acb,
2161 struct CommandControlBlock *ccb)
2162 {
2163 u32 intmask;
2164
2165 ccb->startdone = ARCMSR_CCB_ABORTED;
2166
2167 /*
2168 ** Wait for 3 sec for all command done.
2169 */
2170 ssleep(3);
2171
2172 intmask = arcmsr_disable_outbound_ints(acb);
2173 arcmsr_polling_ccbdone(acb, ccb);
2174 arcmsr_enable_outbound_ints(acb, intmask);
2175 }
2176
2177 static int arcmsr_abort(struct scsi_cmnd *cmd)
2178 {
2179 struct AdapterControlBlock *acb =
2180 (struct AdapterControlBlock *)cmd->device->host->hostdata;
2181 int i = 0;
2182
2183 printk(KERN_NOTICE
2184 "arcmsr%d: abort device command of scsi id = %d lun = %d \n",
2185 acb->host->host_no, cmd->device->id, cmd->device->lun);
2186 acb->num_aborts++;
2187 /*
2188 ************************************************
2189 ** the all interrupt service routine is locked
2190 ** we need to handle it as soon as possible and exit
2191 ************************************************
2192 */
2193 if (!atomic_read(&acb->ccboutstandingcount))
2194 return SUCCESS;
2195
2196 for (i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++) {
2197 struct CommandControlBlock *ccb = acb->pccb_pool[i];
2198 if (ccb->startdone == ARCMSR_CCB_START && ccb->pcmd == cmd) {
2199 arcmsr_abort_one_cmd(acb, ccb);
2200 break;
2201 }
2202 }
2203
2204 return SUCCESS;
2205 }
2206
2207 static const char *arcmsr_info(struct Scsi_Host *host)
2208 {
2209 struct AdapterControlBlock *acb =
2210 (struct AdapterControlBlock *) host->hostdata;
2211 static char buf[256];
2212 char *type;
2213 int raid6 = 1;
2214
2215 switch (acb->pdev->device) {
2216 case PCI_DEVICE_ID_ARECA_1110:
2217 case PCI_DEVICE_ID_ARECA_1200:
2218 case PCI_DEVICE_ID_ARECA_1202:
2219 case PCI_DEVICE_ID_ARECA_1210:
2220 raid6 = 0;
2221 /*FALLTHRU*/
2222 case PCI_DEVICE_ID_ARECA_1120:
2223 case PCI_DEVICE_ID_ARECA_1130:
2224 case PCI_DEVICE_ID_ARECA_1160:
2225 case PCI_DEVICE_ID_ARECA_1170:
2226 case PCI_DEVICE_ID_ARECA_1201:
2227 case PCI_DEVICE_ID_ARECA_1220:
2228 case PCI_DEVICE_ID_ARECA_1230:
2229 case PCI_DEVICE_ID_ARECA_1260:
2230 case PCI_DEVICE_ID_ARECA_1270:
2231 case PCI_DEVICE_ID_ARECA_1280:
2232 type = "SATA";
2233 break;
2234 case PCI_DEVICE_ID_ARECA_1380:
2235 case PCI_DEVICE_ID_ARECA_1381:
2236 case PCI_DEVICE_ID_ARECA_1680:
2237 case PCI_DEVICE_ID_ARECA_1681:
2238 type = "SAS";
2239 break;
2240 default:
2241 type = "X-TYPE";
2242 break;
2243 }
2244 sprintf(buf, "Areca %s Host Adapter RAID Controller%s\n %s",
2245 type, raid6 ? "( RAID6 capable)" : "",
2246 ARCMSR_DRIVER_VERSION);
2247 return buf;
2248 }
2249 #ifdef CONFIG_SCSI_ARCMSR_AER
2250 static pci_ers_result_t arcmsr_pci_slot_reset(struct pci_dev *pdev)
2251 {
2252 struct Scsi_Host *host = pci_get_drvdata(pdev);
2253 struct AdapterControlBlock *acb =
2254 (struct AdapterControlBlock *) host->hostdata;
2255 uint32_t intmask_org;
2256 int i, j;
2257
2258 if (pci_enable_device(pdev)) {
2259 return PCI_ERS_RESULT_DISCONNECT;
2260 }
2261 pci_set_master(pdev);
2262 intmask_org = arcmsr_disable_outbound_ints(acb);
2263 acb->acb_flags |= (ACB_F_MESSAGE_WQBUFFER_CLEARED |
2264 ACB_F_MESSAGE_RQBUFFER_CLEARED |
2265 ACB_F_MESSAGE_WQBUFFER_READED);
2266 acb->acb_flags &= ~ACB_F_SCSISTOPADAPTER;
2267 for (i = 0; i < ARCMSR_MAX_TARGETID; i++)
2268 for (j = 0; j < ARCMSR_MAX_TARGETLUN; j++)
2269 acb->devstate[i][j] = ARECA_RAID_GONE;
2270
2271 arcmsr_wait_firmware_ready(acb);
2272 arcmsr_iop_confirm(acb);
2273 /* disable all outbound interrupt */
2274 arcmsr_get_firmware_spec(acb);
2275 /*start background rebuild*/
2276 arcmsr_start_adapter_bgrb(acb);
2277 /* empty doorbell Qbuffer if door bell ringed */
2278 arcmsr_clear_doorbell_queue_buffer(acb);
2279 /* enable outbound Post Queue,outbound doorbell Interrupt */
2280 arcmsr_enable_outbound_ints(acb, intmask_org);
2281 acb->acb_flags |= ACB_F_IOP_INITED;
2282
2283 pci_enable_pcie_error_reporting(pdev);
2284 return PCI_ERS_RESULT_RECOVERED;
2285 }
2286
2287 static void arcmsr_pci_ers_need_reset_forepart(struct pci_dev *pdev)
2288 {
2289 struct Scsi_Host *host = pci_get_drvdata(pdev);
2290 struct AdapterControlBlock *acb = (struct AdapterControlBlock *)host->hostdata;
2291 struct CommandControlBlock *ccb;
2292 uint32_t intmask_org;
2293 int i = 0;
2294
2295 if (atomic_read(&acb->ccboutstandingcount) != 0) {
2296 /* talk to iop 331 outstanding command aborted */
2297 arcmsr_abort_allcmd(acb);
2298 /* wait for 3 sec for all command aborted*/
2299 ssleep(3);
2300 /* disable all outbound interrupt */
2301 intmask_org = arcmsr_disable_outbound_ints(acb);
2302 /* clear all outbound posted Q */
2303 arcmsr_done4abort_postqueue(acb);
2304 for (i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++) {
2305 ccb = acb->pccb_pool[i];
2306 if (ccb->startdone == ARCMSR_CCB_START) {
2307 ccb->startdone = ARCMSR_CCB_ABORTED;
2308 arcmsr_ccb_complete(ccb, 1);
2309 }
2310 }
2311 /* enable all outbound interrupt */
2312 arcmsr_enable_outbound_ints(acb, intmask_org);
2313 }
2314 pci_disable_device(pdev);
2315 }
2316
2317 static void arcmsr_pci_ers_disconnect_forepart(struct pci_dev *pdev)
2318 {
2319 struct Scsi_Host *host = pci_get_drvdata(pdev);
2320 struct AdapterControlBlock *acb = \
2321 (struct AdapterControlBlock *)host->hostdata;
2322
2323 arcmsr_stop_adapter_bgrb(acb);
2324 arcmsr_flush_adapter_cache(acb);
2325 }
2326
2327 static pci_ers_result_t arcmsr_pci_error_detected(struct pci_dev *pdev,
2328 pci_channel_state_t state)
2329 {
2330 switch (state) {
2331 case pci_channel_io_frozen:
2332 arcmsr_pci_ers_need_reset_forepart(pdev);
2333 return PCI_ERS_RESULT_NEED_RESET;
2334 case pci_channel_io_perm_failure:
2335 arcmsr_pci_ers_disconnect_forepart(pdev);
2336 return PCI_ERS_RESULT_DISCONNECT;
2337 break;
2338 default:
2339 return PCI_ERS_RESULT_NEED_RESET;
2340 }
2341 }
2342 #endif
WRT350N Kernel Patches