include/asm-x86_64/smp.h

   1 #ifndef __ASM_SMP_H
   2 #define __ASM_SMP_H
   3
   4 /*
   5  * We need the APIC definitions automatically as part of 'smp.h'
   6  */
   7 #include <linux/threads.h>
   8 #include <linux/cpumask.h>
   9 #include <linux/bitops.h>
  10 #include <linux/init.h>
  11 extern int disable_apic;
  12
  13 #include <asm/mpspec.h>
  14 #include <asm/apic.h>
  15 #include <asm/io_apic.h>
  16 #include <asm/thread_info.h>
  17
  18 #ifdef CONFIG_SMP
  19
  20 #include <asm/pda.h>
  21
  22 struct pt_regs;
  23
  24 extern cpumask_t cpu_present_mask;
  25 extern cpumask_t cpu_possible_map;
  26 extern cpumask_t cpu_online_map;
  27 extern cpumask_t cpu_callout_map;
  28 extern cpumask_t cpu_initialized;
  29
  30 /*
  31  * Private routines/data
  32  */
  33
  34 extern void smp_alloc_memory(void);
  35 extern volatile unsigned long smp_invalidate_needed;
  36 extern void lock_ipi_call_lock(void);
  37 extern void unlock_ipi_call_lock(void);
  38 extern int smp_num_siblings;
  39 extern void smp_send_reschedule(int cpu);
  40
  41 extern cpumask_t cpu_sibling_map[NR_CPUS];
  42 extern cpumask_t cpu_core_map[NR_CPUS];
  43 extern u8 cpu_llc_id[NR_CPUS];
  44
  45 #define SMP_TRAMPOLINE_BASE 0x6000
  46
  47 /*
  48  * On x86 all CPUs are mapped 1:1 to the APIC space.
  49  * This simplifies scheduling and IPI sending and
  50  * compresses data structures.
  51  */
  52
  53 static inline int num_booting_cpus(void)
  54 {
  55         return cpus_weight(cpu_callout_map);
  56 }
  57
  58 #define raw_smp_processor_id() read_pda(cpunumber)
  59
  60 extern int __cpu_disable(void);
  61 extern void __cpu_die(unsigned int cpu);
  62 extern void prefill_possible_map(void);
  63 extern unsigned num_processors;
  64 extern unsigned __cpuinitdata disabled_cpus;
  65
  66 #define NO_PROC_ID              0xFF            /* No processor magic marker */
  67
  68 #endif /* CONFIG_SMP */
  69
  70 static inline int hard_smp_processor_id(void)
  71 {
  72         /* we don't want to mark this access volatile - bad code generation */
  73         return GET_APIC_ID(*(unsigned int *)(APIC_BASE+APIC_ID));
  74 }
  75
  76 /*
  77  * Some lowlevel functions might want to know about
  78  * the real APIC ID <-> CPU # mapping.
  79  */
  80 extern u8 x86_cpu_to_apicid[NR_CPUS];   /* physical ID */
  81 extern u8 x86_cpu_to_log_apicid[NR_CPUS];
  82 extern u8 bios_cpu_apicid[];
  83
  84 static inline int cpu_present_to_apicid(int mps_cpu)
  85 {
  86         if (mps_cpu < NR_CPUS)
  87                 return (int)bios_cpu_apicid[mps_cpu];
  88         else
  89                 return BAD_APICID;
  90 }
  91
  92 #ifndef CONFIG_SMP
  93 #define stack_smp_processor_id() 0
  94 #define cpu_logical_map(x) (x)
  95 #else
  96 #include <asm/thread_info.h>
  97 #define stack_smp_processor_id() \
  98 ({                                                              \
  99         struct thread_info *ti;                                 \
 100         __asm__("andq %%rsp,%0; ":"=r" (ti) : "0" (CURRENT_MASK));      \
 101         ti->cpu;                                                \
 102 })
 103 #endif
 104
 105 static __inline int logical_smp_processor_id(void)
 106 {
 107         /* we don't want to mark this access volatile - bad code generation */
 108         return GET_APIC_LOGICAL_ID(*(unsigned long *)(APIC_BASE+APIC_LDR));
 109 }
 110
 111 #ifdef CONFIG_SMP
 112 #define cpu_physical_id(cpu)            x86_cpu_to_apicid[cpu]
 113 #else
 114 #define cpu_physical_id(cpu)            boot_cpu_id
 115 #endif /* !CONFIG_SMP */
 116 #endif
 117