arch/x86/kernel/early-quirks.c

   1 /* Various workarounds for chipset bugs.
   2    This code runs very early and can't use the regular PCI subsystem
   3    The entries are keyed to PCI bridges which usually identify chipsets
   4    uniquely.
   5    This is only for whole classes of chipsets with specific problems which
   6    need early invasive action (e.g. before the timers are initialized).
   7    Most PCI device specific workarounds can be done later and should be
   8    in standard PCI quirks
   9    Mainboard specific bugs should be handled by DMI entries.
  10    CPU specific bugs in setup.c */
  11
  12 #include <linux/pci.h>
  13 #include <linux/acpi.h>
  14 #include <linux/pci_ids.h>
  15 #include <asm/pci-direct.h>
  16 #include <asm/dma.h>
  17 #include <asm/io_apic.h>
  18 #include <asm/apic.h>
  19
  20 #ifdef CONFIG_GART_IOMMU
  21 #include <asm/gart.h>
  22 #endif
  23
  24 static void __init fix_hypertransport_config(int num, int slot, int func)
  25 {
  26         u32 htcfg;
  27         /*
  28          * we found a hypertransport bus
  29          * make sure that we are broadcasting
  30          * interrupts to all cpus on the ht bus
  31          * if we're using extended apic ids
  32          */
  33         htcfg = read_pci_config(num, slot, func, 0x68);
  34         if (htcfg & (1 << 18)) {
  35                 printk(KERN_INFO "Detected use of extended apic ids "
  36                                  "on hypertransport bus\n");
  37                 if ((htcfg & (1 << 17)) == 0) {
  38                         printk(KERN_INFO "Enabling hypertransport extended "
  39                                          "apic interrupt broadcast\n");
  40                         printk(KERN_INFO "Note this is a bios bug, "
  41                                          "please contact your hw vendor\n");
  42                         htcfg |= (1 << 17);
  43                         write_pci_config(num, slot, func, 0x68, htcfg);
  44                 }
  45         }
  46
  47
  48 }
  49
  50 static void __init via_bugs(int  num, int slot, int func)
  51 {
  52 #ifdef CONFIG_GART_IOMMU
  53         if ((end_pfn > MAX_DMA32_PFN ||  force_iommu) &&
  54             !gart_iommu_aperture_allowed) {
  55                 printk(KERN_INFO
  56                        "Looks like a VIA chipset. Disabling IOMMU."
  57                        " Override with iommu=allowed\n");
  58                 gart_iommu_aperture_disabled = 1;
  59         }
  60 #endif
  61 }
  62
  63 #ifdef CONFIG_ACPI
  64 #ifdef CONFIG_X86_IO_APIC
  65
  66 static int __init nvidia_hpet_check(struct acpi_table_header *header)
  67 {
  68         return 0;
  69 }
  70 #endif /* CONFIG_X86_IO_APIC */
  71 #endif /* CONFIG_ACPI */
  72
  73 static void __init nvidia_bugs(int num, int slot, int func)
  74 {
  75 #ifdef CONFIG_ACPI
  76 #ifdef CONFIG_X86_IO_APIC
  77         /*
  78          * All timer overrides on Nvidia are
  79          * wrong unless HPET is enabled.
  80          * Unfortunately that's not true on many Asus boards.
  81          * We don't know yet how to detect this automatically, but
  82          * at least allow a command line override.
  83          */
  84         if (acpi_use_timer_override)
  85                 return;
  86
  87         if (acpi_table_parse(ACPI_SIG_HPET, nvidia_hpet_check)) {
  88                 acpi_skip_timer_override = 1;
  89                 printk(KERN_INFO "Nvidia board "
  90                        "detected. Ignoring ACPI "
  91                        "timer override.\n");
  92                 printk(KERN_INFO "If you got timer trouble "
  93                         "try acpi_use_timer_override\n");
  94         }
  95 #endif
  96 #endif
  97         /* RED-PEN skip them on mptables too? */
  98
  99 }
 100
 101 static void __init ati_bugs(int num, int slot, int func)
 102 {
 103 #ifdef CONFIG_X86_IO_APIC
 104         if (timer_over_8254 == 1) {
 105                 timer_over_8254 = 0;
 106                 printk(KERN_INFO
 107                 "ATI board detected. Disabling timer routing over 8254.\n");
 108         }
 109 #endif
 110 }
 111
 112 #define QFLAG_APPLY_ONCE        0x1
 113 #define QFLAG_APPLIED           0x2
 114 #define QFLAG_DONE              (QFLAG_APPLY_ONCE|QFLAG_APPLIED)
 115 struct chipset {
 116         u32 vendor;
 117         u32 device;
 118         u32 class;
 119         u32 class_mask;
 120         u32 flags;
 121         void (*f)(int num, int slot, int func);
 122 };
 123
 124 static struct chipset early_qrk[] __initdata = {
 125         { PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID,
 126           PCI_CLASS_BRIDGE_PCI, PCI_ANY_ID, QFLAG_APPLY_ONCE, nvidia_bugs },
 127         { PCI_VENDOR_ID_VIA, PCI_ANY_ID,
 128           PCI_CLASS_BRIDGE_PCI, PCI_ANY_ID, QFLAG_APPLY_ONCE, via_bugs },
 129         { PCI_VENDOR_ID_ATI, PCI_ANY_ID,
 130           PCI_CLASS_BRIDGE_PCI, PCI_ANY_ID, QFLAG_APPLY_ONCE, ati_bugs },
 131         { PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_K8_NB,
 132           PCI_CLASS_BRIDGE_HOST, PCI_ANY_ID, 0, fix_hypertransport_config },
 133         {}
 134 };
 135
 136 static void __init check_dev_quirk(int num, int slot, int func)
 137 {
 138         u16 class;
 139         u16 vendor;
 140         u16 device;
 141         u8 type;
 142         int i;
 143
 144         class = read_pci_config_16(num, slot, func, PCI_CLASS_DEVICE);
 145
 146         if (class == 0xffff)
 147                 return;
 148
 149         vendor = read_pci_config_16(num, slot, func, PCI_VENDOR_ID);
 150
 151         device = read_pci_config_16(num, slot, func, PCI_DEVICE_ID);
 152
 153         for (i = 0; early_qrk[i].f != NULL; i++) {
 154                 if (((early_qrk[i].vendor == PCI_ANY_ID) ||
 155                         (early_qrk[i].vendor == vendor)) &&
 156                         ((early_qrk[i].device == PCI_ANY_ID) ||
 157                         (early_qrk[i].device == device)) &&
 158                         (!((early_qrk[i].class ^ class) &
 159                             early_qrk[i].class_mask))) {
 160                                 if ((early_qrk[i].flags &
 161                                      QFLAG_DONE) != QFLAG_DONE)
 162                                         early_qrk[i].f(num, slot, func);
 163                                 early_qrk[i].flags |= QFLAG_APPLIED;
 164                         }
 165         }
 166
 167         type = read_pci_config_byte(num, slot, func,
 168                                     PCI_HEADER_TYPE);
 169         if (!(type & 0x80))
 170                 return;
 171 }
 172
 173 void __init early_quirks(void)
 174 {
 175         int num, slot, func;
 176
 177         if (!early_pci_allowed())
 178                 return;
 179
 180         /* Poor man's PCI discovery */
 181         for (num = 0; num < 32; num++)
 182                 for (slot = 0; slot < 32; slot++)
 183                         for (func = 0; func < 8; func++)
 184                                 check_dev_quirk(num, slot, func);
 185 }