arch/x86/kernel/mfgpt_32.c

   1 /*
   2  * Driver/API for AMD Geode Multi-Function General Purpose Timers (MFGPT)
   3  *
   4  * Copyright (C) 2006, Advanced Micro Devices, Inc.
   5  * Copyright (C) 2007, Andres Salomon <dilinger@debian.org>
   6  *
   7  * This program is free software; you can redistribute it and/or
   8  * modify it under the terms of version 2 of the GNU General Public License
   9  * as published by the Free Software Foundation.
  10  *
  11  * The MFGPTs are documented in AMD Geode CS5536 Companion Device Data Book.
  12  */
  13
  14 /*
  15  * We are using the 32.768kHz input clock - it's the only one that has the
  16  * ranges we find desirable.  The following table lists the suitable
  17  * divisors and the associated Hz, minimum interval and the maximum interval:
  18  *
  19  *  Divisor   Hz      Min Delta (s)  Max Delta (s)
  20  *   1        32768   .00048828125      2.000
  21  *   2        16384   .0009765625       4.000
  22  *   4         8192   .001953125        8.000
  23  *   8         4096   .00390625        16.000
  24  *   16        2048   .0078125         32.000
  25  *   32        1024   .015625          64.000
  26  *   64         512   .03125          128.000
  27  *  128         256   .0625           256.000
  28  *  256         128   .125            512.000
  29  */
  30
  31 #include <linux/kernel.h>
  32 #include <linux/interrupt.h>
  33 #include <asm/geode.h>
  34
  35 static struct mfgpt_timer_t {
  36         unsigned int avail:1;
  37 } mfgpt_timers[MFGPT_MAX_TIMERS];
  38
  39 /* Selected from the table above */
  40
  41 #define MFGPT_DIVISOR 16
  42 #define MFGPT_SCALE  4     /* divisor = 2^(scale) */
  43 #define MFGPT_HZ  (32768 / MFGPT_DIVISOR)
  44 #define MFGPT_PERIODIC (MFGPT_HZ / HZ)
  45
  46 /* Allow for disabling of MFGPTs */
  47 static int disable;
  48 static int __init mfgpt_disable(char *s)
  49 {
  50         disable = 1;
  51         return 1;
  52 }
  53 __setup("nomfgpt", mfgpt_disable);
  54
  55 /* Reset the MFGPT timers. This is required by some broken BIOSes which already
  56  * do the same and leave the system in an unstable state. TinyBIOS 0.98 is
  57  * affected at least (0.99 is OK with MFGPT workaround left to off).
  58  */
  59 static int __init mfgpt_fix(char *s)
  60 {
  61         u32 val, dummy;
  62
  63         /* The following udocumented bit resets the MFGPT timers */
  64         val = 0xFF; dummy = 0;
  65         wrmsr(0x5140002B, val, dummy);
  66         return 1;
  67 }
  68 __setup("mfgptfix", mfgpt_fix);
  69
  70 /*
  71  * Check whether any MFGPTs are available for the kernel to use.  In most
  72  * cases, firmware that uses AMD's VSA code will claim all timers during
  73  * bootup; we certainly don't want to take them if they're already in use.
  74  * In other cases (such as with VSAless OpenFirmware), the system firmware
  75  * leaves timers available for us to use.
  76  */
  77
  78
  79 static int timers = -1;
  80
  81 static void geode_mfgpt_detect(void)
  82 {
  83         int i;
  84         u16 val;
  85
  86         timers = 0;
  87
  88         if (disable) {
  89                 printk(KERN_INFO "geode-mfgpt:  MFGPT support is disabled\n");
  90                 goto done;
  91         }
  92
  93         if (!geode_get_dev_base(GEODE_DEV_MFGPT)) {
  94                 printk(KERN_INFO "geode-mfgpt:  MFGPT LBAR is not set up\n");
  95                 goto done;
  96         }
  97
  98         for (i = 0; i < MFGPT_MAX_TIMERS; i++) {
  99                 val = geode_mfgpt_read(i, MFGPT_REG_SETUP);
 100                 if (!(val & MFGPT_SETUP_SETUP)) {
 101                         mfgpt_timers[i].avail = 1;
 102                         timers++;
 103                 }
 104         }
 105
 106 done:
 107         printk(KERN_INFO "geode-mfgpt:  %d MFGPT timers available.\n", timers);
 108 }
 109
 110 int geode_mfgpt_toggle_event(int timer, int cmp, int event, int enable)
 111 {
 112         u32 msr, mask, value, dummy;
 113         int shift = (cmp == MFGPT_CMP1) ? 0 : 8;
 114
 115         if (timer < 0 || timer >= MFGPT_MAX_TIMERS)
 116                 return -EIO;
 117
 118         /*
 119          * The register maps for these are described in sections 6.17.1.x of
 120          * the AMD Geode CS5536 Companion Device Data Book.
 121          */
 122         switch (event) {
 123         case MFGPT_EVENT_RESET:
 124                 /*
 125                  * XXX: According to the docs, we cannot reset timers above
 126                  * 6; that is, resets for 7 and 8 will be ignored.  Is this
 127                  * a problem?   -dilinger
 128                  */
 129                 msr = MFGPT_NR_MSR;
 130                 mask = 1 << (timer + 24);
 131                 break;
 132
 133         case MFGPT_EVENT_NMI:
 134                 msr = MFGPT_NR_MSR;
 135                 mask = 1 << (timer + shift);
 136                 break;
 137
 138         case MFGPT_EVENT_IRQ:
 139                 msr = MFGPT_IRQ_MSR;
 140                 mask = 1 << (timer + shift);
 141                 break;
 142
 143         default:
 144                 return -EIO;
 145         }
 146
 147         rdmsr(msr, value, dummy);
 148
 149         if (enable)
 150                 value |= mask;
 151         else
 152                 value &= ~mask;
 153
 154         wrmsr(msr, value, dummy);
 155         return 0;
 156 }
 157
 158 int geode_mfgpt_set_irq(int timer, int cmp, int irq, int enable)
 159 {
 160         u32 val, dummy;
 161         int offset;
 162
 163         if (timer < 0 || timer >= MFGPT_MAX_TIMERS)
 164                 return -EIO;
 165
 166         if (geode_mfgpt_toggle_event(timer, cmp, MFGPT_EVENT_IRQ, enable))
 167                 return -EIO;
 168
 169         rdmsr(MSR_PIC_ZSEL_LOW, val, dummy);
 170
 171         offset = (timer % 4) * 4;
 172
 173         val &= ~((0xF << offset) | (0xF << (offset + 16)));
 174
 175         if (enable) {
 176                 val |= (irq & 0x0F) << (offset);
 177                 val |= (irq & 0x0F) << (offset + 16);
 178         }
 179
 180         wrmsr(MSR_PIC_ZSEL_LOW, val, dummy);
 181         return 0;
 182 }
 183
 184 static int mfgpt_get(int timer)
 185 {
 186         mfgpt_timers[timer].avail = 0;
 187         printk(KERN_INFO "geode-mfgpt:  Registered timer %d\n", timer);
 188         return timer;
 189 }
 190
 191 int geode_mfgpt_alloc_timer(int timer, int domain)
 192 {
 193         int i;
 194
 195         if (timers == -1) {
 196                 /* timers haven't been detected yet */
 197                 geode_mfgpt_detect();
 198         }
 199
 200         if (!timers)
 201                 return -1;
 202
 203         if (timer >= MFGPT_MAX_TIMERS)
 204                 return -1;
 205
 206         if (timer < 0) {
 207                 /* Try to find an available timer */
 208                 for (i = 0; i < MFGPT_MAX_TIMERS; i++) {
 209                         if (mfgpt_timers[i].avail)
 210                                 return mfgpt_get(i);
 211
 212                         if (i == 5 && domain == MFGPT_DOMAIN_WORKING)
 213                                 break;
 214                 }
 215         } else {
 216                 /* If they requested a specific timer, try to honor that */
 217                 if (mfgpt_timers[timer].avail)
 218                         return mfgpt_get(timer);
 219         }
 220
 221         /* No timers available - too bad */
 222         return -1;
 223 }
 224
 225
 226 #ifdef CONFIG_GEODE_MFGPT_TIMER
 227
 228 /*
 229  * The MFPGT timers on the CS5536 provide us with suitable timers to use
 230  * as clock event sources - not as good as a HPET or APIC, but certainly
 231  * better then the PIT.  This isn't a general purpose MFGPT driver, but
 232  * a simplified one designed specifically to act as a clock event source.
 233  * For full details about the MFGPT, please consult the CS5536 data sheet.
 234  */
 235
 236 #include <linux/clocksource.h>
 237 #include <linux/clockchips.h>
 238
 239 static unsigned int mfgpt_tick_mode = CLOCK_EVT_MODE_SHUTDOWN;
 240 static u16 mfgpt_event_clock;
 241
 242 static int irq = 7;
 243 static int __init mfgpt_setup(char *str)
 244 {
 245         get_option(&str, &irq);
 246         return 1;
 247 }
 248 __setup("mfgpt_irq=", mfgpt_setup);
 249
 250 static void mfgpt_disable_timer(u16 clock)
 251 {
 252         /* avoid races by clearing CMP1 and CMP2 unconditionally */
 253         geode_mfgpt_write(clock, MFGPT_REG_SETUP, (u16) ~MFGPT_SETUP_CNTEN |
 254                         MFGPT_SETUP_CMP1 | MFGPT_SETUP_CMP2);
 255 }
 256
 257 static int mfgpt_next_event(unsigned long, struct clock_event_device *);
 258 static void mfgpt_set_mode(enum clock_event_mode, struct clock_event_device *);
 259
 260 static struct clock_event_device mfgpt_clockevent = {
 261         .name = "mfgpt-timer",
 262         .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
 263         .set_mode = mfgpt_set_mode,
 264         .set_next_event = mfgpt_next_event,
 265         .rating = 250,
 266         .cpumask = CPU_MASK_ALL,
 267         .shift = 32
 268 };
 269
 270 static void mfgpt_start_timer(u16 delta)
 271 {
 272         geode_mfgpt_write(mfgpt_event_clock, MFGPT_REG_CMP2, (u16) delta);
 273         geode_mfgpt_write(mfgpt_event_clock, MFGPT_REG_COUNTER, 0);
 274
 275         geode_mfgpt_write(mfgpt_event_clock, MFGPT_REG_SETUP,
 276                           MFGPT_SETUP_CNTEN | MFGPT_SETUP_CMP2);
 277 }
 278
 279 static void mfgpt_set_mode(enum clock_event_mode mode,
 280                            struct clock_event_device *evt)
 281 {
 282         mfgpt_disable_timer(mfgpt_event_clock);
 283
 284         if (mode == CLOCK_EVT_MODE_PERIODIC)
 285                 mfgpt_start_timer(MFGPT_PERIODIC);
 286
 287         mfgpt_tick_mode = mode;
 288 }
 289
 290 static int mfgpt_next_event(unsigned long delta, struct clock_event_device *evt)
 291 {
 292         mfgpt_start_timer(delta);
 293         return 0;
 294 }
 295
 296 static irqreturn_t mfgpt_tick(int irq, void *dev_id)
 297 {
 298         u16 val = geode_mfgpt_read(mfgpt_event_clock, MFGPT_REG_SETUP);
 299
 300         /* See if the interrupt was for us */
 301         if (!(val & (MFGPT_SETUP_SETUP  | MFGPT_SETUP_CMP2 | MFGPT_SETUP_CMP1)))
 302                 return IRQ_NONE;
 303
 304         /* Turn off the clock (and clear the event) */
 305         mfgpt_disable_timer(mfgpt_event_clock);
 306
 307         if (mfgpt_tick_mode == CLOCK_EVT_MODE_SHUTDOWN)
 308                 return IRQ_HANDLED;
 309
 310         /* Clear the counter */
 311         geode_mfgpt_write(mfgpt_event_clock, MFGPT_REG_COUNTER, 0);
 312
 313         /* Restart the clock in periodic mode */
 314
 315         if (mfgpt_tick_mode == CLOCK_EVT_MODE_PERIODIC) {
 316                 geode_mfgpt_write(mfgpt_event_clock, MFGPT_REG_SETUP,
 317                                   MFGPT_SETUP_CNTEN | MFGPT_SETUP_CMP2);
 318         }
 319
 320         mfgpt_clockevent.event_handler(&mfgpt_clockevent);
 321         return IRQ_HANDLED;
 322 }
 323
 324 static struct irqaction mfgptirq  = {
 325         .handler = mfgpt_tick,
 326         .flags = IRQF_DISABLED | IRQF_NOBALANCING,
 327         .mask = CPU_MASK_NONE,
 328         .name = "mfgpt-timer"
 329 };
 330
 331 int __init mfgpt_timer_setup(void)
 332 {
 333         int timer, ret;
 334         u16 val;
 335
 336         timer = geode_mfgpt_alloc_timer(MFGPT_TIMER_ANY, MFGPT_DOMAIN_WORKING);
 337         if (timer < 0) {
 338                 printk(KERN_ERR
 339                        "mfgpt-timer:  Could not allocate a MFPGT timer\n");
 340                 return -ENODEV;
 341         }
 342
 343         mfgpt_event_clock = timer;
 344
 345         /* Set up the IRQ on the MFGPT side */
 346         if (geode_mfgpt_setup_irq(mfgpt_event_clock, MFGPT_CMP2, irq)) {
 347                 printk(KERN_ERR "mfgpt-timer:  Could not set up IRQ %d\n", irq);
 348                 return -EIO;
 349         }
 350
 351         /* And register it with the kernel */
 352         ret = setup_irq(irq, &mfgptirq);
 353
 354         if (ret) {
 355                 printk(KERN_ERR
 356                        "mfgpt-timer:  Unable to set up the interrupt.\n");
 357                 goto err;
 358         }
 359
 360         /* Set the clock scale and enable the event mode for CMP2 */
 361         val = MFGPT_SCALE | (3 << 8);
 362
 363         geode_mfgpt_write(mfgpt_event_clock, MFGPT_REG_SETUP, val);
 364
 365         /* Set up the clock event */
 366         mfgpt_clockevent.mult = div_sc(MFGPT_HZ, NSEC_PER_SEC, 32);
 367         mfgpt_clockevent.min_delta_ns = clockevent_delta2ns(0xF,
 368                         &mfgpt_clockevent);
 369         mfgpt_clockevent.max_delta_ns = clockevent_delta2ns(0xFFFE,
 370                         &mfgpt_clockevent);
 371
 372         printk(KERN_INFO
 373                "mfgpt-timer:  registering the MFGPT timer as a clock event.\n");
 374         clockevents_register_device(&mfgpt_clockevent);
 375
 376         return 0;
 377
 378 err:
 379         geode_mfgpt_release_irq(mfgpt_event_clock, MFGPT_CMP2, irq);
 380         printk(KERN_ERR
 381                "mfgpt-timer:  Unable to set up the MFGPT clock source\n");
 382         return -EIO;
 383 }
 384
 385 #endif