?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
sched: make early bootup sched_clock() use safer
[wrt350n-kernel.git] / drivers / net / cris / eth_v10.c
blob65d0a91032973ed45bc5406c66a601fe3f25f891
1 /*
2 * e100net.c: A network driver for the ETRAX 100LX network controller.
3 *
4 * Copyright (c) 1998-2002 Axis Communications AB.
5 *
6 * The outline of this driver comes from skeleton.c.
7 *
8 */
9
10
11 #include <linux/module.h>
12
13 #include <linux/kernel.h>
14 #include <linux/delay.h>
15 #include <linux/types.h>
16 #include <linux/fcntl.h>
17 #include <linux/interrupt.h>
18 #include <linux/ptrace.h>
19 #include <linux/ioport.h>
20 #include <linux/in.h>
21 #include <linux/slab.h>
22 #include <linux/string.h>
23 #include <linux/spinlock.h>
24 #include <linux/errno.h>
25 #include <linux/init.h>
26 #include <linux/bitops.h>
27
28 #include <linux/if.h>
29 #include <linux/mii.h>
30 #include <linux/netdevice.h>
31 #include <linux/etherdevice.h>
32 #include <linux/skbuff.h>
33 #include <linux/ethtool.h>
34
35 #include <asm/arch/svinto.h>/* DMA and register descriptions */
36 #include <asm/io.h> /* CRIS_LED_* I/O functions */
37 #include <asm/irq.h>
38 #include <asm/dma.h>
39 #include <asm/system.h>
40 #include <asm/ethernet.h>
41 #include <asm/cache.h>
42 #include <asm/arch/io_interface_mux.h>
43
44 //#define ETHDEBUG
45 #define D(x)
46
47 /*
48 * The name of the card. Is used for messages and in the requests for
49 * io regions, irqs and dma channels
50 */
51
52 static const char* cardname = "ETRAX 100LX built-in ethernet controller";
53
54 /* A default ethernet address. Highlevel SW will set the real one later */
55
56 static struct sockaddr default_mac = {
57 0,
58 { 0x00, 0x40, 0x8C, 0xCD, 0x00, 0x00 }
59 };
60
61 /* Information that need to be kept for each board. */
62 struct net_local {
63 struct net_device_stats stats;
64 struct mii_if_info mii_if;
65
66 /* Tx control lock. This protects the transmit buffer ring
67 * state along with the "tx full" state of the driver. This
68 * means all netif_queue flow control actions are protected
69 * by this lock as well.
70 */
71 spinlock_t lock;
72
73 spinlock_t led_lock; /* Protect LED state */
74 spinlock_t transceiver_lock; /* Protect transceiver state. */
75 };
76
77 typedef struct etrax_eth_descr
78 {
79 etrax_dma_descr descr;
80 struct sk_buff* skb;
81 } etrax_eth_descr;
82
83 /* Some transceivers requires special handling */
84 struct transceiver_ops
85 {
86 unsigned int oui;
87 void (*check_speed)(struct net_device* dev);
88 void (*check_duplex)(struct net_device* dev);
89 };
90
91 /* Duplex settings */
92 enum duplex
93 {
94 half,
95 full,
96 autoneg
97 };
98
99 /* Dma descriptors etc. */
100
101 #define MAX_MEDIA_DATA_SIZE 1522
102
103 #define MIN_PACKET_LEN 46
104 #define ETHER_HEAD_LEN 14
105
106 /*
107 ** MDIO constants.
108 */
109 #define MDIO_START 0x1
110 #define MDIO_READ 0x2
111 #define MDIO_WRITE 0x1
112 #define MDIO_PREAMBLE 0xfffffffful
113
114 /* Broadcom specific */
115 #define MDIO_AUX_CTRL_STATUS_REG 0x18
116 #define MDIO_BC_FULL_DUPLEX_IND 0x1
117 #define MDIO_BC_SPEED 0x2
118
119 /* TDK specific */
120 #define MDIO_TDK_DIAGNOSTIC_REG 18
121 #define MDIO_TDK_DIAGNOSTIC_RATE 0x400
122 #define MDIO_TDK_DIAGNOSTIC_DPLX 0x800
123
124 /*Intel LXT972A specific*/
125 #define MDIO_INT_STATUS_REG_2 0x0011
126 #define MDIO_INT_FULL_DUPLEX_IND (1 << 9)
127 #define MDIO_INT_SPEED (1 << 14)
128
129 /* Network flash constants */
130 #define NET_FLASH_TIME (HZ/50) /* 20 ms */
131 #define NET_FLASH_PAUSE (HZ/100) /* 10 ms */
132 #define NET_LINK_UP_CHECK_INTERVAL (2*HZ) /* 2 s */
133 #define NET_DUPLEX_CHECK_INTERVAL (2*HZ) /* 2 s */
134
135 #define NO_NETWORK_ACTIVITY 0
136 #define NETWORK_ACTIVITY 1
137
138 #define NBR_OF_RX_DESC 32
139 #define NBR_OF_TX_DESC 16
140
141 /* Large packets are sent directly to upper layers while small packets are */
142 /* copied (to reduce memory waste). The following constant decides the breakpoint */
143 #define RX_COPYBREAK 256
144
145 /* Due to a chip bug we need to flush the cache when descriptors are returned */
146 /* to the DMA. To decrease performance impact we return descriptors in chunks. */
147 /* The following constant determines the number of descriptors to return. */
148 #define RX_QUEUE_THRESHOLD NBR_OF_RX_DESC/2
149
150 #define GET_BIT(bit,val) (((val) >> (bit)) & 0x01)
151
152 /* Define some macros to access ETRAX 100 registers */
153 #define SETF(var, reg, field, val) var = (var & ~IO_MASK_(reg##_, field##_)) | \
154 IO_FIELD_(reg##_, field##_, val)
155 #define SETS(var, reg, field, val) var = (var & ~IO_MASK_(reg##_, field##_)) | \
156 IO_STATE_(reg##_, field##_, _##val)
157
158 static etrax_eth_descr *myNextRxDesc; /* Points to the next descriptor to
159 to be processed */
160 static etrax_eth_descr *myLastRxDesc; /* The last processed descriptor */
161
162 static etrax_eth_descr RxDescList[NBR_OF_RX_DESC] __attribute__ ((aligned(32)));
163
164 static etrax_eth_descr* myFirstTxDesc; /* First packet not yet sent */
165 static etrax_eth_descr* myLastTxDesc; /* End of send queue */
166 static etrax_eth_descr* myNextTxDesc; /* Next descriptor to use */
167 static etrax_eth_descr TxDescList[NBR_OF_TX_DESC] __attribute__ ((aligned(32)));
168
169 static unsigned int network_rec_config_shadow = 0;
170
171 static unsigned int network_tr_ctrl_shadow = 0;
172
173 /* Network speed indication. */
174 static DEFINE_TIMER(speed_timer, NULL, 0, 0);
175 static DEFINE_TIMER(clear_led_timer, NULL, 0, 0);
176 static int current_speed; /* Speed read from transceiver */
177 static int current_speed_selection; /* Speed selected by user */
178 static unsigned long led_next_time;
179 static int led_active;
180 static int rx_queue_len;
181
182 /* Duplex */
183 static DEFINE_TIMER(duplex_timer, NULL, 0, 0);
184 static int full_duplex;
185 static enum duplex current_duplex;
186
187 /* Index to functions, as function prototypes. */
188
189 static int etrax_ethernet_init(void);
190
191 static int e100_open(struct net_device *dev);
192 static int e100_set_mac_address(struct net_device *dev, void *addr);
193 static int e100_send_packet(struct sk_buff *skb, struct net_device *dev);
194 static irqreturn_t e100rxtx_interrupt(int irq, void *dev_id);
195 static irqreturn_t e100nw_interrupt(int irq, void *dev_id);
196 static void e100_rx(struct net_device *dev);
197 static int e100_close(struct net_device *dev);
198 static int e100_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd);
199 static int e100_set_config(struct net_device* dev, struct ifmap* map);
200 static void e100_tx_timeout(struct net_device *dev);
201 static struct net_device_stats *e100_get_stats(struct net_device *dev);
202 static void set_multicast_list(struct net_device *dev);
203 static void e100_hardware_send_packet(struct net_local* np, char *buf, int length);
204 static void update_rx_stats(struct net_device_stats *);
205 static void update_tx_stats(struct net_device_stats *);
206 static int e100_probe_transceiver(struct net_device* dev);
207
208 static void e100_check_speed(unsigned long priv);
209 static void e100_set_speed(struct net_device* dev, unsigned long speed);
210 static void e100_check_duplex(unsigned long priv);
211 static void e100_set_duplex(struct net_device* dev, enum duplex);
212 static void e100_negotiate(struct net_device* dev);
213
214 static int e100_get_mdio_reg(struct net_device *dev, int phy_id, int location);
215 static void e100_set_mdio_reg(struct net_device *dev, int phy_id, int location, int value);
216
217 static void e100_send_mdio_cmd(unsigned short cmd, int write_cmd);
218 static void e100_send_mdio_bit(unsigned char bit);
219 static unsigned char e100_receive_mdio_bit(void);
220 static void e100_reset_transceiver(struct net_device* net);
221
222 static void e100_clear_network_leds(unsigned long dummy);
223 static void e100_set_network_leds(int active);
224
225 static const struct ethtool_ops e100_ethtool_ops;
226 #if defined(CONFIG_ETRAX_NO_PHY)
227 static void dummy_check_speed(struct net_device* dev);
228 static void dummy_check_duplex(struct net_device* dev);
229 #else
230 static void broadcom_check_speed(struct net_device* dev);
231 static void broadcom_check_duplex(struct net_device* dev);
232 static void tdk_check_speed(struct net_device* dev);
233 static void tdk_check_duplex(struct net_device* dev);
234 static void intel_check_speed(struct net_device* dev);
235 static void intel_check_duplex(struct net_device* dev);
236 static void generic_check_speed(struct net_device* dev);
237 static void generic_check_duplex(struct net_device* dev);
238 #endif
239 #ifdef CONFIG_NET_POLL_CONTROLLER
240 static void e100_netpoll(struct net_device* dev);
241 #endif
242
243 static int autoneg_normal = 1;
244
245 struct transceiver_ops transceivers[] =
246 {
247 #if defined(CONFIG_ETRAX_NO_PHY)
248 {0x0000, dummy_check_speed, dummy_check_duplex} /* Dummy */
249 #else
250 {0x1018, broadcom_check_speed, broadcom_check_duplex}, /* Broadcom */
251 {0xC039, tdk_check_speed, tdk_check_duplex}, /* TDK 2120 */
252 {0x039C, tdk_check_speed, tdk_check_duplex}, /* TDK 2120C */
253 {0x04de, intel_check_speed, intel_check_duplex}, /* Intel LXT972A*/
254 {0x0000, generic_check_speed, generic_check_duplex} /* Generic, must be last */
255 #endif
256 };
257
258 struct transceiver_ops* transceiver = &transceivers[0];
259
260 #define tx_done(dev) (*R_DMA_CH0_CMD == 0)
261
262 /*
263 * Check for a network adaptor of this type, and return '0' if one exists.
264 * If dev->base_addr == 0, probe all likely locations.
265 * If dev->base_addr == 1, always return failure.
266 * If dev->base_addr == 2, allocate space for the device and return success
267 * (detachable devices only).
268 */
269
270 static int __init
271 etrax_ethernet_init(void)
272 {
273 struct net_device *dev;
274 struct net_local* np;
275 int i, err;
276
277 printk(KERN_INFO
278 "ETRAX 100LX 10/100MBit ethernet v2.0 (c) 1998-2007 Axis Communications AB\n");
279
280 if (cris_request_io_interface(if_eth, cardname)) {
281 printk(KERN_CRIT "etrax_ethernet_init failed to get IO interface\n");
282 return -EBUSY;
283 }
284
285 dev = alloc_etherdev(sizeof(struct net_local));
286 if (!dev)
287 return -ENOMEM;
288
289 np = netdev_priv(dev);
290
291 /* we do our own locking */
292 dev->features |= NETIF_F_LLTX;
293
294 dev->base_addr = (unsigned int)R_NETWORK_SA_0; /* just to have something to show */
295
296 /* now setup our etrax specific stuff */
297
298 dev->irq = NETWORK_DMA_RX_IRQ_NBR; /* we really use DMATX as well... */
299 dev->dma = NETWORK_RX_DMA_NBR;
300
301 /* fill in our handlers so the network layer can talk to us in the future */
302
303 dev->open = e100_open;
304 dev->hard_start_xmit = e100_send_packet;
305 dev->stop = e100_close;
306 dev->get_stats = e100_get_stats;
307 dev->set_multicast_list = set_multicast_list;
308 dev->set_mac_address = e100_set_mac_address;
309 dev->ethtool_ops = &e100_ethtool_ops;
310 dev->do_ioctl = e100_ioctl;
311 dev->set_config = e100_set_config;
312 dev->tx_timeout = e100_tx_timeout;
313 #ifdef CONFIG_NET_POLL_CONTROLLER
314 dev->poll_controller = e100_netpoll;
315 #endif
316
317 spin_lock_init(&np->lock);
318 spin_lock_init(&np->led_lock);
319 spin_lock_init(&np->transceiver_lock);
320
321 /* Initialise the list of Etrax DMA-descriptors */
322
323 /* Initialise receive descriptors */
324
325 for (i = 0; i < NBR_OF_RX_DESC; i++) {
326 /* Allocate two extra cachelines to make sure that buffer used
327 * by DMA does not share cacheline with any other data (to
328 * avoid cache bug)
329 */
330 RxDescList[i].skb = dev_alloc_skb(MAX_MEDIA_DATA_SIZE + 2 * L1_CACHE_BYTES);
331 if (!RxDescList[i].skb)
332 return -ENOMEM;
333 RxDescList[i].descr.ctrl = 0;
334 RxDescList[i].descr.sw_len = MAX_MEDIA_DATA_SIZE;
335 RxDescList[i].descr.next = virt_to_phys(&RxDescList[i + 1]);
336 RxDescList[i].descr.buf = L1_CACHE_ALIGN(virt_to_phys(RxDescList[i].skb->data));
337 RxDescList[i].descr.status = 0;
338 RxDescList[i].descr.hw_len = 0;
339 prepare_rx_descriptor(&RxDescList[i].descr);
340 }
341
342 RxDescList[NBR_OF_RX_DESC - 1].descr.ctrl = d_eol;
343 RxDescList[NBR_OF_RX_DESC - 1].descr.next = virt_to_phys(&RxDescList[0]);
344 rx_queue_len = 0;
345
346 /* Initialize transmit descriptors */
347 for (i = 0; i < NBR_OF_TX_DESC; i++) {
348 TxDescList[i].descr.ctrl = 0;
349 TxDescList[i].descr.sw_len = 0;
350 TxDescList[i].descr.next = virt_to_phys(&TxDescList[i + 1].descr);
351 TxDescList[i].descr.buf = 0;
352 TxDescList[i].descr.status = 0;
353 TxDescList[i].descr.hw_len = 0;
354 TxDescList[i].skb = 0;
355 }
356
357 TxDescList[NBR_OF_TX_DESC - 1].descr.ctrl = d_eol;
358 TxDescList[NBR_OF_TX_DESC - 1].descr.next = virt_to_phys(&TxDescList[0].descr);
359
360 /* Initialise initial pointers */
361
362 myNextRxDesc = &RxDescList[0];
363 myLastRxDesc = &RxDescList[NBR_OF_RX_DESC - 1];
364 myFirstTxDesc = &TxDescList[0];
365 myNextTxDesc = &TxDescList[0];
366 myLastTxDesc = &TxDescList[NBR_OF_TX_DESC - 1];
367
368 /* Register device */
369 err = register_netdev(dev);
370 if (err) {
371 free_netdev(dev);
372 return err;
373 }
374
375 /* set the default MAC address */
376
377 e100_set_mac_address(dev, &default_mac);
378
379 /* Initialize speed indicator stuff. */
380
381 current_speed = 10;
382 current_speed_selection = 0; /* Auto */
383 speed_timer.expires = jiffies + NET_LINK_UP_CHECK_INTERVAL;
384 speed_timer.data = (unsigned long)dev;
385 speed_timer.function = e100_check_speed;
386
387 clear_led_timer.function = e100_clear_network_leds;
388 clear_led_timer.data = (unsigned long)dev;
389
390 full_duplex = 0;
391 current_duplex = autoneg;
392 duplex_timer.expires = jiffies + NET_DUPLEX_CHECK_INTERVAL;
393 duplex_timer.data = (unsigned long)dev;
394 duplex_timer.function = e100_check_duplex;
395
396 /* Initialize mii interface */
397 np->mii_if.phy_id_mask = 0x1f;
398 np->mii_if.reg_num_mask = 0x1f;
399 np->mii_if.dev = dev;
400 np->mii_if.mdio_read = e100_get_mdio_reg;
401 np->mii_if.mdio_write = e100_set_mdio_reg;
402
403 /* Initialize group address registers to make sure that no */
404 /* unwanted addresses are matched */
405 *R_NETWORK_GA_0 = 0x00000000;
406 *R_NETWORK_GA_1 = 0x00000000;
407
408 /* Initialize next time the led can flash */
409 led_next_time = jiffies;
410 return 0;
411 }
412
413 /* set MAC address of the interface. called from the core after a
414 * SIOCSIFADDR ioctl, and from the bootup above.
415 */
416
417 static int
418 e100_set_mac_address(struct net_device *dev, void *p)
419 {
420 struct net_local *np = netdev_priv(dev);
421 struct sockaddr *addr = p;
422 DECLARE_MAC_BUF(mac);
423
424 spin_lock(&np->lock); /* preemption protection */
425
426 /* remember it */
427
428 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
429
430 /* Write it to the hardware.
431 * Note the way the address is wrapped:
432 * *R_NETWORK_SA_0 = a0_0 | (a0_1 << 8) | (a0_2 << 16) | (a0_3 << 24);
433 * *R_NETWORK_SA_1 = a0_4 | (a0_5 << 8);
434 */
435
436 *R_NETWORK_SA_0 = dev->dev_addr[0] | (dev->dev_addr[1] << 8) |
437 (dev->dev_addr[2] << 16) | (dev->dev_addr[3] << 24);
438 *R_NETWORK_SA_1 = dev->dev_addr[4] | (dev->dev_addr[5] << 8);
439 *R_NETWORK_SA_2 = 0;
440
441 /* show it in the log as well */
442
443 printk(KERN_INFO "%s: changed MAC to %s\n",
444 dev->name, print_mac(mac, dev->dev_addr));
445
446 spin_unlock(&np->lock);
447
448 return 0;
449 }
450
451 /*
452 * Open/initialize the board. This is called (in the current kernel)
453 * sometime after booting when the 'ifconfig' program is run.
454 *
455 * This routine should set everything up anew at each open, even
456 * registers that "should" only need to be set once at boot, so that
457 * there is non-reboot way to recover if something goes wrong.
458 */
459
460 static int
461 e100_open(struct net_device *dev)
462 {
463 unsigned long flags;
464
465 /* enable the MDIO output pin */
466
467 *R_NETWORK_MGM_CTRL = IO_STATE(R_NETWORK_MGM_CTRL, mdoe, enable);
468
469 *R_IRQ_MASK0_CLR =
470 IO_STATE(R_IRQ_MASK0_CLR, overrun, clr) |
471 IO_STATE(R_IRQ_MASK0_CLR, underrun, clr) |
472 IO_STATE(R_IRQ_MASK0_CLR, excessive_col, clr);
473
474 /* clear dma0 and 1 eop and descr irq masks */
475 *R_IRQ_MASK2_CLR =
476 IO_STATE(R_IRQ_MASK2_CLR, dma0_descr, clr) |
477 IO_STATE(R_IRQ_MASK2_CLR, dma0_eop, clr) |
478 IO_STATE(R_IRQ_MASK2_CLR, dma1_descr, clr) |
479 IO_STATE(R_IRQ_MASK2_CLR, dma1_eop, clr);
480
481 /* Reset and wait for the DMA channels */
482
483 RESET_DMA(NETWORK_TX_DMA_NBR);
484 RESET_DMA(NETWORK_RX_DMA_NBR);
485 WAIT_DMA(NETWORK_TX_DMA_NBR);
486 WAIT_DMA(NETWORK_RX_DMA_NBR);
487
488 /* Initialise the etrax network controller */
489
490 /* allocate the irq corresponding to the receiving DMA */
491
492 if (request_irq(NETWORK_DMA_RX_IRQ_NBR, e100rxtx_interrupt,
493 IRQF_SAMPLE_RANDOM, cardname, (void *)dev)) {
494 goto grace_exit0;
495 }
496
497 /* allocate the irq corresponding to the transmitting DMA */
498
499 if (request_irq(NETWORK_DMA_TX_IRQ_NBR, e100rxtx_interrupt, 0,
500 cardname, (void *)dev)) {
501 goto grace_exit1;
502 }
503
504 /* allocate the irq corresponding to the network errors etc */
505
506 if (request_irq(NETWORK_STATUS_IRQ_NBR, e100nw_interrupt, 0,
507 cardname, (void *)dev)) {
508 goto grace_exit2;
509 }
510
511 /*
512 * Always allocate the DMA channels after the IRQ,
513 * and clean up on failure.
514 */
515
516 if (cris_request_dma(NETWORK_TX_DMA_NBR,
517 cardname,
518 DMA_VERBOSE_ON_ERROR,
519 dma_eth)) {
520 goto grace_exit3;
521 }
522
523 if (cris_request_dma(NETWORK_RX_DMA_NBR,
524 cardname,
525 DMA_VERBOSE_ON_ERROR,
526 dma_eth)) {
527 goto grace_exit4;
528 }
529
530 /* give the HW an idea of what MAC address we want */
531
532 *R_NETWORK_SA_0 = dev->dev_addr[0] | (dev->dev_addr[1] << 8) |
533 (dev->dev_addr[2] << 16) | (dev->dev_addr[3] << 24);
534 *R_NETWORK_SA_1 = dev->dev_addr[4] | (dev->dev_addr[5] << 8);
535 *R_NETWORK_SA_2 = 0;
536
537 #if 0
538 /* use promiscuous mode for testing */
539 *R_NETWORK_GA_0 = 0xffffffff;
540 *R_NETWORK_GA_1 = 0xffffffff;
541
542 *R_NETWORK_REC_CONFIG = 0xd; /* broadcast rec, individ. rec, ma0 enabled */
543 #else
544 SETS(network_rec_config_shadow, R_NETWORK_REC_CONFIG, max_size, size1522);
545 SETS(network_rec_config_shadow, R_NETWORK_REC_CONFIG, broadcast, receive);
546 SETS(network_rec_config_shadow, R_NETWORK_REC_CONFIG, ma0, enable);
547 SETF(network_rec_config_shadow, R_NETWORK_REC_CONFIG, duplex, full_duplex);
548 *R_NETWORK_REC_CONFIG = network_rec_config_shadow;
549 #endif
550
551 *R_NETWORK_GEN_CONFIG =
552 IO_STATE(R_NETWORK_GEN_CONFIG, phy, mii_clk) |
553 IO_STATE(R_NETWORK_GEN_CONFIG, enable, on);
554
555 SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, clr_error, clr);
556 SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, delay, none);
557 SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, cancel, dont);
558 SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, cd, enable);
559 SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, retry, enable);
560 SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, pad, enable);
561 SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, crc, enable);
562 *R_NETWORK_TR_CTRL = network_tr_ctrl_shadow;
563
564 local_irq_save(flags);
565
566 /* enable the irq's for ethernet DMA */
567
568 *R_IRQ_MASK2_SET =
569 IO_STATE(R_IRQ_MASK2_SET, dma0_eop, set) |
570 IO_STATE(R_IRQ_MASK2_SET, dma1_eop, set);
571
572 *R_IRQ_MASK0_SET =
573 IO_STATE(R_IRQ_MASK0_SET, overrun, set) |
574 IO_STATE(R_IRQ_MASK0_SET, underrun, set) |
575 IO_STATE(R_IRQ_MASK0_SET, excessive_col, set);
576
577 /* make sure the irqs are cleared */
578
579 *R_DMA_CH0_CLR_INTR = IO_STATE(R_DMA_CH0_CLR_INTR, clr_eop, do);
580 *R_DMA_CH1_CLR_INTR = IO_STATE(R_DMA_CH1_CLR_INTR, clr_eop, do);
581
582 /* make sure the rec and transmit error counters are cleared */
583
584 (void)*R_REC_COUNTERS; /* dummy read */
585 (void)*R_TR_COUNTERS; /* dummy read */
586
587 /* start the receiving DMA channel so we can receive packets from now on */
588
589 *R_DMA_CH1_FIRST = virt_to_phys(myNextRxDesc);
590 *R_DMA_CH1_CMD = IO_STATE(R_DMA_CH1_CMD, cmd, start);
591
592 /* Set up transmit DMA channel so it can be restarted later */
593
594 *R_DMA_CH0_FIRST = 0;
595 *R_DMA_CH0_DESCR = virt_to_phys(myLastTxDesc);
596 netif_start_queue(dev);
597
598 local_irq_restore(flags);
599
600 /* Probe for transceiver */
601 if (e100_probe_transceiver(dev))
602 goto grace_exit5;
603
604 /* Start duplex/speed timers */
605 add_timer(&speed_timer);
606 add_timer(&duplex_timer);
607
608 /* We are now ready to accept transmit requeusts from
609 * the queueing layer of the networking.
610 */
611 netif_carrier_on(dev);
612
613 return 0;
614
615 grace_exit5:
616 cris_free_dma(NETWORK_RX_DMA_NBR, cardname);
617 grace_exit4:
618 cris_free_dma(NETWORK_TX_DMA_NBR, cardname);
619 grace_exit3:
620 free_irq(NETWORK_STATUS_IRQ_NBR, (void *)dev);
621 grace_exit2:
622 free_irq(NETWORK_DMA_TX_IRQ_NBR, (void *)dev);
623 grace_exit1:
624 free_irq(NETWORK_DMA_RX_IRQ_NBR, (void *)dev);
625 grace_exit0:
626 return -EAGAIN;
627 }
628
629 #if defined(CONFIG_ETRAX_NO_PHY)
630 static void
631 dummy_check_speed(struct net_device* dev)
632 {
633 current_speed = 100;
634 }
635 #else
636 static void
637 generic_check_speed(struct net_device* dev)
638 {
639 unsigned long data;
640 struct net_local *np = netdev_priv(dev);
641
642 data = e100_get_mdio_reg(dev, np->mii_if.phy_id, MII_ADVERTISE);
643 if ((data & ADVERTISE_100FULL) ||
644 (data & ADVERTISE_100HALF))
645 current_speed = 100;
646 else
647 current_speed = 10;
648 }
649
650 static void
651 tdk_check_speed(struct net_device* dev)
652 {
653 unsigned long data;
654 struct net_local *np = netdev_priv(dev);
655
656 data = e100_get_mdio_reg(dev, np->mii_if.phy_id,
657 MDIO_TDK_DIAGNOSTIC_REG);
658 current_speed = (data & MDIO_TDK_DIAGNOSTIC_RATE ? 100 : 10);
659 }
660
661 static void
662 broadcom_check_speed(struct net_device* dev)
663 {
664 unsigned long data;
665 struct net_local *np = netdev_priv(dev);
666
667 data = e100_get_mdio_reg(dev, np->mii_if.phy_id,
668 MDIO_AUX_CTRL_STATUS_REG);
669 current_speed = (data & MDIO_BC_SPEED ? 100 : 10);
670 }
671
672 static void
673 intel_check_speed(struct net_device* dev)
674 {
675 unsigned long data;
676 struct net_local *np = netdev_priv(dev);
677
678 data = e100_get_mdio_reg(dev, np->mii_if.phy_id,
679 MDIO_INT_STATUS_REG_2);
680 current_speed = (data & MDIO_INT_SPEED ? 100 : 10);
681 }
682 #endif
683 static void
684 e100_check_speed(unsigned long priv)
685 {
686 struct net_device* dev = (struct net_device*)priv;
687 struct net_local *np = netdev_priv(dev);
688 static int led_initiated = 0;
689 unsigned long data;
690 int old_speed = current_speed;
691
692 spin_lock(&np->transceiver_lock);
693
694 data = e100_get_mdio_reg(dev, np->mii_if.phy_id, MII_BMSR);
695 if (!(data & BMSR_LSTATUS)) {
696 current_speed = 0;
697 } else {
698 transceiver->check_speed(dev);
699 }
700
701 spin_lock(&np->led_lock);
702 if ((old_speed != current_speed) || !led_initiated) {
703 led_initiated = 1;
704 e100_set_network_leds(NO_NETWORK_ACTIVITY);
705 if (current_speed)
706 netif_carrier_on(dev);
707 else
708 netif_carrier_off(dev);
709 }
710 spin_unlock(&np->led_lock);
711
712 /* Reinitialize the timer. */
713 speed_timer.expires = jiffies + NET_LINK_UP_CHECK_INTERVAL;
714 add_timer(&speed_timer);
715
716 spin_unlock(&np->transceiver_lock);
717 }
718
719 static void
720 e100_negotiate(struct net_device* dev)
721 {
722 struct net_local *np = netdev_priv(dev);
723 unsigned short data = e100_get_mdio_reg(dev, np->mii_if.phy_id,
724 MII_ADVERTISE);
725
726 /* Discard old speed and duplex settings */
727 data &= ~(ADVERTISE_100HALF | ADVERTISE_100FULL |
728 ADVERTISE_10HALF | ADVERTISE_10FULL);
729
730 switch (current_speed_selection) {
731 case 10:
732 if (current_duplex == full)
733 data |= ADVERTISE_10FULL;
734 else if (current_duplex == half)
735 data |= ADVERTISE_10HALF;
736 else
737 data |= ADVERTISE_10HALF | ADVERTISE_10FULL;
738 break;
739
740 case 100:
741 if (current_duplex == full)
742 data |= ADVERTISE_100FULL;
743 else if (current_duplex == half)
744 data |= ADVERTISE_100HALF;
745 else
746 data |= ADVERTISE_100HALF | ADVERTISE_100FULL;
747 break;
748
749 case 0: /* Auto */
750 if (current_duplex == full)
751 data |= ADVERTISE_100FULL | ADVERTISE_10FULL;
752 else if (current_duplex == half)
753 data |= ADVERTISE_100HALF | ADVERTISE_10HALF;
754 else
755 data |= ADVERTISE_10HALF | ADVERTISE_10FULL |
756 ADVERTISE_100HALF | ADVERTISE_100FULL;
757 break;
758
759 default: /* assume autoneg speed and duplex */
760 data |= ADVERTISE_10HALF | ADVERTISE_10FULL |
761 ADVERTISE_100HALF | ADVERTISE_100FULL;
762 break;
763 }
764
765 e100_set_mdio_reg(dev, np->mii_if.phy_id, MII_ADVERTISE, data);
766
767 /* Renegotiate with link partner */
768 if (autoneg_normal) {
769 data = e100_get_mdio_reg(dev, np->mii_if.phy_id, MII_BMCR);
770 data |= BMCR_ANENABLE | BMCR_ANRESTART;
771 }
772 e100_set_mdio_reg(dev, np->mii_if.phy_id, MII_BMCR, data);
773 }
774
775 static void
776 e100_set_speed(struct net_device* dev, unsigned long speed)
777 {
778 struct net_local *np = netdev_priv(dev);
779
780 spin_lock(&np->transceiver_lock);
781 if (speed != current_speed_selection) {
782 current_speed_selection = speed;
783 e100_negotiate(dev);
784 }
785 spin_unlock(&np->transceiver_lock);
786 }
787
788 static void
789 e100_check_duplex(unsigned long priv)
790 {
791 struct net_device *dev = (struct net_device *)priv;
792 struct net_local *np = netdev_priv(dev);
793 int old_duplex;
794
795 spin_lock(&np->transceiver_lock);
796 old_duplex = full_duplex;
797 transceiver->check_duplex(dev);
798 if (old_duplex != full_duplex) {
799 /* Duplex changed */
800 SETF(network_rec_config_shadow, R_NETWORK_REC_CONFIG, duplex, full_duplex);
801 *R_NETWORK_REC_CONFIG = network_rec_config_shadow;
802 }
803
804 /* Reinitialize the timer. */
805 duplex_timer.expires = jiffies + NET_DUPLEX_CHECK_INTERVAL;
806 add_timer(&duplex_timer);
807 np->mii_if.full_duplex = full_duplex;
808 spin_unlock(&np->transceiver_lock);
809 }
810 #if defined(CONFIG_ETRAX_NO_PHY)
811 static void
812 dummy_check_duplex(struct net_device* dev)
813 {
814 full_duplex = 1;
815 }
816 #else
817 static void
818 generic_check_duplex(struct net_device* dev)
819 {
820 unsigned long data;
821 struct net_local *np = netdev_priv(dev);
822
823 data = e100_get_mdio_reg(dev, np->mii_if.phy_id, MII_ADVERTISE);
824 if ((data & ADVERTISE_10FULL) ||
825 (data & ADVERTISE_100FULL))
826 full_duplex = 1;
827 else
828 full_duplex = 0;
829 }
830
831 static void
832 tdk_check_duplex(struct net_device* dev)
833 {
834 unsigned long data;
835 struct net_local *np = netdev_priv(dev);
836
837 data = e100_get_mdio_reg(dev, np->mii_if.phy_id,
838 MDIO_TDK_DIAGNOSTIC_REG);
839 full_duplex = (data & MDIO_TDK_DIAGNOSTIC_DPLX) ? 1 : 0;
840 }
841
842 static void
843 broadcom_check_duplex(struct net_device* dev)
844 {
845 unsigned long data;
846 struct net_local *np = netdev_priv(dev);
847
848 data = e100_get_mdio_reg(dev, np->mii_if.phy_id,
849 MDIO_AUX_CTRL_STATUS_REG);
850 full_duplex = (data & MDIO_BC_FULL_DUPLEX_IND) ? 1 : 0;
851 }
852
853 static void
854 intel_check_duplex(struct net_device* dev)
855 {
856 unsigned long data;
857 struct net_local *np = netdev_priv(dev);
858
859 data = e100_get_mdio_reg(dev, np->mii_if.phy_id,
860 MDIO_INT_STATUS_REG_2);
861 full_duplex = (data & MDIO_INT_FULL_DUPLEX_IND) ? 1 : 0;
862 }
863 #endif
864 static void
865 e100_set_duplex(struct net_device* dev, enum duplex new_duplex)
866 {
867 struct net_local *np = netdev_priv(dev);
868
869 spin_lock(&np->transceiver_lock);
870 if (new_duplex != current_duplex) {
871 current_duplex = new_duplex;
872 e100_negotiate(dev);
873 }
874 spin_unlock(&np->transceiver_lock);
875 }
876
877 static int
878 e100_probe_transceiver(struct net_device* dev)
879 {
880 int ret = 0;
881
882 #if !defined(CONFIG_ETRAX_NO_PHY)
883 unsigned int phyid_high;
884 unsigned int phyid_low;
885 unsigned int oui;
886 struct transceiver_ops* ops = NULL;
887 struct net_local *np = netdev_priv(dev);
888
889 spin_lock(&np->transceiver_lock);
890
891 /* Probe MDIO physical address */
892 for (np->mii_if.phy_id = 0; np->mii_if.phy_id <= 31;
893 np->mii_if.phy_id++) {
894 if (e100_get_mdio_reg(dev,
895 np->mii_if.phy_id, MII_BMSR) != 0xffff)
896 break;
897 }
898 if (np->mii_if.phy_id == 32) {
899 ret = -ENODEV;
900 goto out;
901 }
902
903 /* Get manufacturer */
904 phyid_high = e100_get_mdio_reg(dev, np->mii_if.phy_id, MII_PHYSID1);
905 phyid_low = e100_get_mdio_reg(dev, np->mii_if.phy_id, MII_PHYSID2);
906 oui = (phyid_high << 6) | (phyid_low >> 10);
907
908 for (ops = &transceivers[0]; ops->oui; ops++) {
909 if (ops->oui == oui)
910 break;
911 }
912 transceiver = ops;
913 out:
914 spin_unlock(&np->transceiver_lock);
915 #endif
916 return ret;
917 }
918
919 static int
920 e100_get_mdio_reg(struct net_device *dev, int phy_id, int location)
921 {
922 unsigned short cmd; /* Data to be sent on MDIO port */
923 int data; /* Data read from MDIO */
924 int bitCounter;
925
926 /* Start of frame, OP Code, Physical Address, Register Address */
927 cmd = (MDIO_START << 14) | (MDIO_READ << 12) | (phy_id << 7) |
928 (location << 2);
929
930 e100_send_mdio_cmd(cmd, 0);
931
932 data = 0;
933
934 /* Data... */
935 for (bitCounter=15; bitCounter>=0 ; bitCounter--) {
936 data |= (e100_receive_mdio_bit() << bitCounter);
937 }
938
939 return data;
940 }
941
942 static void
943 e100_set_mdio_reg(struct net_device *dev, int phy_id, int location, int value)
944 {
945 int bitCounter;
946 unsigned short cmd;
947
948 cmd = (MDIO_START << 14) | (MDIO_WRITE << 12) | (phy_id << 7) |
949 (location << 2);
950
951 e100_send_mdio_cmd(cmd, 1);
952
953 /* Data... */
954 for (bitCounter=15; bitCounter>=0 ; bitCounter--) {
955 e100_send_mdio_bit(GET_BIT(bitCounter, value));
956 }
957
958 }
959
960 static void
961 e100_send_mdio_cmd(unsigned short cmd, int write_cmd)
962 {
963 int bitCounter;
964 unsigned char data = 0x2;
965
966 /* Preamble */
967 for (bitCounter = 31; bitCounter>= 0; bitCounter--)
968 e100_send_mdio_bit(GET_BIT(bitCounter, MDIO_PREAMBLE));
969
970 for (bitCounter = 15; bitCounter >= 2; bitCounter--)
971 e100_send_mdio_bit(GET_BIT(bitCounter, cmd));
972
973 /* Turnaround */
974 for (bitCounter = 1; bitCounter >= 0 ; bitCounter--)
975 if (write_cmd)
976 e100_send_mdio_bit(GET_BIT(bitCounter, data));
977 else
978 e100_receive_mdio_bit();
979 }
980
981 static void
982 e100_send_mdio_bit(unsigned char bit)
983 {
984 *R_NETWORK_MGM_CTRL =
985 IO_STATE(R_NETWORK_MGM_CTRL, mdoe, enable) |
986 IO_FIELD(R_NETWORK_MGM_CTRL, mdio, bit);
987 udelay(1);
988 *R_NETWORK_MGM_CTRL =
989 IO_STATE(R_NETWORK_MGM_CTRL, mdoe, enable) |
990 IO_MASK(R_NETWORK_MGM_CTRL, mdck) |
991 IO_FIELD(R_NETWORK_MGM_CTRL, mdio, bit);
992 udelay(1);
993 }
994
995 static unsigned char
996 e100_receive_mdio_bit()
997 {
998 unsigned char bit;
999 *R_NETWORK_MGM_CTRL = 0;
1000 bit = IO_EXTRACT(R_NETWORK_STAT, mdio, *R_NETWORK_STAT);
1001 udelay(1);
1002 *R_NETWORK_MGM_CTRL = IO_MASK(R_NETWORK_MGM_CTRL, mdck);
1003 udelay(1);
1004 return bit;
1005 }
1006
1007 static void
1008 e100_reset_transceiver(struct net_device* dev)
1009 {
1010 struct net_local *np = netdev_priv(dev);
1011 unsigned short cmd;
1012 unsigned short data;
1013 int bitCounter;
1014
1015 data = e100_get_mdio_reg(dev, np->mii_if.phy_id, MII_BMCR);
1016
1017 cmd = (MDIO_START << 14) | (MDIO_WRITE << 12) | (np->mii_if.phy_id << 7) | (MII_BMCR << 2);
1018
1019 e100_send_mdio_cmd(cmd, 1);
1020
1021 data |= 0x8000;
1022
1023 for (bitCounter = 15; bitCounter >= 0 ; bitCounter--) {
1024 e100_send_mdio_bit(GET_BIT(bitCounter, data));
1025 }
1026 }
1027
1028 /* Called by upper layers if they decide it took too long to complete
1029 * sending a packet - we need to reset and stuff.
1030 */
1031
1032 static void
1033 e100_tx_timeout(struct net_device *dev)
1034 {
1035 struct net_local *np = netdev_priv(dev);
1036 unsigned long flags;
1037
1038 spin_lock_irqsave(&np->lock, flags);
1039
1040 printk(KERN_WARNING "%s: transmit timed out, %s?\n", dev->name,
1041 tx_done(dev) ? "IRQ problem" : "network cable problem");
1042
1043 /* remember we got an error */
1044
1045 np->stats.tx_errors++;
1046
1047 /* reset the TX DMA in case it has hung on something */
1048
1049 RESET_DMA(NETWORK_TX_DMA_NBR);
1050 WAIT_DMA(NETWORK_TX_DMA_NBR);
1051
1052 /* Reset the transceiver. */
1053
1054 e100_reset_transceiver(dev);
1055
1056 /* and get rid of the packets that never got an interrupt */
1057 while (myFirstTxDesc != myNextTxDesc) {
1058 dev_kfree_skb(myFirstTxDesc->skb);
1059 myFirstTxDesc->skb = 0;
1060 myFirstTxDesc = phys_to_virt(myFirstTxDesc->descr.next);
1061 }
1062
1063 /* Set up transmit DMA channel so it can be restarted later */
1064 *R_DMA_CH0_FIRST = 0;
1065 *R_DMA_CH0_DESCR = virt_to_phys(myLastTxDesc);
1066
1067 /* tell the upper layers we're ok again */
1068
1069 netif_wake_queue(dev);
1070 spin_unlock_irqrestore(&np->lock, flags);
1071 }
1072
1073
1074 /* This will only be invoked if the driver is _not_ in XOFF state.
1075 * What this means is that we need not check it, and that this
1076 * invariant will hold if we make sure that the netif_*_queue()
1077 * calls are done at the proper times.
1078 */
1079
1080 static int
1081 e100_send_packet(struct sk_buff *skb, struct net_device *dev)
1082 {
1083 struct net_local *np = netdev_priv(dev);
1084 unsigned char *buf = skb->data;
1085 unsigned long flags;
1086
1087 #ifdef ETHDEBUG
1088 printk("send packet len %d\n", length);
1089 #endif
1090 spin_lock_irqsave(&np->lock, flags); /* protect from tx_interrupt and ourself */
1091
1092 myNextTxDesc->skb = skb;
1093
1094 dev->trans_start = jiffies;
1095
1096 e100_hardware_send_packet(np, buf, skb->len);
1097
1098 myNextTxDesc = phys_to_virt(myNextTxDesc->descr.next);
1099
1100 /* Stop queue if full */
1101 if (myNextTxDesc == myFirstTxDesc) {
1102 netif_stop_queue(dev);
1103 }
1104
1105 spin_unlock_irqrestore(&np->lock, flags);
1106
1107 return 0;
1108 }
1109
1110 /*
1111 * The typical workload of the driver:
1112 * Handle the network interface interrupts.
1113 */
1114
1115 static irqreturn_t
1116 e100rxtx_interrupt(int irq, void *dev_id)
1117 {
1118 struct net_device *dev = (struct net_device *)dev_id;
1119 struct net_local *np = netdev_priv(dev);
1120 unsigned long irqbits;
1121
1122 /*
1123 * Note that both rx and tx interrupts are blocked at this point,
1124 * regardless of which got us here.
1125 */
1126
1127 irqbits = *R_IRQ_MASK2_RD;
1128
1129 /* Handle received packets */
1130 if (irqbits & IO_STATE(R_IRQ_MASK2_RD, dma1_eop, active)) {
1131 /* acknowledge the eop interrupt */
1132
1133 *R_DMA_CH1_CLR_INTR = IO_STATE(R_DMA_CH1_CLR_INTR, clr_eop, do);
1134
1135 /* check if one or more complete packets were indeed received */
1136
1137 while ((*R_DMA_CH1_FIRST != virt_to_phys(myNextRxDesc)) &&
1138 (myNextRxDesc != myLastRxDesc)) {
1139 /* Take out the buffer and give it to the OS, then
1140 * allocate a new buffer to put a packet in.
1141 */
1142 e100_rx(dev);
1143 np->stats.rx_packets++;
1144 /* restart/continue on the channel, for safety */
1145 *R_DMA_CH1_CMD = IO_STATE(R_DMA_CH1_CMD, cmd, restart);
1146 /* clear dma channel 1 eop/descr irq bits */
1147 *R_DMA_CH1_CLR_INTR =
1148 IO_STATE(R_DMA_CH1_CLR_INTR, clr_eop, do) |
1149 IO_STATE(R_DMA_CH1_CLR_INTR, clr_descr, do);
1150
1151 /* now, we might have gotten another packet
1152 so we have to loop back and check if so */
1153 }
1154 }
1155
1156 /* Report any packets that have been sent */
1157 while (virt_to_phys(myFirstTxDesc) != *R_DMA_CH0_FIRST &&
1158 (netif_queue_stopped(dev) || myFirstTxDesc != myNextTxDesc)) {
1159 np->stats.tx_bytes += myFirstTxDesc->skb->len;
1160 np->stats.tx_packets++;
1161
1162 /* dma is ready with the transmission of the data in tx_skb, so now
1163 we can release the skb memory */
1164 dev_kfree_skb_irq(myFirstTxDesc->skb);
1165 myFirstTxDesc->skb = 0;
1166 myFirstTxDesc = phys_to_virt(myFirstTxDesc->descr.next);
1167 /* Wake up queue. */
1168 netif_wake_queue(dev);
1169 }
1170
1171 if (irqbits & IO_STATE(R_IRQ_MASK2_RD, dma0_eop, active)) {
1172 /* acknowledge the eop interrupt. */
1173 *R_DMA_CH0_CLR_INTR = IO_STATE(R_DMA_CH0_CLR_INTR, clr_eop, do);
1174 }
1175
1176 return IRQ_HANDLED;
1177 }
1178
1179 static irqreturn_t
1180 e100nw_interrupt(int irq, void *dev_id)
1181 {
1182 struct net_device *dev = (struct net_device *)dev_id;
1183 struct net_local *np = netdev_priv(dev);
1184 unsigned long irqbits = *R_IRQ_MASK0_RD;
1185
1186 /* check for underrun irq */
1187 if (irqbits & IO_STATE(R_IRQ_MASK0_RD, underrun, active)) {
1188 SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, clr_error, clr);
1189 *R_NETWORK_TR_CTRL = network_tr_ctrl_shadow;
1190 SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, clr_error, nop);
1191 np->stats.tx_errors++;
1192 D(printk("ethernet receiver underrun!\n"));
1193 }
1194
1195 /* check for overrun irq */
1196 if (irqbits & IO_STATE(R_IRQ_MASK0_RD, overrun, active)) {
1197 update_rx_stats(&np->stats); /* this will ack the irq */
1198 D(printk("ethernet receiver overrun!\n"));
1199 }
1200 /* check for excessive collision irq */
1201 if (irqbits & IO_STATE(R_IRQ_MASK0_RD, excessive_col, active)) {
1202 SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, clr_error, clr);
1203 *R_NETWORK_TR_CTRL = network_tr_ctrl_shadow;
1204 SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, clr_error, nop);
1205 np->stats.tx_errors++;
1206 D(printk("ethernet excessive collisions!\n"));
1207 }
1208 return IRQ_HANDLED;
1209 }
1210
1211 /* We have a good packet(s), get it/them out of the buffers. */
1212 static void
1213 e100_rx(struct net_device *dev)
1214 {
1215 struct sk_buff *skb;
1216 int length = 0;
1217 struct net_local *np = netdev_priv(dev);
1218 unsigned char *skb_data_ptr;
1219 #ifdef ETHDEBUG
1220 int i;
1221 #endif
1222 etrax_eth_descr *prevRxDesc; /* The descriptor right before myNextRxDesc */
1223 spin_lock(&np->led_lock);
1224 if (!led_active && time_after(jiffies, led_next_time)) {
1225 /* light the network leds depending on the current speed. */
1226 e100_set_network_leds(NETWORK_ACTIVITY);
1227
1228 /* Set the earliest time we may clear the LED */
1229 led_next_time = jiffies + NET_FLASH_TIME;
1230 led_active = 1;
1231 mod_timer(&clear_led_timer, jiffies + HZ/10);
1232 }
1233 spin_unlock(&np->led_lock);
1234
1235 length = myNextRxDesc->descr.hw_len - 4;
1236 np->stats.rx_bytes += length;
1237
1238 #ifdef ETHDEBUG
1239 printk("Got a packet of length %d:\n", length);
1240 /* dump the first bytes in the packet */
1241 skb_data_ptr = (unsigned char *)phys_to_virt(myNextRxDesc->descr.buf);
1242 for (i = 0; i < 8; i++) {
1243 printk("%d: %.2x %.2x %.2x %.2x %.2x %.2x %.2x %.2x\n", i * 8,
1244 skb_data_ptr[0],skb_data_ptr[1],skb_data_ptr[2],skb_data_ptr[3],
1245 skb_data_ptr[4],skb_data_ptr[5],skb_data_ptr[6],skb_data_ptr[7]);
1246 skb_data_ptr += 8;
1247 }
1248 #endif
1249
1250 if (length < RX_COPYBREAK) {
1251 /* Small packet, copy data */
1252 skb = dev_alloc_skb(length - ETHER_HEAD_LEN);
1253 if (!skb) {
1254 np->stats.rx_errors++;
1255 printk(KERN_NOTICE "%s: Memory squeeze, dropping packet.\n", dev->name);
1256 goto update_nextrxdesc;
1257 }
1258
1259 skb_put(skb, length - ETHER_HEAD_LEN); /* allocate room for the packet body */
1260 skb_data_ptr = skb_push(skb, ETHER_HEAD_LEN); /* allocate room for the header */
1261
1262 #ifdef ETHDEBUG
1263 printk("head = 0x%x, data = 0x%x, tail = 0x%x, end = 0x%x\n",
1264 skb->head, skb->data, skb_tail_pointer(skb),
1265 skb_end_pointer(skb));
1266 printk("copying packet to 0x%x.\n", skb_data_ptr);
1267 #endif
1268
1269 memcpy(skb_data_ptr, phys_to_virt(myNextRxDesc->descr.buf), length);
1270 }
1271 else {
1272 /* Large packet, send directly to upper layers and allocate new
1273 * memory (aligned to cache line boundary to avoid bug).
1274 * Before sending the skb to upper layers we must make sure
1275 * that skb->data points to the aligned start of the packet.
1276 */
1277 int align;
1278 struct sk_buff *new_skb = dev_alloc_skb(MAX_MEDIA_DATA_SIZE + 2 * L1_CACHE_BYTES);
1279 if (!new_skb) {
1280 np->stats.rx_errors++;
1281 printk(KERN_NOTICE "%s: Memory squeeze, dropping packet.\n", dev->name);
1282 goto update_nextrxdesc;
1283 }
1284 skb = myNextRxDesc->skb;
1285 align = (int)phys_to_virt(myNextRxDesc->descr.buf) - (int)skb->data;
1286 skb_put(skb, length + align);
1287 skb_pull(skb, align); /* Remove alignment bytes */
1288 myNextRxDesc->skb = new_skb;
1289 myNextRxDesc->descr.buf = L1_CACHE_ALIGN(virt_to_phys(myNextRxDesc->skb->data));
1290 }
1291
1292 skb->protocol = eth_type_trans(skb, dev);
1293
1294 /* Send the packet to the upper layers */
1295 netif_rx(skb);
1296
1297 update_nextrxdesc:
1298 /* Prepare for next packet */
1299 myNextRxDesc->descr.status = 0;
1300 prevRxDesc = myNextRxDesc;
1301 myNextRxDesc = phys_to_virt(myNextRxDesc->descr.next);
1302
1303 rx_queue_len++;
1304
1305 /* Check if descriptors should be returned */
1306 if (rx_queue_len == RX_QUEUE_THRESHOLD) {
1307 flush_etrax_cache();
1308 prevRxDesc->descr.ctrl |= d_eol;
1309 myLastRxDesc->descr.ctrl &= ~d_eol;
1310 myLastRxDesc = prevRxDesc;
1311 rx_queue_len = 0;
1312 }
1313 }
1314
1315 /* The inverse routine to net_open(). */
1316 static int
1317 e100_close(struct net_device *dev)
1318 {
1319 struct net_local *np = netdev_priv(dev);
1320
1321 printk(KERN_INFO "Closing %s.\n", dev->name);
1322
1323 netif_stop_queue(dev);
1324
1325 *R_IRQ_MASK0_CLR =
1326 IO_STATE(R_IRQ_MASK0_CLR, overrun, clr) |
1327 IO_STATE(R_IRQ_MASK0_CLR, underrun, clr) |
1328 IO_STATE(R_IRQ_MASK0_CLR, excessive_col, clr);
1329
1330 *R_IRQ_MASK2_CLR =
1331 IO_STATE(R_IRQ_MASK2_CLR, dma0_descr, clr) |
1332 IO_STATE(R_IRQ_MASK2_CLR, dma0_eop, clr) |
1333 IO_STATE(R_IRQ_MASK2_CLR, dma1_descr, clr) |
1334 IO_STATE(R_IRQ_MASK2_CLR, dma1_eop, clr);
1335
1336 /* Stop the receiver and the transmitter */
1337
1338 RESET_DMA(NETWORK_TX_DMA_NBR);
1339 RESET_DMA(NETWORK_RX_DMA_NBR);
1340
1341 /* Flush the Tx and disable Rx here. */
1342
1343 free_irq(NETWORK_DMA_RX_IRQ_NBR, (void *)dev);
1344 free_irq(NETWORK_DMA_TX_IRQ_NBR, (void *)dev);
1345 free_irq(NETWORK_STATUS_IRQ_NBR, (void *)dev);
1346
1347 cris_free_dma(NETWORK_TX_DMA_NBR, cardname);
1348 cris_free_dma(NETWORK_RX_DMA_NBR, cardname);
1349
1350 /* Update the statistics here. */
1351
1352 update_rx_stats(&np->stats);
1353 update_tx_stats(&np->stats);
1354
1355 /* Stop speed/duplex timers */
1356 del_timer(&speed_timer);
1357 del_timer(&duplex_timer);
1358
1359 return 0;
1360 }
1361
1362 static int
1363 e100_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
1364 {
1365 struct mii_ioctl_data *data = if_mii(ifr);
1366 struct net_local *np = netdev_priv(dev);
1367 int rc = 0;
1368 int old_autoneg;
1369
1370 spin_lock(&np->lock); /* Preempt protection */
1371 switch (cmd) {
1372 /* The ioctls below should be considered obsolete but are */
1373 /* still present for compatability with old scripts/apps */
1374 case SET_ETH_SPEED_10: /* 10 Mbps */
1375 e100_set_speed(dev, 10);
1376 break;
1377 case SET_ETH_SPEED_100: /* 100 Mbps */
1378 e100_set_speed(dev, 100);
1379 break;
1380 case SET_ETH_SPEED_AUTO: /* Auto-negotiate speed */
1381 e100_set_speed(dev, 0);
1382 break;
1383 case SET_ETH_DUPLEX_HALF: /* Half duplex */
1384 e100_set_duplex(dev, half);
1385 break;
1386 case SET_ETH_DUPLEX_FULL: /* Full duplex */
1387 e100_set_duplex(dev, full);
1388 break;
1389 case SET_ETH_DUPLEX_AUTO: /* Auto-negotiate duplex */
1390 e100_set_duplex(dev, autoneg);
1391 break;
1392 case SET_ETH_AUTONEG:
1393 old_autoneg = autoneg_normal;
1394 autoneg_normal = *(int*)data;
1395 if (autoneg_normal != old_autoneg)
1396 e100_negotiate(dev);
1397 break;
1398 default:
1399 rc = generic_mii_ioctl(&np->mii_if, if_mii(ifr),
1400 cmd, NULL);
1401 break;
1402 }
1403 spin_unlock(&np->lock);
1404 return rc;
1405 }
1406
1407 static int e100_get_settings(struct net_device *dev,
1408 struct ethtool_cmd *cmd)
1409 {
1410 struct net_local *np = netdev_priv(dev);
1411 int err;
1412
1413 spin_lock_irq(&np->lock);
1414 err = mii_ethtool_gset(&np->mii_if, cmd);
1415 spin_unlock_irq(&np->lock);
1416
1417 /* The PHY may support 1000baseT, but the Etrax100 does not. */
1418 cmd->supported &= ~(SUPPORTED_1000baseT_Half
1419 | SUPPORTED_1000baseT_Full);
1420 return err;
1421 }
1422
1423 static int e100_set_settings(struct net_device *dev,
1424 struct ethtool_cmd *ecmd)
1425 {
1426 if (ecmd->autoneg == AUTONEG_ENABLE) {
1427 e100_set_duplex(dev, autoneg);
1428 e100_set_speed(dev, 0);
1429 } else {
1430 e100_set_duplex(dev, ecmd->duplex == DUPLEX_HALF ? half : full);
1431 e100_set_speed(dev, ecmd->speed == SPEED_10 ? 10: 100);
1432 }
1433
1434 return 0;
1435 }
1436
1437 static void e100_get_drvinfo(struct net_device *dev,
1438 struct ethtool_drvinfo *info)
1439 {
1440 strncpy(info->driver, "ETRAX 100LX", sizeof(info->driver) - 1);
1441 strncpy(info->version, "$Revision: 1.31 $", sizeof(info->version) - 1);
1442 strncpy(info->fw_version, "N/A", sizeof(info->fw_version) - 1);
1443 strncpy(info->bus_info, "N/A", sizeof(info->bus_info) - 1);
1444 }
1445
1446 static int e100_nway_reset(struct net_device *dev)
1447 {
1448 if (current_duplex == autoneg && current_speed_selection == 0)
1449 e100_negotiate(dev);
1450 return 0;
1451 }
1452
1453 static const struct ethtool_ops e100_ethtool_ops = {
1454 .get_settings = e100_get_settings,
1455 .set_settings = e100_set_settings,
1456 .get_drvinfo = e100_get_drvinfo,
1457 .nway_reset = e100_nway_reset,
1458 .get_link = ethtool_op_get_link,
1459 };
1460
1461 static int
1462 e100_set_config(struct net_device *dev, struct ifmap *map)
1463 {
1464 struct net_local *np = netdev_priv(dev);
1465
1466 spin_lock(&np->lock); /* Preempt protection */
1467
1468 switch(map->port) {
1469 case IF_PORT_UNKNOWN:
1470 /* Use autoneg */
1471 e100_set_speed(dev, 0);
1472 e100_set_duplex(dev, autoneg);
1473 break;
1474 case IF_PORT_10BASET:
1475 e100_set_speed(dev, 10);
1476 e100_set_duplex(dev, autoneg);
1477 break;
1478 case IF_PORT_100BASET:
1479 case IF_PORT_100BASETX:
1480 e100_set_speed(dev, 100);
1481 e100_set_duplex(dev, autoneg);
1482 break;
1483 case IF_PORT_100BASEFX:
1484 case IF_PORT_10BASE2:
1485 case IF_PORT_AUI:
1486 spin_unlock(&np->lock);
1487 return -EOPNOTSUPP;
1488 break;
1489 default:
1490 printk(KERN_ERR "%s: Invalid media selected", dev->name);
1491 spin_unlock(&np->lock);
1492 return -EINVAL;
1493 }
1494 spin_unlock(&np->lock);
1495 return 0;
1496 }
1497
1498 static void
1499 update_rx_stats(struct net_device_stats *es)
1500 {
1501 unsigned long r = *R_REC_COUNTERS;
1502 /* update stats relevant to reception errors */
1503 es->rx_fifo_errors += IO_EXTRACT(R_REC_COUNTERS, congestion, r);
1504 es->rx_crc_errors += IO_EXTRACT(R_REC_COUNTERS, crc_error, r);
1505 es->rx_frame_errors += IO_EXTRACT(R_REC_COUNTERS, alignment_error, r);
1506 es->rx_length_errors += IO_EXTRACT(R_REC_COUNTERS, oversize, r);
1507 }
1508
1509 static void
1510 update_tx_stats(struct net_device_stats *es)
1511 {
1512 unsigned long r = *R_TR_COUNTERS;
1513 /* update stats relevant to transmission errors */
1514 es->collisions +=
1515 IO_EXTRACT(R_TR_COUNTERS, single_col, r) +
1516 IO_EXTRACT(R_TR_COUNTERS, multiple_col, r);
1517 }
1518
1519 /*
1520 * Get the current statistics.
1521 * This may be called with the card open or closed.
1522 */
1523 static struct net_device_stats *
1524 e100_get_stats(struct net_device *dev)
1525 {
1526 struct net_local *lp = netdev_priv(dev);
1527 unsigned long flags;
1528
1529 spin_lock_irqsave(&lp->lock, flags);
1530
1531 update_rx_stats(&lp->stats);
1532 update_tx_stats(&lp->stats);
1533
1534 spin_unlock_irqrestore(&lp->lock, flags);
1535 return &lp->stats;
1536 }
1537
1538 /*
1539 * Set or clear the multicast filter for this adaptor.
1540 * num_addrs == -1 Promiscuous mode, receive all packets
1541 * num_addrs == 0 Normal mode, clear multicast list
1542 * num_addrs > 0 Multicast mode, receive normal and MC packets,
1543 * and do best-effort filtering.
1544 */
1545 static void
1546 set_multicast_list(struct net_device *dev)
1547 {
1548 struct net_local *lp = netdev_priv(dev);
1549 int num_addr = dev->mc_count;
1550 unsigned long int lo_bits;
1551 unsigned long int hi_bits;
1552
1553 spin_lock(&lp->lock);
1554 if (dev->flags & IFF_PROMISC) {
1555 /* promiscuous mode */
1556 lo_bits = 0xfffffffful;
1557 hi_bits = 0xfffffffful;
1558
1559 /* Enable individual receive */
1560 SETS(network_rec_config_shadow, R_NETWORK_REC_CONFIG, individual, receive);
1561 *R_NETWORK_REC_CONFIG = network_rec_config_shadow;
1562 } else if (dev->flags & IFF_ALLMULTI) {
1563 /* enable all multicasts */
1564 lo_bits = 0xfffffffful;
1565 hi_bits = 0xfffffffful;
1566
1567 /* Disable individual receive */
1568 SETS(network_rec_config_shadow, R_NETWORK_REC_CONFIG, individual, discard);
1569 *R_NETWORK_REC_CONFIG = network_rec_config_shadow;
1570 } else if (num_addr == 0) {
1571 /* Normal, clear the mc list */
1572 lo_bits = 0x00000000ul;
1573 hi_bits = 0x00000000ul;
1574
1575 /* Disable individual receive */
1576 SETS(network_rec_config_shadow, R_NETWORK_REC_CONFIG, individual, discard);
1577 *R_NETWORK_REC_CONFIG = network_rec_config_shadow;
1578 } else {
1579 /* MC mode, receive normal and MC packets */
1580 char hash_ix;
1581 struct dev_mc_list *dmi = dev->mc_list;
1582 int i;
1583 char *baddr;
1584
1585 lo_bits = 0x00000000ul;
1586 hi_bits = 0x00000000ul;
1587 for (i = 0; i < num_addr; i++) {
1588 /* Calculate the hash index for the GA registers */
1589
1590 hash_ix = 0;
1591 baddr = dmi->dmi_addr;
1592 hash_ix ^= (*baddr) & 0x3f;
1593 hash_ix ^= ((*baddr) >> 6) & 0x03;
1594 ++baddr;
1595 hash_ix ^= ((*baddr) << 2) & 0x03c;
1596 hash_ix ^= ((*baddr) >> 4) & 0xf;
1597 ++baddr;
1598 hash_ix ^= ((*baddr) << 4) & 0x30;
1599 hash_ix ^= ((*baddr) >> 2) & 0x3f;
1600 ++baddr;
1601 hash_ix ^= (*baddr) & 0x3f;
1602 hash_ix ^= ((*baddr) >> 6) & 0x03;
1603 ++baddr;
1604 hash_ix ^= ((*baddr) << 2) & 0x03c;
1605 hash_ix ^= ((*baddr) >> 4) & 0xf;
1606 ++baddr;
1607 hash_ix ^= ((*baddr) << 4) & 0x30;
1608 hash_ix ^= ((*baddr) >> 2) & 0x3f;
1609
1610 hash_ix &= 0x3f;
1611
1612 if (hash_ix >= 32) {
1613 hi_bits |= (1 << (hash_ix-32));
1614 } else {
1615 lo_bits |= (1 << hash_ix);
1616 }
1617 dmi = dmi->next;
1618 }
1619 /* Disable individual receive */
1620 SETS(network_rec_config_shadow, R_NETWORK_REC_CONFIG, individual, discard);
1621 *R_NETWORK_REC_CONFIG = network_rec_config_shadow;
1622 }
1623 *R_NETWORK_GA_0 = lo_bits;
1624 *R_NETWORK_GA_1 = hi_bits;
1625 spin_unlock(&lp->lock);
1626 }
1627
1628 void
1629 e100_hardware_send_packet(struct net_local *np, char *buf, int length)
1630 {
1631 D(printk("e100 send pack, buf 0x%x len %d\n", buf, length));
1632
1633 spin_lock(&np->led_lock);
1634 if (!led_active && time_after(jiffies, led_next_time)) {
1635 /* light the network leds depending on the current speed. */
1636 e100_set_network_leds(NETWORK_ACTIVITY);
1637
1638 /* Set the earliest time we may clear the LED */
1639 led_next_time = jiffies + NET_FLASH_TIME;
1640 led_active = 1;
1641 mod_timer(&clear_led_timer, jiffies + HZ/10);
1642 }
1643 spin_unlock(&np->led_lock);
1644
1645 /* configure the tx dma descriptor */
1646 myNextTxDesc->descr.sw_len = length;
1647 myNextTxDesc->descr.ctrl = d_eop | d_eol | d_wait;
1648 myNextTxDesc->descr.buf = virt_to_phys(buf);
1649
1650 /* Move end of list */
1651 myLastTxDesc->descr.ctrl &= ~d_eol;
1652 myLastTxDesc = myNextTxDesc;
1653
1654 /* Restart DMA channel */
1655 *R_DMA_CH0_CMD = IO_STATE(R_DMA_CH0_CMD, cmd, restart);
1656 }
1657
1658 static void
1659 e100_clear_network_leds(unsigned long dummy)
1660 {
1661 struct net_device *dev = (struct net_device *)dummy;
1662 struct net_local *np = netdev_priv(dev);
1663
1664 spin_lock(&np->led_lock);
1665
1666 if (led_active && time_after(jiffies, led_next_time)) {
1667 e100_set_network_leds(NO_NETWORK_ACTIVITY);
1668
1669 /* Set the earliest time we may set the LED */
1670 led_next_time = jiffies + NET_FLASH_PAUSE;
1671 led_active = 0;
1672 }
1673
1674 spin_unlock(&np->led_lock);
1675 }
1676
1677 static void
1678 e100_set_network_leds(int active)
1679 {
1680 #if defined(CONFIG_ETRAX_NETWORK_LED_ON_WHEN_LINK)
1681 int light_leds = (active == NO_NETWORK_ACTIVITY);
1682 #elif defined(CONFIG_ETRAX_NETWORK_LED_ON_WHEN_ACTIVITY)
1683 int light_leds = (active == NETWORK_ACTIVITY);
1684 #else
1685 #error "Define either CONFIG_ETRAX_NETWORK_LED_ON_WHEN_LINK or CONFIG_ETRAX_NETWORK_LED_ON_WHEN_ACTIVITY"
1686 #endif
1687
1688 if (!current_speed) {
1689 /* Make LED red, link is down */
1690 #if defined(CONFIG_ETRAX_NETWORK_RED_ON_NO_CONNECTION)
1691 CRIS_LED_NETWORK_SET(CRIS_LED_RED);
1692 #else
1693 CRIS_LED_NETWORK_SET(CRIS_LED_OFF);
1694 #endif
1695 } else if (light_leds) {
1696 if (current_speed == 10) {
1697 CRIS_LED_NETWORK_SET(CRIS_LED_ORANGE);
1698 } else {
1699 CRIS_LED_NETWORK_SET(CRIS_LED_GREEN);
1700 }
1701 } else {
1702 CRIS_LED_NETWORK_SET(CRIS_LED_OFF);
1703 }
1704 }
1705
1706 #ifdef CONFIG_NET_POLL_CONTROLLER
1707 static void
1708 e100_netpoll(struct net_device* netdev)
1709 {
1710 e100rxtx_interrupt(NETWORK_DMA_TX_IRQ_NBR, netdev, NULL);
1711 }
1712 #endif
1713
1714 static int
1715 etrax_init_module(void)
1716 {
1717 return etrax_ethernet_init();
1718 }
1719
1720 static int __init
1721 e100_boot_setup(char* str)
1722 {
1723 struct sockaddr sa = {0};
1724 int i;
1725
1726 /* Parse the colon separated Ethernet station address */
1727 for (i = 0; i < ETH_ALEN; i++) {
1728 unsigned int tmp;
1729 if (sscanf(str + 3*i, "%2x", &tmp) != 1) {
1730 printk(KERN_WARNING "Malformed station address");
1731 return 0;
1732 }
1733 sa.sa_data[i] = (char)tmp;
1734 }
1735
1736 default_mac = sa;
1737 return 1;
1738 }
1739
1740 __setup("etrax100_eth=", e100_boot_setup);
1741
1742 module_init(etrax_init_module);
WRT350N Kernel Patches